Abstract: An electric current detector has a bus bar with a current direction changing section for changing a direction of electric current through the bus bar, and a magnetic detector disposed in the current direction changing section of the bus bar. The current direction changing section of the bus bar has a pair of parallel portions at which the bus bar is orthogonally deformed, and a connection portion at which the pair of parallel portions are connected, and the magnetic detector is disposed between the pair of parallel portions. The magnetic detector has a magnetic detection element disposed on a substrate, and a yoke surrounding the substrate and allowing the magnetic detection element to be placed between both ends thereof.

Abstract: The use of multiple sensors improves the measurement speed of a nuclear quadrupole resonance detection system when the nuclear quadrupole resonance frequency is known only within a range of frequencies.

Abstract: The present invention provides an apparatus for reducing acoustic noise in a magnetic resonance imaging device including passive shielding located outside the actively shielded gradient winding elements in order to reduce the magnitude of fields that spread outside the gradient coil assembly in unwanted directions and interact with the magnet cryostat or other metallic magnet parts, inducing eddy currents that cause consequent acoustic noise. The passive shielding elements are conducting layers located on the outer radius of the cylindrical gradient coil assembly in a cylindrical magnet system, conducting layers located at the ends of the gradient coil assembly in a cylindrical magnet system, and conducting layers located inside the actively shielded gradient winding inner elements in a cylindrical magnet system. The passive shielding could also be located on separate structures that are vibrationally isolated from the magnet cryostat.

Abstract: A birdcage resonator for magnetic resonance applications has two ferrules disposed in spaced-apart parallel ferrule planes. A line connecting the ferrule centers defines the antenna axis of the birdcage resonator, which orthogonally intersects the ferrule planes. The birdcage resonator has a number of antenna rods regularly distributed around the antenna axis, extending from ferrule to ferrule. The birdcage resonator has two coupling rings in addition to the ferrules that surround the antenna axis in respective coupling ring planes orthogonal to the antenna axis, and that are spaced from but coupling with the ferrules. The coupling rings are tuned to cause the ferrules to be resonant at frequencies other than without the coupling rings. The ferrules couple with one another in common eigenmodes, namely a common mode with a common mode frequency, and a push-pull mode with a push-pull frequency differing from the common mode frequency.

Abstract: A magnetic resonance system has a basic field magnet system that annularly surrounds an examination volume, a gradient system arranged radially within the basic magnetic system, a radio-frequency shield arranged radially within the gradient system and a whole-body coil arranged radially within the radio-frequency shield. The gradient system is essentially circular, such that the gradient system defines a gradient system axis. With regard to a complete circumference around the gradient system axis, the whole-body coil has a first segment and a second segment complementary to the first segment. The first segment covers an angular range of more than 180° relative to the gradient system axis. The whole-body coil exhibits a constant curvature radius in the first segment and is more gently curved in the second segment than in the first segment.

Abstract: A real time electronic metal detector including a magnetic transmitter (1) and a receiver (3), wherein the receiver includes approximate sine-wave weighted synchronous demodulation and a switched voltage signal is applied to the magnetic transmitter and the said receiver approximate sine-wave weighted synchronous demodulation is selected to receive synchronously with the switched voltage signal, such that the switched voltage signal and the receiver approximate sine-wave weighted synchronous demodulation may be altered by means of operator selection.

Abstract: Methods and apparatus are provided for controlled source electromagnetic surveying. In particular, a time-varying electromagnetic signal is transmitted at a first location, and an electromagnetic signal responsive to the transmitted signal is received at a second location, wherein the received signal includes a transient response component and a steady-state component. The received signal is continuously recorded during a predetermined time interval, and data corresponding to the transient response component and the steady-state component are extracted from the received signal. The transient response data and the steady-state response data are jointly inverted to identify a subsurface feature, such as resistivity.

Abstract: A sensor for electric field measurement at the floor of a body of water has at least one pair of square or rectangular electrodes (139, 140) with a known area positioned in parallel separated by a distance and connected by a resistor (120) having a value that matches the resistance of the water between the electrodes. The detected electric fields may be naturally-occurring or artificially generated using a controlled electromagnetic (EM) source.

Abstract: The electrical measuring apparatus (17) and temperature sensing apparatus minimises the number of connections required for each contact (30, 31) of a battery (18). The present invention measures the core temperature of the battery (18) which is useful in monitoring the health of the battery (18). The apparatus comprises first connection means to connect to the first contact (30) of the battery (18) and second connection means to connect to the second contact (31) of the battery (18). The apparatus includes a thermistor (36) which connects in series with one lead (32) of the connecting means. Accordingly, the apparatus does not require the temperature sensor (36) to be independently connected to the battery (18).

Abstract: A method for evaluating the condition of a battery comprises coupling a first power transistor as or as part of a first external load in series with the battery, coupling a second power transistor as or as part of a second external load in series with the battery, and conducting each power transistor to draw a transient large current from the battery while sampling the voltage across the battery and voltage across the load, from which the internal resistance of the battery can be determined. The internal resistance of the battery can then be compared with a predetermined nominal value to issue a warning if the battery is weak. The invention enables, for example, a driver to correctly know the actual condition of an automobile battery in substantially real time while consuming a minimum amount of power.

Abstract: A fluid conductivity test device for testing the conductivity of a fluid in a container. The device includes a fitting that may mate either directly to or indirectly to a tap on, for example, a keg, to allow the fluid in the container to come into contact with the sensor device. The conductivity of the fluid is measured and compared with known conductivities for identification of the fluid. The entire device is relatively small and light-weight for ease of connection to many different containers.

Abstract: A semiconductor device includes a plurality of fuses, and a plurality of latch circuits respectively electrically connected to the plurality of fuses. The plurality of latch circuits are configured to store respective fuse-cut information from the plurality of fuses, and to then sequentially transmit the fuse-cut information through the latch circuits to output sequential data indicative of a fuse-cut state of the plurality of fuses.

Abstract: A system for measuring a frequency response of an electrical network, comprises a signal source, a signal source path, a reflectometer receiver interactively associated with the signal source path by a directional coupler, and one or more additional reflectometer receivers arranged in series along the signal source path and associated with the signal source path by one or more respective additional directional couplers. The directional coupler and one or more respective additional directional couplers operate at different frequency ranges.

Abstract: A microwave sending antenna 3R and a microwave receiving antenna 4R are provided to a right-side furnace wall 1R, and the system is devised so that the microwaves emitted from the microwave sending antenna 3R are reflected by the right-side edge of a cold-rolled steel plate 2, and the reflected waves are received by the microwave receiving antenna 4R. Similarly, a microwave sending antenna 3L and a microwave receiving antenna 4L are provided to a left-side furnace wall 1L, and the system is devised so that the microwaves emitted from the microwave sending antenna 3L are reflected by the left-side edge of the cold-rolled steel plate 2, and the reflected waves are received by the microwave receiving antenna 4L. If the time from the sending of the microwaves until the receiving of the reflected waves is designated as t, and the velocity of the microwaves is designated as c, then the distance to the object reflecting the microwaves is determined from t·c/2.

Abstract: A sensor includes a field effect transistor having a source, drain, a control gate and floating gate, wherein the floating gate has an extended portion extending away from the control gate. A sensing gate is capacitively coupled to the extended portion of the floating gate. A polymer electret sensing coating is electrically coupled to the sensing gate.

Abstract: In accordance with the invention, a surface capacitive sensor is mechanically coupled to a conventional macrostructure actuator to measure the displacement of the actuator along a measurement axis with high accuracy.

Abstract: A capacitive sensing system (2, 2?, 2?) is used to measure a timevarying ion current through a channel (50), such as an ion channel or protein pore. Such a capacitive system (2, 2?, 2?) does not suffer problems of electrode corrosion and, when used with methods to control a build up of ion concentration, allows the use of measurement volumes (10, 20) around the channel (50) with dimensions on a scale of nanometers.

Abstract: A capacitive touch sensor is provided having sensing path for setting a parameter to a desired value within a range. The sensor has a first mode of operation in which a parameter can be set approximately to a desired value and a second mode in which the value can be refined to the exact amount. In the first mode, the full range of possible values is mapped onto the sensing path and a user touch selects a value within the full range according to its position along the sensing path. In the second mode a finer adjustment is provided for, either by mapping a narrower sub-range of the full range onto the sensing path, or by allowing incremental adjustment of the parameter from the value initially set in the first mode, each incremental unit of adjustment being triggered by the object being displaced through a pre-determined threshold displacement along the sensing path.

Abstract: The present invention relates to a carbon nanotube transistor biosensor with aptamers and a method for detecting a target material using the same, more particularly to a carbon nanotube transistor biosensor recognizing the target material, i.e., a specific molecule (such as a protein, a peptide, an amino acid, and an organic/inorganic compound) by using DNA aptamers and a method for screening a target material using the same. In the biosensor of the present invention, the aptamers binding specifically to a particular protein are adsorbed on a carbon nanotube constituting the channel domain of carbon nanotube transistor to easily detect/identify a particular protein via the electric conductivity of carbon nanotube that varies if the particular protein is exposed to corresponding aptamers.

Abstract: A gas concentration detection apparatus includes a series-connected combination of a sensor element and a resistor, with an AC voltage being applied to one of the outer terminals of that combination and with the other outer terminal being held at a fixed potential. A DC voltage signal at a level determined by an oxygen concentration that is detected by the sensor element, and an AC voltage signal at an amplitude determined by sensor element impedance and hence by the sensor element activation status, are extracted from the series-connected combination by respectively separate circuits which apply separately determined amplification factors.

Abstract: A potentiometer (PT1, PT2) has a first terminal (A1), a second terminal (A2) and an intermediate tap (ZA), a resistor being between the first terminal (A1) and the second terminal (A2) irrespective of the position of the potentiometer (PT1, PT2). In an evaluation method, a first drive voltage (GND) and at least one second drive voltage (VS), which is different than the first drive voltage, are applied to the first terminal (A1) and/or the second terminal (A2) and/or a third drive voltage (VS) is applied to the intermediate tap (ZA). The evaluation can be made from the different measurement voltages measured at the terminals.

Abstract: A system performs continuous full linear scan of a flat media. The system includes, in part, a chuck, and at least first, second and third gantries. The chuck is adapted to support the flat media during the test. The first gantry includes at least one linear array of non-contacting sensors that spans the width of the flat media and is adapted to move across an entire length of the flat media. Each of the second and third gantries includes a probe head that spans the width of the flat media and each is adapted to apply an electrical signal to the flat media. Each probe head is further adapted to move along a direction substantially perpendicular to the surface of the flat media during the times when the first gantry is in motion and while test signals are being continuously applied.

Abstract: A semiconductor wafer adapted to wirelessly transfer data to a testing system. The wafer comprises a plurality of dies, each die adjacent another die and each die comprising an infrared transceiver. A first infrared transceiver transfers data to a second infrared transceiver by emitting a pattern of infrared light pulses representative of the data.

Abstract: Disclosed is an electrical measurement probe including two probe blocks, each probe block having a connection face and a measurement face. Each probe block also includes a plurality of spring loaded pogo pins. Each pogo pin has a first end that extends to the connection face and a second end that protrudes from the measurement face. The two probe blocks are attached to a top plate. The top plate is attached to a face of each probe block opposite to the measurement face of the probe block.

Abstract: A multi-layer electric probe, suitable for testing a to-be-tested device, includes a first strip layer and a second strip layer. The first strip layer has a first conductivity and a first mechanical strength. The second strip layer has a second conductivity and a second mechanical strength. The first strip layer and the second strip layer are solidly adhered together as a structural body so as to produce at least one of the desired capabilities of enduring current and mechanical strength. The multi-layer electric probe can further include at least a third strip layer having the capability of enduring current and the desired mechanical strength.

Abstract: A probe structure for an electronic device is provided. In one aspect, the probe structure includes an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure includes an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier. The probe structure includes one or more other contact structures adapted for connection to a test apparatus.

Abstract: A stack-type semiconductor package socket may include: a first package connection portion for connection with leads of a lowermost package of a stack-type semiconductor package; a second package connection portion for connection between pads of an odd-numbered package and leads of an even-numbered package, wherein the odd-numbered package and the even-numbered package are adjacent to each other; a lower case for fixing the first package connection portion; and an upper case for fixing the second package connection portion.

Abstract: In a device for detecting a chip location and a method of detecting a chip location using the device, the device includes a chuck to which a wafer to be inspected is fixable, an infrared irradiation unit capable of irradiating infrared light to a target semiconductor chip of the wafer from the backside of the wafer, and a scope disposed opposite to the infrared irradiation unit with respect to the wafer. In this manner, it can be readily be determined whether the scope is aligned with a target semiconductor chip to which a probe card is connected for inspection by a backside emission method. Furthermore, the target semiconductor chip to be inspected can be readily detected among semiconductor chips viewed through the scope. Therefore, TAT (turn around time) for inspection can be largely reduced.

Abstract: The present invention discloses a method and system compensating for thermally induced motion of probe cards used in testing die on a wafer. A probe card incorporating temperature control devices to maintain a uniform temperature throughout the thickness of the probe card is disclosed. A probe card incorporating bi-material stiffening elements which respond to changes in temperature in such a way as to counteract thermally induced motion of the probe card is disclosed including rolling elements, slots and lubrication. Various means for allowing radial expansion of a probe card to prevent thermally induced motion of the probe card are also disclosed. A method for detecting thermally induced movement of the probe card and moving the wafer to compensate is also disclosed.

Abstract: A semiconductor probe having an embossed resistive tip and a method of fabricating the semiconductor probe are provided.

Abstract: A probe available for a narrow pitch pad without the need of cleaning is realized by providing a z deformed portion that is elastically deformed in a vertical direction, and a z? deformed portion that is serially connected to the z deformed portion to rotate while being elastically deformed at least in the vertical direction. The z? deformed portion has one or more rotation centers. The probe end has a curved surface in which the z? deformed portion rotates about the rotation centers when coming into contact with the pad and during overdrive in the inspection, the probe end comes into contact with the pad surface at one point or within a certain range, a relative displacement occurs between the pad surface and the probe end, the contaminant material is removed in the beginning of the contact, and then electrical continuity is established in the second half of the contact.

Abstract: A burn-in apparatus with a radio frequency signal generator is provided. One embodiment includes a printed circuit board to carry a plurality of semiconductor devices for a burn-in process and a radio frequency signal generator mounted on the printed circuit board to provide a plurality of radio frequency signals to the plurality of semiconductor devices respectively during the burn-in process of the plurality of semiconductor devices.

Abstract: The embodiments of the invention provide an apparatus and method for detection and compensation of negative bias temperature instability (NBTI) induced threshold degradation. A semiconductor device is provided comprising at least one stress device having a voltage applied to its gate node and at least one reference device having a zero gate-to-source voltage. A controller is also provided to configure node voltages of the device and/or the reference device to reflect different regions of device operations found in digital and analog circuit applications. Moreover, the controller measures a difference in current between the stress device and the reference device to determine whether NBTI induced threshold degradation has occurred in the stress device. The controller also adjusts an output power supply voltage of the stress device until a performance of the stress device matches a performance of the reference device to account for the NBTI induced threshold degradation.

Abstract: A universal system for testing different semiconductor devices provides a probe head with a probe pattern that may be used to test different test patterns formed on different semiconductor devices. Each of a plurality of bumps or pads of the test pattern contacts a corresponding probe of the probe head to enable the semiconductor device to be tested. The universal probe head may additionally or alternatively include a substrate design on the probe head that provides a pattern on the substrate of the probe head that may be used in conjunction with different patterns formed on a plurality of different printed circuit boards for testing different semiconductor devices.

Abstract: An apparatus for testing a semiconductor device that has opposing first and second sides is provided. The semiconductor device includes at least one functional unit on the first side and a plurality of terminals on the second side. The apparatus may include, but is not limited to, a mounting structure, and a plurality of electrodes. The mounting structure has at least one stage that is configured to allow the semiconductor device to be mounted thereon. The mounting structure has a communicating hole that penetrates the mounting structure from the stage. The communicating hole allows the at least one functional unit to face to the communicating hole while the semiconductor device is mounted on the stage. Each of the plurality of electrodes is configured to be contactable to a corresponding one of the plurality of terminals, while the semiconductor device is mounted on the stage.

Abstract: A Burn-In Board (BIB) transfer module that links a Burn-In Board (BIB) Loader/Unloader (BLU) to a burn-in chamber rack. The BIB transfer module is capable of transferring a BIB between the BLU and the burn-in chamber rack by moving the BIB in at least two perpendicular directions while minimizing the physical footprint required by the BIB transfer module. The BIB transfer module supports slot level burn-in of components as opposed to batch level burn-in because the burn-in chamber rack may begin the burn-in process as soon as a BIB is delivered to an individual chamber slot in the burn-in chamber rack. The BIB transfer module may easily be detached and separated from the BLU and the burn-in chamber rack without affecting the continuing operation of the BLU and the burn-in chamber rack.

Abstract: In testing a large number of semiconductor devices, semiconductor testing equipment of the present invention is provided with combination determining unit 105 that determines the combination of semiconductor devices to be simultaneously tested among semiconductor devices to be tested, on the basis of one of determination results or measured values in separate testing or manufacturing implemented before and stored in a memory 99, and past determination results or measured values stored in the memory 99 in the present testing.

Abstract: A power supply controller (20) is configured to operate in a test mode that facilitates measuring the value of an output signal of an error amplifier (36) of the power supply controller (20).

Abstract: A power supply includes a first amplifier, a first current stage, and a second current stage. The first amplifier is configured to set an output voltage equal to a fixed input voltage for supplying to a device. The first current stage is configured to source and sink a first range of first output currents and provide a first measurement current representing a first output current. The second current stage is configured to source and sink a second range of second output currents and provide a second measurement current representing a second output current in response to the first range being exceeded. The first output current and the second output current are summed for supplying to the device. The first measurement current and the second measurement current are summed at a node.

Abstract: A differential line compensation apparatus is disclosed that has a first terminal to receive a first differential signal supplied by a first trace and a second terminal to receive a second differential signal supplied by a second trace. The apparatus has at least one detector to detect a first condition of a first signal at least related to the first differential signal, and a second condition of a second signal at least related to the second differential signal and to provide an output containing the results of the detections. A comparator is coupled to the at least one detector to receive and process the at least one output and to provide a control output. At least one delay controller receives the control output and applies a phase correction to a selected one of the first signal and the second signal. A corresponding method and system are also disclosed.

Abstract: An integrated circuit is provided with body bias generation circuitry. The body bias generation circuitry generates a body bias signal that is provided to transistors on a body bias path. The body bias generation circuitry contains an active latch-up prevention circuit that clamps the body bias path at a safe voltage when potential latch-up conditions are detected. The level of body bias signal that is generated by the body bias circuitry is adjustable. The body bias generation circuitry regulates the body bias voltage on the body bias path using a p-channel control transistor. An isolation transistor is coupled between the p-channel control transistor and the body bias path. During potential latch-up conditions, the isolation transistor is turned off to isolate the body bias path from ground. Control circuitry adjusts a body bias voltage that is applied to body terminals in the p-channel control transistor and isolation transistor.

Abstract: A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.

Abstract: A software programmable DSP with a field programmable instruction set is described where customized instructions can be created, or certain existing instructions can be modified, at the user's location after taking delivery of the processor. The FPGA fabric used to implement the reprogrammable instructions is restricted to supporting the software-programmable DSP—never functioning as an independent coprocessor—and therefore enabling the reprogrammable instructions to exist in the normal stream of DSP software execution. DSP-type functions implemented in the FPGA fabric are also restricted to being automatically generated such that they are synchronous with the processor clocks—enabling easy conversion to an ASIC.

Abstract: An implementation of multiplexer functionality using a multiplexer having half the number of input ports as it has possible output values is provided. A multiplexer having two data input ports performs the function of a multiplexer having four predetermined data input signals (A1, A2, A3, A4). In general, a multiplexer having only m data input ports performs the function of a multiplexer having twice as many predetermined data input signals A1, A2, . . . , Aj, where j=m*2. The multiplexer functionality may be implemented using a programmable device having one or more macrocells, an inverter and switches such as antifuses.

Abstract: A process and apparatus provide a JTAG TAP controller (302) to access a JTAG TAP domain (106) of a device using a reduced pin count, high speed DDR interface (202). The access is accomplished by combining the separate TDI and TMS signals from the TAP controller into a single signal and communicating the TDI and TMS signals of the single signal on the rising and falling edges of the TCK driving the DDR interface. The TAP domain may be coupled to the TAP controller in a point to point fashion or in an addressable bus fashion. The access to the TAP domain may be used for JTAG based device testing, debugging, programming, or other type of JTAG based operation.

Abstract: A level conversion architecture that accommodates signals traveling between logic blocks operating at corresponding voltage levels is provided. The architecture includes pass gates connected in series between the logic blocks. One of the gates of the pass gates is supplied with a selectable gate voltage supply. The selectable gate voltage supply is selected from a plurality of voltages based on a configuration random access memory (CRAM) setting. In one embodiment, a half latch is connected to one of the pass gates. In this embodiment, the half latch is part of a feedback loop to minimize power leakage of a logic element in one of the logic blocks. A method for managing power consumption and providing voltage level conversion between regions of an integrated circuit is also provided.

Abstract: Apparatus for configuring input/output signal levels of interfacing logic circuits operating at different voltage levels comprises: a logic circuit for operating at a first voltage level; a bank of input/output gates coupled to the logic circuit for interfacing input/output signals at a second voltage level, different from the first voltage level, to the logic circuit, the bank of gates including a port for setting the operational voltage level thereof; and a control circuit coupled to the port and governed by a control signal to configure the operational voltage level of the bank of gates to render the logic circuit and the interfacing input/output signals voltage level compatible.

Abstract: Signal magnitude comparison apparatus and methods are disclosed. A first input circuit receives a differential input signal and provides a first output signal based on a magnitude of the differential input signal. A second input circuit is operatively coupled to the first input circuit and is operable to receive a second input signal, which may also be a differential signal, and to provide a second output signal based on a magnitude of the second input signal. The operative coupling between the first and second input circuits results in the first output signal and the second output signal forming a differential output signal that is indicative of a difference between the magnitude of the first differential input signal and the magnitude of the second input signal.

Abstract: A glitchless clock multiplexer controlled by an asynchronous select signal for use in GPS receivers is disclosed. A device in accordance with the present invention comprises a device for producing a clock signal, the clock signal being selected from a plurality of asynchronous frequency sources.

Abstract: A wide-range multi-phase clock generator having a first clock generating circuit, a frequency divider circuit, and a plurality of multiplexers. The first clock generating circuit generates a plurality of first clock signals, each having a first frequency and a respective one of a plurality of different phase angles. The frequency divider circuit receives the plurality of first clock signals from the first clock generating circuit, and generates a plurality of second clock signals, each having a second frequency and a respective one of the plurality of different phase angles. The multiplexers each have a first input coupled to receive a respective one of the first clock signals and a second input coupled to receive a respective one of the second clock signals having substantially the same phase angle as the one of the first clock signals.