Abstract: An light emitting diode lamp assembly in accordance with an embodiment of the present application includes a base, a ballast circuit mounted on a circuit board and operable to provide a desired output current and a light emitting diode electrically connected to the ballast and driven by the output current of the ballast circuit to provide light. The base is filled with a thermally conductive substance and the circuit board is mounted in the base and in thermal contact with the thermally conductive substance such that heat is drawn away from the light emitting diode through the circuit board and into the thermally conductive substance to the base.

Abstract: A backlight assembly includes a light source providing light, a mold frame receiving the light source unit and a bottom chassis. The bottom chassis includes a bottom plate, sidewalls extending from the bottom plate and an extension part bent from at least one of the sidewalls and overlapping an adjacent sidewall. The mold frame and the bottom chassis are integrally formed. The extension part overlaps the adjacent sidewall at a corner of the bottom chassis. Thus, the torsional strength of the bottom chassis and a backlight assembly having the bottom chassis is improved. The torsional strength is maintained when a backlight assembly is manufactured.

Abstract: A working lamp base of a barbeque grill includes a base with two protruding portions extended in the same direction from a lateral side of the base and forming a recession between the protruding portion and the base; a rack mount disposed on the base and proximate to a lateral side of each protruding portion, and corresponding to the position of said recession; and at least one lamp, each including a lamp body and a first movable supporting portion, and an end of said first movable supporting portion is coupled to one of said protruding portions and another end of the first movable supporting portion is coupled to the lamp body.

Abstract: To provide a tail lamp structure wherein a height in an upward and downward direction can be reduced to achieve miniaturization thereof. A tail lamp structure is equipped at a rear portion of a motorcycle. A board on which a stop lamp LED and a tail lamp LED are mounted in a spaced relationship from each other forwardly and backwardly is disposed in the forward and backward direction of the vehicle. The stop lamp LED and said tail lamp LED are isolated from each other by a reflector.

Abstract: A multi-function lamp system includes a lamp, which may include illuminable text, position beneath the door of a vehicle. The lamp may be illuminated to perform at least the following functions: side blinker and running board illumination.

Abstract: A vehicular lamp 100 including a reflector 19 that reflects light from a light source 13 forward and is provided in a lamp chamber 15 formed by a lamp body 17 that opens forward and a transparent front cover 11 that is attached to the front opening portion of the lamp body 17. The lamp body 17 is formed using a first material to have a skeletal configuration in which a plurality of through holes h1 to h4 are provided. The through holes h1 to h4 are closed by sealants s1 to s2, which are formed from a second material that is integrally formed with the first material.

Abstract: The application relates to light emitting devices. In order to provide good heat dissipation and easy adjustment of the lighting devices, there is provided to fix a light-emitting diode (12) having a metallic base (10) to a metallic heat-radiating element (18), which fixing comprises substance-to-substance bonding the base of the diode to a metallic sleeve (14), positioning the sleeve on the heat-radiating element such that the sleeve mantles the heat-radiating element, and connecting the sleeve with the heat-radiating element.

Abstract: The invention relates to an assembly of a bodywork part (10) and a headlight glass (12) for a motor vehicle, the headlight glass having an outline (14) designed to be engaged in an opening in the bodywork part, the opening being defined by an outline (16) in the bodywork part that is substantially complementary to the outline of the headlight glass, in which assembly at least part of the outline of the bodywork part (10) co-operates with the outline of the headlight glass (12) by elastic deformation.

Abstract: A vehicle lamp can suppress dimensions in the depth direction and provide a large emission area with a simple configuration, and has a light-emitting surface of wraparound configuration with impressive appearance and aesthetic qualities. The vehicle lamp can include a light source unit and a light guide lens. The light source unit can include a light source, and a converting part for converting light from the light source to a narrow width light. The conversion part has an emission area for emitting the converted light. The light guide lens can include one end face having a shape corresponding to the emission area of the conversion part, a thin plate-like light guiding portion for guiding the incident light, and another end face being a farthest part away from the incident surface. The light guide lens guides the incident light toward the other end face and emits the guided light from a predetermined surface thereof as it travels on its way through the lens.

Abstract: There is provided a lighting device for illuminating objects inside an enclosure including a housing, an array of light emitting diodes enclosed by the housing consisting of at least two groups of diodes, one group emitting substantially white light and one group emitting colored light, a DC to DC converter feeding the light-emitting diodes and enclosed by the housing, and a light intensity controller for operating each of the groups of diodes at variable light intensities.

Abstract: A lightbar assembly including a housing including a base of plastic material and warning light modules mounded in the housing. The warning light modules include LEDs attached to PC boards. Thermally conductive pads of a heat conductive plastic material are mounted in the base. A metallic heat conductive element is provided between the PC boards and the thermally conductive pads. A structural member is secured to the outside of the base and is in contact with the thermally conductive pads.

Abstract: A light source device of an endoscope system comprises a light source and a light-source controller. The light source emits in a flash-emitting mode that the light source flashes in a flash interval longer than a field period of an imaging sensor for the endoscope system and for a flash period shorter than the field period. The light-source controller controls the light source so that the light source emits in the flash-emitting mode within an imaging period that is a period excluding a reading period within the field period. The flash interval is defined as a period from when the flash of the light source commences to when the next flash of the light source commences. The flash period is defined as a period from when the flash of the light source commences to when the flash of the light source is completed.

Abstract: A light source device of an endoscope system comprises a light-source unit, a light-sensitive element, and a driving unit. The light-source unit emits light and supplies light to the photographic subject through an electronic scope. The light-sensitive element receives light emitted from the light-source unit. The driving unit adjusts the driving intensity of the light-source unit on the basis of a first information regarding an emitting-light intensity of the light-source unit output from the light-sensitive element.

Abstract: There is provided an optical diffuser sheet. The optical diffuser sheet has a first surface and a second surface opposite to the first surface. The first surface has a plurality of optical structures arranged to diffuse and direct light illuminated onto the first surface. The optical diffuser sheet when illuminated is characterized by an absorption of less than 10% and an absolute hiding power of less than 10%.

Abstract: A lighting device includes a plurality of light-transmitting guide plates 1, 2, 3 laminated in at least three layers and a plurality of light emitting elements 4, 5, 6 arranged so as to oppose to respective lateral sides of the light-transmitting guide plates 1, 2, 3 to allow luminance flux in different color with respect to each light-transmitting guide plate to be incident on the corresponding light-transmitting guide plate. Each of the light-transmitting guide plates 1, 2, 3 has a plurality of reflecting surfaces 7, 8, 9 formed on the backside of the plate to change a propagation direction of the luminance flux propagated in the each light-transmitting guide plate, allowing the luminance flux, of which propagation direction has been changed by the reflecting surfaces 7, 8, 9, to be emitted from the front side of the each light-transmitting guide plates.

Abstract: A replaceable LED light source device used in a backlight module comprises a LED bar disposed with a plurality of LEDs thereon used for providing illumination and an attaching plate used for disposing the detachable LED bar within a case locating the backlight module therein. Thereby, the previous LED light source device can be replaced by a new one when any LED on the LED bar stops working.

Abstract: A light guide includes an extractor layer and a substrate layer. Each layer has a first major surface and a second major surface. The second major surface of the extractor layer is in contact with the first major surface of the substrate layer, and the first major surface of the extractor layer has a plurality of discrete light extractors capable of extracting light propagating in the light guide such that light is extracted in a predetermined pattern over the first major surface of the extractor layer. In some embodiments, at least one of the extractor layer or substrate layer is flexible.

Abstract: A plate-shaped light guide for a planar light source device that guides a light emitted from a primary light source includes a light incident end face, a light emitting face and a back surface on the opposite to the light emitting face, wherein a plurality of first elongated lenses having an average slant angle of 0.5 to 60° are continuously or intermittently formed on one of the light emitting face and the back surface, and at least a portion of a surface of each first elongated lens, or at least a portion of the other one of the light emitting face and the back surface, or at least the portion of the surface of each first elongated lens and at least the portion of the other one of the light emitting face and the back surface includes a rough surface having an average slant angle of 0.1 to 80°.

Abstract: A light guide plate has an incidence face provided by a side end face, emission face and back face. The incidence face has first and second end edges meeting the emission face and the back face respectively. First range N1 in the emission face is set as to correspond to a reflecting-cover which returns at least a part of light emitted from first range N1 into the light guide plate. The reflecting-cover is disposed along the first end edge, covering a part of the emission face. Most of the returned light is emitted from second range N2, becoming illumination light. First range N1 has emission function weaker than that of second range N2, thereby avoiding the emission from showing abnormal emission in the vicinity of the first end edge. The reflecting-cover may be provided by an end edge portion of a lamp reflector for a primary light source.

Abstract: A switching drive circuit for soft switching is disclosed. It includes an input circuit to receive an input signal. A first delay circuit generates a first delay time in response to the enable of the input signal. A second delay circuit generates a second delay time in response to the disable of the input signal. A switching signal generator generates switching signals. The pulse width of the high-side switching signal is generated in proportional to the pulse width of the input signal. The high-side switching signal is enabled after the first delay time once the input signal is enabled. The low-side switching signal is disabled in response to the enable of the input signal. The low-side switching signal is enabled after the second delay time once the high-side switching signal is disabled.

Abstract: The present disclosure is directed towards a method for power conversion. The method may include controlling a first rectifier switch coupled to one end of a secondary winding of a transformer via a first control signal. The method may further include controlling a first low side switch via said first control signal, said first low side switch and a first high side switch coupled in series along a first path of a full bridge circuit, a first node located between said first high side switch and said first low side switch. The method may also include controlling a second rectifier switch coupled to an opposite end of said secondary winding via a second control signal.

Abstract: A system for transferring an alternating voltage into a direct voltage includes a rectifier, a filter, a transformer, a switch, a switch control circuit and a voltage feedback circuit. The rectifier connects to a main power supply device and rectifies the alternating voltage into a transient direct voltage. The filter filters out a noise from the transient direct voltage and produces a filtering direct voltage. The transformer transfers the filtering direct voltage into a working direct voltage. The switch which has a turn-on status and a cutoff status is used to control the current which goes through the transformer. The switch control circuit is used to control the switch be in the turn-on status or the cutoff status. The voltage feedback circuit drives the switch controlling circuit in accordance with the transformer's voltage and diminishes a switching loss from the switch.

Abstract: A power system having a power converter with an adaptive controller. In one embodiment, a power converter coupled to a load includes a power switch configured to conduct for a duty cycle to provide an output characteristic at an output thereof. The power converter also includes a power converter controller configured to receive a signal from the load indicating a system operational state of the load and enable a power converter topological state as a function of the signal.

Abstract: A control circuit controls the output current of the power converter at the primary side of the transformer. The control circuit includes a current-detection circuit for generating a primary-current signal in response to the switching current of the transformer. A voltage-detection circuit is coupled to the transformer to generate a period signal and a discharge-time signal in response to the reflected voltage of the transformer. A signal-process circuit is utilized to generate a current signal in response to the primary-current signal, the period signal and the discharge-time signal. The period signal is correlated to the switching period of the switching signal of the power converter. The discharge-time signal is correlated to the duty cycle of switching current at the secondary-side of the transformer. The current signal is correlated to the output current of the power converter.

Abstract: This invention presents a method of novel nonlinear control for designing Static Synchronous Compensators (STATCOM). A passivity-based approach is proposed for designing robust nonlinear STATCOM controller. The mathematical model of STATCOM will be represented by an Euler-Lagrange (EL) system corresponding to a set of EL parameters. By employing the Park's transformation, the differential geometry approach is used to investigate the power system dynamics with considering STATCOM under the synchronous d-q frame. The energy-dissipative properties of the proposed model derived in the synchronous d-q rotating frame are fully retained. This model also consider the dynamic response of the changable load. Finally, the passivity-based control is employed by using energy shaping and damping injection techniques to produce the proper control signals for Voltage Source Converter. So that the system embedded with STATCOM is more robust and stable.

Abstract: In one embodiment, a soft start circuit includes a slew rate controller to limit inrush current to a voltage regulator during start up. The output voltage of the regulator may be compared to a previous sampled value to determine the slew rate of the output voltage. The slew rate of the output voltage may be controlled by adjusting the current limit of the regulator. The current limit of the regulator may be adjusted using digital circuits, such as a counter and a digital to analog converter, or analog circuits using a pulsed current source, for example. The slew rate may be controlled to exceed a target slew rate or to stay within a range of slew rate limits.

Abstract: The invention relates to a rectifier circuit comprising a phase module (110) with at least one upper and one lower rectifier valve (T1, . . . , T6), said phase module (100) being electrically connected on the DC side to a positive and a negative DC busbar (P0, N0), each rectifier valve (T1, . . . , T6) having at least two bipolar subsystems (10) electrically connected in series. According to the invention, a protection component (12) is connected in parallel to the connector contacts (X1, X2) of each subsystem (10). A rectifier circuit is thus obtained with distributed energy stores which can be operated redundantly in case of fault.

Abstract: Various embodiments of the present invention provide rectifier controllers, power supplies and methods for operating such. As one example, a rectifier controller circuit is disclosed that includes a transistor, a phase locked loop circuit, a period counter and a combinational logic circuit. One leg of the transistor is electrically coupled to a switch node of a power supply, and is in parallel to a diode of the power supply. The phase locked loop circuit receives a signal representing a voltage at the switch node, and is operable to synchronize to a period of the signal representing the voltage at the switch node. The period counter divides the period of the signal representing the voltage at the switch node into segments.

Abstract: The present invention provides a low-cost resonant inverter circuit for ballast. The resonant circuit includes a transformer connected in series with a lamp to operate the lamp. A first transistor and a second transistor are coupled to switch the resonant inverter circuit. A second winding and a third winding of the transformer are used for generating control signals in response to a switching current of the resonant inverter circuit. The transistor is turned on once the control signal is higher than a high-threshold. Next, the transistor is turned off once the control signal is lower than a low-threshold. Therefore, soft switching operation for the first transistor and the second transistor is achieved.

Abstract: A semiconductor memory device including a first memory to which a first address and first input data are input, and which outputs first output data, a content-addressable memory to which the first address is input as a search address, and which performs a search to determine whether or not the first address and a defective address coincide with each other and, when the first address and the defective address coincide with each other, outputs a second address and a control signal, a second memory which, when the second address is input thereto, outputs redundant data corresponding to the second address, and a multiplexer which, when the control signal is input thereto, switches the output data from the first output data to the redundant data, and outputs the redundant data to an input/output terminal.

Abstract: A multi-threshold integrated circuit (IC) that may be supplied by multiple supplies, with an array of latches such as an array static random access memory (SRAM) cells and a CMOS SRAM with improved stability and reduced subthreshold leakage. Selected devices (NFETs and/or PFETs) in array cells and support logic, e.g., in the data path and in non-critical logic, are tailored for lower gate and subthreshold leakage. Normal base FETs have a base threshold and tailored FETs have a threshold above. In a multi-supply chip, circuits with tailored FETs are powered by an increased supply voltage.

Abstract: A method and structure implementing a reprogrammable read only memory (ROM) include a pair of fuse elements having different lengths and selectively arranged to define an initial bit state. A group of a plurality of the pairs of fuse elements defines a predetermined data pattern of ones and zeros, providing initial states stored in the reprogrammable ROM. The reprogrammable ROM is reprogrammed when needed by selectively blowing a selected fuse or selected fuses to change the data pattern stored in the ROM.

Abstract: Systems and methods to control one time programmable (OTP) memory are disclosed. A method may include determining a functionality for a hardware capability bus in an integrated circuit. The method may also include storing data in a first register of the integrated circuit based on the functionality. The method may also include disabling the functionality in the integrated circuit by setting at least one bit in a one time programmable memory bank in the integrated circuit based on the data.

Abstract: A method and structure for implementing a reprogrammable read only memory (ROM), and a design structure on which the subject circuit resides are provided. A pair of fuse elements having different lengths are selectively arranged to define an initial bit state. A group of a plurality of the pairs of fuse elements defines a predetermined data pattern of ones and zeros, providing initial states stored in the reprogrammable ROM. The reprogrammable ROM is reprogrammed when needed by selectively blowing a selected fuse or selected fuses to change the data pattern stored in the ROM.

Abstract: A non-volatile memory device 100 contains: an insulating substrate 10; a first electrode 20 provided on the insulating substrate 10; a second electrode 30 provided on the insulating substrate 10; and a gap 40 set between the first electrode 20 and the second electrode 30, in which a distance G between the first electrode 20 and the second electrode 30 is: 0 nm<G?50 nm.

Abstract: A resistance memory element memorizing a high resistance state or a low resistance state in a memory region and switched between the high resistance state and the low resistance state by an application of a voltage includes a resistance memory layer 42 of a resistance memory material, an electrode 38 and an electrode 40 arranged, sandwiching the resistance memory layer 42. The electrode 38 and the electrode 40 are formed on the same surface, whereby the manufacturing process of the resistance memory element can be simplified.

Abstract: Each memory cell of a molecular battery memory device includes a combination of a molecular battery and a selection transistor, and a parasitic capacitance is present in the molecular battery. A PN junction is present in the selection transistor, and is inversely biased. Therefore, a junction leak current flows. Accordingly, a charge accumulated in the parasitic capacitance is gradually discharged by a junction leak of the selection transistor, and a final potential of a node decreases toward a substrate potential Vs of the transistor. However, a difference between a substrate potential Vs and a reference potential Vp (=Vs?Vp) is set substantially equal to an open-circuit voltage of the molecular battery. Because the potential of the node converges to the open-circuit voltage without exception from the viewpoint of a plate wiring, an S/N ratio at the data reading time can be increased.

Abstract: Using a synthetic molecular spring device in a system for dynamically controlling a system property, such as momentum, topography, and electronic behavior. System features (a) the synthetic molecular spring device having (i) at least one synthetic molecular assembly each featuring at least one chemical unit including at least one: (1) atom; (2) complexing group complexed to at least one atom; (3) axial ligand reversibly physicochemically paired with at least one complexed atom; and (4) substantially elastic molecular linker; and, (ii) an activating mechanism directed to at least one atom-axial ligand pair; and, (b) a selected unit operatively coupled to synthetic molecular assembly, and exhibiting the system property.

Abstract: In deep submicron memory arrays there is noted a relatively steady on current value and, therefore, threshold values of the transistors comprising the memory cell are reduced. This, in turn, results in an increase in the leakage current of the memory cell. With the use of an ever increasing number of memory cells leakage current must be controlled. Random access memories with a dynamic threshold voltage control scheme implemented with no more than minor changes to the existing MOS process technology is disclosed. The disclosed invention controls the threshold voltage of MOS transistors. Methods for enhancing the impact of the dynamic threshold control technology using this apparatus are also included. The invention is particularly useful for SRAM, DRAM and NVM devices.

Abstract: A method and system of writing data to a phase change random access memory (PCRAM) on an integrated circuit (IC). The method and system includes an array of phase change elements with a plurality of devices providing independent control of a row access and a column access to the PCRAM. A column line (bit line) is pre-charged to a single predetermined level prior to enabling current flow to a corresponding selected phase change element. A current flow in the phase change element with a row (word line) is initiated once the column (bit line) has been pre-charged, to write data to the PCRAM cell. The current flow is terminated in the phase change element by closing the column line (bit line) preferably by quenching.

Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.

Abstract: An asymmetrically programmed memory material (such as a solid electrolyte material) is described for use as a rectifying element for driving symmetric or substantially symmetric resistive memory elements in a crosspoint memory architecture. A solid electrolyte element (SE) has very high resistance in the OFF state and very low resistance in the ON state (because it is a metallic filament in the ON state). These attributes make it a near ideal diode. During the passage of current (during program/read/erase) of the memory element, the solid electrolyte material also programs into the low resistance state. The final state of the solid electrolyte material is reverted to a high resistance state while making sure that the final state of the memory material is the one desired.

Abstract: A memory system includes a resistance variable memory device, and a memory controller for controlling the resistance variable memory device. The resistance variable memory device includes a memory cell connected to a bitline, a high voltage circuit adapted to generate a high voltage from an externally provided power source voltage, where the high voltage is higher than the power source voltage, a precharging circuit adapted to charge the bitline to the power source voltage and further charge the bitline to the high voltage, a bias circuit adapted to provide a read current to the bitline with using the high voltage, and a sense amplifier adapted to detect a voltage level of the bitline with using the high voltage.

Abstract: A One Time Programming (OTP) cell structure, a method of fabricating an OTP structure, and a method of programming a OTP cell structure. The OTP structure comprises a semiconductor substrate; an n Metal-Oxide-Semiconductor (nMOS) programming structure formed on the substrate; wherein respective electrical contacts to a source of the nMOS programming structure and to a p-bulk of the substrate are separated for individual biasing of the source and the p-bulk of the substrate.

Abstract: According to some embodiments, a memory device is disclosed. The memory device includes a memory array with a programming region to store data. The programming region includes a plurality of memory cells and has an associated flag bit. Logic is coupled to the memory array. The logic is to compare data stored in the programming region to a desired programmed value, and to determine a number of changing bits. The logic may further set or clear the associated flag bit, depending on the number of changing bits.

Abstract: A method for programming a MLC memory is provided. The MLC memory has a number of bits, and each bit has a number of programmed states. Each programmed state has a first PV level. The method comprises programming the bits of the memory having a Vt level lower than the first PV level of the targeted programmed state such that at least one bit of them has a Vt level larger than a second PV level corresponding to a targeted programmed state, wherein the second PV level of the targeted programmed state is larger than the corresponding first PV level; and programming only the bits of the memory with a Vt level lower than the first PV level of the targeted programmed state such that each of them has a Vt level larger than the first PV level of the targeted programmed state.

Abstract: A method and apparatus for programming one or more bits in an upper page twice depending on the value in a corresponding bit in a corresponding lower page in a multi-level cell device. The method includes the steps of initializing the bit in the lower page and the bit in the upper page by storing a value of one in each of the bits. One or more bits in the lower page are then programmed such that a one is stored in the one or more bits of the lower page. One or more bits in the upper page are then programmed such that a one is stored in the one or more bits of the upper page. The one or more bits in the upper page are then reprogrammed such that the value in the one or more bits of the upper page transitions from a one to a zero. The transition from a one to a zero in the one or more bits of the upper page is used to mark for performance of a block management function the block.

Abstract: A content data storage device which stores content data in nonvolatile memories from which data is erasable in units of blocks includes a bus width conversion unit converting a transmission bus to buses of a plurality of systems, a storage unit including a plurality of sets of memories, a plurality of switching units selectively switching between derivation of the content data and derivation of command signals and addresses, a controller configuring to perform (i) conversion control, (ii) state control, (iii) supply control, and (iv) switching control, the controller controlling the operation for reading and writing the content data with reference to the nonvolatile memories, and, a plurality of switch on and off units selectively switching on or off the content data, the command signals and the addresses.

Abstract: A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.

Abstract: A gate and the other end of the current path of first and second transistors are cross-connected. A third transistor is inserted to the other end of the current path of the first transistor, and a gate is supplied with a constant voltage, and further, one end of the current path and well are connected. A fourth transistor is inserted to the other end of the current path of the second transistor, and a gate is supplied with a constant voltage, and further, one end of the current path and well are connected. Fifth and sixth transistors are connected to the other end of the current path of the third and fourth transistors, and a gate is complementarily supplied with an input signal. Seventh and eighth transistors are connected to a back gate (well) of the third and fourth transistors, and a gate is complementarily supplied with an output signal.