Abstract: A molecular oscillation type powder economizer material that emits far infrared rays and negative ions for use in the oil tank, auxiliary radiator or air cleaner of the motor vehicle to improve the performance of the engine and to reduce the amount of exhausted waste gas is disclosed composed of ZnO, SiO2, CaCO3, MgO, K2O, Al2O3, rare earth metals, and trace element.

Abstract: Disclosed herein is a thermally curable mixture, comprising at least one phosphonic diester (A), at least one diphosphonic diester (A), or at least one phosphonic diester and at least one diphosphonic diester (A); and at least one compound (B) which can be reacted by transesterification, transamidation, self-condensation of N-hydroxyalkylamino groups, self-condensation of N-alkoxyalkylamino groups, transacctalization of N-alkoxyalkylamino groups, acctalization of N-hydroxyalkylamino groups, or a combination thereof. Also disclosed is a process for making the thermally curable mixture, and a cured material comprising the product of thermally curing the mixture.

Abstract: Disclosed herein is a silane-functional mixture, comprising at least one phosphonic diester (A), at least one diphosphonic diester (A), or at least one phosphonic diester and one diphosphonic diester (A), and at least one compound (B) comprising at least two condensable silane groups.

Abstract: An object of the present invention is to provide a bleaching composition capable of performing a safe and convenient bleaching without using any peroxidant. The present invention provides a bleaching composition which substantially comprises a visible light-type titanium oxide and water.

Abstract: The invention relates to a liquid crystal composition that satisfies at least one characteristic among the characteristics such as a high maximum temperature of a nematic phase, a low minimum temperature of a nematic phase, a small viscosity or a small rotation viscosity, a large optical anisotropy, a large dielectric anisotropy, a large specific resistance, a high stability to ultraviolet light, a high stability to heat and so forth, and provide an AM device that has a short response time, a large voltage holding ratio, a large contrast ratio, a long service life and so forth.

Abstract: Compounds that are useful in compositions for flat panel displays, for example, are provided. The compounds provided are polar, and are useful in low threshold voltage mixtures. The compounds provided have the general structure: CpCOCH2[A]nZ1[B]mZ2PhX1X2Y, where CpCOCH2 is the structure: A and B are independently in each instance selected from the group consisting of 1,4-cyclohexane, 1,4-phenyl, 1,3-dioxan-5,2-diyl; pyridine-5,2-diyl; and pyrimidin-5,2-diyl; n and m are independently in each instance 0, 1 or 2; Z1 and Z2 are independently a single bond, —(CH2)2—, CF2O, OCF2, CH2O, OCH2, —C?C—, COO, OOC; and Y is selected from the group consisting of: F, Cl, CN, OCH2F, CHF2, OCF3, and CF3.

Abstract: Thermodynamically stable solutions of chalcogenide-bound Ln compounds with one or more Ln ions coordinated or bound by chalcogenolate, chalcogenide or polychalcogenido ligands by means of the ligand chalcogenide atom, wherein the Ln compounds are dissolved at a level up to about 90 vol. % in a host solvent optically transparent to wavelengths at which excitation, fluorescence or luminescence of the Ln ions occurs.

Abstract: A nanomaterial comprising a plurality of nanoparticles. The plurality of nanoparticles includes at least one dopant and at least one of a metal oxide, a metal phosphate, a metal silicate, a metal hafnate, a metal aluminate, and combinations thereof. The metal is one of an alkali earth metal, a lanthanide, and a transition metal. The plurality of nanoparticles is formed by forming a homogenized precursor solution of at least one metal precursor and at least one dopant precursor, adding a fuel and optionally at least one of a phosphate source, a silicate source, a hafnate source, and an aluminate source to the precursor solution, removing water from the precursor solution to leave a reaction concentrate, and igniting the reaction concentrate to form a powder comprising the nanomaterial. In one embodiment, the nanomaterial is a scintillator material.

Abstract: A phosphor for blue-light LEDs formed by different solid solutions of (?Ln)3Al5O12 and MeII3MeIII2Si3O12 with a ratio of (1-x):x having a stoichiometry of (?Ln)3-xMeII3xMeIII2xAl5-xSi3xO12, in which Ln=Y and/or Gd and/or Lu and/or Ce and/or Yb and/or Pr and/or Sm, MeII=Mg and/or Ca and/or Sr and/or Ba MeIII=In and/or Ga and/or Sc, in which 0.0001?x?0.2. The specific composition of the phosphor has a color coordinate of x?0.42 and the total coordination number of ?(x+y)?0.92. The radiation of the phosphor is in the range of ?=500˜750 nm and the position of the maximum spectrum changes from ?=520˜585 nm. The light-emitting diodes made from this phosphor can emit very bright, warm white light with light intensity reaching 400˜600 cd, total flux F>420 lm, and light efficiency over 100 lm/W.

Abstract: Quantum dots, each having a core comprising CdTe and a shell comprising GSH covering the core, are provided. The Quantum dots can be formed in a solution comprising a telluride (Te) precursor and a cadmium (Cd) precursor for forming the cores, and glutathione (GSH) for forming shells covering the cores. The cores can comprise CdTe nanocrystals grown in the solution. The growth of the nanocrystals can be limited. The quantum dots can have high fluorescence emission quantum yield such as up to about 45%, and small sizes such as from about 3.8 nm to about 6 nm.

Abstract: The present invention relates to a process for producing articles having on at least part of their surface an electrically conductive coating by at least partly coating a substrate with a composition comprising finely divided electrically conductive metal particles and a binder and subjecting the coated substrate to at least one treatment with water in the presence of a halide ion source at a temperature in the range from ambient temperature to 200° C. The process of the invention allows articles having an electrically conductive coating to be produced in a simple, rapid and mild way.

Abstract: A semiconductor-encapsulating resin composition includes a curing agent and a compound (A) having a plurality of glycidyl ether groups. When ion viscosity of the resin composition is measured under conditions of a measurement temperature of about 175° C. and a measurement frequency of about 100 Hz, minimum ion viscosity appears at about 5 seconds or later and within about 40 seconds from a measurement starting point. The minimum ion viscosity is at least about 4.0 and at most about 7.0. A maximum slope of the ion viscosity appears at about 10 seconds or later and within about 60 seconds from the measurement starting point. The maximum slope is at least about 2.0 and at most about 6.0.

Abstract: A composition exhibiting significantly increased luminance as compared with that of a known luminescent composition is provided. The composition constitutes a system in which chemiluminescence is effected by mixing two types of compositions and includes a composition A in which an oxalic ester is present in a solid state in a solution containing the oxalic ester and a luminescent substance both dissolved therein and a composition B in which aqueous hydrogen peroxide and a catalyst is dissolved in a solution.

Abstract: Equipment and associated methods for replacing existing overhead transmission line conductors with new ones while the transmission line remains in service and carrying power. The old conductor is used to pull the new conductor through a series of sheaves installed at the bottom of the insulator at each tower. Conventional tension-stringing equipment is used but it is elevated to line potential that is achieved by use of an insulating platform or insulating jacks. Current transfer between stationary and moving conductors is achieved by a current transfer device that may consist of transmission line contacting wheels and liquid metal contactors. Sag control in various conductor spans is enhanced by a stringing block with controllable friction. Equipment is also introduced which will prevent release of the conductor by the pulling device should it break while engaged by that device.

Abstract: A portable pulling tool is provided including an integrally formed one-piece gear case for positioning all of the gear train components. The gear train includes a combination of helical gears and a differential planetary gear unit in a unique configuration. A motor control system is provided to automatically shut off the motor when a predetermined current load is detected. A multi-segment LED is provided to indicate to the user the amount of load that is being applied.

Abstract: A trim guard, that surrounds wooden posts sunken into the ground, as well as other embedded structures is disclosed. The trim guard protects the posts or support structures from mechanical abrasion from devices such as rotary weed trimmers.

Abstract: A fence module includes a frame, multiple panels and multiple fasteners. The frame has multiple posts and multiple rails mounted at intervals on the posts. The panels are mounted on the frame between adjacent rails. The fasteners are mounted between the panels and the rails to attach the panels to the rails.

Abstract: A memory cell device includes a memory cell access layer, a dielectric material over the memory cell access layer, a memory material structure within the dielectric material, and a top electrode in electrical contact with the memory material structure. The memory material structure has upper and lower memory material portions and a memory material element therebetween. The lower memory material layer is in electrical contact with a bottom electrode. The lower memory material layer has an average lateral dimension. The memory material element defines an electrical property state change region therein and has a minimum lateral dimension which is substantially less than the average lateral dimension. In some examples the memory material element is a tapered structure with the electrical property state change region at the junction of the memory material element and the lower memory material layer.

Abstract: Embodiments of the present invention provide a method that includes providing wafer including multiple cells, each cell including at least one emitter. The method further includes performing a lithographic operation in a word line direction of the wafer across the cells to form pre-heater element arrangements, performing a lithographic operation in a bit line direction of the wafer across the pre-heater element arrangements to form a pre-heater element adjacent each emitter, and performing a lithographic operation in the word line direction across a portion of the pre-heater elements to form a heater element adjacent each emitter. Other embodiments are also described.

Abstract: A device utilizing a breakdown layer in combination with a programmable resistance material, a phase-change material or a threshold switching material. The breakdown layer having damage.

Abstract: Light-emitting devices are provided that incorporate one or more underlying LED chips or other light sources and a layer having one or more populations of nanoparticles disposed over the light source. The nanoparticles may absorb some light emitted by the underlying source, and re-emit light at a different level. By varying the type and relative concentration of nanoparticles, different emission spectra may be achieved. White light and specialty-color emission may be achieved. Devices also may include multiple LED chips, with nanoparticles disposed over one or more underlying chips in an array.

Abstract: A light-emitting device includes a substrate, an n-type semiconductor layer, an active layer, and a p-type semiconductor layer; wherein the active layer is a multi-quantum-well (MQW) active layer with a predetermined n-type doping profile. More specifically, the MQW active layer is doped with n-type dopants in the region near the p-type semiconductor layer and the n-type semiconductor layer, and the central region is not doped with the n-type dopants.

Abstract: A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.

Abstract: A nanowire according to the present invention includes: a nanowire body made of a crystalline semiconductor as a first material; and a plurality of fine particles, which are made of a second material, including a constituent element of the semiconductor, and which are located on at least portions of the surface of the nanowire body. The surface of the nanowire body is smooth.

Abstract: A single electron transistor includes source/drain layers disposed apart on a substrate, at least one nanowire channel connecting the source/drain layers, a plurality of oxide channel areas in the nanowire channel, the oxide channel areas insulating at least one portion of the nanowire channel, a quantum dot in the portion of the nanowire channel insulated by the plurality of oxide channel areas, and a gate electrode surrounding the quantum dot.

Abstract: An electron transport device, including at least one transport layer in which at least one periodic dislocation and/or defect array is produced, and a mechanism for guiding electrons in the transport layer.

Abstract: The present invention relates to a transistor based on resonant tunneling effect of double barrier tunneling junctions comprising: a substrate, an emitter, a base, a collector and a first and a second tunneling barrier layers; wherein the first tunneling barrier layer is located between the emitter and the base, and the second tunneling barrier layer is located between the base and the collector; furthermore, the junction areas of the tunneling junctions which are formed between the emitter and the base and between the base and collector respectively are 1 ?m2˜10000 ?m2; the thickness of the base is comparable to the electron mean free path of material in the layer; the magnetization orientation is unbounded in one and only one pole of said emitter, base and collector. Because the double-barrier structure is used, it overcomes the Schottky potential between the base and the collector.

Abstract: A method for fabricating an electronic device includes forming a layer of precursor material for forming a semi-conductor material in a cured state and exposing the precursor material to light. The precursor is heated in the presence of the light to form an insulator in areas exposed to light and a semiconductor in areas not exposed to the light. The light is preferably in the visible range. Suitable precursors may include 6,13-dihydro-6,13-(2,3,4,5-tetrachloro-2,4-cyclohexadieno)-pentacene (202) to form, for example, pentacene (204) as the semiconductor and 6,13-pentacenequinone (206) as an insulator. A device made in accordance with the method is also included.

Abstract: It is an object to provide an element structure in which defects are not easily generated and a semiconductor device that has the element. An element has a structure in which a layer containing an organic compound is interposed between a pair of electrode layers of a first electrode layer and a second electrode layer. At least one of the pair of the electrode layers has a Young's modulus of 7.5×1010 N/m2 or less. A layer containing an organic compound is formed using an organic compound appropriate to usage of an element to be formed, and a memory element, a light-emitting element, a piezoelectric element, or an organic transistor element is formed.

Abstract: An organic light emitting diode display includes a substrate on which a transistor area and a capacitor area are defined, a semiconductor layer formed at the transistor area, and a capacitor having a plurality of electrodes. The plurality of electrodes include a first electrode, a second electrode that is disposed on the first electrode with an insulation layer formed between the first and second electrodes, and a third electrode that is disposed on the second electrode with an insulation layer formed between the second and third electrodes and connected to the first electrode through at least two contact holes.

Abstract: An organic light emitting display and a fabricating method thereof, where the display has sub-pixels of various types, which have distinctive shapes formed therein according to type is disclosed. Pixels of a particular type e.g., red, green, or blue, can be identified through visual recognition of the distinctive pattern.

Abstract: Objects are to solve inhibition of miniaturization of a memory element and complexity of a manufacturing process thereof and to provide a nonvolatile memory device and a semiconductor device each having the memory device, in which data can be additionally written except at the time of manufacture and in which forgery or the like caused by rewriting of data can be prevented, and a memory device and a semiconductor device that are inexpensive and nonvolatile. The present invention provides a semiconductor device that includes a plurality of memory elements, in each of which a first conductive layer, a second conductive layer disposed beside the first conductive layer, and a mixed film that are disposed over the same insulating film. The mixed film contains an inorganic compound, an organic compound, and a halogen atom and is disposed between the first conductive layer and the second conductive layer.

Abstract: A thin film transistor, e.g., for use in an organic light emitting display, may include: a gate insulating layer disposed on a gate electrode located on a substrate; a semiconductor layer, disposed on the gate insulating layer; and a planarization layer disposed on the gate insulating layer, the source and drain electrodes, and the channel area, and having openings exposing parts of the first source and drain areas and the source and drain electrodes, respectively. The semiconductor layer may include: a channel area corresponding to the gate electrode; first source and drain areas doped with an impurity outside the channel area; second source and drain areas, including a metal, outside the first source and drain areas; and source and drain electrodes disposed on the second source and drain areas and exposing the first source and drain areas. A pixel electrode may be disposed in one of the openings.

Abstract: Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor chip and a scribe line adjoining the semiconductor chip. A conductive feature is formed in the scribe line and exposed on the surface of the scribe lines, wherein the conductive feature has an edge facing the semiconductor chip. A kerf path is in the scribe line. A first cut is formed in the conductive feature, wherein the first cut extends from the first edge to the kerf path.

Abstract: A test structure for detecting void formation in semiconductor device layers includes a plurality of active device areas formed in a substrate, a plurality of shallow trench isolation (STI) regions separating the active device areas, a plurality of gate electrode structures formed across the active device areas and the STI regions, and a matrix of vias formed over the active device areas and between the gate electrode structures. At least one edge of each of a pair of vias at opposite ends of a given one of the STI regions extends at least out to an edge of the associated active device area.

Abstract: The present invention relates to a thin film transistor, a method thereof and an organic light emitting device including the thin film transistor. According to an embodiment of the present invention, the thin film transistor includes a substrate, a control electrode, an insulating layer, a first electrode and a second electrode, a first ohmic contact layer and a second ohmic contact layer, and a semiconductor layer. The control electrode is formed on the substrate, and the insulating layer is formed on the control electrode. The first and the second electrodes are formed on the insulating layer. The first ohmic contact layer and the second ohmic contact layer are formed on the first electrode and the second electrode. The semiconductor layer is formed on the first ohmic contact layer and the second ohmic contact layer to fill between the first and the second electrodes.

Abstract: A thin film transistor for a flat panel display, and more particularly to a thin film transistor for a flat panel display having a protrusion in a part of a gate electrode includes a substrate on which an insulating layer is deposited, a semiconductor layer, which is a layer having predetermined width and length on the insulating layer, provided with doping regions in a letter U shape and a channel region between the doping regions; a gate insulating layer formed on the semiconductor layer; a gate electrode formed on the gate insulating layer to traverse the doping region; and a protrusion, which is a part of the gate electrode, formed on the gate insulating layer to be opposed to the channel region.

Abstract: In order to provide a semiconductor device having a circuit for operating normally even when the amplitude of a signal voltage is smaller than the amplitude of a power source voltage, a correcting circuit is provided before a digital circuit to be operated normally. As for a signal outputted from the correcting circuit, when a transistor in the objective digital circuit is required to be turned OFF, the correcting circuit outputs a corresponding signal, namely a first power source potential. At this time, the transistor is turned OFF. On the other hand, when the transistor is required to be turned ON, the correcting circuit outputs a first input potential. Consequently, the objective digital circuit is turned OFF when it is required to be in an OFF state while turned ON when it is required to be in an ON state. Thereby, the objective digital circuit can be normally operated.

Abstract: An object of the invention is to provide a method for manufacturing a substrate having a film pattern such as an insulating film, a semiconductor film, or a conductive film with an easy process, and further, a semiconductor device and a television set having a high throughput or a high yield at low cost and a manufacturing method thereof. One feature of the invention is that a first film pattern is formed by a droplet discharge method, a photosensitive material is discharged or applied to the first film pattern, a mask pattern is formed by irradiating a region where the first film pattern and the photosensitive material are overlapped with a laser beam and by developing, and a second film pattern having a desired shape is formed by etching the first film pattern using the mask pattern as a mask.

Abstract: Provided is a flat display device, and more particularly, an active matrix (AM) flat display device having a thin film transistor (TFT). The flat display device includes a substrate, a plurality of TFTs (thin film transistors) provided on the substrate, each TFT comprising an active layer, a source electrode and a drain electrode that contact the active layer, and an ohmic contact layer interposed between the active layer and the source and drain electrodes, and a light emitting device electrically connected to the TFT, wherein the ohmic contact layer and a layer including the source and drain electrodes are formed to have the same pattern.

Abstract: A display device including a first gate line and a second gate line that extend in parallel with each other, a data line crossing the first and second gate lines to form a pixel region, a pixel electrode in the pixel region and including a main pixel electrode and a sub pixel electrode, which are connected to the first gate line and the data line, a control thin film transistor connected to the second gate line and the sub pixel electrode, and a gate driver. The gate driver outputs a first gate signal to the first gate line and a second gate signal to the second gate line. The first gate signal activates the first gate line during a first time and a second time following the first time, and the second gate signal activates the second gate line during the first time but not the second time.

Abstract: The formation of contact holes and a capacitor is performed in a semiconductor integrated circuit such as an active matrix circuit. An interlayer insulator having a multilayer (a lower layer is silicon oxide; an upper layer is silicon nitride) each having different dry etching characteristic is formed. Using a first mask, the silicon nitride corresponding to the upper layer in the interlayer insulator is etched by dry etching. This etching is completed by using the silicon oxide corresponding to the lower layer as an etching stopper. A pattern is formed using a second mask to form selectively the silicon oxide corresponding to the lower layer. Thus a first portion that the silicon oxide and the silicon nitride are etched and a second portion that only silicon nitride is etched are obtained. The first portion is used as a contact hole. A capacitor is formed in the second portion.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: A method of fabricating a silicon-on-insulator (SOI) N-channel metal oxide semiconductor field effect transistor (nMOSFET), where the transistor has a structure incorporating a gate disposed above a body of the SOI substrate. The body comprises of a first surface and a second surface. The second surface interfaces between the body and the insulator of the SOI. Between the first surface and second surface is defined a channel region separating a source region and a drain region. Each of the source region and drain region includes a third surface under which is embedded crystalline silicon-carbon (Si:C), which extends from the second surface to the third surface.

Abstract: A pixel structure comprising at least one transistor, a first storage capacitor, a first conductive layer, an interlayer dielectric layer, a second conductive layer, a passivation layer, and a third conductive layer is provided. The first storage capacitor is electrically connected to the transistor. The interlayer dielectric layer having at least one first opening covers the first conductive layer. The second conductive layer is formed on a part of the interlayer dielectric layer and is electrically connected to the first conductive layer through the first opening. The passivation layer having at least one second opening covers the transistor and the second conductive layer. The third conductive layer is formed on a part of the passivation layer and is electrically connected to the transistor through the second opening. The first storage capacitor is formed by the third conductive layer, the passivation layer, and the second conductive layer.

Abstract: A pair of bonding electrodes of each of light-emitting semiconductor devices of RGB is disposed in a point symmetrical relationship, the devices are mounted on a common electrode of a package, and a bonding wire is suspended from a commonized bonding electrode of the respective devices to the common electrode. Bonding wires are suspended from the other bonding electrodes of the respective devices to first to third electrodes on the package which are independent from one another.

Abstract: A light source and method for making the same are disclosed. The light source includes a substrate having a top surface, a die, and a first encapsulating layer. The die includes an LED attached to the top surface and electrically connected to traces in the substrate that power the LED. The first dome covers the die and is in contact with the top surface, the dome having an angle of contact greater than 90° with respect to the top surface. The first dome has an outer surface that includes a truncated sphere characterized by a center for the spherical portion of the surface, and the die is situated at a position below the center. A second dome can be provided around the outside of the first dome. In addition, the first dome may include light converting and/or scattering materials.

Abstract: A light-emitting diode packaging structure includes a thermally conductive substrate; a circuit layer provided on one surface of the substrate and having an electric connection element; at least one chip mounted on the circuit layer to electrically connect to the electric connection element; alight-reflective case enclosing at least part of the substrate and being formed of a window, via which light emitted by the chip is projected outward; and a light-pervious colloidal seal fitted in the window of the case to form a protection around the chip. With the above structure, heat produced by the chip during operation thereof may be effectively radiated and dissipated via the thermally conductive substrate.

Abstract: A light emitting device includes an active layer structure, which has one or more active layers with luminescent centers, e.g. a wide bandgap material with semiconductor nano-particles, deposited on a substrate. For the practical extraction of light from the active layer structure, a transparent electrode is disposed over the active layer structure and a base electrode is placed under the substrate. Transition layers, having a higher conductivity than a top layer of the active layer structure, are formed at contact regions between the upper transparent electrode and the active layer structure, and between the active layer structure and the substrate. Accordingly the high field regions associated with the active layer structure are moved back and away from contact regions, thereby reducing the electric field necessary to generate a desired current to flow between the transparent electrode, the active layer structure and the substrate, and reducing associated deleterious effects of larger electric fields.