Patents Issued in March 31, 2009
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Patent number: 7511360Abstract: N channel and P channel transistors are enhanced by applying stressor layers of tensile and compressive, respectively, over them. A previously unknown problem was discovered concerning the two stressor layers, which both may conveniently be nitride but made somewhat differently. The two stressors have different etch rates which results in deleterious effects when etching a contact hole at the interface between the two stressors. A contact to a gate is often preferably half way between N and P channel transistors which is also the seemingly best location for the border between the two stressor layers. The contact etch at the border can result in pitting of the underlying gate structure or in residual nitride in the contact hole. Therefore, it has been found beneficial to ensure that each contact is at least some predetermined distance from the stressor of the opposite type from the one the contact is passing through.Type: GrantFiled: December 14, 2005Date of Patent: March 31, 2009Assignee: Freescale Semiconductor, Inc.Inventors: Mehul D. Shroff, Paul A. Grudowski
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Patent number: 7511361Abstract: A DFN semiconductor package is disclosed. The package includes a leadframe having a die bonding pad formed integrally with a drain lead, a source lead bonding area and a gate lead bonding area, the source lead bonding area and the gate lead bonding area being of increased area, a die coupled to the die bonding pad, a die source bonding area coupled to the source lead bonding area and a die gate bonding area coupled to the gate lead bonding area, and an encapsulant at least partially covering the die, drain lead, gate lead bonding area and source lead bonding area.Type: GrantFiled: June 10, 2005Date of Patent: March 31, 2009Inventors: Xiaotian Zhang, Kai Liu, Ming Sun
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Patent number: 7511362Abstract: A semiconductor device with its package size close to its chip size has a stress absorbing layer, allows a patterned flexible substrate to be omitted, and allows a plurality of components to be fabricated simultaneously. There is a step of forming electrodes (12) on a wafer (10); a step of providing a resin layer (14) as a stress relieving layer on the wafer (10), avoiding the electrodes (12); a step of forming a chromium layer (16) as wiring from electrodes (12) over the resin layer (14); a step of forming solder balls as external electrodes on the chromium layer (16) over the resin layer (14); and a step of cutting the wafer (10) into individual semiconductor chips; in the steps of forming the chromium layer (16) and solder balls, metal thin film fabrication technology is used during the wafer process.Type: GrantFiled: December 30, 2005Date of Patent: March 31, 2009Assignee: Seiko Epson CorporationInventor: Nobuaki Hashimoto
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Patent number: 7511363Abstract: An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond is described wherein the bond pad on a surface of the semiconductor device comprises a layer of copper and at least one layer of metal and/or at least a barrier layer of material between the copper layer and one layer of metal on the copper layer to form a bond pad.Type: GrantFiled: May 25, 2005Date of Patent: March 31, 2009Assignee: Micron Technology, Inc.Inventor: Salman Akram
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Patent number: 7511364Abstract: A semiconductor device assembly includes a semiconductor device and a lead frame having lead fingers for connection to the semiconductor device. The lead frame may include floating no connect (NC) lead fingers with inner portions of the floating NC lead fingers electrically isolated from the semiconductor device and the associated outer portion of the floating NC lead fingers. Floating NC lead fingers may separate lead fingers prone to causing induction noise from lead fingers subject to induction effects. The floating NC lead fingers may also allow the semiconductor device to be securely adhered to the lead fingers with no air pockets therebetween. A method of forming a semiconductor device assembly is also provided.Type: GrantFiled: August 31, 2004Date of Patent: March 31, 2009Assignee: Micron Technology, Inc.Inventor: David J. Corisis
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Patent number: 7511365Abstract: A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component thereon which is between two provided dielectric layers. The metallization layer as well as the electronic component is embedded and packaged while the substrates are laminated via a lamination process. The fabricated package structure performs not only a superior electric performance, but also an excellent enhancement in thermal dissipation.Type: GrantFiled: December 13, 2005Date of Patent: March 31, 2009Assignee: Industrial Technology Research InstituteInventors: Enboa Wu, Shou-Lung Chen
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Patent number: 7511366Abstract: A multi-row substrate strip mainly includes a plurality of first and second substrate units in parallel, a plurality of connecting bars, a degating metal layer and at least one plating layer. The connecting bars are used to connect the first substrate units and connect the second substrate units. The degating metal layer includes a plurality of runner portions on the connecting bars, a plurality of first gate portions and a plurality of second gate portions. The first gate portions are formed on the first substrate units, and the second gate portions are formed on the second substrate units. The plating layer is formed on the first gate portions and the second gate portions, and exposes the runner portions, so as to save the plating material.Type: GrantFiled: October 26, 2005Date of Patent: March 31, 2009Assignee: Ase (Shanghai) Inc.Inventors: Yao-Ting Huang, Kuang-Lin Lo
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Patent number: 7511367Abstract: An optical device includes: a base 10; an optical element chip 5 mounted on the base 10; an integrated circuit chip 50 bonded to the back surface of the optical element chip 5; and a transparent member (window member 6). An interconnect 12 is buried in the base 10. The interconnect 12 has an inner terminal portion 12a, an outer terminal portion 12b and an intermediate terminal portion 12c. Pad electrodes 5b on the optical element chip 5 are connected to the inner terminal portion 12a via bumps 8. Pad electrodes 50b on the integrated circuit chip 50 are connected to the intermediate terminal portion 12c via fine metal wires 52. The integrated circuit chip 50 equipped with peripheral circuits and other circuits and the optical element chip 5 are combined into one package.Type: GrantFiled: April 22, 2005Date of Patent: March 31, 2009Assignee: Panasonic CorporationInventor: Masanori Minamio
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Patent number: 7511368Abstract: A surface mount electronic chip (10) is mounted on a holder (70) and electrically connected to holder terminals (74,76, 80) by the use of a carrier device (30). The carrier device has clips (36) mounted on walls of the carrier frame. The chip is merely pressed into a cavity (48) between inner tabs (44) of the chips. The carrier with the chip in place is merely pressed into a cradle (78) formed in the holder by the holder terminals, so outer tabs (46) of the clips press against the holder terminals.Type: GrantFiled: July 19, 2005Date of Patent: March 31, 2009Assignee: ITT Manufacturing Enterprises, Inc.Inventor: Peter Jordan
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Patent number: 7511369Abstract: A three dimensional electronic module is disclosed. Conventional TSOP packages are modified to expose internal lead frame interconnects, thinned and stacked on a reroute substrate. The reroute substrate comprises conductive circuitry for the input and output of electrical signals from one or more TSOPs in the stack to a ball grid array pattern. The exposed internal lead frames are interconnected and routed on one or more side buses on the module to the reroute substrate for connection to external electronic circuitry. Alternatively, internal wire bonds or ball bonds may be exposed in the TSOP packages and routed to the side bus for interconnection to create a BGA scale module. One or more neolayers may also be bonded to a reroute substrate to create a BGA scale module.Type: GrantFiled: February 22, 2005Date of Patent: March 31, 2009Assignee: Irvine Sensors Corp.Inventors: Gann Keith, William E. Boyd
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Patent number: 7511370Abstract: An electrical device includes electrical contact pads, a supply voltage bus and an interconnection circuit. The electrical contact pads receive a supply voltage, and the bus is electrically connected to the electrical contact pads. For each electrical contact pad, the interconnection circuit forms a redundant connection between the bus and the electrical contact pad. The electrical device may include a passivation layer that includes windows to establish electrical contact between the electrical contact pads and the supply voltage bus. This window may be elongated in a path that is generally aligned with the path along which the supply voltage bus extends.Type: GrantFiled: August 15, 2005Date of Patent: March 31, 2009Assignee: Intel CorporationInventor: Krishna Seshan
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Patent number: 7511371Abstract: A multiple die package for integrated circuits is disclosed. An insulator layer is provided and one or more vias are formed within it. The insulator may be provided without vias, and vias formed later. At least one integrated circuit is provided and electrically coupled to at least one lead of a first leadframe overlying one surface of the insulator layer. At least one second integrated circuit is provided and electrically coupled to a second leadframe overlying a second surface of the insulator layer. Electrical connections between the two leadframes and the first and second integrated circuits are made through the insulator, at selected locations, by coupling at least one lead of the first and second leadframes one to another. The leads of the first and second leadframe may be physically coupled by a welding process within vias in the insulator. A removable storage card package is also described.Type: GrantFiled: November 1, 2005Date of Patent: March 31, 2009Assignee: SanDisk CorporationInventor: Bob Wallace
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Patent number: 7511372Abstract: A microelectronic assembly and a method of forming same. The microelectronic assembly comprises: a microelectronic package including a substrate and a die, the die being electrically conductively bonded to the substrate at a front side thereof and further having a backside; a cover plate defining an inlet opening and an outlet opening therethrough; bonding posts mechanically bonding the cover plate to the backside of the die; a sealant body sealingly bonding an inner periphery of a die side of the cover plate to an inner periphery of a backside of the die to form, along with the backside of the die and the cover plate, a cooling fluid chamber.Type: GrantFiled: June 28, 2005Date of Patent: March 31, 2009Assignee: Intel CorporationInventor: Chia-Pin Chiu
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Patent number: 7511373Abstract: A cap package for MEMS includes a substrate having a connection zone that is grounded, a chip mounted on the substrate, a cap capped on the substrate and provided with a through hole corresponding to the chip, and a conducting glue made of a non-metal material having a resistivity smaller than 102 ?m. The conducting glue is applied on the connection zone of the substrate and sandwiched between the cap and the substrate for electrically connecting the cap with the substrate.Type: GrantFiled: June 21, 2007Date of Patent: March 31, 2009Assignee: Lingsen Precision Inductries, Ltd.Inventors: Jiung-Yue Tien, Ming-Te Tu, Chin-Ching Huang
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Patent number: 7511374Abstract: Microelectronic imaging units having covered image sensors are disclosed herein. In one embodiment, the microelectronic imaging units have an image sensor, an integrated circuit, a cover located over the image sensor, at least one dam, and a fill material between adjacent imaging units. The covers may be located on discrete adhesive portions inboard of external contacts that are operably coupled to the integrated circuits.Type: GrantFiled: June 7, 2006Date of Patent: March 31, 2009Assignee: Aptina Imaging CorporationInventors: James M. Derderian, Bret K. Street, Eric T. Mueller
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Patent number: 7511375Abstract: In a pressing cap forming part of a semiconductor device carrier unit, a pressing portion of a pressure body has recesses, to each of which a bump is inserted.Type: GrantFiled: September 28, 2005Date of Patent: March 31, 2009Assignee: Yamaichi Electronics Co., Ltd.Inventors: Toshitaka Kuroda, Minoru Hisaishi
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Patent number: 7511376Abstract: An integrated chip package structure and method of manufacturing the same is by adhering dies on a metal substrate and forming a thin-film circuit layer on top of the dies and the metal substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.Type: GrantFiled: August 8, 2003Date of Patent: March 31, 2009Assignee: MEGICA CorporationInventors: Mou-Shiung Lin, Jin-Yuan Lee, Ching-Cheng Huang
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Patent number: 7511377Abstract: A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.Type: GrantFiled: August 6, 2007Date of Patent: March 31, 2009Assignee: Renesas Technology Corp.Inventors: Shuji Ikeda, Toshiaki Yamanaka, Kenichi Kikushima, Shinichiro Mitani, Kazushige Sato, Akira Fukami, Masaya Iida, Akihiro Shimizu
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Patent number: 7511378Abstract: An electronic structure having wiring, and an associated method of designing the structure, for limiting a temperature gradient in the wiring. The electronic structure includes a substrate having a layer that includes a first and second wire which do not physically touch each other. The first and second wires are adapted to be at an elevated temperature due to Joule heating in relation to electrical current density in the first and second wires. The first wire is electrically and thermally coupled to the second wire by an electrically and thermally conductive structure that exists outside of the layer. The width of the second wire is tailored so as to limit a temperature gradient in the first wire to be below a threshold value that is predetermined to be sufficiently small so as to substantially mitigate adverse effects of electromigration in the first wire.Type: GrantFiled: May 30, 2006Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventors: Jason P. Gill, David L. Harmon, Deborah M. Massey, Alvin W. Strong, Timothy D. Sullivan, Junichi Furukawa
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Patent number: 7511379Abstract: A surface mountable chip comprises a semiconductor substrate having IC devices formed thereon and also vertically exposed electrical contacts formed as part of the IC fabrication substrate. Metallization lines electrically connect the IC devices with the contacts. The inventor also contemplates wafers having electrical connection vias in place on the wafers in preparation as a product for further fabrication. A method embodiment of the invention describes methods of fabricating such surface mountable chips.Type: GrantFiled: March 23, 2006Date of Patent: March 31, 2009Assignee: National Semiconductor CorporationInventor: D. Michael Flint, Jr.
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Patent number: 7511380Abstract: A semiconductor chip having a plurality of device formative layers that are formed into an integrated thin film is provided by a technique for transferring. According to the present invention, a semiconductor chip that is formed into a thin film and that is highly integrated can be manufactured by transferring a device formative layer with a thickness of at most 50 ?m which is separated from a substrate into another substrate by a technique for transferring, and transferring another device formative layer with a thickness of at most 50 ?m which is separated from another substrate to the above device formative layer, and, repeating such transferring process.Type: GrantFiled: May 25, 2006Date of Patent: March 31, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
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Patent number: 7511381Abstract: A thin film transistor (TFT) and a method of manufacturing the same are provided. The TFT includes a transparent substrate, an insulating layer on a region of the transparent substrate, a monocrystalline silicon layer, which includes source, drain, and channel regions, on the insulating layer and a gate insulating film and a gate electrode on the channel region of the monocrystalline silicon layer.Type: GrantFiled: October 13, 2005Date of Patent: March 31, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Takashi Noguchi, Wenxu Xianyu, Hans S. Cho, Huaxiang Yin
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Patent number: 7511382Abstract: A semiconductor chip arrangement and method is disclosed. In one embodiment, the invention provides a method for providing a semiconductor chip arrangement including providing a semiconductor chip having a first connecting area, and providing a chip carrier having a concave shaped section formed in a second connecting area. A connecting mechanism is provided between the first connecting area and the second connecting area and pressing the semiconductor chip onto the chip carrier such that the connecting mechanism positively locks the first connecting area to the concave shaped section of the second connecting area.Type: GrantFiled: May 3, 2005Date of Patent: March 31, 2009Assignee: Infineon Technologies AGInventors: Edmund Riedl, Ralf Otremba, Ivan Galesic
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Patent number: 7511383Abstract: A flame retardant featuring: an inorganic porous fine particle, a phosphazene compound represented by the following average compositional formula (1) (X is a single bond, CH2, C(CH3)2, SO2, S, 0, or O(CO)O; n is an integer of from 3 to 1000; d and e are numbers with 2d+e=2n), and a resin layer. The phosphazene compound is supported on the inorganic porous fine particle, and the resin layer coats the inorganic porous fine particle with the phosphazene compound supported thereon. The resin layer thermally decomposes to lose weight by 10% at a temperature of from 300° C. to 500° C., as measured by thermogravimetry in the air at a heating rate of 10° C./min.Type: GrantFiled: April 3, 2006Date of Patent: March 31, 2009Assignee: Shin-Etsu Chemical Co., Ltd.Inventor: Shoichi Osada
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Patent number: 7511384Abstract: A DC conversion system includes a power-generating device, a power storage device, and a DC boost circuit. The power-generating device transforms power from natural resources such as solar power and wind force into a direct current power source. The direct current voltage output from the power-generating device can be stepped up directly from 6-12 volts to high voltage of 200-680 volts by the DC boost circuit and thereby obviate the need to perform a DC to AC conversion.Type: GrantFiled: December 12, 2006Date of Patent: March 31, 2009Assignee: Gaya Co., Ltd.Inventor: Cheng Ron Chan
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Patent number: 7511385Abstract: The present invention provides_a power converter that can be used to interface a generator (4) that provides variable voltage at variable frequency to a supply network operating at nominally fixed voltage and nominally fixed frequency and including features that allow the power converter to remain connected to the supply network and retain control during supply network fault and transient conditions. The power converter includes a generator bridge (10) electrically connected to the stator of the generator (4) and a network bridge (14). A dc link (12) is connected between the generator bridge (10) and the network bridge (14). A filter (16) having network terminals is connected between the network bridge (14) and the supply network. A first controller (18) is provided for controlling the operation of the semiconductor power switching devices of the generator bridge (14).Type: GrantFiled: November 13, 2006Date of Patent: March 31, 2009Assignee: Converteam LtdInventors: Rodney Jones, Paul Brian Brogan, Erik Grøndahl, Henrik Stiesdal
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Patent number: 7511386Abstract: An air-blower tidal power generation device includes a rack, an air-blower mechanism, and a power generation mechanism. The air-blower mechanism includes a pumping device, a buoy, and an air conduit. The pumping device includes a cylinder and a stationary barrel movably coupled together. The power generation mechanism includes a constant-pressure and pressure-regulation device and a power generator having an air-driven turbine. Thus, tides move the buoy up and down to drive the pumping device for cyclically drawing and pumping air, and the air is preserved in the constant-pressure and pressure-regulation device to provide a constant pressure for subsequent and stable supply of airflow to the turbine for driving the power generator to generate power.Type: GrantFiled: February 15, 2007Date of Patent: March 31, 2009Inventor: Ming-Hung Lin
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Patent number: 7511387Abstract: An apparatus for generating and a method for creating the apparatus are disclosed. In an embodiment, the apparatus comprises an element (e.g., a mountain) having a conduit formed therein. The conduit has an inlet and an outlet, with the inlet disposed at a first elevation and the outlet disposed at a second elevation higher than the first elevation. A generator is disposed in the conduit such that fluid moving through the conduit motivates the generator.Type: GrantFiled: October 4, 2003Date of Patent: March 31, 2009Inventor: Mehdi Fakhrai
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Patent number: 7511388Abstract: A powered device includes a power supply input, a diode bridge, and a power loss detector. The power supply input is responsive to an external power source. The diode bridge has an input to receive at least one power supply input. The power loss detector includes an input responsive to the power supply input. The power loss detector is adapted to detect a power loss event and to initiate a power shutdown. In one embodiment, the powered device includes a load circuit to receive a power supply voltage from the diode bridge. The load circuit is responsive to the power loss detector to perform a power shutdown operation.Type: GrantFiled: June 6, 2006Date of Patent: March 31, 2009Assignee: Silicon Laboratories, Inc.Inventors: Richard B. Webb, D. Matthew Landry
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Patent number: 7511389Abstract: An emergency electric power supply unit (9) for backing up the main electric power supply system (1, 10) at the time of the malfunction of the main electric power supply system (1, 10) which includes an industrial apparatus operated by cooperatively controlling an auxiliary machinery (2) operated by the electric power supplied from the main electric power supply system (1, 10), an auxiliary electric power supply (20) for storing the electric power, a charging circuit (21) for charging the electric power supplied from the main electric power supply (1) in the auxiliary electric power supply (20), a discharging circuit (22) for supplying the electric power charged in the auxiliary electric power supply (20) to the auxiliary machinery (2), and an emergency controlling circuit (40) for controlling the discharging circuit (22) so that the electric power from the auxiliary electric power supply (20) is supplied to the auxiliary machinery (2) at the time of the malfunction of the main electric power supply system (1Type: GrantFiled: November 29, 2005Date of Patent: March 31, 2009Assignees: Kayaba Industry Co., Ltd., Ashitate Electric Co., Ltd.Inventors: Tadahiko Ozawa, Tetsuo Torii, Norio Ashitate, Iwao Sagara
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Patent number: 7511390Abstract: The slew rate of switching circuits, e.g. for DC to DC converters, is controlled without unduly sacrificing total switching time, by providing a weaker switching transistor in parallel with each stronger main switching transistor. Switching of the weaker transistor is controlled so as to have a slower slew rate in transitions between switch states than transitions of the main transistor. The main transistor switches at a fast rate for efficiency, but the slower transition by the weaker transistor provides a more gradual transition of the voltage at the desired switching node, so as to reduce EMI and/or input supply noise.Type: GrantFiled: July 29, 2005Date of Patent: March 31, 2009Assignee: Linear Technology CorporationInventor: William Louis Walter
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Patent number: 7511391Abstract: An electromagnetic actuator has a rotor and a stator around which coils are wound to face portions of an outer surface of the rotor. The stator is C-shaped, the rotor is arranged so that a rotation axis thereof is existent in a space surrounded by the stator, and both ends of the stator are respectively formed within a range from 15 to 90 degrees from a virtual base line with respect to the rotation axis serving as a center, when the virtual base line is set to run a center of the rotation axis and separate the stator into left and right.Type: GrantFiled: February 27, 2006Date of Patent: March 31, 2009Assignee: Seiko Precision Inc.Inventors: Hisashi Kawamoto, Satoru Tada, Takashi Nakano
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Patent number: 7511392Abstract: A rotating rectifier module for rectifying a multiphase alternating current signal provided by a multiphase alternating current power supply includes a housing, a circuit board, a plurality of input terminals, a first output terminal, a second output terminal, and a plurality of rectifier circuits. The housing has an outer surface, an inner surface defining a central opening for receipt of a rotatable shaft, and at least one cavity located between the outer and inner surfaces. The circuit board is mounted in a plane substantially normal to the outer surface. The input terminals are located on the circuit board. Each input terminal provides for electrical connection to one phase of the power supply. The first and second output terminals are located on the circuit board for electrical connection to a direct current load. The rectifier circuits are electrically connected in parallel between the first and second output terminals.Type: GrantFiled: June 17, 2005Date of Patent: March 31, 2009Assignee: Hamilton Sundstrand CorporationInventors: Michael Rubbo, Richard Wainwright, Edgar Calago, Bruce Wallen
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Patent number: 7511393Abstract: A brush holder of a motor is provided with a holder body portion and a connector portion, which are integrally formed from a resin. The holder body portion is installed in a yoke housing of the motor to hold a brush to be in slide contact with a commutator. The connector portion is connected with an external connector to energize an armature. A grounding terminal is embedded in brush holder to extend from the holder body portion to the connector portion to be connected to a grounding line of the external connector. A capacitor is installed on the holder body portion to connect a point on a power supply terminal between the connector portion and the brush to the grounding terminal.Type: GrantFiled: April 25, 2006Date of Patent: March 31, 2009Assignee: ASMO Co., Ltd.Inventor: Nobuo Mizutani
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Patent number: 7511394Abstract: A rotational electric machine stator has a rectangular wire that includes a lead wire covered with an insulation coating, terminals that is connected to the rectangular wire by thermal fusing, and convex portions provided on the terminals so as to protrude from the terminals toward the rectangular wire, wherein the insulation coating is removed.Type: GrantFiled: June 26, 2006Date of Patent: March 31, 2009Assignee: Honda Motor Co., Ltd.Inventors: Tomoyuki Okada, Shoei Abe, Tatsuro Horie, Hiromitsu Sato
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Patent number: 7511395Abstract: A hybrid induction motor comprises a stator fixedly installed in a casing, an induction rotor rotatably inserted into a center of the stator and having a shaft at a center thereof, a first synchronous rotor slid in a longitudinal direction of the shaft between the stator and the induction rotor and free-rotatably installed in a circumferential direction of the shaft, and a second synchronous rotor facing the first synchronous rotor, slid in a longitudinal direction of the shaft between the stator and the induction rotor, and free-rotatably installed in a circumferential direction of the shaft.Type: GrantFiled: December 21, 2005Date of Patent: March 31, 2009Assignee: LG Electronics Inc.Inventors: Seung Do Han, Hyoun Jeong Shin, Jae Hong Ahn
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Patent number: 7511396Abstract: A motor comprises a yoke as casing, a shaft extending along a center of the yoke, an annular stator fixed to the yoke and an armature fixed to the shaft to rotate with the shaft inside the stator. The armature comprises a plurality of teeth on the outer circumferential surface. A wire is wound on any of the teeth to form a normal coil. Another wire is wound on another of the teeth to form a brake coil that is a short circuit. When the motor rotates much faster, the brake coil produces magnetic flux which acts as load against the rotation of the motor to allow the motor to rotate slower.Type: GrantFiled: April 19, 2006Date of Patent: March 31, 2009Assignees: Igarashi Electric Works Ltd., Mitsui Mining and Smelting Co., Ltd.Inventors: Naoto Sesita, Katuyuki Tanaka, Yusuke Mizukoshi, Hiroyuki Kurihara, Yoshihisa Watanabe, Hiroshi Sato
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Patent number: 7511397Abstract: A brush system for an electric drive unit has a base to which brush system elements are fastened. Strip conductors via which required electrical connections are established are also provided on the base. Furthermore, a flat resistor that is disposed in a resistor housing is inserted into the brush system . The resistor housing is made of a thermally conductive material while being provided with air passage holes.Type: GrantFiled: January 20, 2005Date of Patent: March 31, 2009Assignee: Siemens AktiengesellschaftInventors: Horst Eisert, Robert Hessdörfer
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Patent number: 7511398Abstract: A base plate is provided with plural through holes extending vertically through the base plate, at the portions aligned with plural teeth. In the respective through holes of the base plate, the lower portions of wire-wound portions of the corresponding teeth and the lower portions of the coils formed around the wire-wound portions are inserted. The lower surfaces of the wire-wound portions are positioned between the upper main surface and the lower main surface of the base plate in the axial direction.Type: GrantFiled: February 10, 2006Date of Patent: March 31, 2009Assignee: Nidec CorporationInventor: Takehito Tamaoka
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Patent number: 7511399Abstract: The present invention relates to a stator assembly for an electrical machine, including a housing and a stator, in which the housing has at least one inward-oriented bead extending in the axial direction.Type: GrantFiled: December 15, 2004Date of Patent: March 31, 2009Assignee: Robert Bosch GmbHInventors: Eberhard Lung, Oliver Eckert, Ricardo Chombo Vidales, Christa Bauch, Quoc-Dat Nguyen, Ngoc-Thach Nguyen
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Patent number: 7511400Abstract: A dynamo system comprises a flywheel mounted on a shaft intermediate its ends. A circular track in the dynamo system includes an inward groove structure to keep the ends of the shaft tracked inside while the flywheel rotating and spinning, the shaft's ends is dangling inside the circular track so that the shaft's ends will move freely along the circular course of the circular track while the flywheel rotates and spins.Type: GrantFiled: April 27, 2006Date of Patent: March 31, 2009Inventor: Hungkun James Chang
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Patent number: 7511401Abstract: A rotor of a motor includes: a stator; a rotor core of a certain shape; a winding coil wound on the rotor core; and a rotor rotated by an electromagnetic interaction with the stator, in which both sides of an end wall of each slot of the I rotor core where the winding coil is inserted are respectively provided with a corner portion to connect both lateral walls of each slot. As a result, the effective area of a flux is increased thereby to decrease flux resistance and to reduce a stacked height of the rotor, that is, the number of stacked thin plates.Type: GrantFiled: January 26, 2006Date of Patent: March 31, 2009Assignee: LG Electronics Inc.Inventors: Tae-weon Yang, Chang-Sub Kim
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Patent number: 7511402Abstract: A polymer actuator is provided. The polymer actuator includes a plurality of gel/electrode complexes arranged in an electrolytic solution, wherein the gel/electrode complex is composed of a polymeric hydrogel containing acidic or basic functional groups and electrodes placed in the polymeric hydrogel, such that it changes in volume upon application of a voltage across said electrodes. The polymer actuator expands and contracts in the linear direction without curved deformation. The polymer actuator is light in weight and is capable of control with a low voltage.Type: GrantFiled: November 25, 2003Date of Patent: March 31, 2009Inventors: Hidetoshi Ito, Koichiro Kezuka
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Patent number: 7511403Abstract: A piezoelectric motor (PEM) is driven with loosely coupled inductors 24 and switching amplifier having a pulse width modulator 18, gate driver circuit 21 and two pairs of power mosfets 210, 212 and 220, 222. Energy stored in the PEM at the end of one cycle is transferred to a capacitor 202 for use in a subsequent cycle.Type: GrantFiled: March 8, 2006Date of Patent: March 31, 2009Assignee: Exfo Photonic Solutions IncInventor: James Smith
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Patent number: 7511404Abstract: A power generator includes a first terminal; a second terminal surrounding the first terminal; piezoelectric elements disposed radially around the terminals, one end of each element being connected to the terminals; and masses connected to the other ends of the elements.Type: GrantFiled: April 27, 2007Date of Patent: March 31, 2009Assignee: Hyundai Motor CompanyInventor: Yong-Sung Lee
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Patent number: 7511405Abstract: To achieve small-sized formation of a piezoelectric vibrator while preventing exciting electrodes provided at both faces of the piezoelectric vibrating piece from being shortcircuited to each other and enabling to fabricate the piezoelectric vibrating piece easily, there is provided a piezoelectric vibrator 1 including a case 3 in a shape of a bottomed cylinder having an opening portion 3a and having a conductivity, a ring 12 substantially in a cylindrical shape press-fitted to the opening portion 3a of the case 3 and having a conductivity, one piece of a lead 13 inserted to the ring 12 and having an inner lead portion 15 and an outer lead portion 16, a filling member 14 having an insulting property for sealing an interval between the lead 13 and the ring 12 in airtight, and a piezoelectric vibrating piece 2 which is constituted by substantially a plate-like shape arranged at inside of the case 3 and includes exciting electrodes 8, 9 at both faces thereof and in which the exciting electrode 8 is supported byType: GrantFiled: November 29, 2007Date of Patent: March 31, 2009Assignee: Seiko Instruments Inc.Inventors: Masashi Numata, Yasuo Kawada, Sadao Oku
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Patent number: 7511406Abstract: A metal halide arc discharge lamp (10) having a lamp envelope (12) and an arc tube (14) mounted within the envelope; a shroud (20) surrounding the arc tube (14); electrical lead-ins (26, 28) for supplying electrical energy to the arc tube (14); and a chemical fill within the arc tube to produce light when an arc is formed within the arc tube; the improvement comprising: the shroud (20) having a given thickness T and a given inside diameter ID having a relationship such that T is less than 2 mm and ID/T is less than 22.Type: GrantFiled: June 10, 2006Date of Patent: March 31, 2009Assignee: Osram Sylvania Inc.Inventors: Elliot Wyner, Mary Berger
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Patent number: 7511407Abstract: An optical filter of a plasma display panel (PDP) and its fabrication method are disclosed. The optical filter includes an electromagnetic wave shield layer having a bias angle formed by cutting a mesh film along a predetermined direction.Type: GrantFiled: May 25, 2004Date of Patent: March 31, 2009Assignee: LG Electronics, Inc.Inventors: Myeong Soo Chang, Hong Rae Cha, Byung Gil Ryu, Kyung Ku Kim, Young Sung Kim
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Patent number: 7511408Abstract: A spacer for an image display apparatus includes a glass base member which contains SiO2 by 10 to 35 wt %, RO (R representing an alkali earth metal) by 20 to 60 wt %, B2O3 by 9 to 30 wt % and Sb2O3 by 0.01 to 5 wt %.Type: GrantFiled: September 12, 2005Date of Patent: March 31, 2009Assignee: Canon Kabushiki KaishaInventor: Kohei Nakata
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Patent number: 7511409Abstract: Provided is a piezoelectric-film-type electron emitter which enables suppression of reduction of electron emission quantity due to repeated use thereof, and which exhibits high durability. The electron emitter includes a substrate; an emitter section formed of a dielectric material; a first electrode formed on the top surface of the emitter section; and a second electrode formed on the bottom surface of the emitter section. The dielectric material forming the emitter section contains a dielectric composition having an electric-field-induced strain (i.e., percent deformation under application of an electric field of 4 kV/mm, as measured in a direction perpendicular to the electric field) of 0.07% or less.Type: GrantFiled: August 23, 2005Date of Patent: March 31, 2009Assignee: NGK Insulators, Ltd.Inventors: Hirofumi Yamaguchi, Kei Sato, Toshikatsu Kashiwaya