Abstract: The memory cell includes a first unit, a semiconductor layer, a second unit, and a doped region. The first unit includes a first gate, a first charge trapping layer, and a second charge trapping layer. The first and the second charge trapping layer are respectively disposed on both sides of the first gate. The semiconductor layer is disposed on the first unit. The second unit is disposed on the semiconductor layer and is in mirror symmetry to the first unit. The second unit includes a second gate and a third and a fourth charge trapping layer respectively disposed on both sides of the second gate. The doped region is disposed at both sides of the semiconductor layer and serves as a common source/drain region of both the first and the second unit.

Abstract: A charge trapping memory having a plurality of memory cells in which each memory cell is capable of storing in a left charge storage site and a right charge storage site, multiple bits per memory cell. A memory operation window the memory cell is improved by biasing the memory cell for programming the right charge storage site improved when the left charge storage site stores charge sufficient to establish a negative threshold voltage, or a threshold voltage lower than an initial voltage level.

Abstract: Systems and methods in accordance with various embodiments can provide for comprehensive erase verification and defect detection in non-volatile semiconductor memory. In one embodiment, the results of erasing a group of storage elements is verified using a plurality of test conditions to better detect defective and/or insufficiently erased storage elements of the group. For example, the results of erasing a NAND string can be verified by testing charging of the string in a plurality of directions with the storage elements biased to turn on if in an erased state. If a string of storage elements passes a first test process or operation but fails a second test process or operation, the string can be determined to have failed the erase process and possibly be defective. By testing charging or conduction of the string in a plurality of directions, defects in any transistors of the string that are masked under one set of conditions may be exposed under a second set of bias conditions.

Abstract: In one embodiment, a memory is provided that includes: a memory cell array adapted to be programmed with a positive voltage from a positive-negative node and to be erased with a negative voltage from the positive-negative node; a negative voltage blocking circuit; and a positive voltage source operable coupled to the negative voltage blocking circuit, the positive voltage source operable to provide the positive voltage to the positive-negative node through the negative voltage blocking circuit, wherein the negative voltage blocking circuit is adapted to prevent the negative voltage from coupling from the positive-negative node to the positive voltage source.

Abstract: A programming method for a p-channel memory cell, the memory cell includes a source, a drain and a gate. The gate is applies with a first voltage, which results in Fowler-Nordheim (?FN) hole injection, thereby causing the memory cell to be in a programmed state.

Abstract: An apparatus including a first diffusion formed on a substrate, the first diffusion including a pair of channels, each of which separates a source from a drain; a second diffusion formed on the substrate, the second diffusion including a channel that separates a source from a drain; a first gate electrode formed on the substrate, wherein the first gate electrode overlaps one of the pair of channels on the first diffusion to form a pass-gate transistor; and a second gate electrode formed on the substrate, wherein the second gate electrode overlaps one of the pair of channels of the first diffusion to form a pull-down transistor and overlaps the channel of the second diffusion to form a pull-up transistor, and wherein the pass-gate, pull-down and pull-up transistors are of at least two different constructions. Other embodiments are disclosed and claimed.

Abstract: A semiconductor memory device includes a clock period detector, a column address enable signal generator, and a multiplexing circuit. The clock period detector detects a period of an external clock in response to a pulse width information signal having a pulse width corresponding to that of the external clock. The column address enable signal generator generates a column address enable signal activated in response to a column access signal. The multiplexing circuit multiplexes points of time of inactivation of the column access signal in response to the detected signal outputted from the clock period detector.

Abstract: An input buffer generates an output signal corresponding to a digital input signal. The input buffer is coupled to a feedback circuit. The feedback circuit initially couples a positive feedback signal to the buffer circuit responsive to each transition of the input signal. The positive feedback signal increases the gain of the input buffer thereby causing the input buffer to transition the output signal more quickly in response to the transition of the input signal. The feedback circuit thereafter terminates the positive feedback signal before a subsequent transition of the input signal. The positive feedback signal is generated by detecting a transition of the output signal responsive to the transition of the input signal that initiated the positive feedback signal.

Abstract: A nonvolatile semiconductor memory device includes an internal output line, and a page buffers. Each page buffer is coupled to at least one bitline, the internal output line, and a data input line physically distinct from the internal output line, and configured to pull the internal output line to an output drive voltage in response to a bitline voltage on one of the bitlines coupled to the page buffer.

Abstract: A resister configuration control device which is capable of updating resister configuration values during a non-display period without increasing a circuit scale. A FIFO selector 103 receives register configuration value information comprising a register configuration value and address information, and selects a transmission destination to which the register configuration value information is to be sent, from FIFOs 108 and 109 based on the address information and sends the register configuration value information to the selected destination. The FIFO 108 or 109 temporarily stores the register configuration value information sent from the FIFO selector 103, and reads-out and outputs the register configuration value information in predetermined timing.

Abstract: A non-volatile memory array structure includes N bit lines, M first word lines, M×N first memory cells, a second word line, n repair circuits and a sense amplifier. The N bit lines and M first word lines are interlaced to control the M×N first memory cell. The second word line is placed across the n bit lines. Each of the repair circuits is electrically connected between the corresponding bit line and the sense amplifier. M and N are natural number.

Abstract: A method for improving the reliability of a memory having a used memory region and an unused memory region, wherein defect memory elements in the used memory region can be substituted by functional memory elements in the unused memory region, having the steps of providing the used memory region with a first stress sequence; and providing the unused memory region with a second stress sequence.

Abstract: The present invention provides a high-speed memory device that can be easily tested using the existing low-speed Automatic Test Equipment (ATE). In an embodiment of the invention, a memory device includes two channels. During normal communications with a host, one channel is used for bi-directional communications with a host. But during a test mode, a first channel is used to communicate with the ATE in one direction, and a second channel is used to communicate with the ATE in the opposite direction. The present invention also provides a memory module and a method for controlling the high-speed memory device.

Abstract: A system and method for sensing a data state stored by a memory cell that includes coupling a first digit line and a second digit line to a precharge voltage and further coupling a memory cell to the first digit line. At least one digit line other than the first and second digit lines is driven to a reference voltage level and the at least one digit line is coupled to the second digit line to establish a reference voltage in the second digit line. A voltage differential is sensed between the first digit line and the second digit line, and a data state based on the voltage differential is latched in response.

Abstract: A sense amplifying circuit capable of operating with a lower voltage and/or a nonvolatile memory device including the same may be provided. The nonvolatile memory device may include a nonvolatile memory cell array including a first bit line connected with a first memory cell and/or a second bit line connected with a first reference memory cell, and/or a sense amplifying circuit configured to sense data stored in the first memory cell based on a current flowing in the first bit line and/or a current flowing in the second bit line.

Abstract: A refresh control circuit includes a temperature detecting unit that detects the temperature and generates a temperature detecting voltage, a control unit that generates a plurality of control signals, a digital converting unit that converts the temperature detecting voltage into a plurality of bits of digital code and outputs a plurality of bits of digital code according to the control of a plurality of control signals, and a refresh signal generating unit that generates a refresh signal with a period corresponding to the input of a plurality of bits of digital code.

Abstract: In one embodiment, a integrated circuit (IC) configurable to have any one of a plurality of different feature sets, the IC including (a) one or more feature blocks adapted to be independently enabled or disabled, (b) a one-time-programmable (OTP) memory cell for each feature block, the OTP memory cell storing a value, and (c) a feature control module for each feature block, each feature control module connected between the corresponding OTP memory cell and the corresponding feature block, and adapted to enable or disable the corresponding feature block based on the value stored in the corresponding OTP memory cell. The OTP memory cells are programmed by a vendor to select the particular feature set for the IC which is to be available to a purchaser.

Abstract: A method of managing power consumption by a memory in a memory device includes determining whether the device is powered by a depletable power supply, and if it is determined that the device is powered by a depletable power supply, changing a behavior of the memory to regulate power consumed by the memory.

Abstract: The present invention describes circuitry and a method of providing a low power WRITE mode of operation for an integrated circuit comprising an SRAM memory to provide a reduced IDDQ relative to the IDDQ of a full active mode. In one aspect, the circuitry includes an SRAM memory array, mode control circuitry coupled to the array and configured to alter a supply voltage level to the SRAM array based on a mode of operation. The circuitry also includes control inputs coupled to the mode control circuitry for selecting one of the low power write mode, the full active mode, and optionally a retention mode of operation. The mode control circuitry is configured to receive the control inputs to select one of the three modes of operation, and to alter one or more supply voltage levels to the array, for example, the Vss supply voltage using a Vss supply circuit and the Vdd supply voltage using a Vdd supply circuit, based on the selected mode of operation.

Abstract: A semiconductor device for easily changing an operating voltage of an I/O circuit. The I/O circuit includes a first I/O cell, which operates with a first high-potential power supply, and a second I/O cell, which operates with a second high-potential power supply. The I/O circuit includes a control circuit for selectively activating the first and second I/O cells according to a voltage selection signal. In the I/O circuit, a signal having a voltage according to an operating voltage of the selected I/O cell is generated.

Abstract: A device with non volatile memory cells, with optimized programming, of the type comprising a sector of matrix memory cells organized in rows and columns, with the columns organized in a plurality of global bit-lines associated with at least one plurality of local bit-lines and respectively enabled by a first select signal and by at least one second select signal generated by a decoder, these columns being associated with at least one Program Load PL controlled by a logic circuit and suitable for applying a programming pulse to a plurality of cells belonging to the enabled bit lines, comprising a plurality of discharge transistors, each associated with a corresponding column controlled by a control signal complementary to the control signal of the adjacent discharge transistor.

Abstract: An operation clock controller for preventing a semiconductor memory device from operating when an operation frequency of an external clock is higher than a predetermined frequency. The operation clock controller includes a clock buffer for buffering an external clock to output an internal clock; a unit delaying set for sequentially delaying the internal clock to output a plurality of delayed clocks; a phase detecting block for detecting logic levels of the delayed clocks at a rising edge of the internal clock to output phase detecting signals; a sampling pulse generator for outputting a sampling signal generated at a predetermined point of the internal clock; a latching block for outputting a phase detection latch signal by sampling and latching the phase detection signal at a point of the sampling signal being inputted; and a frequency detection block for outputting the frequency detection signal by logically combining the phase detection latch signal.

Abstract: A method of acquiring seismic data that includes deploying a first array of seismic receivers and a second array of seismic receivers, and simultaneously receiving drill noise seismic energy produced as a wellbore is drilled relatively near the first and second arrays of seismic receivers using the first and second array of seismic receivers, wherein the first array of seismic receivers is closer to the source of the drill noise seismic energy than the second array of seismic receivers. A related method for processing seismic data and computer useable media are also described. Also a method of acquiring seismic data that includes deploying a first array of seismic receivers within a borehole, receiving seismic energy produced as a wellbore is drilled relatively near first array using said seismic receivers, and recording seismic data associated with the received seismic energy. A related method for acquiring and processing seismic data is also described.

Abstract: A piezoelectric actuator includes a vibration plate covering pressure chambers and serving also as a common electrode, a piezoelectric layer arranged entirely on the upper surface of the vibration plate, an insulating layer formed entirely on upper surfaces of individual electrodes and the piezoelectric layer, and wirings formed on the upper surface of the insulating layer. A through hole is formed in the insulating layer at an area facing both one of the individual electrodes and one of the wirings, and the individual electrode and the wiring are connected by an electroconductive material filled in the through hole. With this, both the simplification of structure of electric contact and the improvement in reliability of electric connection can be realized, and a piezoelectric actuator is capable of suppressing the generation of excessive electrostatic capacitance during the application of drive voltage can be provided.

Abstract: A method for determining the position of an underwater device includes placement of a plurality of station keeping devices on or below the surface of the water in known positions. A device to locate is provided for placement below the surface of the water, and the device to locate and the station keeping devices are provided with a synchronized time base and a common acoustic pulse time schedule. Each station keeping device sends an acoustic pulse at a time according to the common acoustic pulse schedule. The device to locate receives pulses sent by the station keeping devices and calculates a distance between itself and each station keeping device based upon the time that the acoustic pulse is sent and the time that the pulse is received. The device to locate then calculates its position based upon the distances between the device to locate and the station keeping devices. Systems and devices are also disclosed.

Abstract: An acoustic method and apparatus for an acoustic system use a transceiver module, which can transmit to a transmit acoustic element of a transmit sonar array and receive from a receive acoustic element of a receive sonar array in accordance with a common transmit/receive control signal.

Abstract: This invention provides a technique whereby, even if a step is produced by splitting a lower electrode into component elements, resistance increase of an upper electrode, damage to a membrane and decrease of dielectric strength between an upper electrode and the lower electrode, are reduced. In an ultrasonic transducer comprising plural lower electrodes, —an insulation film covering the lower electrodes, —plural hollow parts formed to overlap the lower electrodes on the insulation film, —an insulation film filling the gaps among the hollow parts, an insulation film covering the hollow parts and insulation film, plural upper electrodes formed to overlap the hollow parts on the insulation film and plural interconnections joining them, —the surfaces of the hollow parts and insulation film are flattened to the same height.

Abstract: A method for enhancing functionality of an automated testing tool. Embodiments of the present invention provide for dynamically adjusting a date in an automated testing tool. System time in a system time format is adjusted according to a date offset. Embodiments of the present invention provide a method of formatting a date in an automated testing tool. System time in a system time format is accessed, wherein the system time comprises a current date and a current time. The date is formatted according to a predetermined date format. Embodiments of the present invention provide a method of regulating access to variables of an automated testing tool. An electronic document of the automated testing tool is populated with at least one variable and at least one value corresponding to the variable. In response to a request to access the variable, access to the variable and the value is provided.

Abstract: A standard reproduction model for ensuring real time reproducing on a disk-shaped information recording medium, includes a pickup (102) that reads the real time data from the information recording medium, a buffer memory (103) that temporarily stores the real time data read by the pickup, and a decoding module (104) that reads the real time data from the buffer memory (103) and processes the read real time data. An access time Tacc of the standard reproduction model is expressed by the following formula, Tacc=A·dN+Trev+B where dN is a difference in rotational speed of the disk-shaped information recording medium, Trev is a rotation waiting time at a target access position, A and B are constants.

Abstract: An information recording/reproducing apparatus includes a reproduction unit, an operation unit, a storage unit, and a control unit. The reproduction unit reads information recorded in a recording medium. The operation unit instructs the reproduction unit to eject the recording medium. The storage unit stores the information read by there production unit therein. When the recording medium is loaded into the reproduction unit, the control unit controls the reproduction unit to read the information and controls the storage unit to store the information read by there production unit therein automatically. When the operation unit instructs the reproduction unit to eject the recording medium during the storage unit being storing the information read, the control unit informs a user that the storage unit is storing the information read.

Abstract: In an optical disk recording and reproducing device which uses an optical disk having at least a first recording layer and a second recording layer, a thickness of a spacer section between the first recording layer and the second recording layer is measured, an amount of defocus with respect to the second recording layer is set based on the measured spacer thickness, and a focus servo operation is performed for focusing the laser light irradiated from an optical pickup device on the second recording layer.

Abstract: The present invention discloses an apparatus and method for generating a tracking error signal in an optical disc drive. The method includes: receiving a first and a second analog signals; converting the first and the second analog signals into a first and a second digital signals respectively; delaying the first and second digital signals to generate a first and a second delay signals respectively; generating the tracking error signal according to the first and second digital signals and the first and second delay signals.

Abstract: According to the present invention, there is provided a method of providing a WORM storage system, the method including a sector-append capability. The method includes receiving data to be written to a WORM storage system. In addition, the method includes identifying a target sector at which the data is to be written. Also, the method includes determining if the received data can be added to the target sector. Moreover, the method includes adding the received data to the target sector if it is determined that the received data can be added to the target sector.

Abstract: A medium judgment method determines authorization of a rewritable storage medium of interest having a read-only area and a rewritable area for use in an optical disk drive. In the medium judgment method, a specific information of the medium is acquired from an information reproduction area of the read-only area of the medium. It is determined whether contents of the medium are authorized based on the acquired specific information. Running of a starting process of the optical disk drive with the medium is permitted when the authorization of the medium is determined as being correct. Running of the starting process of the optical disk drive with the medium is inhibited when the authorization of the medium is determined as being incorrect.

Abstract: There are provided a mounting unit configured to selectively mount first and second optical disks in which characteristics of recording films are different from one another, and a discriminating unit configured to discriminate which of the first and second optical disks is mounted on the mounting unit based on a level of a reproduction signal which is obtained by reproducing innermost peripheral portion of the first or second optical disk mounted on the mounting unit.

Abstract: The present invention relates to an apparatus for reading from and/or writing to optical recording media capable of playback of an optical recording medium based on one single focus search cycle. The apparatus distinguishes between the types of optical recording media on the basis of the focus error signal and the data signal obtainable during focus search operation. An S-CurveOK signal, derived from the focus error signal, is the indication whether at all an optical medium is loaded. When a FocusOK signal, derived from the data signal, is active with dedicated settings for a high-reflectivity medium, this means that a high-reflectivity medium is loaded. However, when the FocusOK signal is not active, the apparatus deduces that a low-reflectivity medium is loaded. The operation mode for the second type of optical recording medium is adapted during the focus search cycle based on the combination of the S-CurveOK and FocusOK signals.

Abstract: A player is provided that is capable of playing discs of either a first or a second configuration. Both types of discs can be double-sided optical discs formed with data tracks. In one configuration, the tracks on one side follow one spiral while the tracks on the other side follow a second spiral, the two spirals being oriented in opposite directions as viewed from the respective sides, and therefore being mirror images of each other. This allows data to be read by a player seamlessly from both sides of the disc without changing the direction of rotation of the disc. In the other configuration, the tracks follow identical spirals. The disc is then rotated in one direction for one side and the other direction for the other side.

Abstract: An optical pickup apparatus comprises a semiconductor laser output controller for emitting laser beam, a photodetector for detecting the emitted laser beam, a sampling processor for performing a sampling process, a pulse current generator for generating erase current pulses, write current pulses, and read current pulses, and a controller for controlling the above components. The apparatus performs the sampling process and generates the current pulses according to a predetermined APC timing and controls the semiconductor laser output controller based on the sampling process and current pulses.

Abstract: A first trial write process obtains an optimum recording power of a test pattern even with respect to data having different rules for the recording waveforms corresponding n type data length sets, and a second trial write process using this optimum recording power obtains optimum pulse width or optimum pulse edge position separately for each data length set. Based on the optimum recording power and optimum recording waveform obtained by these trial write processes, recording operation is performed so as to form all the data lengths with satisfactory accuracy, thereby making it possible to obtain a proper reproduced signal.

Abstract: An information processing apparatus capable of reducing propagation delay differences and error factors, capable of realizing high precision binarization control, and accordingly capable of realizing high precision reproduction, including a comparator for converting an RF signal to a binarized signal; an edge position measurement unit for measuring the edge position of the binarized signal in a time axis by multi-phase clocks; a jitter measurement unit for measuring the amount of jitter based on the edge position information; an edge interval measurement unit for measuring the edge interval length based on the edge position information; a propagation delay difference control amount calculation unit for controlling propagation delay amount between an input and an output of the comparator by injecting a slice level voltage of the comparator through a DAC based on the measured amount of jitter and edge interval length; and a channel data discrimination unit for reproducing the data corresponding to the channel c

Abstract: A phase-change optical disc formatting device which formats a phase-change optical disc so that signal characteristics of an area in which at least one of a file structure and application data is to be recorded are substantially equal to signal characteristics of a format area. A phase-change optical disc formatting method including: formatting a phase-change optical disc so that signal characteristics of an area in which at least one of a file structure and application data is to be recorded are substantially equal to signal characteristics of a format area. A phase-change optical disc formatted such that signal characteristics of an area of the phase-change optical disc in which at least one of a file structure and application data is to be recorded are substantially equal to signal characteristics of a format area of the phase-change optical disc.

Abstract: An apparatus and method to modulate address data of a disc type recording medium, include generating the address data, performing error correction coding of the address data and outputting coded address data, receiving the coded address data in a unit of at least two bits, generating a first modulated signal of the coded address data using a first modulation technique, generating a second modulated signal of the coded address data using a second modulating signal, and generating a unit wobble signal by synthesizing the first and second modulated signals.

Abstract: The present invention relates to a method for optical recording in which information is recorded on an optical recording media utilizing holography and to a method for optical reproducing in which information recorded on an optical recording media utilizing holography is reconstructed. The methods includes preparing an optical recording media having wavelength reference marks with a periodic structure which are associated with a recording base wavelength, irradiating the wavelength reference marks with a beam from a light source on recording information or on reproducing information to detect a wavelength shift of the light source with respect to the base wavelength based on a diffraction beam from the wavelength reference marks, and performing recording or reproducing while controlling the wavelength of the light source so as to reduce the wavelength shift.

Abstract: An objective optical element for use in an optical pickup apparatus having: a first light source for emitting a first light flux; a second light source for emitting a second light flux; an objective optical element, the objective optical element includes: an optical surface including a common area and an exclusive area; and a wavelength selective film formed on at least one of the common area and the exclusive area; wherein the common area transmits the first light flux which is formed into a converged spot on the information recording surface, and transmits the second light flux which is formed into a converged spot on the information recording surface, and the exclusive area transmits the first light flux which is formed into a converged spot on the information recording surface, and transmits the second light flux which is not formed into a converged spot on the information recording surface.

Abstract: The present invention provides an objective lens for optical pick-up devices in which the amount of change in the astigmatic aberration is small when there is a temperature distribution that is not circularly symmetric with respect to the optical axis within an objective lens constructed with at least two optical elements and which permits stable and high-speed information recording and reproduction with high-density optical disks, and to provide further an optical pick-up device provided with such an objective lens, and an optical information recording and/or reproducing apparatus employing such an optical pick-up device.

Abstract: Disclosed is a laser pulse controlling circuit that, when the laser device is driven with laser pulses having the first and the second illumination levels, causes the first and the second illumination level setting units to set the first and the second illumination levels corresponding to a predetermined ratio of the first illumination level to the second illumination level, wherein the laser pulse controlling circuit, based on regularity that the relation between: a manipulated variable for causing the second illumination level setting unit to execute adjustment of the second illumination level; and the inverse of the ratio, with reference to the first illumination level, is a straight line that necessarily passes one point for a predetermined first illumination level, and that the slope of the straight line is proportional to an arbitrary first illumination level, calculates the manipulated variable that is correlated with the first illumination level corresponding to the optical disk, and with the inverse

Abstract: The present invention provides a method of configuring and recording control information on an optical disc, thereby enabling to facilitate to utilize the specified control information and to efficiently cope with the recording/reproducing of the optical discs. In configuring a control information within a disc management area of a read-only or recordable disc, the present invention includes configuring the control information with a common field recording an information commonly applied to both of the read-only and recordable discs and a specific field recording an information failing to be commonly applied to at least one disc type.

Abstract: To provide an optical information recording medium on which visual information can be recorded on a label face by using a laser apparatus for recording and reading electronic information by irradiation with a low output laser without exerting e.g. thermal influence over electronic information recorded on the medium. The present invention provides an optical information recording medium 100 having such a structure that on a substrate 101, an electronic information recording layer 102, a reflective layer 103 formed in contact with the opposite side of the electronic information recording layer 102 from a side where a laser beam 107 enters, a protective layer 104, a visual information recording layer 105 and an overcoat layer 106 constituting an outermost layer are laminated in this order, wherein the surface roughness of the outermost layer on the label face side is at most ½ of the wavelength (?) of a laser beam 108.

Abstract: A method and apparatus for enabling restoration of connections upon failure within a high-speed data transfer architecture, such as SONET/SDH channel, is provided. The design detects health codes generated by detecting elements, the health codes representing the health of each channel. The design processes these health codes to determine re-provisioning of the failing connection where appropriate. This restoration decision-making apparatus communicates the resultant re-provisioning scheme to repairing elements. The design may detect and communicate health codes relating the health of each channel to determine which code reports a healthier channel among a plurality of transport channels available for carrying re-provisioned traffic due to a failed connection.

Abstract: A method for recovering state information of a first tunnel endpoint of a point to point connection between the first tunnel endpoint and a second tunnel endpoint, the state information comprising a first state variable comprising a sequence number for sent messages and a second state variable comprising a sequence number for received messages. The method comprises detecting a crash of the first tunnel endpoint with a backup tunnel endpoint of the first tunnel endpoint, sending, from the backup tunnel endpoint, at least one request message to the second tunnel endpoint, and recovering the first state variable and the second state variable of the first tunnel endpoint based on the state variables present in at least one response message from the second tunnel endpoint.