Patents Issued in January 19, 2010
  • Patent number: 7649474
    Abstract: A wireless communication and drill string telemetry system. The communication system is used for communicating information along a drill string between a boring tool and a boring machine. An insulator assembly provides an electrically insulated gap between the drill string communication path and a soil engaging electrode for the electrical return path. A transmitter assembly includes a data transmitter for encoding and transmitting a data signal. A signal coupler couples the data signal to the drill string and provides a controlled electrical connection between the drill string communication path and the soil engaging electrode. The signal coupler comprises a transformer and a current regulating circuit to adjust a voltage across the transformer's primary winding. A receiver assembly is disposed proximate the drilling machine and includes a toroidal pickup coil and a signal processing assembly.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: January 19, 2010
    Assignee: The Charles Machine Works, Inc.
    Inventor: Michael F. Gard
  • Patent number: 7649475
    Abstract: A downhole electrical transmission system having first and second tubular bodies coupled together by mating threads, each tubular body having a bore. An electrical conductor assembly is disposed within the bore of each tubular body. At least one end of each assembly has an electrical contact surrounded by a dielectric material, the electrical contact and dielectric material forming a polished, planar mating surface. The mating surfaces span an entire cross section of the end and are perpendicular to a central axis of the tubular bodies. The mating surfaces of each electrical conductor assembly are substantially engaged at a compressive load when the tubular bodies are fully mated.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: January 19, 2010
    Inventors: David R. Hall, Scott Dahlgren
  • Patent number: 7649476
    Abstract: A method for guiding an aircraft toward a stopping position within an aircraft stand of an airport comprises using a visual docking guidance system (VDGS) associated with the aircraft stand for displaying first instructions for guiding the aircraft toward the stopping position. The first instructions are based on an initial determination of the aircraft-type and on first sensed positional information of the aircraft. Aircraft-type data that is stored in a radio frequency identification (RFID) tag carried by the aircraft is then read. Using the VDGS, second instructions are displayed for guiding the aircraft toward the stopping position based on the aircraft-type data and based on second sensed positional information of the aircraft.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: January 19, 2010
    Assignee: DEW Engineering and Development ULC
    Inventor: Neil Hutton
  • Patent number: 7649477
    Abstract: A handheld electronic device useful for wireless communication has a keyboard including a plurality of externally accessible keys, of which at least a portion have multiple letters associated therewith. The keys can be disabled (i.e. the keyboard can be locked) to prevent accidental actuation thereof by using the navigation tool which has a depressible rolling member. Thus, for example, depression of the rolling member twice in succession or pressing and holding the rolling member down temporarily enables the keyboard lock. The lock can be disabled simply by depressing the rolling member and at least one other key.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: January 19, 2010
    Assignee: Research in Motion Limited
    Inventors: Matthew Lee, Andrew Bocking, Jason T. Griffin, Steven Fyke
  • Patent number: 7649478
    Abstract: A method for designing a keyboard for efficient data entry. A user inputs data from a predefined set of characters such as letters or symbols on an input device by pressing one or more keys, in a sequential fashion, for each character. Based on the frequency of occurrence for each character, a prefix-free coding is used to generate an optimal or near-optimal key sequence mapping for the given character set. In one exemplary embodiment, eight to twelve keys from a phone keypad are used to generate English alphabets, which substantially reduces the average number of keystrokes per character. The present invention enables the user to efficiently input typical data from a given probability distribution of characters using a limited number of keys.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: January 19, 2010
    Inventor: Hyoungsoo Yoon
  • Patent number: 7649479
    Abstract: A system and method for realizing a Wyner-Ziv encoder may involve the following steps: (a) apply nested quantization to input data from an information source in order to generate intermediate data; and (b) encode the intermediate data using an asymmetric Slepian-Wolf encoder in order to generate compressed output data representing the input data. Similarly, a Wyner-Ziv decoder may be realized by: (1) applying an asymmetric Slepian-Wolf decoder to compressed input data using side information to generate intermediate values, and (b) jointly decoding the intermediate values using the side information to generate decompressed output data.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: January 19, 2010
    Inventors: Zhixin Liu, Samuel S. Cheng, Angelos D. Liveris, Zixiang Xiong
  • Patent number: 7649480
    Abstract: A calibration circuit and method suitable for black level calibration in image processing, the circuit comprising an analogue gain amplifier, an analogue to digital converter; a correction circuit for receiving a digital signal and providing a digital offset signal; and a digital to analogue converter for receiving said digital offset signal and feeding a corresponding analogue offset signal back to the input of said gain amplifier. The calibration circuit is arranged such that the correction circuit and said digital to analogue converter form a feedback loop applying an offset to said input signal and said correction circuit includes an inverse gain circuit for applying an inverse gain to a signal within said correction circuit prior to said digital to analogue converter. Preferably the inverse gain applied is such that the total loop gain does not deviate too far from unity.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: January 19, 2010
    Assignee: Wolfson Microelectronics PLC
    Inventors: Alastair Mark Boomer, John Paul Lesso
  • Patent number: 7649481
    Abstract: A sigma-delta ADC (200A) uses blue-noise (random, pseudo-random) modulation (202) to reduce the effect of the substrate noise. Pairs of blue-noise multipliers (202) are placed before and after each non-delayed integrator (106). In the case of a sample-delayed integrator, the integrator is first separated into a non-delayed integrator (110) followed by the delay element (112). The multiplying sequence is a sequence of 1's and ?1 's that has blue-noise spectral characteristics (i.e., the spectrum has a low frequency deficiency).
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: January 19, 2010
    Assignee: University of Rochester
    Inventor: Zeljko Ignjatovic
  • Patent number: 7649482
    Abstract: A signal modulation method by an electronic device which includes a minimal reducing unit that minimally reduces an integrated signal returned to an adder from an integrator. The signal modulation method includes generating an added signal with the adder. The signal modulation method further includes generating a new integrated signal with the integrator by returning a previously self-generated and stored integrated signal to the adder, and by integrating the added signal generated by the adder. The signal modulation method further includes generating a new quantization signal with a quantizer by quantizing the new integrated signal generated by the integrator.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: January 19, 2010
    Assignee: Fujitsu Limited
    Inventors: Kazuhiko Hatae, Yasuo Ohtomo, Masashi Sato, Yutaka Awata
  • Patent number: 7649483
    Abstract: A circuit includes T sets of digital to analog converters (DACs), each including N current sources and M delay elements. An output signal includes a sum of outputs of the N current sources. An input of a first one of the M delay elements and a control input of a first one of the N current sources receive a respective one of a plurality of decoded signals. T sets of first converters each have a feedback node, an output, and an input that communicates with the output signal of a respective one of the T sets of DACs. T second converters have inputs that communicate with respective ones of the feedback nodes of each of the T sets of first converters. A summer generates a difference signal that is based on the outputs of the T sets of first converters and outputs of the T second converters.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: January 19, 2010
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Pierte Roo
  • Patent number: 7649484
    Abstract: An enhancement that reduces the digital interface rate of analog-to-digital (A/D) and digital-to-analog (D/A) converters through the use of compression and decompression is described for implementation as a single integrated circuit. Improved A/D converters compressing a sampled version of an A/D converter's analog input signal in real time, thereby significantly decreasing the required bit rate of the A/D converter's digital interface. Similarly, improved D/A converters decrease the required bit rate of the D/A converter's digital interface. D/A converters include a decompressor that decompresses the D/A converter's compressed digital input in real time, prior to conversion to an analog output signal.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: January 19, 2010
    Assignee: Samplify Systems, Inc.
    Inventor: Albert William Wegener
  • Patent number: 7649485
    Abstract: A system for converting a continuous-time analog signal having a signal bandwidth to a discrete-time digital signal, the system includes a plurality of proportional filters configured to receive the continuous-time analog signal, each proportional filter having a different center frequency from all other proportional filters and each proportional filter having an operational bandwidth directly proportional to its center frequency, and a plurality of sample and hold circuits, each sample and hold circuit coupled to a respective one of the proportional filters.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: January 19, 2010
    Assignee: HRL Laboratories, LLC
    Inventor: Todd Kaplan
  • Patent number: 7649486
    Abstract: A flash A/D converter includes a reference voltage generator for generating a plurality of reference voltages, a first group of amplifiers having a plurality of amplifiers each of which amplifies a difference voltage between each reference voltage generated by the reference voltage generator and a voltage of an input signal, and a second group of amplifiers having a plurality of amplifiers. Each amplifier of the first group of amplifiers is a differential amplifier having a different pair formed of a plurality of sets of cascade-connected transistors, and has a first switch for short-circuiting respective cascade connection portions of the plurality of transistors configuring the differential pair. Each amplifier of the second group of amplifiers is a differential amplifier having a differential pair formed of at least two transistors and has a second switch for short-circuiting a portion between input units of the differential pair.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: January 19, 2010
    Assignee: Sony Corporation
    Inventors: Junji Toyomura, Yukitoshi Yamashita, Shogo Nakamura, Norifumi Kanagawa, Yasuhide Shimizu, Koichi Ono
  • Patent number: 7649487
    Abstract: In an A/D converter provided with an A/D converter circuit 101 for operationally amplifying an input signal and outputting an amplified signal, the A/D converter circuit 101 includes an initial value setting circuit 4a in addition to an amplifier 1a, a sub-A/D converter 2a, a sub-D/A converter 3a and capacitors C11 and C12. To ensure that the initial value of the output voltage of the amplifier 1a is a given voltage value close to the target value of operational amplification at the start of the operational amplification by the amplifier 1a, the initial value setting circuit 4a applies a given bias value equal to the given voltage value close to the target value to a next-stage capacitor C13 to be connected to the output side of the amplifier 1a. Such an A/D converter circuit 101 that can perform speedy convergence to the target value of operational amplification is used at each stage of a pipeline A/D converter.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: January 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Toshiaki Ozeki, Daisuke Nomasaki, Koji Oka
  • Patent number: 7649488
    Abstract: A low-power column parallel cyclic analog-to-digital converter and an imaging device using the same. The analog-to-digital converter comprises one stage and is optimized to reduce power, noise and capacitor settling time. The one stage analog-to-digital converter comprises a multiplying circuit for performing a multiplication operation during conversion phases and a sub-analog-to-digital converter connected to receive analog output signals from the multiplying circuit. The sub-analog-to-digital converter converts, during the conversion phases, the analog output signals into portions of an N-bit digital code. The multiplying circuit switches configurations between conversion phases and uses the portions of the digital code during the conversion phases to generate new analog output signals for subsequent conversion by the sub-analog-to-digital converter.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: January 19, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Robert Johansson
  • Patent number: 7649489
    Abstract: Apparatus for the analog/digital conversion of a measurement voltage with an analog/digital converter, which has an integrating component with an operational amplifier, a resistor and a capacitor in a feedback loop, wherein a reference voltage is applied to the inverting input of the operational amplifier and wherein the measurement voltage is applied to the non-inverting input of the operational amplifier The capacitor is charged during a charging phase of time length (t1) and discharged during a discharging phase of time length, wherein the analog/digital converter further includes a comparator connected downstream from the operational amplifier, a memory element connected downstream from the comparator, a time generator producing the charging time and a counter, the counter detects the edges, or the period length of the pulse-width modulated output signal provided by the A/D converter on the output, and a synchronizing element is provided, which synchronizes the edges of the pulse-width modulated, output s
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: January 19, 2010
    Assignee: Endress + Hauser Wetzer GmbH + Co. KG
    Inventors: Stephan Konrad, Thomas Härle
  • Patent number: 7649490
    Abstract: Provided are a method, apparatus, and medium for measuring a distance using a radio frequency (RF) signal. The method of measuring a distance includes setting the transmitter power of an RF signal of a signal generating module to a minimum so as to measure the longest distance when no obstacle exists, measuring a distance between the signal generating module and a fixed module using the RF signal whose transmitter power is set to the minimum, if the measured distance between the signal generating module and the fixed module is available, determining that no obstacle exists therebetween, and if the measured distance is not available, determining that an obstacle exists therebetween, and determining the distance according to the result of the determination of existence of an obstacle.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-ho Park, Seok-won Bang, Ji-young Park
  • Patent number: 7649491
    Abstract: A transmission controller 7B is configured to transmit an R/W request signal for requesting transmission of a tag response signal to a RFID tag 1 twice. At this time, a frequency controller 7A controls a PLL section 5A to transmit the R/W request signal via different carrier frequencies. A phase information acquirer 8A detects a phase change amount of the tag response signal that is transmitted via different carrier frequencies. A distance calculator 8B calculates the distance between the reader/writer 2 and the RFID tag 1 on the basis of the phase change amount.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: January 19, 2010
    Assignee: Omron Corporation
    Inventors: Hideyuki Ohara, Takehiro Kawai, Keisuke Saito, Kosuke Hayama
  • Patent number: 7649492
    Abstract: A variable delay apparatus comprises a calibrating unit receiving a signal from a variable delay unit and from a plurality of fixed delay sources, the calibrating unit comparing the signal from the variable delay unit with a plurality of signals from the fixed delay sources to control operation of the variable delay unit over a delay range independently of environmentally-induced drift.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: January 19, 2010
    Assignee: Niitek, Inc.
    Inventors: David Wilens, Mark Hibbard, William Cummings
  • Patent number: 7649493
    Abstract: A transmitting system, which is capable of transmitting a signal for positioning to an area where radio waves are hardly received, is provided. The transmitting system for transmitting the signal for positioning includes a GPS compatible mixer combining a GPS signal for positioning received by a GPS antenna and a BS broadcasting signal received by a BS antenna and outputting the combined signal, a BS-IF compatible amplifier amplifying the signal output from the GPS compatible mixer and outputting the amplified signal, a separator separating the signal output from the BS-IF compatible amplifier into a BS broadcasting signal and a GPS signal, a BS tuner receiving an input of the BS broadcasting signal output from the separator and obtaining a signal of a channel tuned by a user, a GPSBP filter passing a GPS signal included in a predetermined frequency band out of the signal output from the separator, and a GPS issuing unit.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: January 19, 2010
    Assignees: Funai Electric Co., Ltd., GNSS Technologies Inc.
    Inventors: Hideyuki Torimoto, Makoto Ishii
  • Patent number: 7649494
    Abstract: A GPS receiver which performs correlation processing by using replicas of C/A codes generated in the GPS receiver after a GPS signal received from a GPS satellite is subjected to accumulating processing, wherein in the accumulating processing, a plurality of signals for integrating generated in the GPS receiver by predicting modulation of the GPS signal by a navigation message are integrated with the received GPS signal, and results of the integration are accumulatively added.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: January 19, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Kazumi Matsumoto, Maho Terashima
  • Patent number: 7649495
    Abstract: Methods and apparatus for constructing phased array antenna beamforming networks are provided, that allow to scan multiple beams and select appropriate sets of delay lines simultaneously. The beamforming networks disclosed herein generate less losses than conventional ones and in some cases, do not require active switching, making them completely passive. Three main methods are comprised in the invention: (1) laser wavelength hierarchies, (2) arrangements of Wavelengths Division Multiplexing (WDM) components, (3) re-use of laser wavelengths. Multiple laser wavelengths are arranged in groups and subgroups (wavelength hierarchies) in the wavelength domain. By switching between these wavelength groupings, the arrangements of WDM components disclosed herein enable the beamforming network to direct the beam signals to the proper time delay lines, and to differentiate multiple beams.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: January 19, 2010
    Assignee: HRL Laboratories, LLC
    Inventor: Ronald Regis Stephens
  • Patent number: 7649496
    Abstract: A rectenna capable of power conversion from electromagnetic (EM) waves of high frequencies is provided. In one embodiment, a rectenna element generates currents from two sources—based upon the power of the incident EM wave and from an n-type semiconductor, or another electron source attached to a maximum voltage point of an antenna element. The combined current from both sources increases the power output of the antenna, thereby increasing the detection sensitivity of the antenna of a low power signal. Full wave rectification is achieved using a novel diode connected to a gap in the antenna element of an rectenna element. The diode is conductive at a zero bias voltage, and rectifies the antenna signal generated by the desired EM wave received by antenna. Further, the diode may provide a fixed output voltage regardless of the input signal level. The rectenna element of the present invention may be used as a building block to create large rectenna arrays.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: January 19, 2010
    Inventors: Guy Silver, Juinerong Wu
  • Patent number: 7649497
    Abstract: There is provided with an antenna device including: a first wire antenna element having a length about half a wavelength of a radio wave in use; a second wire antenna element which is in a same plane as the first wire antenna element and substantially perpendicular to the first wire antenna element, and which is connected to the first wire antenna element at one end; a third wire antenna element which is in the same plane as the first wire antenna element and substantially in parallel with the first wire antenna element, and which is connected to the second wire antenna element; and a feed point provided on the second wire antenna element.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: January 19, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akiko Yamada, Makoto Higaki, Shuichi Sekine
  • Patent number: 7649498
    Abstract: Disclosed is an antenna apparatus including a dielectric substrate, an antenna element formed of a metallic plate which is disposed by having a predetermined space from the dielectric substrate, a plurality of leg pieces which extend toward the dielectric substrate from the antenna element, a chip capacitor which is electrically connected to the leg pieces and the dielectric substrate and an insert member made of resin which is inserted between the dielectric substrate and the antenna element.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: January 19, 2010
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Junichi Noro, Kyuichi Sato
  • Patent number: 7649499
    Abstract: In a high-frequency module, an antenna device is disposed on a first principal surface of a second substrate, a first principal surface of a first substrate and a second principal surface of the second substrate face each other and are connected to each other by conductive connecting members, electronic components including an IC chip are mounted on the first principal surface of the first substrate, ground electrodes are disposed on the first and second substrates, the conductive connecting members are connected to a ground potential, and thus the IC chip is surrounded by the ground electrodes of the first and second substrates and the conductive connecting members.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: January 19, 2010
    Assignee: Murata Manufacturing Co., Ltd
    Inventor: Kunihiro Watanabe
  • Patent number: 7649500
    Abstract: The present invention provides a film antenna assembly and a fabrication method thereof. The assembly includes an antenna body, which is a conducting body placed onto the substrate. The antenna body is provided with a signal connector, a feeder, and a conducting medium. One side of the conducting medium is coupled with the feeder, and the other side is located on the signal connector of antenna body. With this combined structure of the feeder, the film antenna assembly could be protected against damage, and the stable electrical connection resolves the coupling issue of the film antenna and feeder for improved applicability and economic efficiency.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: January 19, 2010
    Assignee: Paragon Technologies, Co., Ltd.
    Inventors: Chia-Yu Liao, Yuan-Ming Chang
  • Patent number: 7649501
    Abstract: An ultra-wideband antenna structure is provided. The ultra-wideband antenna structure includes a substrate with an edge, a first surface and a second surface opposite to the first surface; a ground surface mounted on the first surface; a radiating element mounted on the second surface and near the edge, and being a bent metal piece; and a short-circuited metal unit mounted on the first surface having a first end and a second end, wherein the first end is electrically connected to the ground surface and the second end is electrically connected to the radiating element.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: January 19, 2010
    Assignees: Lite-On Technology Corp., National Sun Yat-Sen University
    Inventors: Kin-Lu Wong, Jui-Hung Chou, Saou-Wen Su
  • Patent number: 7649502
    Abstract: A multi-band antenna used in a portable electrical device can work in WWAN and GPS at the same time. The multi-band antenna includes a PCB having a through hole, a first antenna body comprising a first radiating element and a first grounding element formed on a first surface of the PCB, a second antenna body formed on a second surface of the PCB, and a feeding line having an inner conductor electrically connecting to the first radiating element and an outer conductor electrically connecting to the first grounding element. The second antenna body comprises a second radiating element, a second grounding element, and a connecting element connecting the second radiating element and the second grounding element. The first radiating element and the second radiating element electrically connect with each other via the through hole of the PCB.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: January 19, 2010
    Assignee: Hon Hai Precision Ind. Co., Ltd
    Inventors: Chen-Ta Hung, Yun-Long Ke, Po-Kang Ku
  • Patent number: 7649503
    Abstract: A combination Electronic Toll Collection (ETC) terminal and rear view mirror for vehicles is disclosed. The rear view mirror includes a Radio Frequency (RF) antenna, and an ETC module. The RF antenna is fastened to the upper end of a stay in order to transmit and receive RF signals to and from an RF module, which is provided in a tollgate gantry. The ETC module is connected with the RF antenna using a wire, and is mounted in a housing. Thus, the uninterrupted transmission and reception of RF signals between the ECT terminal and the RF module can be stably performed even when a vehicle passes through a tollgate at a high speed.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: January 19, 2010
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Sung Wook Heo
  • Patent number: 7649504
    Abstract: In one embodiment, a backfire antenna comprises a cup-shaped member defining an outer aperture and an interior cavity, a splash-plate disposed within a plane, and a dipole assembly comprising first and second arms. The first and second arms are both oriented non-parallel to the splash-plate towards the plane.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: January 19, 2010
    Assignee: The Boeing Company
    Inventor: John E. Baldauf
  • Patent number: 7649505
    Abstract: A circularly polarized, omnidirectional, corporate-feed pylon antenna uses multiple helically-oriented dipoles in each bay, and includes a vertical and diagonal support arrangement of simple structural shapes configured to provide a frame strong enough to sustain mechanical top loads applied externally. The radiators in each bay fit within the vertical supports. The radiators are integrally formed with cross-braces, and are fed with manifold feed straps incorporating tuning paddles. A single cylindrical radome surrounds the radiative parts and the vertical supports. The antenna admits of application to the upper L-band at the full FCC-allowed ERP. Beam tilt, null fill, and vertical null can be readily accommodated.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: January 19, 2010
    Assignee: SPX Corporation
    Inventor: John L. Schadler
  • Patent number: 7649506
    Abstract: An image-transmitting device connected to image-display devices through a bus cable is provided. The image-transmitting device includes a memory unit storing a set of screen data whose correspondence to each of the image-display devices and a displaying order of the screen data to be displayed on the image-display devices are predetermined; a transmission-data-generating unit selecting specific screen data from among the set of the screen data by following the correspondence and the displaying order, and generating transmission data that each of the image-display devices is to display based on the selected specific screen data; a bus interface connected to the image-display devices through the bus cable; and a transmission unit transmitting the transmission data from the bus interface through the bus cable to each of the image-display devices.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: January 19, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Shin Aoki
  • Patent number: 7649507
    Abstract: A plasma display panel, a white linearity control device and a control method thereof. The white linearity control method includes calculating a load ratio of an image signal, determining an automatic power control level corresponding to the load ratio, and calculating first correction data corresponding to the automatic power control level. In addition, the method includes discriminating vertical and horizontal positions of the image signal, and obtaining a white linearity value for a corresponding region from two white linearity values defining a period in which the discriminated positions are included through interpolation, and producing second correction data by multiplying the first correction data by the obtained white linearity value.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: January 19, 2010
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Mi-Young Joo
  • Patent number: 7649508
    Abstract: A plasma display apparatus may be provided that reduces a noise generating in a waveform applied to a scan electrode or a sustain electrode and that stabilizes address discharge by improving applying time point of a waveform applied in an address period, so that driving stability of a panel may increase. The plasma display apparatus may include a plasma display panel in which a plurality of scan electrodes and a plurality of address electrodes intersecting the scan electrodes are formed, and a data driver dividing the address electrode into a plurality of electrode groups, corresponding to a scan waveform applied to the scan electrode, and the data driver applying an address waveform to one address electrode group, and the address waveform having an applying time point that is different from an applying time point of the scan waveform.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 19, 2010
    Assignee: LG Electronics Inc.
    Inventors: Heechan Yang, Yunkwon Jung, Jinyoung Kim
  • Patent number: 7649509
    Abstract: A plasma display device and driving method. A plurality of subfields from one frame are divided into a first subfield group and a second subfield group. A first subfield and a second subfield having adjacent weights in the first subfield group each include a reset period for resetting the discharge cells, a first address period for selecting discharge cells in the first line group, a first sustain period for performing a sustain discharge, a second address period for selecting discharge cells in the second line group and a second sustain period for performing a sustain discharge.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: January 19, 2010
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Su-Yong Chae
  • Patent number: 7649510
    Abstract: The present invention relates to a plasma display apparatus and an image processing method thereof, and more particularly, the present invention relates to an improved plasma display apparatus and an image processing method thereof which can enhance a gray level representation capability.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: January 19, 2010
    Assignee: LG Electronics Inc.
    Inventor: Seung Chan Baek
  • Patent number: 7649511
    Abstract: Set-up, write, sustain and erase pulses are variously applied to a plasma display panel using a staircase waveform in which the rising or falling portion is in at least two steps. These staircase waveforms can be realized by adding at least two pulses. Use of such waveforms for the set-up, write and erase pulses improves contrast, and use for the sustain pulses reduces screen flicker and improves luminous efficiency. This is of particular use in driving high definition plasma display panels to achieve high image quality and high luminance.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: January 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Nobuaki Nagao, Hidetaka Higashino, Junichi Hibino
  • Patent number: 7649512
    Abstract: Scanning switch means 21 to 2m can connect scanning lines S1 to Sm freely to a first potential or a second potential. Drive switch means 71 to 7n can connect drive lines D1 to Dn freely to a drive current source 70 or an off potential. Control means 8 connects the scanning switch means 21 to 2m sequentially with the first potential to select the scanning lines S1 to Sm sequentially and to control the connected states of the drive switch means 71 to 7n. In accordance with the number of the drive lines D1 to Dn to be connected to the drive current source 70, the control means 8 changes the resistances of the scanning switch means 21 to 2m corresponding to the scanning lines S1 to Sm connected to the second potential to become the unselected state, into at least two stages.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: January 19, 2010
    Assignee: Nippon Seiki Co., Ltd.
    Inventor: Junichi Maruyama
  • Patent number: 7649513
    Abstract: An Organic light emitting diode display device includes: a pixel array having a plurality of scan lines and a plurality of data lines that cross each other, a plurality of power voltage supply lines to which a high level power supply voltage is supplied and that are substantially parallel to the data lines, a plurality of reset lines substantially parallel to the scan lines, a plurality of organic light emitting diodes that emit light due to the high level power supply voltage from the power voltage supply line, and a plurality of organic light emitting diode drive circuits that drive the organic light emitting diode with data from the data line in response to a scan signal from the scan line and that is initialized in response to a reset signal from the reset line; a scan drive circuit that supplies the scan signal to the scan lines; a reset drive circuit that supplies the reset signal to the reset lines that initializes the organic light emitting diode drive circuit; and a data drive circuit that supplies t
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: January 19, 2010
    Assignee: LG Display Co., Ltd
    Inventors: Kwon Shik Park, Soo Young Yoon, Min Doo Chun
  • Patent number: 7649514
    Abstract: A data driving circuit including: a voltage digital-analog converter adapted to generate a first gradation voltage corresponding to external data; a current digital-analog converter adapted to generate a gradation current corresponding to the external data; a voltage control unit adapted to receive a feedback pixel current from a pixel via a data line and to generate a second gradation voltage by increasing or decreasing a level of the first gradation voltage in accordance with the feedback pixel current; a buffer unit adapted to selectively supply the first or second gradation voltage to the data line; and a selection unit adapted to selectively connect the data line to either the buffer unit or the voltage control unit. With this configuration, an image is displayed with a desired brightness.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: January 19, 2010
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Sang-Moo Choi, Hong-Kwon Kim, Oh-Kyong Kwon
  • Patent number: 7649515
    Abstract: To reduce the time for writing a voltage onto a gate of a driving transistor. In an initialization period, a node B is fixed to an initial voltage VINI, transistors are turned on, and a current flows into an OLED element, such that a voltage according to the current is held at the node A. Thereafter, the transistors are sequentially turned off, such that a threshold voltage of a driving transistor is held at the node A. In a writing period, a transistor is turned on and a data signal X-j is supplied, such that a voltage of the node B varies by the amount according to the current flowing into the OLED element. The voltage of the node A varies from the threshold voltage by the amount which is obtained by dividing the voltage variation by a capacitance ratio. In a light-emitting period, the transistor is turned on, such that a current according to the voltage of the node A flows into the OLED element.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: January 19, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Tokuro Ozawa, Toshiyuki Kasai, Eiji Kanda, Ryoichi Nozawa
  • Patent number: 7649516
    Abstract: A pixel having a structure in which low voltage drive is possible is provided by a simple process. A digital image signal input from a source signal line is input to the pixel through a switching TFT. At this point, a voltage compensation circuit amplifies the voltage amplitude of the digital image signal or transforms the amplitude, and applies the result to a gate electrode of a driver TFT. On-off control of TFTs within the pixel can thus be performed normally even if the voltage of a power source for driving gate signal lines becomes lower.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: January 19, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Yoshifumi Tanada
  • Patent number: 7649517
    Abstract: A liquid crystal display and a liquid crystal display panel thereof. Gates on thin film transistors serving as switches in the same row of pixels are coupled with a gate line. A scan signal is substantially inputted to a middle of the gate line and transmitted to two extremities of the gate line, so that the two thin film transistors, which are coupled with the two extremities of the gate line have substantially the same time for turning on/off. Namely, the pulse waveforms of scan signals received by the two pixels, which are spaced apart by a longest distance, are substantially the same.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: January 19, 2010
    Assignee: AU Optronics Corp.
    Inventors: Chung-Lung Li, Shu-I Huang
  • Patent number: 7649518
    Abstract: A liquid crystal display driving circuit is provided. The liquid crystal display driving circuit includes a front driving stage and a plurality of serially connected subsequent driving stages. The front driving stage receives a first trigger pulse and a second trigger pulse consecutively in a testing operation. The serially connected subsequent driving stages coupled to the front driving stage such that the output terminal of each driving stage is electrically connected to the input terminal of the following driving stage as well as the input terminal of the one after. The output terminal of the front driving stage is electrically connected to the input terminal of first subsequent driving stage and the one immediately thereafter.
    Type: Grant
    Filed: February 26, 2006
    Date of Patent: January 19, 2010
    Assignee: Au Optronics Corporation
    Inventor: Shi-Hsiang Lu
  • Patent number: 7649519
    Abstract: Source drivers and display devices that include such source drivers are provided that may be used to control the amount of output current from an output buffer. These source drivers may comprise a buffer that is configured to receive an input signal and a control circuit that is coupled to the buffer that is configured to control an output current level of the buffer. The control circuit may comprise a bias voltage generator that is configured to generate a plurality of bias voltages, and the output current level of the buffer may be controlled based on the plurality of bias voltages. Methods of controlling the amount of current output from an output buffer of the source driver and methods of driving a display device are also provided.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Ho Seo, Hyun-Sang Park
  • Patent number: 7649520
    Abstract: A display device capable of switching over between vertical and horizontal display on a screen without using a frame memory is provided. A display device has a source signal line driver circuit (102), a first gate signal line driver circuit (103), and a second gate signal line driver circuit (104). The scanning direction of the first gate signal line driver circuit (103) is perpendicular to the scanning direction of the source signal line driver circuit (102), and the scanning direction of the second gate signal line driver circuit (104) is perpendicular to the scanning direction of the first gate signal line driver circuit (103). During normal display, vertical scanning of the screen is performed by the first gate signal line driver circuit (103). Images are displayed in a direction that is in accordance with the scanning direction of the first gate signal line driver circuit (103).
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: January 19, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Jun Koyama
  • Patent number: 7649521
    Abstract: A plurality of scanning signal lines GLn divided into groups, and each group is made up of three scanning signal lines GLnR, GLnG and GLnB, and a plurality of pixels are divided into pixel blocks, and each pixel block is made up of three pixels PR (n, m), PG (n, m) and PB (n, m) respectively connected to the scanning signal lines GLnR, GLnG and GLnB. These pixels PR (n, m), PG (n, m) and PB (n, m) are connected to a common data signal line SLm. To the scanning signal lines GLnR, GLnG, GLnB, scanning pulses are sequentially outputted to the scanning signal lines GLnR, GLnG and GLnB from shift registers SRnR, SRnG and SRnB, and video signals for R, G and B are outputted to the data signal line SLm from a driver IC by time division.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: January 19, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masakazu Satoh, Hajime Washio, Sadahiko Yasukawa
  • Patent number: 7649522
    Abstract: A method and system for transmitting data to and from a hand-held host device are disclosed. An accessory device for interfacing with a host device includes a communication channel designed to establish a bidirectional data link between the accessory device and the host device. The accessory device also includes a storage unit communicatively coupled to the communication channel. The storage unit is designed to store various data. In addition, at least a first data is selectively transmitted from the stored data of the accessory device to the host device through the established bidirectional data link.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: January 19, 2010
    Assignee: Fish & Richardson P.C.
    Inventors: Elaine Chen, Rob Podoloff, Lorraine Wheeler, Beth Marcus
  • Patent number: 7649523
    Abstract: A method of estimating a position of a point on a writing implement relative to an optical sensor mounted on the writing implement is provided. The method comprises the steps of: (a) placing the point in contact with a coded surface; (b) capturing, using the sensor, at least two images of the coded surface at different rotations of the writing implement relative to the surface; (c) determining, from a perspective distortion of the coded surface in each image, an estimated rotation and viewing distance for each image; and (d) estimating, from the estimated rotations and viewing distances, the position of the point relative to the optical sensor.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: January 19, 2010
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Paul Lapstun, Kia Silverbrook, Tobin Allen King