Abstract: A method for controlling a temperature of a terminal and a terminal supporting the same are provided. A terminal supporting temperature control includes a temperature sensor for detecting a temperature of the terminal, and a controller for performing at least one of a first throttle procedure including driving the controller with a first preset driving frequency when the temperature of the terminal detected by the temperature sensor is a first preset temperature, and driving the controller with a second driving frequency higher than the first driving frequency when the temperature of the terminal is reduced to a second preset temperature lower than the first preset temperature, and a second throttle procedure including driving the controller with the first preset driving frequency for a first time, and driving the controller with the second driving frequency higher than the first driving frequency for a second time after the first time elapses.

Abstract: A temperature compensation circuit, applied on a metal oxide semiconductor (MOS) transistor, with a threshold voltage varying with respect to a temperature value of the MOS transistor, for having the MOS transistor corresponding to an equivalent threshold voltage substantially with a constant value throughout a temperature range, comprises a voltage generator. The voltage generator provides a voltage proportional to absolute temperature (VPTAT) to drive the body of the MOS transistor in such way that a variation of the threshold voltage due to temperature variation of the MOS transistor is substantially compensated with a variation of the threshold voltage due to body-source voltage variation of the MOS transistor, so that the MOS transistor corresponds to the equivalent threshold voltage that is temperature invariant.

Abstract: A precision voltage clamp is provided that displays virtually no temperature dependence, and maintains a clamp voltage that varies by about 1 my for input voltages ranging from the onset of clamping to several volts above this input. In particular, a current mirror is used to ensure that the current densities in the clamping transistor, and the bias correcting transistor, are very close to equal once the clamping action begins. A small current may be injected into the programming side of the mirror which will turn on the mirror and the biasing transistor, making it much easier for the clamp to clamp and settle.

Abstract: The present disclosure relates to structure of a capacitive touch panel and further relates to its manufacturing method. The structure comprises of sensing electrodes and peripheral circuits, wherein each sensing electrode comprises of a plurality of conductive units and a plurality of conductive wires for connecting the conductive units, wherein the conductive wires and peripheral circuits are made of a photosensitive material having an electrically conductive property.

Abstract: A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.

Abstract: In one aspect, a charge pump output of a charge pump is coupled to a capacitor of a voltage shifter. The output of the voltage shifter causes pump control logic to enable the charge pump. In another aspect, a transistor in saturation has a drain terminal coupled to a charge pump output and a source terminal coupled to an output mode providing a word line read voltage.

Abstract: A semiconductor integrated circuit includes a first pad configured to receive a first voltage, a second pad configured to receive a second voltage, an internal voltage generation circuit configured to generate a third voltage having the same voltage level as the first voltage in response to the second voltage during a test mode, and an internal circuit configured to perform a normal operation using the first voltage and the second voltage during a normal mode and perform a test operation using the second voltage and the third voltage during the test mode.

Abstract: On-chip active decoupling capacitors for regulating the voltage of an integrated circuit include a reference voltage generator, a latch-based comparator and switched DECAPs. The latched-based comparator is for comparing a reference voltage generated by the reference voltage generator and a supply voltage of the integrated circuit and outputting a comparison result. The switched DECAPs includes at least two capacitors and a plurality of switches, and coupling the at least two capacitors into a parallel configuration to sink current or a series configuration to source current based on the comparison result output by the latch-based comparator. The aforementioned on-chip active decoupling capacitors not only have lower power consumption, but also larger detection range.

Abstract: A voltage regulator for regulating a voltage level of a virtual power rail supplying power to logic circuitry in a low power data retention mode is disclosed. The voltage regulator comprises: switching circuitry having a transistor for coupling said virtual power rail to a power supply having a supply voltage level; control circuitry responsive to a signal indicating the logic circuitry is to enter the low data power retention mode to control the switching circuitry to switch to a conductive state in which the transistor is operating in a saturation region of operation and supplying a saturation current from the power supply via the virtual power rail to the logic circuitry; and a leakage power controller for adjusting a voltage level of the virtual power rail to control leakage power. The leakage power controller is configured to supply a bias voltage to the well in which the switching circuitry is formed, the saturation current of the switching circuitry being dependent on a value of the well bias voltage.

Abstract: An electronic circuit includes a differential input section, a current mirror section, an operational amplifier, an inverter, and a compensation voltage generator. The differential input section and the current mirror section are coupled together, forming a first common drain node and a second common drain node. The current mirror section has two p-type transistors coupled together at a common gate node. The operational amplifier has a positive input coupled to the first common drain node, a negative input coupled to the compensation voltage generator, and an output coupled to the common gate node. The inverter has an input node coupled to the second common drain node. The compensation voltage generator provides a compensation voltage to replicate a switching threshold voltage of the inverter.

Abstract: An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

Abstract: A power converter includes a power conversion circuit switchably coupled to a first power input and a second power input. The power conversion circuit is operable to generate positive and negative DC output voltages and is configured such that, in a backup mode of operation, the negative DC output voltage is generated using backup power through a first current path of the power conversion circuit that includes a first diode coupled between the second power input and a second DC bus, and, in a line mode of operation, the negative DC output voltage is generated using AC input power through a second current path of the power conversion circuit that bypasses the first diode and includes a second diode coupled between the first power input and the second DC bus.

Abstract: An integrated circuit system is provided that includes a circuit function in and on a surface of a semiconductor substrate. First and second portions of an inductor overlie the surface of the semiconductor substrate and each is coupled to the first circuit function. A third portion of the inductor is positioned on a second substrate. A first through substrate via (TSV) extends through the semiconductor substrate and electrically couples the first portion to the third portion and a second TSV extends through the semiconductor substrate and electrically couples the second portion to the third portion.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: A transmit circuit includes a power amplifier configured to amplify an RF input signal to obtain an RF output signal, and an antenna tuner configured to transform an antenna impedance to an impedance at an input of the antenna tuner, wherein the input of the antenna tuner is coupled to an output of the power amplifier. The transmit circuit further includes a bias controller configured to control a bias of the power amplifier, wherein the bias controller is configured to provide a bias control signal to adjust the bias of the power amplifier based on a determination of a measure of a load impedance provided to the power amplifier by the antenna tuner.

Abstract: Embodiments of power amplification devices are described with a power amplification circuit that has more than one amplifier stage and with at least a first voltage regulation circuit and a second voltage regulation circuit configured that provide regulated voltages to these amplifier stages. The power amplification device includes a threshold detection circuit to get better maximum output power performance while preserving power efficiency. The threshold detection circuit is configured to increase a first voltage adjustment gain of the first voltage regulation circuit when a regulated voltage level of a second voltage regulation circuit reaches a first threshold voltage level. In this manner, the first voltage adjustment gain can be initially set to be lower than the second voltage adjustment gain until the second voltage regulation circuit is close or has railed. The first voltage adjustment gain can then be increased to allow the first voltage regulation circuit to also rail.

Abstract: A sound output device is provided. The sound output device includes a vacuum tube for amplifying an audio signal; a power supply that supplies power to the vacuum tube; a first switch circuit that selectively connects the power supply to the vacuum tube; and a controller that controls the first switch circuit according to whether the vacuum tube is used.

Abstract: The embodiments disclosed in the detailed description include a power amplifier having a low power mode amplifier, a medium power mode amplifier, and a high power mode amplifier in communication with a radio frequency (RF) output load. The exemplary embodiments of the power amplifier permit a wireless device to select the most power efficient means to transmit an RF signal based upon the desired output power level.

Abstract: Sense amplifiers including bias circuits are described. Examples include bias circuits having an adjustable width transistor. A loop gain of the bias circuit may be determined in part by the adjustable width of the transistor. Examples of sense amplifiers including amplifier stages configured to bias an input/output node to a reference voltage.

Abstract: A switching regulator circuit includes a power stage and a compensation network. The compensation network includes a programmable transconductance (gm), having a first selectable transconductance such a closed loop transfer function of the switching regulator circuit may be characterized by a first transfer function having a having a first DC open loop gain and a first bandwidth, and by a second transfer function having a second DC open loop gain and a second bandwidth.

Abstract: Systems and methods may include an amplifier having at least a first input port, where the amplifier includes a first capacitance associated with the first input port; a first bias circuit, where the first bias circuit comprises a series connection of a first charging circuit and a first discharging circuit, wherein a first node between the first charging circuit and the first discharging circuit is connected to the first input port, wherein responsive to an RF input signal having at least a first predetermined level being received at the first input port, the first charging circuit charges the first capacitance associated with the first input port during a first portion of a cycle of the RF input signal, and discharges the first capacitance associated with the first input port during a second portion of the cycle, thereby controlling a DC bias voltage level available at the first input port.

Abstract: The invention provides a variable gain amplifier system for use in a burst mode receiver, said system comprising an amplifier adapted to amplify a signal; a gain control module; a dc offset compensation module adapted to derive a compensation signal as a function of the amplifier gain. Compared to existing methods for dc offset compensation in variable gain amplifier, the system and method for dc offset compensation allows fast adjustment of rapidly changing dc offsets that occur in applications where the gain of the variable gain amplifier is adjusted rapidly.

Abstract: This disclosure is directed to techniques for preventing or reducing perturbations of an output signal of a differential amplifier caused by ionizing radiation incident upon the amplifier. The amplifier may include an amplification module that includes a plurality of amplification units configured to amplify a difference between a first component and a second component of a differential voltage signal to generate a plurality of amplified difference signals each corresponding to the amplified difference. The amplifier may further include a combination module that combines the plurality of amplified difference signals to generate a common output signal corresponding to the amplified difference.

Abstract: An amplifier circuit (10) comprises a driver stage (11) with a driver output (13). Moreover, the amplifier circuit (10) comprises a sensor (12). The sensor (12) comprises a variable attenuator (15) with a control input (16) for receiving a mode signal (SMODE). A sensor output (14) of the sensor (12) is coupled to the driver output (13) via the variable attenuator (15). A sensor signal (SE_RFOUT) is provided at the sensor output (14).

Abstract: The embodiments described herein provide a voltage controlled oscillator (VCO). The VCO may include, but is not limited to a voltage-to-current converter configured to receive a control voltage and to convert the control voltage to a current, a current bias circuit coupled to the voltage-to-current converter and configured to receive frequency band select digital inputs and to bias the current generated by the voltage-to-current converter based upon the band select inputs, and a ring oscillator coupled to receive the biased current and to output an oscillating signal based upon the biased current.

Abstract: The described systems and methods can facilitate examination of device parameters including analysis of relatively dominant characteristic impacts on delays. In one embodiment, at least some coupling components (e.g., metal layer wires, traces, lines, etc.) have a relatively dominate impact on delays and the delay is in part a function of both capacitance and resistance of the coupling component. In one embodiment, a system comprises a plurality of dominate characteristic oscillating rings, wherein each respective one of the plurality of dominate characteristic oscillating rings includes a respective dominate characteristic. Additional analysis can be performed correlating the dominate characteristic delay impact results with device fabrication and operation.

Abstract: A crystal resonator comprises a first vibrating region provided on a crystal wafer, a second vibrating region provided on the crystal wafer, the second vibrating region having a different thickness and positive/negative orientation of the X-axis from those of the first vibrating region, and excitation electrodes which are provided respectively on the first vibrating region and the second vibrating region for causing the vibrating regions to vibrate independently. Frequencies that change by different amounts from each other relative to a temperature change can be retrieved from one vibrating region and the other vibrating region. Thus, based on an oscillating frequency of the vibrating region in which a clear frequency change occurs relative to the temperature, the oscillating frequency of the other vibrating region can be controlled. Thereby, increases in the complexity of the crystal oscillator can be suppressed.

Abstract: A gas cell unit includes a gas cell in which a gaseous alkali metal atom is sealed, a first heater to heat the gas cell, and a second heater which is provide to face the first heater across the gas cell and heats the gas cell. The first heater includes a first heating resistor which generates heat by energization, and the second heater includes a second heating resistor through which a current flows in the same direction as the direction of a current flowing through the first heating resistor and which generates heat by energization. Between the first heating resistor and the second heating resistor, a magnetic field generated by the energization to the first heating resistor and a magnetic field generated by the energization to the second heating resistor are mutually cancelled or weakened.

Abstract: A complex resonance circuit includes a first current path performing a first phase shift and a first gain control to an AC power signal supplied, at least one second current path performing a second phase shift different in amount from the first phase shift and a second gain control different in amount from the first gain control to the AC power signal, at least two resonant circuits which are provided each on the respective first and second current paths, and have mutually different resonance points or antiresonance points for the AC power signals each passing through the respective first and second current paths and capture the respective AC power signals, and an analog operational circuit for allowing the AC power signals having passed through the first and second current paths to be subjected to addition or subtraction in an analog fashion for output.

Abstract: A SAW device includes a SAW chip formed of a piezoelectric substrate and an IDT formed thereon, a base substrate that supports the SAW chip, and a fixing member that fixes the SAW chip to the base substrate. The SAW chip that forms a cantilever is supported by the base substrate via the fixing member in a position where the IDT does not overlap with the fixing member in a plan view of the SAW chip. The length W of the SAW chip in a y-axis direction and the length D of the fixing member in the y-axis direction satisfy 1<D/W1?1.6. The fixing member bonds the lower surface and side surfaces of the fixed end of the SAW chip to the base substrate.

Abstract: An electronic device is provided in which alignment of a lid substrate 2 and a base substrate 3 is facilitated to reduce the rate of occurrence of defects. The electronic device according to the invention includes a lid substrate, a base substrate bonded to the lid substrate and forming a cavity hermetically sealed from the outside air between the base substrate and the lid substrate, an electronic element housed in the cavity, and a mold member placed on an outer face of the lid substrate or the base substrate. Thus, warping of the lid substrate or the base substrate is reduced.

Abstract: A MEMS vibrator includes: a substrate; a first electrode disposed above the substrate; and a second electrode disposed in a state where at least one portion of the second electrode has a space between the first electrode and the second electrode, and having a beam portion capable of vibrating, in the thickness direction of the substrate, with electrostatic force and a supporting portion supporting one edge of the beam portion and disposed above the substrate, wherein a supporting side face of the supporting portion supporting the one edge has a bending portion which bends in plan view from the thickness direction of the substrate, and the one edge is supported by the supporting side face including the bending portion.

Abstract: A surface acoustic wave resonator includes: an IDT which is disposed on a quartz crystal substrate with an Euler angle of (?1.5°???1.5°, 117°???142°, 41.9°?|?|?49.57°) and which excites a surface acoustic wave in an upper mode of a stop band; and an inter-electrode-finger groove formed by recessing the quartz crystal substrate between electrode fingers of the IDT, wherein the following expression: 0.01??G where ? represents a wavelength of the surface acoustic wave and G represents a depth of the inter-electrode-finger groove, is satisfied and when a line occupancy of the IDT is ?, the depth of the inter-electrode-finger groove G and the line occupancy ? are set to satisfy the following expression: ?2.5×G/?+0.675????2.5×G/?+0.775.

Abstract: A complex resonant circuit includes: a first current path performing a first gain control to an AC power signal being supplied; at least one second current path performing a second gain control different from the first gain control to the AC power signal; at least two resonant circuits provided on the respective first and second current paths, having mutually different resonance or antiresonance points for the AC power signals passing through the respective first and second current paths and capturing the respective AC power signals; at least one compensation current path performing a compensation phase shift to the AC power signal; a compensation circuit, provided on the compensation current path, for removing an unnecessary component of the resonant circuit; and an analog operational circuit performing analog addition or subtraction on the AC power signal having passed through the first and second current paths, and the compensation current path.

Abstract: A method and a circuit for increasing a resolution of a digitally controlled oscillator include controlling the oscillator so that an output signal of the oscillator varies between semi-periods having a first frequency and semi-periods having a second frequency. The method and circuit further include applying the output signal of the oscillator as an input to a divider to obtain a divided signal. A frequency of at least one semi-period of the divided signal is a function of both an oscillator semi-period having the first frequency and an oscillator semi-period having the second frequency.

Abstract: Various embodiments relate to a bias generator including: a bias generator circuit; a master startup circuit that applies current to a first node in the bias generator circuit; a second startup circuit that applies current to additional nodes in the bias generator circuit; and a power switch that receives a power from a power supply and that provides power to the bias generator circuit, the master startup circuit, and the second startup circuit.

Abstract: An example PWM includes a driver and a two-way oscillator. The oscillator includes, a first frequency adjust current source, a second frequency adjust current source, a capacitor, a switching reference and a comparator. The capacitor integrates a frequency adjust current by charging with the first frequency adjust current source. The capacitor subsequently integrates a second frequency adjust current by discharging with the second frequency adjust current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to an oscillator signal. The comparator compares the output of the switching reference with a voltage on the capacitor. The first and second frequency adjust current sources vary the first and second frequency adjust currents to vary the frequency of the PWM signal to spread energy of switching harmonics over a frequency band and to reduce EMI.

Abstract: An electromagnet structure comprises a magnetic shell having a cavity, a magnetic pole located within the cavity and having a magnetic gap for focusing a magnetic field on a magnetically tunable filter, a conductive coil located within the cavity of the magnetic shell and forming multiple turns around the magnetic pole, and a heater located within the cavity of the magnetic shell and configured to maintain the conductive coil at a substantially constant temperature when the magnetically tunable filter is tuned to different frequencies.

Abstract: A bulk acoustic wave resonator (BAWR) includes a bulk acoustic resonance unit and at least one compensation layer. The bulk acoustic resonance unit includes a first electrode, a second electrode, and a piezoelectric layer disposed between the first electrode and the second electrode. The first electrode, the second electrode, and the piezoelectric layer each include a material that modifies a resonance frequency based on a temperature, and the at least one compensation layer includes a material that adjusts the resonance frequency modified based on the temperature in a direction opposite to a direction of the modification.

Abstract: A filter includes a first varactor with a first end electrically connected to a signal input end, a second varactor with a first end electrically connected to a second end of the first varactor, and a second end electrically connected to ground, and an inductor with a first end electrically connected to the second end of the first varactor, and a second end electrically connected to ground. The filter is capable of adjusting its frequency response by changing capacitance of the first varactor and/or the second varactor.

Abstract: The multilayer component has a base body (10) with connecting contacts (1a, 1b), fitted to it, with a ferrite ceramic (2), which is provided for an inductive area and in which an inductance (12) is arranged which is formed by electrical conductors, and with a varistor ceramic (4), wherein the varistor ceramic (4) comprises at most 40% of the volume of the base body (10).

Abstract: A SAW filter includes a piezoelectric substrate, a longitudinal coupling portion disposed on a main surface of the piezoelectric substrate, a support layer and cover layers covering the main surface of the piezoelectric substrate with an air gap on the longitudinal coupling portion, and bumps that are disposed on one of the cover layers and are electrically connected to the longitudinal coupling portion. A mount board is mounted on a motherboard. The SAW filter is mounted on the mount board via the bumps.

Abstract: The starter-use electromagnetic switch has an electrical contact interposed in a power supply line for supplying power from a battery to a starter motor, the main contact being turned on and off in interlock with energization of an electromagnet implemented by an excitation coil. The electromagnetic switch includes a connection fitting connected to the excitation coil at one end thereof and drawn outside through a resin cover of the electromagnetic switch at the other end thereof, and a terminal fitting electrically and mechanically connected to the other end of the connection fitting at one end thereof, the other end of the terminal fitting being branched into first and second terminal pieces. The first terminal piece serves as an excitation terminal supplied with power from the battery. The second terminal piece serves as a connection terminal connected to an excitation terminal of an external electromagnetic switch through a cable.

Abstract: A switching device with an ultra-fast actuating mechanism for opening electric contacts comprising a propulsion coil and a conducting disk. A stationary contact collaborates in the closed position with a movable contact, said contacts being moved to the open position by repulsion of the conducting disk. A biasing device generates a closing force to hold said electric contacts in the closed position. Latching means of the movable contact in the open position comprise a magnetic yoke having an attraction coil providing an attraction force of a magnetic movable armature. The movable contact is supported by a contact-bearing support comprising drive means designed to collaborate with the magnetic movable armature to cause movement thereof, when movement of the movable contact takes place.

Abstract: A method of building structures using diamagnetically levitated manipulators includes depositing, with a first end effector attached to a first manipulator, a first adhesive at a first location on a first surface, picking up, with a second end effector, an article, moving the article to the surface, and placing the article on the adhesive on the surface.

Abstract: The present invention aims to ensure strength of a thin-walled sintered magnet. A sintered magnet is a ferrite sintered magnet made by sintering a magnetic material. A magnetic powder mixture obtained by mixing magnetic powder with a binder resin is injection-molded into a mold with a magnetic field applied thereto to produce a molded body, which is then sintered to produce the sintered magnet. The sintered magnet has a thickness of 3.5 mm or less in the position of center of gravity thereof. The sintered magnet has a surface roughness Rz of 0.1 or more and 2.5 ?m or less. The surface roughness Rz is a 10 point average roughness.

Abstract: A magnetic element including: a first magnetic core including a coil which is wound by a predetermined number of turns; a second magnetic core which includes the coil in the inside thereof and which is combined along the outer circumference of the first magnetic core; and a metal terminal which connects the coil and a mounting substrate, wherein the metal terminal includes a fixing portion for fixing the second magnetic core in a state of combining the first magnetic core and the second magnetic core.

Abstract: A toroidal current transformer that can be used as a neutral current transformer in a single or three phase system as a result of its compactness is described. The core is made of ferromagnetic material having a primary winding and a secondary winding.

Abstract: A reactor is disclosed. The reactor is comprised of a housing, a solenoid coil, a center columnar member, and a core. The center columnar member provides first surfaces contacting with sandwich portions of the housing, and the core is comprised of resin including magnetic powder. The coil and the center columnar member are fixed in the core. A surface roughness (Rz2) of a second surface which contacts to the core is larger than a surface roughness (Rz1) of the first surfaces. The center columnar member further provides a basis surface of which roughness (Rz3) is smaller than the Rz2 and larger than the Rz1.

Abstract: A reactor has a cylindrical coil which is energized to create a magnetic flux, a core composed of magnetic powder mixed resin, the coil being buried in the core. The reactor has an inner core which is provided in an inner periphery of the coil and extends along an axial direction of the coil. The reactor has a case in which the coil, the core and the inner core are disposed. The case has a projection which projects inside of the case and a concave portion which is concave toward a projecting direction of the projection. The case including the projection and concave portion is formed in one piece by using die casting.