Abstract: An OLED including an electron transport layer having multi-layered structure and a method of manufacturing the same, the method including simultaneously reciprocating first and second deposition sources that include different deposition materials, across a substrate.

Abstract: A pixel driver circuit for driving a light-emitting element and a pixel circuit having the pixel driver circuit are provided. The pixel driver circuit includes a data line, address lines, switch thin film transistors, feedback thin film transistors and drive thin film transistors. The pixel circuit may include an organic light emitting diode, which is driven by the pixel driver circuit.

Abstract: An organic electroluminescence element includes: a pair of electrodes composed of a positive electrode and a negative electrode, one of which is transparent or semitransparent; and one or more organic compound layers that are sandwiched between the pair of electrodes, in which at least one layer of the organic compound layers contains one or more of charge-transporting polyesters represented by formula (I).

Abstract: An organic light-emitting diode (OLED) display according to an exemplary embodiment may include: a substrate and an organic light emitting element on the substrate; a thin film encapsulation layer on the substrate and covering the organic light emitting element; and one or more scattering materials dispersed in the thin film encapsulation layer. According to the exemplary embodiment, light efficiency may be improved by dispersing scattering materials in at least one of an organic layer or an inorganic layer forming a thin film encapsulation layer with a large refractive index difference.

Abstract: Provided is a high-luminance, long-life laminated organic electroluminescent element. The organic electroluminescent element has a composition in which a plurality of light-emitting units, including at least one organic light-emitting layer, are laminated between a positive electrode and a negative electrode, and in which a linking layer is held between the respective light-emitting units. The linking layer is formed by laminating, in succession from the positive electrode side, an electron generating/transport section, an intermediate layer, and a hole generating/transport section, which contain at least one metal selected from a group consisting of an alkali metal, alkaline earth metal, rare earth metal, alloy of these metals, and compound of these metals. Preferably the intermediate layer contains an electrical insulating non-semiconductive substance having a specific resistance which is between 1.0×102 ?·cm and 1.0×109 ?·cm.

Abstract: An N-type organic thin film transistor, an ambipolar field-effect transistor, and methods of fabricating the same are disclosed. The N-type organic thin film transistor of the present invention comprises: a substrate; a gate electrode locating on the substrate; a gate-insulating layer covering the gate electrode, and the gate-insulating layer is made of silk protein; a buffering layer locating on the gate-insulating layer, and the buffering layer is made of pentacene; an N-type organic semiconductor layer locating on the buffering layer; and a source and a drain electrode, wherein the N-type organic semiconductor layer, the buffering layer, the source and the drain electrode are disposed over the gate dielectric layer.

Abstract: An organic light emitting diode display includes a substrate, an organic light emitting diode on the substrate, an organic film configured to cover the organic light emitting diode on the substrate in an organic film deposition area having a first diameter, and an inorganic film configured to cover the organic film on the substrate in an inorganic film deposition area having a second diameter, wherein L1 is the first diameter of the organic film deposition area in ?m, wherein L2 is the second diameter of the inorganic film deposition area in ?m, wherein D is a thickness of the organic film in ?m, and wherein L2?L1?2 (171D+150 ?m).

Abstract: The invention relates to an arrangement including optically transparent and/or functional components. It is desirable for many applications to achieve a high functionality and variability in the utilization of electronic components over a very small area or with a small space requirement for such a design. In an arrangement in accordance with the invention, an organic electronic component and at least one further organic or inorganic electronic component are arranged layer-wise, stacked over one another, on a substrate. In this respect, planar electrically conductive electrodes at the surfaces of the components are formed such that the components are electrically connected in series and the components are each individually electrically controllable via the electrodes in accordance with their polarities.

Abstract: A switching device includes a first electrode (101), a second electrode (102), and a complex oxide ion conducting layer (103) interposed between the first electrode (101) and the second electrode (102). The complex oxide ion conducting layer (103) contains at least two oxides including a metal oxide. The first electrode (101) can supply electrons to the complex oxide ion conducting layer (103). The second electrode (102) contains a metal and can supply ions of the metal to the complex oxide ion conducting layer (103).

Abstract: A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where ?r/d is greater than or equal to 0.08 (nm?1) and less than or equal to 7.9 (nm?1) when the relative permittivity of a material used for the gate insulating layer is ?r and the thickness of the gate insulating layer is d. The distance between the source electrode and the drain electrode is greater than or equal to 10 nm and less than or equal to 1 ?m.

Abstract: Disclosed is a semiconductor device including an insulating layer, a source electrode and a drain electrode embedded in the insulating layer, an oxide semiconductor layer in contact with the insulating layer, the source electrode, and the drain electrode, a gate insulating layer covering the oxide semiconductor layer, and a gate electrode over the gate insulating layer. The upper surface of the surface of the insulating layer, which is in contact with the oxide semiconductor layer, has a root-mean-square (RMS) roughness of 1 nm or less. There is a difference in height between an upper surface of the insulating layer and each of an upper surface of the source electrode and an upper surface of the drain electrode. The difference in height is preferably 5 nm or more. This structure contributes to the suppression of defects of the semiconductor device and enables their miniaturization.

Abstract: A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.

Abstract: An organic light emitting display apparatus has a hybrid structure in which resonance red, green and blue pixels and a non-resonance white pixel are combined. An optical path control layer and a white color filter which selectively absorbs light having a specific wavelength are included in the white pixel. Thus, the organic light emitting display apparatus has a large viewing angle, low power consumption, and long lifetime.

Abstract: Methods and devices for embedding semiconductors in printed circuit boards (PCBs) are provided. In one example, a method of manufacturing a PCB having a die assembly embedded therein includes removing a release film from an adhesive layer of the die assembly. The method also includes disposing the die assembly on a first layer of the PCB such that the adhesive layer contacts the first layer of the PCB. The method includes disposing a second layer of the PCB over the first layer such that the die assembly is within an intermediate portion between the first layer and the second layer. The method also includes filling the intermediate portion with resin and subjecting the PCB to a press cycle to cure the resin.

Abstract: A circuit is disclosed. The circuit includes at least one nanostructure and a carbon interconnect formed by a substantially carbon layer, wherein the nanostructure and the carbon interconnect are directly coupled to one another.

Abstract: An n-channel transistor or a p-channel transistor provided with a second gate electrode for controlling a threshold voltage in addition to a normal gate electrode is used for a complementary logic circuit. In addition, an insulated gate field-effect transistor with an extremely low off-state current is used as a switching element to control the potential of the second gate electrode. A channel formation region of the transistor which functions as a switching element includes a semiconductor material whose band gap is wider than that of a silicon semiconductor and whose intrinsic carrier density is lower than that of silicon.

Abstract: Provided are an organic light-emitting diode (OLED) display apparatus and a method of manufacturing the OLED display apparatus. Pixel-defining layers (PDLs) are formed of inorganic and organic insulating layers to minimize non-uniformities of the thicknesses of organic emission layers (OEMLs) and planarize lower thin film transistors (TFTs). Therefore, a lifespan of the OLED display apparatus is improved.

Abstract: A p channel IFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an interlayer insulating film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.

Abstract: A method of fabricating a TFT includes providing a substrate where a gate, an insulating layer, and a channel layer are formed. A conductive layer is formed on the substrate to cover the channel layer and the insulating layer. A photoresist layer is formed on the conductive layer. A photo mask is placed above the photoresist layer and has a data line pattern, a source pattern, and a drain pattern. A first width (W1) between the source pattern and the drain pattern and a second width (W2) of the data line pattern satisfy the following: if W1?1(um), then W2+a(um), and 0.3<a<0.7. An exposing process is performed by using the photo mask, and a development process is performed to pattern the photoresist layer. The conductive layer is patterned by using the photoresist layer as an etching mask to form a source, a drain, and a data line.

Abstract: A thin-film transistor array includes first and second bottom-gate transistors, a passivation film, a conductive oxide film below the passivation film, and a relay electrode between a first conductive material in a same layer as a first electrode of the first transistor and a second conductive material in an electroluminescence layer. A first line is in a layer lower than the passivation film and a second line is above the passivation film. A terminal to which an external signal is input is provided in a periphery of the substrate in the same layer as the first electrode. The conductive oxide film covers an upper surface of the terminal and is between the relay electrode and the first conductive material. The relay electrode is formed in a same layer and comprises a same material as the second line.

Abstract: A nitride semiconductor template includes a substrate, and a group III nitride semiconductor layer having an oxygen-doped layer formed on the substrate, and a silicon-doped layer formed on the oxygen-doped layer. A total thickness of the group III nitride semiconductor layer is not smaller than 4 ?m and not greater than 10 ?m, and an average silicon carrier concentration in the silicon-doped layer is not lower than 1×1018 cm?3 and not higher than 5×1018 cm?3.

Abstract: A dimpled substrate and method of making including a substrate of high thermal conductivity having a first main surface and a second main surface opposite the first main surface. Active epitaxial layers are formed on the first main surface of the substrate. Dimples are formed as extending from the second main surface into the substrate toward the first main surface. An electrical contact of low resistance material is disposed on the second main surface and within the dimples. A back contact of low resistance and low loss is thus provided while maintaining the substrate as an effective heat sink.

Abstract: The present disclosure generally relates to a Schottky diode that has a substrate, a drift layer provided over the substrate, and a Schottky layer provided over an active region of the substrate. A junction barrier array is provided in the drift layer just below the Schottky layer. The elements of the junction barrier array are generally doped regions in the drift layer. To increase the depth of these doped regions, individual recesses may be formed in the surface of the drift layer where the elements of the junction barrier array are to be formed. Once the recesses are formed in the drift layer, areas about and at the bottom of the recesses are doped to form the respective elements of the junction barrier array.

Abstract: A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

Abstract: An optical waveguide device of the present invention comprises: an optical waveguide including a plurality of cores configured to emit outgoing light from distal ends thereof; and a light-receiving element including a plurality of photo diodes configured to receive the outgoing light. Respective pitches L1 between adjacent cores are greater than pitches L2 between adjacent photo diodes. At least one photo diode on which only outgoing light of each core is incident is present with respect to each of the cores.

Abstract: A combined semiconductor apparatus includes a semiconductor substrate having an integrated circuit, a planarized region formed in a surface of the semiconductor substrate, and a semiconductor thin film including at least one semiconductor device and bonded on the planarized region. A surface of the semiconductor thin film, in which the semiconductor device is formed, is disposed on a side of the planarized region. The apparatus may further include a planarized film disposed between the planarized region and the semiconductor thin film.

Abstract: An organic EL element has an anode, a cathode, a hole injection layer and at least one functional layer disposed between the anode and the cathode. The at least one functional layer contains an organic material. Holes are injected into the functional layer from the hole injection layer, which contains a tungsten oxide. A Ultraviolet Photoelectron Spectroscopy (UPS) spectrum obtained from a UPS measurement has a protrusion near a Fermi surface and within a region corresponding to a binding energy range lower than a top of the valence band. The tungsten oxide contained in the hole injection layer satisfies a condition, determined from an X-ray Photoelectronic Spectroscopy measurement, that a ratio in a number density of atoms other than tungsten and oxygen atoms to the tungsten atoms does not exceed approximately 0.83.

Abstract: An organic light-emitting display device comprises a substrate, an anode electrode formed on the substrate, an organic layer formed on the anode electrode, a cathode electrode formed on the organic layer, and an organic capping layer formed on the cathode electrode and containing a capping organic material and a rare-earth material which has higher oxidizing power than the material which forms the cathode electrode.

Abstract: A display device capable of suppressing decrease in capacitance and capable of reducing area even when a capacitor unit is repaired is provided. A capacitor unit in a display device includes: a capacitor element having a first capacitor electrode connected to a power line and provided in an SD electrode layer and a second capacitor electrode provided in a GM electrode layer; a backup capacitor electrode provided in the TM electrode layer; a disconnect-able portion at which a connection between the first capacitor electrode and the power line can be disconnected; and a connectable portion at which the backup capacitor electrode and the power line can be connected, and the disconnect-able portion and the connectable portion overlap in a stacking direction.

Abstract: A light emitting panel includes a plurality of light emitting element arrays each of which has a plurality of light emitting elements arranged in a plane. The light emitting element arrays are configured so that an arrangement plane of the light emitting elements of one light emitting element array is overlapped with another arrangement plane of the light emitting elements of another light emitting element array in substantially parallel to each other, and so that the light emitting elements of one light emitting element array and the light emitting elements of another light emitting element array emit lights to the same side.

Abstract: A process for forming a pixel circuit is disclosed comprising: (a) providing a transparent support; (b) forming a multicolor mask having at least four different color patterns; (c) forming integrated electronic components of the pixel circuit having at least four layers of patterned functional material comprising a first conductor, a dielectric, a semiconductor, and a second conductor each layer of patterned functional material corresponding to the four different color patterns of the multicolor mask. The functional material is patterned using a photopattern corresponding to each color pattern.

Abstract: A light emitting device free from void-generation at a bonding between an LED chip and a metal layer provided on a dielectric substrate. This light emitting device is also free from short-circuit between the closely arranged LED chips. This light emitting device includes a plurality of the LED chips, one dielectric substrate (sub-mount member) which is made of a dielectric substrate for holding the LED chips. The dielectric substrate is formed with a plurality of supporting platforms which respectively holds the LED chips. Each supporting platform is provided with a metal layer which is soldered to the LED chip. The supporting platforms are configured to leave a groove between the adjacent ones of the supporting platforms. Each supporting platform is provided at its side surface with a solder-leading portion made of a material having a solder-wettablity higher than that of the supporting platform.

Abstract: A multichip light-emitting diode (LED) includes a reflective cup, a plurality of light-emitting chips and a package. The light-emitting chips are disposed in the reflective cup and emit light when driven. The package is disposed in the reflective cup and covers the light-emitting chips. The package further has a plurality of lenses corresponding to the light-emitting chips one by one. The lenses refract light emitted by the corresponding light-emitting chips, respectively. An extrinsic light efficiency of the multichip is increased through the design of the multichip LED.

Abstract: An LED package structure includes a base and two diodes. The base includes an insulating layer having an outer peripheral edge, and a conductive bottom layer disposed on a bottom face of the insulating layer and having an outer peripheral edge spaced from the outer peripheral edge of the insulating layer at a predetermined distance. The insulating layer is formed with two spaced-apart through holes, and cooperates with the conductive bottom layer to form first and second cavities. The diodes are disposed within the first and second cavities, respectively. A transparent encapsulant covers the base and the diodes.

Abstract: Provided is a light-emitting element in the structure and configuration of causing no possibility of a short circuit between first and second electrodes even if there is any foreign substance or a protrusion on the first electrode. Such a light-emitting element is configured to include, in order, a first electrode 21, an organic layer 23 including a light-emitting layer made of an organic light-emitting material, a semi-transmissive/reflective film 40, a resistance layer 50, and a second electrode 22. The first electrode 21 reflects a light coming from the light-emitting layer, and the second electrode 22 passes through a light coming from the semi-transmissive/reflective film 40 after passing therethrough. The semi-transmissive/reflective film on the organic layer 23 has an average film thickness of 1 nm to 6 nm both inclusive.

Abstract: A phosphor ceramic includes at least one fluorescent layer that is capable of emitting fluorescent light; and at least one non-fluorescent layer that does not emit fluorescent light and is laminated onto the fluorescent layer.

Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.

Abstract: A method for fabricating a color filter structure includes: providing a base layer; forming a first colored layer on the base layer; patterning the first colored layer to form a pair of first colored patterns, a first opening between the first colored patterns, and a second opening adjacent to the first colored patterns; forming a first dielectric layer on the first colored patterns and the base layer exposed by the first and second openings; forming a second colored layer on the first colored patterns and the first dielectric layer; patterning the second colored layer to form a second colored pattern in the first opening; forming a second dielectric layer on the first dielectric layer and the second colored pattern; forming a third colored layer on the second dielectric layer; and patterning the third colored layer to form a third colored pattern in the second opening.

Abstract: Parallel plate slot emission array. In accordance with an embodiment of the present invention, an article of manufacture includes a side-emitting light emitting diode configured to emit light from more than two surfaces. The article of manufacture includes a first sheet electrically and thermally coupled to a first side of the light emitting diode, and a second sheet electrically and thermally coupled to a second side of the light emitting diode. The article of manufacture further includes a plurality of reflective surfaces configured to reflect light from all of the surfaces of the light emitting diode through holes in the first sheet. The light may be reflected via total internal reflection.

Abstract: A semiconductor light emitting device includes: a light emitting structure including a first conductive type semiconductor layer, a second conductive type semiconductor layer and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer; and a first electrode on the first conductive type semiconductor layer, wherein the light emitting structure includes an outer groove formed at an outer area of the light emitting structure, wherein a thickness of an outmost area of the light emitting structure is smaller than a thickness of an center area of the light emitting structure, and wherein the first conductive type semiconductor layer includes AlGaN layer and the second conductive type semiconductor layer includes AlGaN layer.

Abstract: A method for providing, on a carrier (40), an insulative spacer layer (26) which is patterned such that a cavity (27) is formed which enables connection of an optical semiconductor element (41) to the intended conductor structure (22) when placed inside the cavity (27). The cavity (27) is formed such that it, through its shape, extension and/or depth, accurately defines a location of an optical element (45; 61) in relation to the optical semiconductor element (41). Through the provision of such a patterned insulative spacer layer, compact and cost-efficient optical semiconductor devices can be mass-produced based on such a carrier without the need for prolonged development or acquisition of new and expensive manufacturing equipment.

Abstract: Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material, where the first and second contacts define the current flow path through the SSL structure. The first or second contact is configured to provide a current density profile in the SSL structure based on a target current density profile.

Abstract: The present invention relates to a resin composition for forming an insulating resin layer for optical semiconductor element housing package having a concave portion in which a metal lead frame and an optical semiconductor element mounted thereon are housed, in which the resin composition includes the following ingredients (A) to (D), and the ingredients (C) and (D) are contained in a blend ratio (C)/(D) of 0.3 to 3.0 as a weight ratio thereof: (A) an epoxy resin; (B) an acid anhydride curing agent; (C) a white pigment; and (D) an inorganic filler.

Abstract: This invention provides a light-emitting element and the manufacture method thereof. The light-emitting element is suitable for flip-chip bonding and comprises an electrode having a plurality of micro-bumps for direct bonding to a submount. Bonding within a relatively short distance between the light-emitting device and the submount can be formed so as to improve the heat dissipation efficiency of the light-emitting device.

Abstract: Provided are a nitride semiconductor light-emitting device comprising a polycrystalline or amorphous substrate made of AlN; a plurality of dielectric patterns formed on the AlN substrate and having a stripe or lattice structure; a lateral epitaxially overgrown-nitride semiconductor layer formed on the AlN substrate having the dielectric patterns by Lateral Epitaxial Overgrowth; a first conductive nitride semiconductor layer formed on the nitride semiconductor layer; an active layer formed on the first conductive nitride semiconductor layer; and a second conductive nitride semiconductor layer formed on the active layer; and a process for producing the same.

Abstract: A nitride semiconductor light-emitting chip offers enhanced luminous efficacy as a result of an improved EL emission pattern. The nitride semiconductor laser chip (nitride semiconductor light-emitting chip) has a nitride semiconductor substrate having a principal growth plane, and nitride semiconductor layers grown on the principal growth plane of the nitride semiconductor substrate. The principal growth plane of the GaN substrate is a plane having off-angles in both the a- and c-axis directions relative to an m plane, and the off-angle in the a-axis direction is larger than the off-angle in the c-axis direction.

Abstract: A memory device includes a driver comprising a pn-junction in the form of a multilayer stack including a first doped semiconductor region having a first conductivity type, and a second doped semiconductor plug having a second conductivity type opposite the first conductivity type, the first and second doped semiconductors defining a pn junction therebetween, in which the first doped semiconductor region is formed in a single-crystalline semiconductor, and the second doped semiconductor region includes a polycrystalline semiconductor. Also, a method for making a memory device includes forming a first doped semiconductor region of a first conductivity type in a single-crystal semiconductor, such as on a semiconductor wafer; and forming a second doped polycrystalline semiconductor region of a second conductivity type opposite the first conductivity type, defining a pn junction between the first and second regions.

Abstract: A bi-directional triode thyristor (TRIAC) device for high voltage electrostatic discharge (ESD) protection may include a substrate, an N+ doped buried layer, an N-type well region and two P-type well regions. The N+ doped buried layer may be disposed proximate to the substrate. The N-type well region may encompass the two P-type well regions such that a portion of the N-type well region is interposed between the two P-type well regions. The P-type well regions may be disposed proximate to the N+ doped buried layer and comprise one or more N+ doped plates and one or more P+ doped plates. The portion of the N-type well region that is interposed between the two P-type well regions may comprise one or more P-type portions, such as a P+ doped plate or a P-type implant.

Abstract: A silicon photomultiplier maintains the photon detection efficiency high while increasing a dynamic range, by reducing the degradation of an effective fill factor that follows the increase of cell number density intended for a dynamic range enhancement.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first conductivity type cathode layer, a first conductivity type base layer, a second conductivity type anode layer, a second conductivity type semiconductor layer, a first conductivity type semiconductor layer, an buried body, and a second electrode. The first conductivity type semiconductor layer is contiguous to the second conductivity type semiconductor layer in a first direction, and extends on a surface of the anode layer in a second direction that intersects perpendicularly to the first direction. The buried body includes a bottom portion and a sidewall portion. The bottom portion is in contact with the base layer. The sidewall portion is in contact with the base layer, the anode layer, the second conductivity type semiconductor layer and the first conductivity type semiconductor layer. The buried body extends in the first direction.