Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.

Abstract: The present invention discloses a semiconductor device and a manufacturing method therefor. Conventionally, platinum is deposited in a device substrate to suppress diffusion of nickel in nickel silicide. However, introducing platinum by means of deposition makes the platinum only stay on the surface but fails to effectively suppress the diffusion of nickel over a desirable depth. According to the present invention, a semiconductor device is formed by implanting platinum into a substrate and forming NiSi in a region of the substrate where platinum is implanted. With the present invention, platinum can be distributed over a desirable depth range so as to more effectively suppress nickel diffusion.

Abstract: A method for forming small dimension openings in the organic masking layer of tri-layer lithography. The method includes forming an organic polymer layer over a semiconductor substrate; forming a silicon containing antireflective coating on the organic polymer layer; forming a patterned photoresist layer on the antireflective coating, the patterned photoresist layer having an opening therein; performing a first reactive ion etch to transfer the pattern of the opening into the antireflective coating to form a trench in the antireflective coating, the organic polymer layer exposed in a bottom of the trench; and performing a second reactive ion etch to extend the trench into the organic polymer layer, the second reactive ion etch forming a polymer layer on sidewalls of the trench, the second reactive ion etch containing a species derived from a gaseous hydrocarbon.

Abstract: A metal seed composition useful in seeding a metal diffusion barrier or conductive metal layer on a semiconductor or dielectric substrate, the composition comprising: a nanoscopic metal component that includes a metal useful as a metal diffusion barrier or conductive metal; an adhesive component for attaching said nanoscopic metal component on said semiconductor or dielectric substrate; and a linker component that links said nanoscopic metal component with said adhesive component. Semiconductor and dielectric substrates coated with the seed compositions, as well as methods for depositing the seed compositions, are also described.

Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

Abstract: A method for sealing through-holes in a material via material diffusion, without the deposition of a sealant material, is disclosed. The method is well suited to the fabrication and packaging of microsystems technology-based devices and systems. In some embodiments, the method comprises forming sacrificial material release through-holes through a structural layer, removing the sacrificial material via an etch that etches the sacrificial material through the release through-holes, and sealing of the release through-holes via material diffusion.

Abstract: A microelectronic unit can include a semiconductor element having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts at the front surface and a rear surface remote from the front surface. The semiconductor element can have through holes extending from the rear surface through the semiconductor element and through the contacts. A dielectric layer can line the through holes. A conductive layer may overlie the dielectric layer within the through holes. The conductive layer can conductively interconnect the contacts with unit contacts.

Abstract: A method of forming a semiconductor device includes forming first and second bumps on a semiconductor substrate, forming first and second penetration electrodes penetrating the semiconductor substrate, forming a first conductive structure making a first electrical path between the first bump and the first penetration electrode, and forming a second conductive structure making a second electrical path between the second bump and the second penetration electrode, the second conductive structure being smaller in resistance value than the first conductive structure.

Abstract: According to an embodiment, a method for manufacturing a semiconductor device is provided. The method includes providing a mask layer which is used as an implantation mask when forming a doping region and which is used as an etching mask when forming an opening and a contact element formed in the opening. The contact element is in contact with the doping region.

Abstract: A reactive evaporation method for forming a group III-V amorphous material attached to a substrate includes subjecting the substrate to an ambient pressure of no greater than 0.01 Pa, and introducing active group-V matter to the surface of the substrate at a working pressure of between 0.05 Pa and 2.5 Pa, and group III metal vapor, until an amorphous group III-V material layer is formed on the surface.

Abstract: A method of patterning a gate stack on a substrate is described. The method includes preparing a gate stack on a substrate, wherein the gate stack includes a high-k layer and a gate layer formed on the high-k layer. The method further includes transferring a pattern formed in the gate layer to the high-k layer using a pulsed bias plasma etching process, and selecting a process condition for the pulsed bias plasma etching process to achieve a silicon recess formed in the substrate having a depth less than 2 nanometer (nm).

Abstract: Some embodiments include methods in which insulative material is simultaneously deposited across both a front side of a semiconductor substrate, and across a back side of the substrate. Subsequently, openings may be etched through the insulative material across the front side, and the substrate may then be dipped within a plating bath to grow conductive contact regions within the openings. The insulative material across the back side may protect the back side from being plated during the growth of the conductive contact regions over the front side. In some embodiments, plasma-enhanced atomic layer deposition may be utilized for the deposition, and may be conducted at a temperature suitable to anneal passivation materials so that such annealing occurs simultaneously with the plasma-enhanced atomic layer deposition.

Abstract: A method for chemical mechanical polishing of a substrate comprising a germanium-antimony-tellurium chalcogenide phase change alloy using a chemical mechanical polishing composition comprising water; 1 to 40 wt % colloidal silica abrasive particles having an average particle size of ?50 nm; and 0 to 5 wt % quarternary ammonium compound; wherein the chemical mechanical polishing composition is oxidizer free and chelating agent free; and, wherein the chemical mechanical polishing composition has a pH >6 to 12.

Abstract: A vertically arranged laterally diffused metal-oxide-semiconductor (LDMOS) device includes a trench extending into a semiconductor body toward a semiconductor substrate. The trench includes sidewalls, a bottom portion connecting the sidewalls, a dielectric material lining the trench and a diffusion agent layer lining the dielectric material. A lightly doped drain region adjoins the trench and extends laterally around the sidewalls from the diffusion agent layer into the semiconductor body. In one implementation, a method for fabricating a vertically arranged LDMOS device includes forming a trench extending into a semiconductor body toward a semiconductor substrate, the trench including sidewalls, a bottom portion connecting the sidewalls, a dielectric material lining the trench and a diffusion agent layer lining the dielectric material.

Abstract: A method for fabricating a dual damascene structure includes the following steps. At first, a dielectric layer, a dielectric mask layer and a metal mask layer are sequentially formed on a substrate. A plurality of trench openings is formed in the metal mask layer, and a part of the metal mask layer is exposed in the bottom of each of the trench openings. Subsequently, a plurality of via openings are formed in the dielectric mask layer, and a part of the dielectric mask layer is exposed in a bottom of each of the via openings. Furthermore, the trench openings and the via openings are transferred to the dielectric layer to form a plurality of dual damascene openings.

Abstract: A method of forming multiple different width dimension features simultaneously. The method includes forming multiple sidewall spacers of different widths formed from different combinations of conformal layers on different mandrels, removing the mandrels, and simultaneously transferring the pattern of the different sidewall spacers into an underlying layer.

Abstract: A method for fabricating an anti-fuse memory cell having a semiconductor structure with a minimized area. The method includes providing a reference pattern for the semiconductor structure, and applying a reverse OPC technique that includes inverting selected corners of the reference pattern. The reverse OPC technique uses photolithographic distortions to provide a resulting fabricated pattern that is intentionally distorted relative to the reference pattern. By inverting corners of a geometric reference pattern, the resulting distorted pattern will have an area that is reduced relative to the original reference pattern. This technique is advantageous for reducing the area of a selected region of a semiconductor structure which may otherwise not be possible through normal design parameters.

Abstract: An apparatus for control of a temperature of a substrate has a temperature-controlled base, a heater, a metal plate, a layer of dielectric material. The heater is thermally coupled to an underside of the metal plate while being electrically insulated from the metal plate. A first layer of adhesive material bonds the metal plate and the heater to the top surface of the temperature controlled base. This adhesive layer is mechanically flexible, and possesses physical properties designed to balance the thermal energy of the heaters and an external process to provide a desired temperature pattern on the surface of the apparatus. A second layer of adhesive material bonds the layer of dielectric material to a top surface of the metal plate. This second adhesive layer possesses physical properties designed to transfer the desired temperature pattern to the surface of the apparatus. The layer of dielectric material forms an electrostatic clamping mechanism and supports the substrate.

Abstract: There is provided a semiconductor device manufacturing method for forming a step-shaped structure in a substrate by etching the substrate having thereon a multilayer film and a photoresist film on the multilayer film and serving as an etching mask. The multilayer film is formed by alternately layering a first film having a first permittivity and a second film having a second permittivity different from the first permittivity. The method includes a first process for plasma-etching the first film by using the photoresist film as a mask; a second process for exposing the photoresist film to hydrogen-containing plasma; a third process for trimming the photoresist film; and a fourth process for etching the second film by using the trimmed photoresist film and the plasma-etched first film as a mask. The step-shaped structure is formed in the multilayer film by repeatedly performing the first process to the fourth process in this sequence.

Abstract: A method of forming contact hole is disclosed, including the steps of: providing a semiconductor substrate having a first dielectric layer, a second dielectric layer and a third dielectric layer formed thereon in this order; forming a first contact hole through the third dielectric layer, the second dielectric layer and the first dielectric layer by using an etching process to expose the semiconductor substrate; removing the third dielectric layer; forming a fourth dielectric layer over the second dielectric layer, the fourth dielectric layer filling the first contact hole; forming a second contact hole through the fourth dielectric layer, the second dielectric layer and the first dielectric layer to expose the semiconductor substrate; and removing the fourth dielectric layer. The method is capable of improving the stability of the contact-hole formation process.

Abstract: A method for manufacturing a semiconductor integrated circuit includes providing a substrate having at least a metal hard mask formed thereon. Subsequently a patterning step is performed to the metal hard mask to form a patterned metal hard mask and followed by performing a H2O plasma treatment to the patterned metal hard mask.

Abstract: Metal gate high-k capacitor structures with lithography patterning are used to extract gate work function using a combinatorial workflow. Oxide terracing, together with high productivity combinatorial process flow for metal deposition can provide optimum high-k gate dielectric and metal gate solutions for high performance logic transistors. The high productivity combinatorial technique can provide an evaluation of effective work function for given high-k dielectric metal gate stacks for PMOS and NMOS transistors, which is critical in identifying and selecting the right materials.

Abstract: One illustrative method disclosed herein includes forming a first recess in a first active region of a substrate, forming a first layer of channel semiconductor material for a first PFET transistor in the first recess, performing a first thermal oxidation process to form a first protective layer on the first layer of channel semiconductor material, forming a second recess in the second active region of the semiconducting substrate, forming a second layer of channel semiconductor material for the second PFET transistor in the second recess and performing a second thermal oxidation process to form a second protective layer on the second layer of channel semiconductor material.

Abstract: A method of forming a dielectric film including a zirconium oxide film includes: forming a zirconium oxide film on a substrate to be processed by supplying a zirconium material and an oxidant, the zirconium material including a Zr compound which includes a cyclopentadienyl ring in a structure, and forming a titanium oxide film on the zirconium oxide film by supplying a titanium material and an oxidant, the titanium material including a Ti compound which includes a cyclopentadienyl ring in a structure.

Abstract: In some embodiments, the present invention discloses a gate dielectric deposition process, including depositing a fluorinated hafnium oxide by an ALD process utilizing a fluorinated hafnium precursor and an oxidant. A two-step ALD deposition process can be used, including a fluorinated hafnium oxide layer deposition followed by a hafnium oxide layer deposition. Hafnium oxide can provide high dielectric constant, high density, large bandgap and good thermal stability. Fluorinated hafnium oxide can passivate interface states and bulk traps in the hafnium oxide, for example, by forming Si—F or Hf—F bonds, which can improve the reliability of the hafnium oxide gate dielectrics.

Abstract: An article comprising a microporous membrane. A first porous fabric is laminated to a first side of the microporous membrane. A second porous fabric is laminated to a second opposite side of the microporous membrane to form a laminate with the membrane and the first porous fabric. The laminate has two fabric sides separated by the microporous membrane. A treatment material is applied to the laminate to form a treated laminate. The treated laminate has an oil resistance of at least a number 7 determined by AATCC 118 testing on both fabric sides and has an air permeability through the treated laminate of at least 0.01 CFM per square foot determined by ASTM D737 testing.

Abstract: It is an object of the invention to provide a number of coatings for protection of wooden poles including filler paste, coating paints and glass fiber-polyester resin based composites which may be applied to wooden poles in the field. These coatings contain different anti-flame and antifungal additives.

Abstract: The present invention relates to an optical member including a TiO2-containing silica glass having: a TiO2 concentration of from 3 to 10% by mass; a Ti3+ concentration of 100 wt ppm or less; a thermal expansion coefficient at from 0 to 100° C., CTE0-100, of 0±150 ppb/° C.; and an internal transmittance in the wavelength range of 400 to 700 nm per a thickness of 1 mm, T400-700, of 80% or more, in which the optical member has a ratio of variation of Ti3+ concentration to an average value of the Ti3+ concentration, ?Ti3+/Ti3+, on an optical use surface, is 0.2 or less.

Abstract: A mullite-based body including mullite, alumina, and titanium manganese oxide is disclosed. The mullite-based sintered body includes mullite of 79.3 to 85.2 mass %, alumina of 14.2 to 19.8 mass % and MnTiO3 of 0.6 to 1.1 mass %. The mullite-based sintered body has a relative density of 96% or higher. A circuit board and a probe card are also disclosed. The circuit board includes the mullite-based sintered body. The probe card includes the wiring substrate; a surface wiring layer on a surface of the wiring substrate; and a measuring terminal electrically coupled to the surface wiring layers for measuring the electrical characteristics of an electric circuit.

Abstract: To improve stability of catalytic performance, an aromatizing catalyst for converting lower hydrocarbons into aromatic compounds is regenerated. A regeneration process of the aromatizing catalyst according to the present invention includes the steps of: (a) reacting the aromatizing catalyst with a hydrogen gas in an atmosphere containing the hydrogen gas after using the aromatizing catalyst in an aromatizing reaction for converting lower hydrocarbons into aromatic compounds; (b) decreasing a temperature of the atmosphere containing the hydrogen gas reacted with the aromatizing catalyst, by supplying one of an inert gas and a reducing gas to the atmosphere; (c) reacting the aromatizing catalyst reacted with this inert gas, with an oxidizing gas; and (d) reacting the aromatizing catalyst reacted with the oxidizing gas, with a reducing gas.

Abstract: Zeolite catalysts and systems and methods for preparing and using zeolite catalysts having the CHA crystal structure are disclosed. The catalysts can be used to remove nitrogen oxides from a gaseous medium across a broad temperature range and exhibit hydrothermal stable at high reaction temperatures. The zeolite catalysts include a zeolite carrier having a silica to alumina ratio from about 15:1 to about 256:1 and a copper to alumina ratio from about 0.25:1 to about 1:1.

Abstract: The present invention relates to a catalyst composition and a process for preparing an olefin polymer using the same. More specifically, the present invention relates to a novel catalyst composition comprising at least two types of catalysts and a process for preparing an olefin polymer having excellent heat resistance using the same. The present invention can provide an olefin polymer having excellent activity and high heat resistance, and also can control the values of density, heat resistance and melt index (MI) of the olefin polymer.

Abstract: The present invention generally provides compositions including carbon-based nanostructures, catalyst materials and systems, and related methods. In some cases, the present invention relates to carbon-based nanostructures comprising a high density of charged moieties. Methods of the invention may provide the ability to introduce a wide range of charged moieties to carbon-based nanostructures. The present invention may provide a facile and modular approach to synthesizing molecules that may be useful in various applications including sensors, catalysts, and electrodes.

Abstract: In one embodiment, the invention is to a catalyst composition comprising vanadium and titanium. The catalyst composition further comprises ethylene glycol and citric acid. Preferably, the catalyst composition is substantially free of oxalic acid and lactic acid.

Abstract: A composition comprising a base component and a polymer, and a method of making said composition, are disclosed. The composition thereby obtained is then used as a catalyst for isoparaffin-olefin alkylation.

Abstract: A catalyst for alkali-free purification of oil raw materials includes a solid metalocomplex or a liquid metalocomplex with a general formula (CuMCl)20(Li)2^(L2)i^, where Li is amino alcohol, L2 is acetonitryl or single atom alcohol.

Abstract: The present invention relates to petrochemistry, gas chemistry, coal chemistry, particularly the invention relates to a catalyst for synthesis of hydrocarbons from CO and H2 and a preparation method thereof. The catalyst is pelletized and comprises at least Raney cobalt as active component in an amount of 1-40% by weight based on the total weight of the catalyst, metallic aluminium in an amount of 25-94% by weight based on the total weight of the catalyst and a binder in an amount of 5-30% by weight based on the total weight of the catalyst. The present invention provides the catalyst stability to overheating and high productivity of hydrocarbons C5-C100 for synthesis of hydrocarbons from CO and H2.

Abstract: A catalyst for NOx storage and reduction may include a carrier that contains alkali metal and Al, or alkali earth metal and Al, a NOx storage element of alkali metal, alkali earth metal or rare earth element, and one or more noble metals that are selected from the group consisting of Pt, Pd, Ru, Ag, Au and Rh. The catalyst for NOx storage and reduction shows excellent NOx storage and reduction capability, maintains excellent storage and reduction capability especially before and after deterioration and sulfation, and shows excellent catalytic activity under low temperature environment, while maintaining unusually high hydrophobicity.

Abstract: Metal sorbent compositions for removing a metal contaminant from a fluid, such as removal of mercury from a coal-fired flue gas stream, and methods for making and using the same are provided. The subject metal sorbent compositions comprise an effective amount of an aqueous dispersion of microfine elemental sulfur particles on an adsorbent substrate, and optionally, a metal capture enhancing agent such as a halogen source and/or an oxidizing agent in an amount providing a metal capture enhancing effect on the metal sorbent composition. The subject metal sorbent compositions are prepared by drying an aqueous dispersion of microfine elemental sulfur particles on an adsorbent substrate, such as on a substrate of microfine particles of a refractory material and the like. Also provided are kits for use in preparing the subject compositions, and compositions produced by the methods. The subject compositions, kits and systems find use in a variety of different applications.

Abstract: A novel method of transfer printing onto articles, particularly dark articles, is disclosed. A design, preferably in color, is printed onto a transfer sheet in sublimation dye using a commercially-available printer. White toner is then printed over at least a portion of the design using an electrostatic printing device. Heat and pressure are applied to transfer the design and the white toner to an article. In some preferred embodiments, the transfer sheet is a self-weeding transfer paper. In some preferred embodiments, the same printer is used to print both the sublimation dye design and the white toner. In some preferred embodiments, the color palette of the image is inverted prior to printing with white toner. The invention is particularly well suited to the transfer printing of dark textile articles.

Abstract: An object of the present invention is a process for the preparation of particles which comprise two agrochemical active ingredients in amorphous form, where a melt comprising the two molten agrochemical active ingredients is emulsified in an aqueous solution and cooled. A further object is the use of an agrochemical active ingredient for inhibiting the crystallization of another agrochemical active ingredient in a preparation process for particles which comprise the two agrochemical active ingredients in amorphous form, where a melt comprising the two molten agrochemical active ingredients is emulsified in an aqueous solution and cooled. A further object is particles which comprise two agrochemical active ingredients in amorphous form. The use in plant protection is also described.

Abstract: Cyclohexanedione compounds, which are suitable for use as herbicides.

Abstract: The present invention relates N-5-membered, fused, heteroaryl-methylene-N-cycloalkyl-carboxamide derivatives, their thiocarboxamide or N-substituted carboximidamide analogues, all of formula (I) wherein A represents a carbo-linked 5-membered heterocyclyl group; T represents O, S, N—Rc, N—ORd, N—NRcRd or N—CN; Z1 to Z3; W1 to W5; Y1 to Y3 and p represent various substituents; their process of preparation; their use as fungicide active agents, particularly in the form of fungicide compositions and methods for the control of phytopathogenic fungi, notably of plants, using these compounds or compositions.

Abstract: Esteramide compounds are useful solvents/coalescing agents for a variety of phytosanitary, cleaning, degreasing, stripping, lubricating, coating and pigment/ink compositions.

Abstract: Methods of forming superconducting devices are disclosed. In one embodiment, the method can comprise depositing a protective barrier layer over a superconducting material layer, curing the protective barrier layer, depositing a photoresist material layer over the protective barrier layer and irradiating and developing the photoresist material layer to form an opening pattern in the photoresist material layer. The method can further comprise etching the protective barrier layer to form openings in the protective barrier layer based on the opening pattern, etching the superconductor material layer based on the openings in the protective barrier layer to form openings in the superconductor material layer that define a first set of superconductor material raised portins and stripping the photoresist material layer and the protective barrier layer.

Abstract: DNA taggants in which the nucleotide sequences are defined according to combinatorial mathematical principles. Methods of defining nucleotide sequences of the combinatorial DNA taggants, and using such taggants for authentication and tracking and tracing an object or process are also disclosed.

Abstract: The present invention provides multiepitope-binding fusion polypeptides for use in a method for the detection of the presence of human immunodeficiency virus, HIV, in a biological sample. The present invention also provides a method for producing multiepitope-binding fusion polypeptides.

Abstract: The present invention provides methods for the prediction, prognosis and/or diagnosis of metastasis. The present invention also provides proteins (or the related nucleic acid sequences) or protein expression profiles which are predictive and/or prognostic for metastasis. The invention thus relates to the use of said proteins and the corresponding amino acid or nucleic acid sequences for the prediction, prognosis or diagnosis of metastasis.

Abstract: The present invention provides an alternative scaffold for peptides displayed on filamentous phages through novel fusion proteins primarily originating from pVII. Libraries of filamentous phages can be created from fusion proteins, and a phage display system comprising a phagemid and a helper phage is a part of the invention. An aspect of the invention is a kit containing a phage display system comprising a phagemid and a helper phage that contains a nucleic acid encoding the fusion protein of the invention.

Abstract: Synthetic antibody display library containing human germline antibody molecules with variation in VH CDR3 and VL CDR3 and at position 52 of VH CDR2, for screening and selection of antibody molecules specific for antigens of interest.