Abstract: A microelectromechanical systems (MEMS) device is provided, which includes a substrate; a proof mass positioned in space above a surface of the substrate, where the proof mass is configured to move relative to the substrate; a flexible travel stop structure formed within the proof mass, where the flexible travel stop structure includes a contact lever connected to the proof mass via flexible elements; and a bumper formed on the surface of the substrate, where the contact lever is aligned to make contact with the bumper when the proof mass moves toward the substrate.

Abstract: An acceleration predictor and method including at least one digital smoothing filter capable of calculating at least one acceleration estimate. In one or more embodiments, the estimator may include an overlay, an acceleration heat map, at least one threshold, wherein each acceleration heat map covers a range of a plurality of tool string components, a scroll bar, visual indications that may be color coded, or a maximum acceleration value.

Abstract: An inertial sensor includes first and second movable elements suspended from a substrate and interconnected by a beam. The second movable element is positioned laterally adjacent to the first movable element, and each of the movable elements has a mass that is asymmetric relative to a rotational axis. A first spring system couples the first movable element to the substrate and a second spring system couples the second movable element to the substrate. The spring systems and the beam enable the movable elements to move together in response to force imposed upon the movable elements. In particular, the first and second movable elements can undergo in-plane torsion motion in response to force, such as acceleration, imposed in a sense direction. Additionally, damping structures may be integrated into the first and second movable elements to effectively increase a damping ratio of the device resulting from the in-plane torsion motion.

Abstract: A method for examining signals. The method comprises a step of reading in a signal (204), a step of comparing the signal (204) to an interference signal characteristic characterizing an interference signal in order to determine whether the signal (204) represents the interference signal, and a step of buffering the signal (204) at least for a predetermined time interval in order to obtain a buffered signal (222).

Abstract: Systems and methods for the calibration of 3-axis accelerometers using vertical sample buffers in accordance embodiments of the invention are disclosed.

Abstract: Atomic force microscope measuring device comprising a micro-cantilever and an intensity modulated laser exciting the cantilever, wherein the measuring device comprises an optical microscope, in particular a fluorescence microscope, a confocal microscope, a fluorescence energy transfer (FRET) microscope, a DIC and/or phase contrast microscope, all of those in particular construed as an inverted microscope.

Abstract: A meter box lid includes electronic meter reading equipment that may be disposed in areas of the meter box lid, so as to prevent the equipment from becoming damaged when the lid is removed. A transmitter antenna may be mounted to the meter box lid to deliver a signal to data collection device and may remain intact whether or not the meter box lid is removed from a meter box. A solar panel may provide an extended battery life, and a tamper switch may provide notification of removal of the meter box lid.

Abstract: A contact for use in a test set which can be mounted to a load board of a tester apparatus. The contact, which serves to electrically connect at least one lead of a device being tested with a corresponding metallic trace on the load board, has a first end defining multiple contact points. As the test pin is rotated about an axis generally perpendicular to a plane defined by the contact, successive contact points are sequentially engaged by a lead of the device being tested. The test pin has a hard stop edge which engages a hard stop wall which limits its rotation movement. The bottom of the pin has a shallow convex curvature preferably with a flat region and the tip of the test pin has a chisel edge.

Abstract: A method of increasing uniformity in light from a light source at a plurality of targets of the light includes locating a plurality of movable aperture elements between the light source and the targets. Each aperture element defines an aperture through which the light passes from the light source to an associated one of the plurality of targets associated with the aperture element along a longitudinal axis of the aperture element. The method also includes moving at least one of the aperture elements along its longitudinal axis to change a feature of light incident on the target associated with the aperture element.

Abstract: A contact-distance transformer of an electric testing device for testing an electric specimen such as a wafer, for reducing a distance between neighboring electric contacts, the transformer having a non-electrically conductive supporting structure with a first side with first electric contacts positioned apart a first distance and a second side with second electric contacts positioned apart a second, smaller distance. The first contacts are connected to the second contacts by electric connections passing through the support structure and/or which are positioned on the support structure.

Abstract: Systems and methods for testing semiconductor wafers using a wafer translator are disclosed herein. In one embodiment, an apparatus for testing semiconductor dies includes a wafer translator having a wafer-side facing the dies and an inquiry-side facing away from the wafer-side. The inquiry-side of the wafer translator carries a first and a second plurality of inquiry-side contact structures. The first plurality of the inquiry-side contact structures is interleaved with the second plurality of the inquiry-side contact structures.

Abstract: Systems and methods for testing semiconductor wafers using a wafer translator are disclosed herein. In one embodiment, an apparatus for adjusting a wafer translator for testing semiconductor dies includes the semiconductor wafer translator having a wafer translator substrate with a wafer-side configured to face the dies. A plurality of wafer-side contact structures is carried by the wafer-side of the wafer translator. The apparatus also includes a shaping wafer having a shaping wafer substrate, and a plurality of cavities in the shaping wafer substrate. The wafer-side contact structures are shaped by contacting surfaces of the cavities of the shaping wafer substrate.

Abstract: Electrical current sensing and monitoring methods include connecting a compensation circuit across a conductor having a non-linear resistance such as a fuse element. The compensation circuit injects a current or voltage to the conductor that allows the resistance of the conductor to be determined. The current flowing in the conductor can be calculated based on a sensed voltage across the conductor once the resistance of the conductor has been determined.

Abstract: An improved system and method for monitoring power tines without connecting to ground is disclosed herein. An improved sensory assembly can comprise a first end, a second end, a voltage sensor, a current sensor, an analog to digital converter, and a sensory transceiver. The first end can be electrically connectable to a first phase of a power line. The second end can be electrically connectable to a second phase of the power line. The voltage sensor can be capable of measuring a voltage between the first phase and the second phase. The current sensor can be magnetically coupled to the power line. The analog to digital converter that can be capable of receiving a first signal from the voltage sensor, and can be capable of receiving a second signal from the current sensor.

Abstract: A system, method, and circuit for determining signals. A bridge output is received from a Wheatstone bridge sensing a slow signal and a fast signal. A slow output associated with the slow signal and a fast output associated with the fast signal are determined from the bridge output utilizing a microcontroller. The microcontroller generates the offset signal in response to the slow output. Other systems, methods, and circuits are disclosed.

Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.

Abstract: Methods and apparatus are provided for detection of voltage levels of RF signals. A first voltage correction is provided based on a thermal voltage and a second voltage correction is provided based on a voltage difference between a detection transistor, used for the rectification of the RF signal, and a reference transistor, to which the RF signal is not supplied. Based on the first and second voltage corrections, a more accurate detector with greater linearity may be obtained. In an embodiment, the second voltage correction may be generated proportional to a hyperbolic tangent of the voltage difference between two transistors, obtained using an additional pair of transistors configured as a differential pair. Applications include the control of a power amplifier output in a wireless device.

Abstract: A current detection circuit includes a first resistor and a second resistor identical in current path and equal in resistance value, a first and second signal transmission units which transmit respectively a signal representing the potential of the first resistor, a third and fourth signal transmission units which transmit respectively a signal representing the potential of the second resistor, a first difference operation unit which calculates the difference between the respective signals from the first and second signal transmission units, a second difference operation unit which calculates the difference between the respective signals from the third and fourth signal transmission units, and a summing unit which sums the signals output from the first and second difference operation units. The first signal transmission unit and the fourth signal transmission unit, and the second signal transmission unit and the third signal transmission unit are disposed in proximity to each other.

Abstract: A digital clamp meter includes a common input, a voltage/resistance input, a current transformer, a voltage/resistance measuring circuit, an AC measuring circuit, a MPU and a displayer. A detecting input of the voltage/resistance measuring circuit is connected to the voltage/resistance input, a detecting output of the voltage/resistance measuring circuit is connected to a signal input of the MPU, and a controlled terminal of the voltage/resistance measuring circuit is connected to a controlling output of the MPU. The signal output of the MPU is connected to the displayer. The common input is grounded. A detecting input of the AC measuring circuit is connected to a secondary winding of the current transformer, a detecting output of the AC measuring circuit is connected to the signal input of the MPU, and a controlled terminal of the AC measuring circuit is connected to the controlling output of the MPU.

Abstract: A power cable measurement device is provided, which may include a casing, a plurality current sensing modules and a plurality of voltage sensing modules. The casing may be used to envelope a three-phase three-wire power cable. The voltage sensing modules and the current sensing modules may be disposed on the casing and spaced at regular intervals; any two adjacent current sensing modules may be divided by one voltage sensing module. The power cable measurement device can accurately estimate the electricity information of the three-phase three-wire power cable according to a characteristic curve database constructed by pre-measurement, the induced voltages of the voltage sensing modules and the induced voltages of the current sensing modules.

Abstract: An apparatus for performing resistance control on a current sensing component in an electronic device and an associated method are provided. For example, the apparatus may comprise a power switching unit and a feedback module, and the power switching unit is utilized as the current sensing component when the power switching unit enables the power path. The feedback module may comprise: a power switching unit replica that receives a first voltage at the battery terminal and outputs a second voltage; a first current source, coupled between the power switching unit replica and a ground terminal, arranged to receive the second voltage; a reference voltage generator that generates a third voltage; and an error amplifier that receives the second voltage and the third voltage and outputs a fourth voltage, wherein the feedback module controls both of the power switching unit and the power switching unit replica according to the fourth voltage.

Abstract: A means and method for measuring precise voltage phasors on medium-voltage alternating current (AC) distribution grids, using existing distribution transformers as voltage sensors. The errors introduced by the distribution transformers are minimized by taking into account the transformer's vector impedance, combined with measuring the transformer secondary current phasor. The invention includes a means and a method of measuring the distribution transformer's vector impedance.

Abstract: A test and measurement instrument including an input configured to receive a reflected and/or transmitted pulse signal from a device under test, a reference clock input configured to receive a reference signal, the reference signal being asynchronous from the reflected pulse signal, a phase reference module configured to acquire samples of the reference signal, a sampling module configured to acquire samples of the reflected pulse signal; and a controller configured to determine a scattering parameter of the device under test based on the acquired samples of the reference signal and the acquired samples of the reflected pulse signal.

Abstract: Embodiments herein discuss tuning a testing apparatus to better match the input response of a target system in which a cable will be used. For example, conductors in the cable may have a different skew depending on the system in which they are used. The testing apparatus may be tuned using frequency information regarding the type of signals that will be driven on the cable when installed in the target system. In one embodiment, the testing apparatus adjusts a testing cycle refresh rate for generating a testing signal which changes the frequency content of the testing signal. Using the adjusted testing cycle refresh rate results in the driver outputting a testing signal that better reflects the actual signals that will be transmitted on the cable in the target system.

Abstract: Various devices, systems and methods are disclosed where a noise signal component of a sensor signal is used to obtain information about a sensor device. A device may include an evaluation circuit that is configured to receive a sensor signal having a noise signal component, and the evaluation circuit is further configured to evaluate the noise signal component to obtain information about a sensor device generating the sensor signal.

Abstract: A ground fault detector includes a relay configured to receive a first current. The ground fault detector also includes a voltage regulator configured to provide a voltage potential to ground. The ground fault detector further includes an amplifier configured, in response to a ground current flowing into or out of the ground fault detector, to change an output voltage of the amplifier in order to cause a change in the first current received at the relay. The change in the first current is indicative of a ground fault. Upon detection of a ground fault, the ground fault detector can be isolated from ground.

Abstract: Briefly, a method and system is provided for testing a cable using a high performance Time Domain Reflectometry (TRD) system and method. The TDR has a timing generator that is constructed to generate a periodic launch pulse to excite a cable under test, and to generate sample signals that are time delayed from the launch pulse. The timing for the launch pulse and the sample signal may be defined by two correlated PLL circuits coupled to the same clock. In one implementation, the timing generator is constructed in a single FPGA. The invention also provides calibration circuitry to compensate for temperature, voltage, and manufacturing variations in the FPGA. In one example, a tester includes a switch system that enables one or more TDR engines to sequentially apply a TDR stimulus to substantially all the wire pairs in a cable harness, and to collect the resulting TDR waveforms. The waveforms are analyzed to determine if the cable harness meets quality standards.

Abstract: A test board includes a plurality of power pads on a substrate. The power pads output a power supply voltage to a plurality of power terminals of a semiconductor device under test. The test board also includes a current limit circuit to limit current flowing through each of the power pads.

Abstract: There is a need to improve estimation accuracy of a failure estimation method or its failure estimation apparatus that performs failure estimation on a targeted instrument based on history information about several instruments mounted with the same type of semiconductor device as an instrument targeted at failure estimation. A failure estimation apparatus that includes a history information database storing history information about a plurality of instruments mounted with the same type of semiconductor device and performs failure estimation on a targeted instrument mounted with a semiconductor device whose type equals the type, wherein the history information contains operation information and failure information; wherein the operation information indicates a chronological operating state of the semiconductor device mounted on the instruments; wherein the failure information indicates a failure cause of a failed instrument; and wherein the operating state is categorized into a plurality of classifications.

Abstract: Provided herein is a radio frequency probe apparatus including a RF waveguide including a ground electrode and a signal electrode, a register connected to the signal electrode, a RF connector including an outer conductor connected to the ground electrode, an inner conductor connected to the signal electrode, and a dielectric body filling a portion between the outer conductor and the inner conductor, and a single tip probe connected to the signal electrode of the RF waveguide, or the register.

Abstract: In an inspection system for a device to be tested, a stage, on which a device to be tested and a diode are loaded, is moved to a static characteristic test station and a dynamic characteristic test station. A method for operating an inspection system for a device to be tested includes a process of carrying in and loading the stage, on which the device to be tested and the diode are loaded, a process of carrying in and fixing the device to be tested to a test station, a process of bringing a probe into contact with the diode, a process of switching a position of the diode, a process of performing a measurement with respect to the device to be tested, a process of carrying out the device to be tested from the stage, and a process of classifying the device to be tested.

Abstract: The present disclosure provides an apparatus and system for testing a touch screen, and an apparatus for controlling test of a touch screen. The apparatus for testing a touch screen comprises: a processor, a test signal collection interface unit, and an external communication interface unit, wherein the processor is connected to the test signal collection interface unit, and is configured to, after touch information is collected by the test signal collection interface unit, convert the collected touch information into a format which is recognizable by an intelligent device, and transmit the converted touch information to the intelligent device through the external communication interface unit. The apparatus for testing a touch screen according to the present disclosure enables the touch information to be correspondingly processed and displayed by a processor and a display of the intelligent device, respectively.

Abstract: A test interface board includes an encoder, a signal copier, and a decoder. The encoder digitally encodes test data to generate a modulation signal. The signal copier copies the modulation signal by inductively coupling the modulation signal and outputs at least one copy signal corresponding to the modulation signal. The decoder decodes the modulation signal and the at least one copy signal in order to test at least two semiconductor devices.

Abstract: A system for post-silicon leakage characterization is configured to apply a rail voltage to a hardware component; cause the hardware component to operate at a particular frequency; cause a cooling device, coupled to the hardware component, to operate at a cooling capacity; run a workload on the hardware component after applying the rail voltage, causing the hardware component to operate at a particular frequency, and causing the cooling device to operate at a particular cooling capacity; discontinue the workload and clocks of the hardware component after a temperature of the hardware component has reached a steady high point; continuously measure temperature and leakage power of the hardware component after discontinuing the workload until the temperature of the hardware component has reached a steady low point; and adjust a power management procedure for the hardware component based on measured temperature and measured leakage power of the hardware component.

Abstract: A method for applying stress conditions to integrated circuit device samples during accelerated stress testing may include partitioning each of the integrated circuit device samples into a first region having a first functional element, partitioning each of the integrated circuit device samples into at least one second region having at least one second functional element, applying a first stress condition to the first region having the first element, applying a second stress condition to the at least one second region having the at least one second element, determining a first portion of the integrated circuit device samples that functionally failed based on the first stress condition, and determining a second portion of the integrated circuit device samples that functionally failed based on the second stress condition. An acceleration model parameter is derived based on the determining of the first and second portion of the integrated circuit samples that functionally failed.

Abstract: A test lead wire structure for connecting signal lines in a display device with test lines outside, includes a first insulating layer, a second insulating layer, first lead wires, and second lead wires. The projections of the first lead wires on the second insulating layer and the projections of the second lead wires on the second insulating layer are alternately disposed. During the cutting operation, short circuits are effectively prevented from occurring between the different test lead wires.

Abstract: Systems and methods for testing semiconductor wafers using a wafer translator are disclosed herein. In one embodiment, an apparatus for testing semiconductor dies includes a semiconductor wafer translator having a wafer-side positioned to face toward a device under test, and an inquiry-side facing away from the wafer-side. The apparatus also includes a flexible arm peripherally connected to the wafer translator, and an evacuation opening within the flexible arm or within the wafer translator. The evacuation opening is open to a flow of a gas in a first position of the flexible arm, and closed to a flow of the gas in a second position of the flexible arm.

Abstract: A method and apparatus for testing electronic devices installed in a portable device. The apparatus incorporates a socket with receptacles for alignment pins, and an alignment plate with openings for the alignment pins. The holes for the alignment pins are matched to the socket receptacles, providing secure alignment. The spring loaded socket pin mates with at least one solder ball. The apparatus also includes a circuit card, which may be a modem test platform circuit card that has contacts that mate with the at least one solder ball. Other functions may be tested using other circuit card assemblies. A method of testing includes: installing the electronic device to be tested into a socket assembly, aligning the electronic device to be tested into the socket assembly; installing the socket assembly into a test apparatus, and testing the device.

Abstract: The present disclosure provides methods for testing and evaluating electrical parameters of electronic circuits. An exemplary method includes providing a device-under-test electrically coupled to a testing apparatus; and determining an optimum value of a first electrical parameter and an optimum value of a second parameter by testing the device-under-test according to a set of first electrical parameter values and a set of second electrical parameter values. The optimum value of the first electrical parameter and the optimum value of the second parameter are determined based on an electrical noise response of the device-under-test.

Abstract: A semiconductor device in which the area of a circuit that is unnecessary during normal operation is small. The semiconductor device includes a first circuit and a second circuit. The first circuit includes a third circuit storing at least one pair of first data including a history of a branch instruction and a first address corresponding to the branch instruction; a fourth circuit comparing a second address of an instruction and the first address; and a fifth circuit selecting the first data of one pair among the at least one pair in accordance with a comparison result. The second circuit includes a plurality of sixth circuits having a function of generating a signal for testing operation of the first circuit in accordance with second data, and a function of storing the at least one pair together with the second circuit after the operation is tested.

Abstract: Embodiments herein discuss tuning a testing apparatus to better match the input response of a target system in which a cable will be used. For example, conductors in the cable may have a different skew depending on the system in which they are used. The testing apparatus may be tuned using frequency information regarding the type of signals that will be driven on the cable when installed in the target system. In one embodiment, the testing apparatus uses the frequency information to configure a programmable clock source that can be used to shape a reference clock and control a driver to match the signals in the target system. Using the clock source to modify the reference clock results in the driver outputting a testing signal that better reflects the actual signals that will be transmitted on the cable in the target system.

Abstract: A system disclosed herein includes an on-chip clock controller (OCC) circuit receiving a test pattern and responsively generating output clock pulses in response to the test pattern. An OCC test circuit is coupled to the OCC circuit and configured to detect data corresponding to output clock pulses generated by the OCC controller circuit and generate corresponding OCC test outputs. A test output logic circuit is configured to receive the OCC test outputs from the OCC test circuit. A debug controller is operable to configure the test output logic circuit to output the OCC test outputs.

Abstract: The method for inspecting a constituent unit cell of an all-solid secondary battery of the present invention includes (A) measuring an open-circuit voltage between the positive electrode and the negative electrode of a constituent unit cell of an all-solid secondary battery, (B) externally short-circuiting the positive electrode and the negative electrode of the constituent unit cell, (C) measuring an open-circuit voltage between the positive electrode and the negative electrode of the constituent unit cell after a given time has elapsed since the end of step (B), and (D) judging the constituent unit cell to be unusable when the open-circuit voltage measured in step (C) is less than the threshold value. The method for manufacturing an all-solid secondary battery of the present invention includes stacking a plurality of the constituent unit cells excluding the constituent unit cell judged to be unusable by the inspection method according to 1 above.

Abstract: A method of estimating a life of a battery includes acquiring density data based on battery sensing data, determining a density feature based on the density data using clusters generated by clustering a density data set based on a plurality of battery management profiles, and estimating the life of the battery based on the density feature.

Abstract: A method for displaying remaining battery capacity of an electronic device includes calculating remaining capacity of the battery for a number of predetermined times during a preset interval when a first difference value is greater than a predetermined value. The first difference value is between a first remaining capacity and a second remaining capacity. The first remaining capacity of the electronic device is recorded before turning off the electronic device, and the second remaining capacity of the electronic device after turning on the electronic device. The latest calculated remaining capacity during the preset interval is displayed on the display device when a second difference between each calculated remaining capacity and the first remaining capacity is greater than the predetermined value.

Abstract: The invention relates to a method and an MPIS scanner for tomographic imaging of an object with magnetic particles distributed in the interior of the object, comprising the steps of generating a selection magnetic field with a predetermined magnetic field gradient in at least one field-free point (FFP) in a predetermined scanning plane, generating a time-dependent, periodic excitation magnetic field with a predetermined maximum frequency, repeatedly displacing the at least one FFP along a predetermined closed trajectory with a predetermined repetition time in the scanning plane, moving the object through the scanning plane along a predetermined advance direction with a predetermined advance speed, detecting the change in the magnetization state of the magnetic particles at the points in the object interior through which the at least one FFP passes, reconstructing the local particle concentrations at the points through which the at least one FFP passes in respect of an object coordinate system, interpolating t

Abstract: A magnetoelastic tag includes a frame-suspended magnetoelastic resonator that combines a strong resonant response with a relatively small resonator, enabling magnetoelastic sensor use in a variety of inconspicuous applications and/or small packages. The resonator is suspended with respect to a substrate, which reduces, minimizes, or eliminates interaction between the substrate and resonator. Signal strength is thereby enhanced, thereby allowing miniaturization while maintaining a measurable response to the interrogation field. The resonator can have a hexagonal shape and/or be suspended at particular locations about its perimeter to promote signal generation in a direction different from that of the interrogation field. A sensor can include one or more frame-suspended resonators, which can be arranged in an array, stacked, or randomly where a plurality of resonators is employed.

Abstract: An optically pumped magnetometer and a magnetic sensing method are provided. The optically pumped magnetometer is an atomic magnetic sensor that measures a magnetic field at multiple locations in a single cell and that can separate and simultaneously measure magnetic information of spatially different places in a configuration in which a plurality of probe lights or pump lights are radiated. An optically pumped magnetometer and a magnetic sensing method are provided which, by radiating a relaxing light between a plurality of measurement regions constituted by a pump light and a probe light, prevent mixing of spin polarization and separate spatially different magnetic signals with high accuracy.

Abstract: Provided are an optically pumped magnetometer, comprising: at least one cell containing alkali metal atoms; a pump light optical system configured to cause pump light to enter the cell; a probe light optical system configured to cause probe light to enter the at least one cell so as to intersect with the pump light in the at least one cell; a relaxing light optical system configured to cause a plurality of relaxing lights to enter different positions in an intersection region between the pump light and the probe light; a unit configured to detect the probe light having intersected with the pump light and the plurality of relaxing lights, to thereby output a detection signal; and a unit configured to acquire information on a magnetic field intensity of each of the different positions from the detection signal.

Abstract: In a method for the optimization of multiple scan protocols for at least one magnetic resonance examination is performed by a magnetic resonance apparatus, patient data for at least one patient are recorded that includes the selection of two or more different measurements, each including at least one scan protocol, which includes at least one magnetic resonance examination. An optimized sequence of the multiple scan protocols for the two or more different measurements for the at least one magnetic resonance examination is determined by a protocol optimization computer. The optimized sequence of the multiple protocols is presented at a display monitor.