Patents Issued in March 2, 2017
  • Publication number: 20170059627
    Abstract: Operating a current sensor by conducting a current serially through a first region and a second region of an electrically conductive member. A first magnetic field produced by the current in the first region is sensed using a first magnetic field based current (MFBC) sensor having a first sensitivity. The sensitivity of a second MFBC is reduced. A second magnetic field produced by the current in the second region is sensed using the second MFBC sensor having a reduced sensitivity, in which the reduced sensitivity is lower than the first sensitivity. A magnitude of the current is calculated based on the first magnetic field and the second magnetic field. A dynamic range of the current sensor is extended by calculating a magnitude of the current using the second magnetic field after the first MFBC is saturated.
    Type: Application
    Filed: December 31, 2015
    Publication date: March 2, 2017
    Inventors: Arup Polley, Srinath Ramaswamy, Terry Lee Sculley
  • Publication number: 20170059628
    Abstract: A power detection apparatus includes: a voltage detection unit configured to detect a voltage of a component to be tested on a circuit board and output a first voltage value; a current detection unit configured to detect a current of the component to be tested and output a second voltage value; a processing unit configured to calculate a power of the component to be tested according to the first and second voltage values; the current detection unit includes a first Hall sensor, a second Hall sensor and an amplifying circuit; a negative electrode of the second Hall sensor is connected to the power supply, a positive electrode of the second Hall sensor is connected to a second input terminal of the amplifying circuit, and an output terminal of the amplifying circuit is connected to the processing unit. The power detection apparatus can realize a power measurement for Micro-power components.
    Type: Application
    Filed: June 16, 2016
    Publication date: March 2, 2017
    Inventor: Bo XU
  • Publication number: 20170059629
    Abstract: A circuit and a method for sensing a current flowing from a supply voltage into an electric load are presented. The current sensing circuit comprises a first circuit branch connected between the supply voltage and the electric load, a second circuit branch connected between the supply voltage and ground, and an equalization circuit for equalizing a first voltage drop across a first resistive element and a second voltage drop across a second resistive element and for generating an indication of a current flowing through the second circuit branch.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 2, 2017
    Inventor: Thomas Jackum
  • Publication number: 20170059630
    Abstract: A power conversion system and a method for voltage change detection, specifically, relates to a detection circuit implemented in the AC-DC power converter, detect the voltage change. The AC input voltage is rectified to convert into a DC input voltage transmitted to a detection unit generating a detection voltage signal at different logical states corresponding to the input voltage changes. A charge current source unit is used for charging the capacitor when the detection voltage signal is in a second state and a discharge current source unit is used for discharging the capacitor when the detection voltage signal is in a first state. A primary comparator compares the voltage changes of the capacitor in the alternating charge and discharge processes with a critical zero potential and outputs a detection signal identifying the changing trend of the input voltage.
    Type: Application
    Filed: November 10, 2016
    Publication date: March 2, 2017
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Yu-Ming Chen, Chih-Yuan Liu, Pei-Lun Huang
  • Publication number: 20170059631
    Abstract: An A/D converter has an analog input terminal, an analog output terminal, a digital output terminal, a first resistance comprising one end connected to the analog input terminal or a reference voltage line and another end connected to a first node, a second resistance comprising one end connected to the first node and another end connected to the analog output terminal, an operational amplifier comprising a first input terminal connected to the first node, a second input terminal connected to the reference voltage line or the analog input terminal, and an output terminal connected to the analog output terminal, a quantizer comprising an input terminal connected to the analog input terminal and an output terminal connected to the digital output terminal, and a DA converter comprising an input terminal connected to the digital output terminal and an output terminal connected to the first node.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 2, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kentaro YOSHIOKA, Tetsuro ITAKURA, Masanori FURUTA
  • Publication number: 20170059632
    Abstract: Shunt arrangements and current measuring circuits are provided for temperature compensated current measurements as well as current measurements that are compensated for changes in the characteristics of the shunt material as a result of manufacturing tolerances. The current measuring circuits may include a temperature sensing element in a negative feedback path of an operational amplifier for providing temperature compensation. The shunt arrangements may include a calibration shunt formed in the same material as a main shunt and circuitry for measuring the temperature drift error of the calibration shunt and applying that error to compensate for temperature drift of the main shunt.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 2, 2017
    Applicant: Astronics Advanced Electronic Systems Corp.
    Inventor: Igor B. Parkman
  • Publication number: 20170059633
    Abstract: In some embodiments, a power monitoring system includes: an external power supply source; a renewable energy source; a distribution board; a first power measuring device; a second power measuring device; a third power measuring device; and a server.
    Type: Application
    Filed: August 18, 2016
    Publication date: March 2, 2017
    Inventor: Sang-Ki SHON
  • Publication number: 20170059634
    Abstract: Disclosed embodiments relate to a power monitoring system that may include an external power supply source, an energy storage system and a distribution board. In some embodiments, the power monitoring system includes the external power supply source, the distribution board, the energy storage system, a first power metering device, a second power metering device, a third power metering device and a server.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 2, 2017
    Inventor: Sang-Ki SHON
  • Publication number: 20170059635
    Abstract: A test system includes a transporter having test sockets, where each test socket is configured to receive a device to be tested by the test system, and each test socket includes an element that is controllable to change a temperature of a device in the test socket through thermal conduction. The test system includes a test rack comprising slots. The transporter is configured for movement into, and out of, a slot of the test rack to test devices in the test sockets.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Applicant: TERADYNE INC.
    Inventors: Shant Orchanian, Valquirio N. Carvalho, Philip Campbell, Matthew David Pollack
  • Publication number: 20170059636
    Abstract: In a differential protection method for monitoring a line of a power grid, current indicator measured values are measured at the ends of the line and are transmitted to an evaluation device. A differential current value is formed with current indicator measured values temporally allocated to one another. The time delay between local timers of the measuring devices is used for the temporal allocation of the current indicator measured values measured at different ends. A fault signal indicating a fault affecting the line is generated if the differential current value exceeds a predefined threshold value. A check is carried out using electrical measured quantities temporally allocated to one another and a line-specific parameter to determine whether the time delay information indicates the actual time delay between the respective local timers. A time error signal is generated if erroneous time delay information is detected.
    Type: Application
    Filed: August 31, 2016
    Publication date: March 2, 2017
    Inventors: TORSTEN KERGER, ROBERT MATUSSEK
  • Publication number: 20170059637
    Abstract: Aspects of the disclosure can relate to detecting and accounting for fault conditions affecting electronic devices. In implementations, electronic devices can be coupled to one another in series with a common power line linking the electronic devices together. For example, the electronic devices can include down hole tools/equipment of a drill string. In embodiments, a system can include circuitry configured to couple a first electronic device with a second electronic device. The circuitry can detect or receive information regarding a fault condition and can set a switch to an open position, where the first electronic device and the second electronic device are electrically disconnected from one another, when a fault condition affects or is caused by the second electronic device.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 2, 2017
    Inventors: David Santoso, Burc Abdullah Simsek, Randall Paul LeBlanc, Vladimir Rubin, Bharat Narasimhan
  • Publication number: 20170059638
    Abstract: A continuity test system (100), includes a base unit (1) and a mobile unit (9). The base unit (1) is adapted to be connected to a first portion of a test item, and, the mobile unit (9) is both interconnected to said base unit (1), and adapted to be connected to a second portion of said test item. The continuity test system (100) includes a signal generator (2), adapted to generate a dual polarity measurement signal, a measurement unit (14), adapted to measure electrical parameters of said test item (16)as said dual polarity measurement signal is applied thereto, and, a processor (13, 4), to process said measured electrical parameters and provide a resultant continuity test signal output.
    Type: Application
    Filed: April 29, 2015
    Publication date: March 2, 2017
    Applicant: The Peak Group Pty Limited
    Inventors: Paul Griffiths, Darren Woodhouse
  • Publication number: 20170059639
    Abstract: A first electrical response of a capacitor bank is accessed, the capacitor bank including a plurality of capacitor units arranged in a fixed spatial relationship with each other, each capacitor unit having a nominal impedance; a test electrical signal is provided to the capacitor bank; a second electrical response of the capacitor bank is measured after providing the test electrical signal to the capacitor bank; the first electrical response of the capacitor bank and the second response of the capacitor bank are compared; and whether an impedance of one or more capacitor units in the capacitor bank has changed relative to the nominal impedance is determined based on the comparison.
    Type: Application
    Filed: August 22, 2016
    Publication date: March 2, 2017
    Inventors: Mohammad Umar Hashmi, Michael Paul Nowak, Clay Lynwood Fellers, Karl Eric Fender, Santosh Kumar Sharma, Hassan Al-Atat, Damian Antonio Gonzalez, Nudurupati Naga Vasishta Pratap
  • Publication number: 20170059640
    Abstract: A system for monitoring one or more aspects of a fuse tube assembly of a fuse cutout comprises: a housing structured to be disposed adjacent to, and coupled to the fuse tube assembly; a power source disposed in the housing; a processing unit disposed in the housing and electrically coupled to the power source; and a motion detecting unit disposed in the housing and electrically coupled to the processing unit, the motion detecting unit being structured to detect one or both of position or movement of the housing.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Applicant: COOPER TECHNOLOGIES COMPANY
    Inventors: GREGG JAMES HAENSGEN, RICHARD WILLIAM LUCAS, MICHAEL BRUCE PITEL, BRUCE DOUGLAS HOEPPNER
  • Publication number: 20170059641
    Abstract: A system for locating a ground fault in an HRG power distribution system includes an HRG pulsing system having a ground fault sensor to detect a ground fault, a pulsing contactor to introduce a pulsing current into the power distribution system, and a controller to control the pulsing contactor to introduce the pulsing current into the power distribution system in response to a ground fault detection by the ground fault sensor. Current sensors in the power distribution system monitor three-phase current signals on conductors of the power distribution system, with the current sensors positioned on distribution networks in the power distribution system and at a protection device included on each respective distribution network. A processor associated with each protection device and operably connected to the current sensors thereat receives signals from the current sensors for identifying a location of a ground fault in the power distribution system.
    Type: Application
    Filed: August 25, 2015
    Publication date: March 2, 2017
    Inventors: David Glenn Loucks, Robert Thomas Wolfe, Steven Andrew Dimino, Daniel Edward Hrncir, Deborah Kaltwasser Mort, Alec Dane Burkle
  • Publication number: 20170059642
    Abstract: A partial discharge detection board includes a voltage divider configured to attenuate a voltage of a reflected signal. A buffer is connected to the voltage divider. The buffer attenuates frequencies of the reflected signal that are greater than an upper cutoff frequency. An analog-to-digital converter is connected to the buffer. The analog-to-digital converter receives portions of the reflected signal up to the upper cutoff frequency, and the analog-to-digital converter converts the reflected signal from an analog domain to a digital domain. A filter is connected to the analog-to-digital converter. The filter attenuates frequencies of the reflected signal that are less than a lower cutoff frequency. A comparator is connected to the filter. The comparator compares the voltage of the reflected signal to a reference voltage. A counter is connected to the comparator. The counter increments when the voltage of the reflected signal is greater than the reference voltage.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 2, 2017
    Applicant: AKTIEBOLAGET SKF
    Inventors: Adam Bierman, Craig Powers
  • Publication number: 20170059643
    Abstract: The disclosure herein relates to a partial discharge detection board comprising a high voltage resistor divider. The high voltage resistor divider can reduce a voltage peak of an impulse surge generated by a surge board. The high voltage resistor divider can also include a high side with a first resistance and a low side with a second resistance.
    Type: Application
    Filed: September 2, 2015
    Publication date: March 2, 2017
    Applicant: Aktiebolaget SKF
    Inventors: Adam Bierman, Michael Hon
  • Publication number: 20170059644
    Abstract: Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages, each having a delay stage and one or more fan-out devices, and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.
    Type: Application
    Filed: September 2, 2015
    Publication date: March 2, 2017
    Inventors: Barry P. Linder, Keith A. Jenkins
  • Publication number: 20170059645
    Abstract: An addressable test circuit is configured to test parameters of a plurality of transistors. The addressable test circuit includes combination logic circuits including a plurality of gate circuits and are configured to select a device under test, a plurality of PADs, a plurality of address bus and data bus; wherein six or more of the data buses are test signal lines. A test method can employ the above address test circuit for testing parameters of a plurality of transistors, where the subthreshold leakage current Ioff and saturation current Idsat are measured in different signal lines respectively to ensure the accurate measurement of the two parameters in one circuit.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Applicant: Semitronix Corporation
    Inventors: WEIWEI PAN, YONGJUN ZHENG
  • Publication number: 20170059646
    Abstract: A semiconductor circuit having a test function is operated by applying power between a first pad and a second pad, and includes a first circuit block including a circuit for performing a main function of the semiconductor circuit; a second circuit block including a circuit for performing a function of testing the semiconductor circuit; and a diode connected in series with the second circuit block. In accordance with the semiconductor circuit having a test function, additional control pads and control signals are not required, thus suppressing an increase in the area of a semiconductor chip due to pads by reducing the number of pads.
    Type: Application
    Filed: November 11, 2014
    Publication date: March 2, 2017
    Inventor: Soo Hyoung LEE
  • Publication number: 20170059647
    Abstract: A method and apparatus for determining misregistration of internal layers of a PCB using resistance measurements is disclosed. In one embodiment, a method includes measuring a first resistance between a first center terminal and a first peripheral terminal of a first registration coupon on a printed circuit board (PCB) panel including at least one PCB. The method further includes measuring a second resistance between the first center terminal and a second peripheral terminal of the first registration coupon, wherein the first and second peripheral terminals are associated with a first internal layer of the PCB. A difference between the first and second resistances is then calculated. Then, based on this difference, a determination is made of a distance of misregistration of the first internal layer, if any, along a first axis.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 2, 2017
    Inventors: Stephanie Moran, Michael C. Freda, Karl Sauter
  • Publication number: 20170059648
    Abstract: A semiconductor apparatus includes two or more semiconductor chips and a tester. The two or more semiconductor chips are electrically connected through one or more through-silicon vias (TSVs). The tester is on at least one of the two or more semiconductor chips and tests the state of at least one TSV based on an output signal of the TSV. The TSV is selected as a signal transmission TSV based on the state of the TSV.
    Type: Application
    Filed: July 12, 2016
    Publication date: March 2, 2017
    Inventors: Seung-han WOO, Reum OH, Hae-suk LEE
  • Publication number: 20170059649
    Abstract: A method and a system including a processor performing a failure region exploration through uniform sampling of plurality of variables related to a circuit, the processor shifting probability distributions to explore failure probability, the processor estimating the failure probability and standard deviation by determining mean and standard deviation of failure probability of a circuit, the processor terminating sampling when a confidence interval bounds converge, and a peripheral device providing a report on the failure of the circuit when the sampling is terminated by the processor.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 2, 2017
    Inventors: Rajiv Vasant Joshi, Emrah Acar
  • Publication number: 20170059650
    Abstract: A wafer structure has a plurality of semiconductor die. Each semiconductor die includes circuitry, a test pad for use in testing the circuitry, and a plurality of external pins. The test pad includes first, second, third, and fourth metal lines, a via, and a metal cover that receives a probe. The first and second metal lines are in a first metal layer and run in parallel, are insulated from each other, and are adjacent. The third and fourth metal lines are in a second metal layer run in parallel, are insulated from each other, and run orthogonal to the first and second metal lines. The first via is coupled to the first metal line and the third metal line. One or more external pins are connected to the metal cover.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 2, 2017
    Inventors: David R. Tipple, Alistair J. Gorman, Anis M. Jarrar
  • Publication number: 20170059651
    Abstract: A disclosed configuration is for identifying at least one failure indicating scan test cell of a circuit-under-test, CUT, the CUT having a plurality of scan test cells, is provided. The configuration comprises generating a plurality of error signatures by means of a compactor of the CUT, wherein each of the error signatures of the plurality of error signatures consist of a respective sequence of bits comprising at least one failure indicating bit, assigning each error signature to at least a first, a second and a third signature type according to a total number of failure indicating bits of the respective error signature and mapping at least a predefined minimum number of error signatures to respective scan test cells of the plurality of scan test cells. For each error signature, a priority of the mapping is determined by the signature type the respective error signature has been assigned to.
    Type: Application
    Filed: August 25, 2015
    Publication date: March 2, 2017
    Inventors: Subhadip Kundu, Parthajit Bhattacharya, Rohit Kapur
  • Publication number: 20170059652
    Abstract: An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG interface and is thus more applicable than conventional JTAG interfaces on an integrated circuit where the availability of pins is limited. The interface may be used for a variety of serial communication operations such as, but not limited to, serial communication related integrated circuit test, emulation, debug, and/or trace operations.
    Type: Application
    Filed: November 9, 2016
    Publication date: March 2, 2017
    Inventor: Lee D. Whetsel
  • Publication number: 20170059653
    Abstract: Topology discovery of a target system having a plurality of components coupled with a scan topology may be performed by driving a low logic value on the data input signal and a data output signal of the scan topology. An input data value and an output data value for each of the plurality of components is sampled and recorded. A low logic value is then scanned through the scan path and recorded at each component. The scan topology may be determined based on the recorded data values and the recorded scan values.
    Type: Application
    Filed: November 10, 2016
    Publication date: March 2, 2017
    Inventor: Gary L. Swoboda
  • Publication number: 20170059654
    Abstract: Control events may be signaled to a target system having a plurality of components coupled to a scan path by using the clock and data signals of the scan path. While the clock signal is held a high logic level, two or more edge transitions are detected on the data signal. The number of edge transitions on the data signal is counted while the clock signal is held at the high logic state. A control event is determined based on the counted number of edge transitions on the data signal after the clock signal transitions to the low logic state.
    Type: Application
    Filed: November 10, 2016
    Publication date: March 2, 2017
    Inventor: Gary L. Swoboda
  • Publication number: 20170059655
    Abstract: The disclosure describes novel methods and apparatuses for controlling a device's TCA circuit when the device exists in a JTAG daisy-chain arrangement with other devices. The methods and apparatuses allow the TCA test pattern set used during device manufacturing to be reused when the device is placed in a JTAG daisy-chain arrangement with other devices, such as in a customers system using the device. Additional embodiments are also provided and described in the disclosure.
    Type: Application
    Filed: November 16, 2016
    Publication date: March 2, 2017
    Inventor: Lee D. Whetsel
  • Publication number: 20170059656
    Abstract: A backplane testing system includes a test backplane coupled to a test device chassis and including a first connector system, a second connector system, and channels that connect the first connector system and the second connector system. A first test device in a first test device slot on the test device chassis engages the first connector system and provides a loop back circuit for the first connector system. A second test device in a second test device slot on the test device chassis engages the second connector system. The second test device sends a test signal through a channel on the test backplane such that the test signal is provided to the loop back circuit on the first test device and received back through the channel. The second test device analyzes the test signal that is received to determine a testing compliance of the channel on the test backplane.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Inventors: Umesh Chandra, Timothy Thinh Mai
  • Publication number: 20170059657
    Abstract: Provided are switch deterioration detection device and method. More particularly, the switch deterioration detection device includes: a resistor serially connected with a battery in which charge and discharge are controlled through a switch; a first differential amplifier configured to amplify a voltage difference between both ends of the switch to output the amplified voltage difference as a first output voltage; a second differential amplifier configured to amplify a voltage difference between both ends of the resistor to output the amplified voltage difference as a second output voltage; a comparator configured to compare levels between the second and second output voltages; and a controller configured to determine whether the switch deteriorates based on the compared result of the comparator.
    Type: Application
    Filed: July 29, 2015
    Publication date: March 2, 2017
    Applicant: LG CHEM, LTD.
    Inventors: Jaedong PARK, Sang Hoon LEE, Younghwan KIM, Chang Hyun SUNG
  • Publication number: 20170059658
    Abstract: An electrical storage system includes an electrical storage device, a load, a line, a relay, a capacitor, a voltage sensor, a first insulation resistor, a second insulation resistor, a first current path, a second current path, and a controller. The capacitor has one end connected to the electrical storage device and the other end connected to a ground. The voltage sensor is configured to detect a voltage value of the capacitor. The first insulation resistor is provided between the electrical storage device and the ground. The second insulation resistor is disposed between the load and the ground. The first current path includes the first insulation resistor. The second current path includes the line and the second insulation resistor. The controller is configured to control ON and OFF of the relay.
    Type: Application
    Filed: May 11, 2015
    Publication date: March 2, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hiromasa TANAKA
  • Publication number: 20170059659
    Abstract: A battery charger is disclosed that is configured to be connected to an external battery by way of external battery cables. In accordance with an important aspect of the invention, the battery charger is configured with automatic voltage detection which automatically determines the nominal voltage of the battery connected to its battery charger terminals and charges the battery as a function of the detected nominal voltage irrespective of the nominal voltage selected by a user. Various safeguards are built into the battery charger to avoid overcharging a battery. For battery chargers with user-selectable nominal battery voltage charging modes, battery charger is configured to over-ride a user-selected battery voltage mode if it detects that the battery connected to the battery charger terminals is different than the user-selected charging mode.
    Type: Application
    Filed: November 15, 2016
    Publication date: March 2, 2017
    Inventors: John Whiting, Matthew A. Heins
  • Publication number: 20170059660
    Abstract: A client device wirelessly receives data including (i) a remaining lifetime and (ii) a charge state of a battery. The data is determined by a battery diagnostic device including a battery gauge, operatively connected to the battery, which measures a stored energy in the battery, and at least one transceiver operatively connected to the battery gauge through a microcontroller. The client device wirelessly relays the received data to a computer system connected to a network to enable the computer system, executing a battery analysis program, to determine an expected charge state of the battery at a future time.
    Type: Application
    Filed: August 24, 2015
    Publication date: March 2, 2017
    Inventors: Lindsay J. Morsillo, Joshua E. Abell, Michael D. Hirst, Rand Joseph Monteleone, Alan Edward Alpert, Rick J. Niejadlik, Fnu Vinphin Inasu, Kunduku
  • Publication number: 20170059661
    Abstract: A method and apparatus for evaluating CEW performance, in particular by evaluating a battery pack condition state via direct or indirect means. A two-tier load test for a CEW battery pack and an indirect wireless spark analysis tool are disclosed.
    Type: Application
    Filed: September 2, 2016
    Publication date: March 2, 2017
    Inventor: Ivo FOLDYNA
  • Publication number: 20170059662
    Abstract: The present disclosure relates to a method and an apparatus for estimating a discharge power of a secondary battery. The method according to the present disclosure includes setting a state of charge of a secondary battery for which estimation of discharge power is intended, discharging the secondary battery with a plurality of discharge currents while measuring a discharge termination voltage corresponding to each of the discharge currents, generating a current-voltage (I-V) profile that at least forms a point of intersection with the preset discharge boundary condition, and determining a discharge power using a current value and a voltage value corresponding to the point of intersection.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 2, 2017
    Applicant: LG CHEM, LTD.
    Inventors: Sun-Young CHA, Won-Tae JOE
  • Publication number: 20170059663
    Abstract: An AC component ?I addition unit of a diagnostic device superimposes an alternating current on an output current of a fuel cell. A Zn calculation unit calculates a cell impedance with respect to the alternating current with regard to any of a plurality of cells. A diagnosis unit diagnoses that any cell is subjected to hydrogen deficiency when an absolute value of the cell impedance exceeds (absolute value of a reference impedance+a predetermined value ?). It is diagnosed that any cell is subjected to oxygen deficiency when the absolute value of the cell impedance is smaller than (absolute value of the reference impedance?a predetermined value ?).
    Type: Application
    Filed: August 19, 2016
    Publication date: March 2, 2017
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, NIPPON SOKEN, INC.
    Inventors: Yuji ISHIKAWA, Takashi YAMAMOTO, Shigeki HASEGAWA, Syuya KAWAHARA
  • Publication number: 20170059664
    Abstract: Provided is a method by which the sorting as to whether a spent nonaqueous electrolyte secondary battery with the degraded input/output characteristics can be reused can be realized more accurately by taking into consideration the degradation of the input/output characteristics which is caused by the salt concentration unevenness and liquid shortage in the electrode body.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 2, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Toshihiko MITSUHASHI
  • Publication number: 20170059665
    Abstract: A server apparatus obtains, via an information terminal wirelessly connected to an electrical-power storage device, a value indicating a state of the electrical-power storage device at an end of use of electric equipment having the electrical-power storage device. The server apparatus further obtains, via the information terminal wirelessly connected with the electrical-power storage device, a value indicating the state of the electrical-power storage device at a start of the use of the electric equipment. The server apparatus then detects an abnormality in the electrical-power storage device by using the value indicating the state of the electrical-power storage device at the end of the use and the value indicating the state of the electrical-power storage device at the start of the use.
    Type: Application
    Filed: July 28, 2016
    Publication date: March 2, 2017
    Inventor: SHOICHI TOYA
  • Publication number: 20170059666
    Abstract: Offsets (short and long term) are significantly reduced in a Lorentz force magnetometer circuit. A modulated bias current supplied to the magnetometer is chopped by periodically switching its polarity. Magnetometer output is demodulated, then de-chopping performed to restore signal polarity output. Chopping of the bias current signal polarity modulates magnetic field signal to a frequency in which electrostatic force remains constant toward eliminating offset and long-term drift from said micromechanical resonator.
    Type: Application
    Filed: June 2, 2016
    Publication date: March 2, 2017
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: David Horsley, Mo Li
  • Publication number: 20170059667
    Abstract: A magnetic field sensor generates signal components corresponding to an uncalibrated representation of a sensed magnetic field in a three-dimensional coordinate system. A reader coupled to the magnetic field sensor determines a center offset based on received signal components, adjusts the received signal components based on the determined center offset, and applies Kalman filtering to the adjusted signal components, generating a set of ellipsoid parameters. The reader generates calibrated signal components based on the determined center offset and the generated set of ellipsoid parameters.
    Type: Application
    Filed: March 21, 2016
    Publication date: March 2, 2017
    Inventors: Rossella Bassoli, Carlo Crippa
  • Publication number: 20170059668
    Abstract: A single bridge magnetic field sensor includes a fluxguide mounted to a surface of a substrate. A bridge unit includes first, second, third, and fourth magnetoresistive elements mounted around the fluxguide and mounted on the surface of the substrate. A switching circuit is electrically connected to two voltage inputs, two grounding terminals, two voltage output terminals, and the four magnetoresistive elements. The switching circuit can proceed with circuit switching according to a magnetic field in each axis direction to be measured, thereby changing electrical connection between the voltage inputs, the grounding terminals, the voltage output terminals, and the four magnetoresistive elements. A measuring unit is electrically connected to the two voltage output terminals and the four magnetoresistive elements.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: CHING-RAY CHANG, JEN-TZONG JENG, JEN-HWA HSU, CHIH-CHENG LU, BOR-LIN LAI, VAN-SU LUONG
  • Publication number: 20170059669
    Abstract: A method and apparatus for testing a magnetic memory device is provided. The method begins when a magnetic field enhancing backing plate is installed in the test fixture. The magnetic field enhancing backing plate may be installed in the wafer chuck of a wafer testing probe station. The magnetic memory device is installed in the test fixture and a magnetic field is applied to the magnetic memory device. The magnetic field may be applied in-plane or perpendicular to the magnetic memory device. The performance of the magnetic memory device may be determined based on the magnetic field applied to the device. The apparatus includes a magnetic field enhancing backing plate adapted to fit a test fixture, possibly in the wafer chuck. The magnetic field enhancing backing plate is fabricated of high permeability magnetic materials, such as low carbon steel, with a thickness based on the magnetic field used in testing.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 2, 2017
    Inventors: Jimmy Kan, Matthias Georg Gottwald, Chando Park, Seung Hyuk Kang
  • Publication number: 20170059670
    Abstract: A method and system for determining a maximum function for a magnetic resonance imaging scanner. The maximum function indicates the upper bound of a magnetic field magnitude in an examination volume in dependence on activation signals of magnetic coils acting on the examination volume. The examination volume is divided into a plurality of partial volumes. The method determines matrices (MB), which, when multiplied by a vector of the activation signals of the magnetic coils, indicate a resultant square of the magnetic field magnitude for each partial volume.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 2, 2017
    Inventors: Matthias Gebhardt, Gudrun Ruyters
  • Publication number: 20170059671
    Abstract: A medical imaging apparatus has a scanner and a housing for the scanner. The scanner housing has at least one housing shell that has at least one first layer and at least one second layer. The at least one first layer has at least one stiffening element and the at least one second layer has a layer element with at least a portion thereof that is translucent.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Siemens Healthcare GmbH
    Inventor: Bernd Maciejewski
  • Publication number: 20170059672
    Abstract: An obturator as part of a biopsy system enhances use with Magnetic Resonance Imaging (MRI) by indicating location of a side aperture in an encompassing cannula. The cannula (e.g., detached probe, sleeve sized to receive a core biopsy probe) includes a side aperture for taking a tissue sample. When the obturator is inserted in lieu of the biopsy device into the cannula, a notch formed in a shaft of the obturator corresponds to the side aperture. A dugout trough into the notch may further accept aqueous material to further accentuate the side aperture. In addition, a series of dimensionally varied apertures (e.g., wells, slats) that communicate through a lateral surface of the shaft and that are proximal to the side aperture receive an aqueous material to accentuate visibility in an MRI image, even in a skewed MRI slice through the cannula/obturator.
    Type: Application
    Filed: November 11, 2016
    Publication date: March 2, 2017
    Inventors: Timothy G. Dietz, Keshava Datta, John A. Hibner, Michael A. Murray, Robert J. Hughes
  • Publication number: 20170059673
    Abstract: The invention relates to a method and apparatus for characterising samples under high pressure and/or high temperature temperatures using NMR. The apparatus comprises a confined pressure chamber; a NMR coil positioned within the chamber and configured to receive a sample in a sample position inside the NMR coil; and a pressure applicator configured to apply a pressure within the pressure chamber, thereby allowing NMR measurements to be made of a sample in the sample position at the applied pressure and temperature using the NMR coil.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: PERM Instruments Inc.
    Inventors: APOSTOLOS KANTZAS, Serguei I. Krioutchkov, Zheng Yin Wang
  • Publication number: 20170059674
    Abstract: A magnetic resonance imaging (MRI) device includes at least one switching cell that uses a first switcher to switch paths for two of four radio frequency (RF) signals is used to output the two RF signals. The MRI device includes RF coils including a plurality of coils for receiving RF signals from an object to which magnetic fields are applied; an image processor for creating a magnetic resonance image based on the received RF signals; and a switching unit for switching connections between a plurality of input ports connectable to the plurality of coils and a plurality of output ports connectable to the image processor, wherein the switching unit includes at least one switching cell including four input ports, two output ports connected to two of the four input ports, and a first switcher for switching between paths extended from second and third input ports among the four input ports.
    Type: Application
    Filed: June 20, 2016
    Publication date: March 2, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong Yean KOH, Han Lim LEE
  • Publication number: 20170059675
    Abstract: Methods and systems are provided for a variable wire dimension gradient coil. In one example, a gradient coil includes a length of coiled wire, the wire comprising a first segment having a first width and a second segment having a second width, the second width smaller than the first width.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 2, 2017
    Inventors: Sung Man Moon, Shahed Ashraf, William Louis Einziger, Derek Allan Seeber
  • Publication number: 20170059676
    Abstract: A gradient coil comprises a curved conductor, which is tubular and has a general spiral shape. The curved conductor is formed by a process comprising depositing at least one non-conductive material layer by layer to form a substrate, and coating at least a portion of a surface of the substrate with a conductive material. The substrate has a shape matching with the general spiral shape of the curved conductor. Embodiments of the present disclosure further refer to a method for manufacturing the gradient coil.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Inventors: Yanzhe Yang, Steven Robert Hayashi, Kevin Warner Flanagan, Prabhjot Singh, Jian Lin, Jean-Baptiste Mathieu, Kenneth Paul Zarnock, Thomas Kwok-Fah Foo