Patents Issued in March 7, 2017
  • Patent number: 9590128
    Abstract: A particle detector having a support member. A front electrode layer is disposed over the support member. A semiconductor junction having at least an n-type layer and at least a p-type layer is disposed over the front electrode layer. A back electrode layer is disposed over the semiconductor junction. The back electrode layer has a thickness which is selected to permit particles having energies in the range from about 0.5 MeV to about 5 MeV to enter the semiconductor junction.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: March 7, 2017
    Assignee: LITHIUM INNOVATIONS COMPANY, LLC
    Inventors: Ford B. Cauffiel, Alvin D. Compaan, Victor V. Plotnikov, Paul G. Chamberlin, John M. Stayancho, Ambalanath Shan
  • Patent number: 9590129
    Abstract: An optical sensor module is disclosed. The optical sensor module can include a housing comprising an air cavity. An optical emitter die can be disposed in the air cavity of the housing. A top surface of the optical emitter die can face a first side of the housing, the optical emitter die configured to emit light towards the first side of the housing. An optical sensor die can be disposed in the air cavity of the housing adjacent the optical emitter die. The optical sensor die can be spaced from the optical emitter die by a lateral distance. A top surface of the optical sensor die can face the first side of the housing. There may be no septum between the optical sensor die and the optical emitter die that optically separates the optical sensor die and the optical emitter die.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: March 7, 2017
    Assignee: Analog Devices Global
    Inventors: Shrenik Deliwala, Ying Zhao, Seokphyo Chun
  • Patent number: 9590130
    Abstract: A device, system, and method for solar cell construction and bonding/layer transfer are disclosed herein. An exemplary structure of solar cell construction involves providing a monocrystalline donor layer. A solder bonding layer bonds the donor layer to a carrier substrate. A porous layer may be used to separate the donor layer.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: March 7, 2017
    Assignee: AMBERWAVE INC.
    Inventors: Anthony Lochtefeld, Chris Leitz, Mark Carroll
  • Patent number: 9590131
    Abstract: Systems and Methods for Advanced Ultra-High-Performance InP Solar Cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: March 7, 2017
    Assignee: Alliance for Sustainable Energy, LLC
    Inventor: Mark Wanlass
  • Patent number: 9590132
    Abstract: A string-forming system is described. The string-forming system may include at least a first cell-lifting mechanism and a second cell-lifting mechanism that can automatically arrange a set of strips of a photovoltaic structure into a cascaded formation. During operation, a controller can cause the first cell-lifting mechanism to lift a first strip from a first platform, and can cause the second cell-lifting mechanism to lift, from the first platform, a second strip that may follow the first strip on the first platform. The controller may then activate a first shifting actuator of the first cell-lifting mechanism or a second shifting actuator of the second cell-lifting mechanism to place a leading edge of the second strip above a trailing edge of the first strip.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 7, 2017
    Assignee: SolarCity Corporation
    Inventors: Pablo Gonzalez, Bobby Yang
  • Patent number: 9590133
    Abstract: Material and antireflection structure and methods of manufacturing are provided that produce efficient photovoltaic power conversion from thin film solar cells on flexible substrates. Step-graded antireflection structures are placed on the front of the device structure. Materials of different energy gap are combined in the depletion region of at least one of the semiconductor junctions within the thin film device structure. Conductive, low refractive index layers are deposited on the bottom of the thin film device structure to form an omni-directional back reflector contact.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: March 7, 2017
    Assignee: Magnolia Solar, Inc.
    Inventors: Roger E. Welser, Ashok K. Sood
  • Patent number: 9590135
    Abstract: A superluminescent diode and a method for implementing the same, wherein the method includes growing a first epi layer on top of an SI (semi-insulating substrate); re-growing a butt based on the first epi layer; forming a tapered SSC (spot size converter) on the re-grown butt layer; forming an optical waveguide on an active area that is based on the first epi layer and on an SSC area that is based on the tapered SSC; forming an RWG on the optical waveguide; and forming a p-type electrode and an n-type electrode.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: March 7, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Su Hwan Oh, Min Su Kim
  • Patent number: 9590136
    Abstract: A semiconductor device includes a series of layers formed on a substrate, including a first plurality of n-type layers, a second plurality of layers that form a p-type modulation doped quantum well structure (MDQWS), a third plurality of layers disposed between the p-type MDQWS and a fourth plurality of layers that form an n-type MDQWS, and a fifth plurality of p-type layers. The first plurality of layers includes a first etch stop layer of n-type formed on an n-type contact layer. The third plurality of layers includes a second etch stop layer formed above the p-type MDQWS and a third etch stop layer formed above and offset from the second etch stop layer. The fifth plurality of layers includes a fourth etch stop layer of p-type formed above the n-type MDQWS and a fifth etch stop layer of p-type doping formed above and offset from the fourth etch stop layer.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: March 7, 2017
    Assignees: Opel Solar, Inc., THE UNIVERSITY OF CONNECTICUT
    Inventor: Geoff W. Taylor
  • Patent number: 9590137
    Abstract: A light-emitting diode (LED) includes a first type semiconductor layer, a second type semiconductor layer, a current controlling structure, a first electrode, and a second electrode. The second type semiconductor layer is joined with the first type semiconductor layer. The current controlling structure is joined with the first type semiconductor layer, and the current controlling structure has at least one current-injecting zone therein. The first electrode is electrically coupled with the first type semiconductor layer through the current-injecting zone of the current controlling structure. The second electrode is electrically coupled with the second type semiconductor layer.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: March 7, 2017
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventors: Li-Yi Chen, Pei-Yu Chang, Chih-Hui Chan, Chun-Yi Chang, Shih-Chyn Lin, Hsin-Wei Lee
  • Patent number: 9590138
    Abstract: A GaN based LED epitaxial structure and a method for manufacturing the same. The GaN based LED epitaxial structure may include: a substrate; and a GaN based LED epitaxial structure grown on the substrate, wherein the substrate is a substrate containing a photoluminescence fluorescent material. The photoelectric efficiency of the LED epitaxial structure is enhanced and the amount of heat generated from a device is reduced by utilizing a rare earth element doped Re3Al5O12 substrate; since the LED epitaxial structure takes a fluorescence material as a substrate, a direct white light emission may be implemented by such an LED chip manufactured by the epitaxial structure, so as to simplify the manufacturing procedure of the white light LED light source and to reduce production cost. The defect density of the epitaxial structure is reduced by firstly epitaxial growing, patterning the substrate and then laterally growing a GaN based epitaxial structure.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: March 7, 2017
    Assignee: FUJIAN INSTITUTE OF RESEARCH ON THE STRUCTURE OF MATTER, CHINESE ACADEMY OF SCIENCES
    Inventors: Yongge Cao, Zhuguang Liu, Zhonghua Deng, Jian Chen, Junting Li, Binjie Fei, Wang Guo, Fei Tang, Qiufeng Huang, Xuanyi Yuan
  • Patent number: 9590139
    Abstract: A light emitting module including a driving unit and a light emitting diode is provided. The light emitting diode is electrically connected to the driving unit and the driving unit provides an operating current to make the light emitting diode emit light. The light emitting diode includes an n-type semiconductor layer, a light-emitting layer, an electron-blocking layer, and a p-type semiconductor layer. The electron-blocking layer has a thickness, and the thickness is smaller than or equal to 30 nm or is larger than or equal to 80 nm. The light-emitting layer is located between the electron-blocking layer and the n-type semiconductor layer. The electron-blocking layer is located between the p-type semiconductor layer and the light-emitting layer. A ratio of current density of the light emitting diode to the thickness is larger than 0 and is smaller than or equal to 2.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: March 7, 2017
    Assignee: PlayNitride Inc.
    Inventors: Yen-Lin Lai, Jyun-De Wu
  • Patent number: 9590140
    Abstract: An LED optimized for use in low-cost gas or other non-solid substance detection systems, emitting two wavelengths (“colors”) of electromagnetic radiation from the same aperture is disclosed. The LED device emits a light with a wavelength centered on an absorption line of the target detection non-solid substance, and also emits a reference line with a wavelength that is not absorbed by a target non-solid substance, while both wavelengths are transmitted through the atmosphere with low loss. Since the absorption and reference wavelengths are emitted from the same exact aperture, both wavelengths can share the same optical path, reducing the size and cost of the detector while also reducing potential sources of error due to optical path variation.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: March 7, 2017
    Inventors: Sergey Suchalkin, Gregory Belenky, Leon Shterengas, David Westerfeld
  • Patent number: 9590141
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: March 7, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 9590142
    Abstract: A light emitting diode including a magnetic structure and a method of fabricating the same are disclosed. The magnetic structure composed of passivation layers and a magnetic layer is disposed inside a luminous structure composed of an active layer and a semiconductor layer. In the light emitting diode, the magnetic structure including the magnetic layer is disposed on a side surface of the active layer to improve recombination rate of charge carriers for light emission by increasing influence of a magnetic field applied to the active layer. In addition, the light emitting diode according to the present invention allows change in position of the magnetic structure including the magnetic layer depending upon an etched shape of the luminous structure, thereby realizing various magnetic field distributions.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: March 7, 2017
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Seong-Ju Park, Youngchul Leem, Jae-Joon Kim
  • Patent number: 9590143
    Abstract: This disclosure discloses a light-emitting chip comprises: a light-emitting stack, having a side wall, comprising an active layer emitting light; and a light-absorbing layer having a first portion surrounding the side wall and being configured to absorb 50% light toward the light-absorbing layer.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: March 7, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Tzu-Chieh Hsu, Fu-Chun Tsai, Yi-Wen Huang, Chih-Chiang Lu
  • Patent number: 9590144
    Abstract: A light emitting device including a light emitting structure disposed on one surface of a substrate and a transflective portion disposed on the other surface of the substrate. The transflective portion and the substrate have different indexes of refraction from one another.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: March 7, 2017
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jong Hyeon Chae, Chung Hoon Lee, Daewoong Suh, Jong Min Jang, Joon Sup Lee, Won Young Roh, Min Woo Kang, Hyun A Kim, Seon Min Bae
  • Patent number: 9590146
    Abstract: A method for fabricating an LED/phosphor structure is described where an array of blue light emitting diode (LED) dies are mounted on a submount wafer. A phosphor powder is mixed with an organic polymer binder, such as an acrylate or nitrocellulose. The liquid or paste mixture is then deposited over the LED dies or other substrate as a substantially uniform layer. The organic binder is then removed by being burned away in air, or being subject to an O2 plasma process, or dissolved, leaving a porous layer of phosphor grains sintered together. The porous phosphor layer is impregnated with a sol-gel (e.g., a sol-gel of TEOS or MTMS) or liquid glass (e.g., sodium silicate or potassium silicate), also known as water glass, which saturates the porous structure. The structure is then heated to cure the inorganic glass binder, leaving a robust glass binder that resists yellowing, among other desirable properties.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: March 7, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Josephus Paulus Augustinus Deeben, Patrick Henricus Johannes Van Stijn
  • Patent number: 9590147
    Abstract: A method of producing a conversion element includes forming a preform from a glass, reshaping the preform into a structured glass fiber using a structuring element, and dividing the glass fiber into conversion elements.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: March 7, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Mikael Ahlstedt
  • Patent number: 9590148
    Abstract: Heavily phosphor loaded LED packages having higher stability and a method for increasing the stability of heavily phosphor loaded LED packages. The silicone content of the packages is increased by decreasing the amount of one phosphor of the blend or by increasing the thickness of the silicone phosphor blend layer.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: March 7, 2017
    Assignee: GE Lighting Solutions, LLC
    Inventors: Ashfaqul Islam Chowdhury, Gary Robert Allen, Dengke Cai
  • Patent number: 9590149
    Abstract: A light emitting device is disclosed. The light emitting device includes: a light emitting diode emitting light having a peak wavelength in the range of 415 nm to 435 nm; and a wavelength conversion unit disposed on the light emitting diode, wherein the wavelength conversion unit includes cyan phosphors emitting light having a peak wavelength in a cyan light wavelength band and red phosphors emitting light having a peak wavelength in a red light wavelength band, and a ratio of an output of light having a wavelength in the range of 435 nm to 465 nm to a total output of light emitted from the light emitting device is approximately equal to or less than 3%.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: March 7, 2017
    Assignee: SEOUL SEMICONDUCTOR CO., LTD.
    Inventors: Michael Lim, Hyuck Jung Choi, Kwang Yong Oh, Myung Jin Kim, Ki Bum Nam, Sang Shin Park, Ji Youn Oh
  • Patent number: 9590150
    Abstract: In order to provide a light-emitting device having improved color rendering properties, a light-emitting device which uses a SiC fluorescent material comprises a first SiC fluorescent portion in which a donor impurity and an acceptor impurity are added and which is formed of a SiC crystal; a second SiC fluorescent portion which is formed of a SiC crystal in which the same donor impurity as the first SiC fluorescent portion and the same acceptor impurity as the first SiC fluorescent portion are added, and in which a concentration of the acceptor impurity is higher than the concentration of the acceptor impurity in the first SiC fluorescent portion and an emission wavelength is longer than that of the first SiC fluorescent portion; and a light-emitting portion that emits excitation light that excites the first SiC fluorescent portion and the second SiC fluorescent portion.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: March 7, 2017
    Assignee: EL-SEED CORPORATION
    Inventors: Johan Ekman, Atsushi Suzuki, Fumiharu Teramae, Tomohiko Maeda, Koichi Naniwae
  • Patent number: 9590151
    Abstract: A method is provided for producing a plurality of radiation-emitting semiconductor chips, having the following steps: providing a plurality of semiconductor bodies (1) which are suitable for emitting electromagnetic radiation from a radiation exit face (3), applying the semiconductor bodies (1) to a carrier (2), applying a first mask layer (4) to regions of the carrier (2) between the semiconductor bodies (1), applying a conversion layer (5) to the entire surface of the semiconductor bodies (1) and the first mask layer (4) using a spray coating method, and removing the first mask layer (4), such that in each case a conversion layer (5) arises on the radiation exit faces (3) of the semiconductor bodies (1).
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: March 7, 2017
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Markus Richter, Alexander Baumgartner, Hans-Christoph Gallmeier, Tony Albrecht
  • Patent number: 9590152
    Abstract: A light emitting device includes a substrate, a light emitting device and a sealing resin member. The substrate includes a flexible base, a plurality of wiring portions, a groove portion and a pair of terminal portions. The flexible base extends in a first direction corresponding to a longitudinal direction of the substrate and the plurality of wiring portions are arranged on the flexible base. The groove portion is formed between the plurality of wiring portions spaced apart from each other. The pair of terminal portions is arranged along the first direction at the both sides of the plurality of wiring portions. The light emitting element is disposed on the substrate and electrically connected to the plurality of wiring portions. The sealing resin member seals the light emitting element and a part of the substrate. The light emitting element is mounted on the substrate in a flip-chip manner.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: March 7, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Motokazu Yamada, Tadaaki Miyata, Naoki Mori
  • Patent number: 9590153
    Abstract: A display device in which light leakage in a monitor element portion is prevented without increasing the number of steps and cost is provided. The display device includes a monitor element for suppressing influence on a light-emitting element due to temperature change and change over time and a TFT for driving the monitor element, in which the TFT for driving the monitor element is provided so as not to overlap the monitor element. Furthermore, the display device includes a first light shielding film and a second light shielding film, in which the first light shielding film is provided so as to overlap a first electrode of the monitor element and the second light shielding film is electrically connect to the first light shielding film through a contact hole formed in an interlayer insulating film. The contact hole is formed so as to surround the outer edge of the first electrode of the monitor element.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: March 7, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Takahashi, Mizuki Sato
  • Patent number: 9590154
    Abstract: A wiring substrate includes an insulation layer, separated wires formed on a first surface of the insulation layer, a first plating layer formed on a first surface of each of the wires, a reflection layer including a first opening that exposes at least a portion of the first plating layer as a connection pad, and an electronic component mounted on a second surface of each of the wires, which is located on an opposite side of the first surface of each of the wires. The electronic component is embedded in the insulation layer.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: March 7, 2017
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Yasuyoshi Horikawa
  • Patent number: 9590155
    Abstract: Light emitting devices and substrates are provided with improved plating. In one embodiment, a light emitting device can include a submount and one or more light emitting diodes (LED) chips disposed over the submount. In one embodiment, the submount can include a copper (Cu) substrate, a first metallic layer of material that is highly reflective disposed over the Cu substrate for increased brightness of the device, and a second metallic layer disposed between the Cu substrate and the first metallic layer for forming a barrier therebetween.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 7, 2017
    Assignee: Cree, Inc.
    Inventors: Christopher P. Hussell, Jesse Colin Reiherzer, Erin Welch
  • Patent number: 9590156
    Abstract: The present invention provides a light-emitting diode (LED) package including: a substrate on which a set of bonding pads are formed; an LED element configured to provide light of a predetermined wavelength region, having a set of chip pads formed on a top surface thereof and being attached on a top surface of the substrate; a set of gold wires connecting the bonding pads of the substrate with the chip pads of the LED element; a phosphor layer formed in a cap shape having side and top portions of a uniform thickness and being configured to surround sides and a top surface of the LED element while being spaced apart therefrom; and a filler disposed to fill a space formed between the phosphor layer and the LED element, wherein the LED element, the gold wires, and the bonding pads of the substrate are under the phosphor layer cap.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: March 7, 2017
    Assignee: LIGHTIZER KOREA CO.
    Inventors: Jae Sik Min, Jae Young Jang, Jae Yeop Lee, Byoung Gu Cho
  • Patent number: 9590157
    Abstract: A method of forming contacts to an n-type layer and a p-type layer of a semiconductor device includes depositing a dielectric layer on the n-type layer and the p-type layer. A pattern is formed in the dielectric layer, the pattern having a plurality of metal contact patterns for the semiconductor device. A first metal layer is deposited into the plurality of metal contact patterns, and a second metal layer is deposited directly on the first metal layer. External contacts for the semiconductor device are formed, where the external contacts include the second metal layer.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: March 7, 2017
    Assignee: The Silanna Group Pty Ltd
    Inventors: Johnny Cai Tang, Christopher Flynn
  • Patent number: 9590158
    Abstract: A light emitting device, includes: a package equipped with a lead having an upper surface and a lower surface, and a metal board and a plating layer, the upper surface including a mounting portion, the metal board whose main component is copper, the plating layer including a first plating layer and a second plating layer which are provided on the lower surface of the metal board, the first plating layer containing silver and nickel and being formed on the edge of the metal board, and the second plating layer containing no nickel and being formed on at least part of a region below the mounting portion, a molded resin that holds the lead so that the lower face of the lead is exposed to the outside; a light emitting element mounted on the mounting portion; and a sealing member that seals the light emitting element.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 7, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Tomohide Miki
  • Patent number: 9590159
    Abstract: Apparatuses, methods, and systems are disclosed to use thermoelectric generating (TEG) devices to generate electricity from heat generated by a power cable. An apparatus includes multiple thermoelectric generating (TEG) devices. Each of the TEG devices has a first surface configured to be positioned in thermal communication with an outer surface of the power cable and a second surface configured to be positioned proximate to an ambient environment around the power cable. The apparatus also includes a set of terminals electrically coupled to the TEG devices. When a temperature differential exists between the first surface and the second surface, the TEG devices convert heat into electricity presented at the set of terminals.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: March 7, 2017
    Assignee: THE BOEING COMPANY
    Inventors: Lijun Gao, Shengyi Liu, John M. Fifield
  • Patent number: 9590160
    Abstract: The invention relates to a thermoelectric-based power generation system designed to be clamped onto the outer wall of a steam pipe or other heating pipe. The system can include a number of assemblies mounted on the sides of a pipe. Each assembly can include a hot block, an array of thermoelectric modules, and a cold block system. The hot block can create a thermal channel to the hot plates of the modules. The cold block can include a heat pipe onto which fins are attached.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: March 7, 2017
    Assignee: COOPER UNION FOR THE ADVANCEMENT OF SCIENCE
    Inventors: Robert Dell, Chih-Shing Wei, George Sidebotham
  • Patent number: 9590161
    Abstract: A method of forming a superconductor includes exposing a layer disposed on a substrate to an oxygen ambient, and selectively annealing a portion of the layer to form a superconducting region within the layer.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: March 7, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Connie P. Wang, Paul Murphy, Paul Sullivan, Sukti Chatterjee
  • Patent number: 9590162
    Abstract: A piezoelectric vibration component and a portable terminal each include a piezoelectric vibration element 14 and a power supply line 51. The piezoelectric vibration element 14 includes at least: a layered structure 20 in which a plurality of internal electrodes and piezoelectric layers are layered in a first direction; and surface electrodes 33 and 31 electrically connected to the internal electrodes. The piezoelectric vibration element 14 bends and vibrates, and its amplitude changes in a second direction perpendicular to the first direction. The power supply line 51 includes at least: a conductive path 53 including a connection part 56 bonded to a surface electrode 33; and a conductive path 52 including a connection part 57 bonded to a surface electrode 31. The connection part 56 has a plurality of partial electrodes 56a and 56b that extend in a third direction perpendicular to both the first direction and the second direction.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: March 7, 2017
    Assignee: KYOCERA CORPORATION
    Inventors: Yasuhito Fujii, Satoru Iwasaki, Harumi Hayashi, Kenji Yamakawa
  • Patent number: 9590163
    Abstract: The invention relates to an electronic component having a layer sequence, which comprises at least a first electrode (10), a second electrode (20) and an active region (30) and contains monoatomic carbon layers at least in sub-regions.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: March 7, 2017
    Assignee: EPCOS AG
    Inventors: Edgar Schmidhammer, Gudrun Henn
  • Patent number: 9590164
    Abstract: An actuator assembly includes a housing and an actuator arranged within the housing, the actuator including a first part and a second part movable relative to the first part. An insulating material is disposed within the housing, the insulating material encapsulating at least the movable part of the actuator.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: March 7, 2017
    Assignee: Parker-Hannifin Corporation
    Inventor: Yufeng Qi
  • Patent number: 9590165
    Abstract: An acoustic resonator structure comprises a first electrode disposed on a substrate, a piezoelectric layer disposed on the first electrode and comprising aluminum scandium nitride, a second electrode disposed on the piezoelectric layer, and a temperature compensation feature having a temperature coefficient offsetting at least a portion of a temperature coefficient of the piezoelectric layer, the first electrode, and the second electrode.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 7, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Qiang Zou, Chris Feng, Phil Nikkel, Kevin J. Grannen, Tangshiun Yeh, Dariusz Burak, John Choy, Tina L. Lamers
  • Patent number: 9590166
    Abstract: A vibrator equipped with a piezoelectric element includes a vibrating member which is formed into a flat type and of which both ends are coupled to an object; a piezoelectric element which is coupled to an upper or lower surface of the vibrating member; and a power supply part which supplies power to the piezoelectric element, wherein the vibrating member includes an operating part including a first operating surface which is disposed horizontally and a second operating surface which is bent down and extended from both ends of the first operating surface; and a fixing part which is extended from the both ends of the operating so as to be coupled to the object.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: March 7, 2017
    Assignee: HYSONIC. CO., LTD.
    Inventors: He Won Jung, Jong Sik Seo, Se Jun Chun, Min Gi Kim
  • Patent number: 9590167
    Abstract: A piezoelectronic transistor device includes a first piezoelectric (PE) layer, a second PE layer, and a piezoresistive (PR) layer arranged in a stacked configuration, wherein an electrical resistance of the PR layer is dependent upon an applied voltage across the first and second PE layers by an applied pressure to the PR layer by the first and second PE layers. A piezoelectronic logic device includes a first and second piezoelectric transistor (PET), wherein the first and second PE layers of the first PET have a smaller cross sectional area than those of the second PET, such that a voltage drop across the PE layers of the first PET creates a first pressure in the PR layer of the first PET that is smaller than a second pressure in the PR layer of the second PET created by the same voltage drop across the PE layers of the second PET.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: March 7, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce G. Elmegreen, Glenn J. Martyna, Dennis M. Newns
  • Patent number: 9590168
    Abstract: An alkali niobate-based piezoelectric material having the general formula {(K1-aNaa)1-bLib}(Nb1-c-dTacSbd)O3+x mol % BanTiO3+y mol % CuO, where 0?a?0.9, 0?b?0.3, 0<c?0.5, 0?d?0.1, 0.5?x<10.0, 0.1?y?8.0, and 0.9?n?1.2.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: March 7, 2017
    Assignee: FDK Corporation
    Inventors: Ryosuke Kobayashi, Akihiro Mitani, Yoshinari Oba
  • Patent number: 9590169
    Abstract: There are provided a drive device and the like that are capable of suppressing characteristic degradation according to ambient environment. The drive device includes one or a plurality of polymer actuator devices each configured using an ion-exchange resin, and the ion-exchange resin contains operating ions that have activation energy equal to or smaller than a predetermined threshold. Degradation in ion conductivity in the ion-exchange resin is suppressed even in environment with low humidity, high temperature, and the like.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: March 7, 2017
    Assignee: Dexterials Corporation
    Inventors: Takehisa Ishida, Nobuyuki Nagai, Yusaku Kato
  • Patent number: 9590170
    Abstract: A method of fabricating an acoustic wave device includes: bonding a support substrate to a piezoelectric substrate on which an IDT is to be formed; forming a modified region in the support substrate by irradiation of a laser beam; and cutting the support substrate and the piezoelectric substrate in the modified region, wherein a distance from a boundary face between the support substrate and the piezoelectric substrate to an edge portion of the modified region at the boundary face side is greater than or equal to 20 ?m and less than 69 ?m.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: March 7, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yohei Shimizu
  • Patent number: 9590171
    Abstract: An electronic device in accordance with this technology includes semiconductor memory. The semiconductor memory may include a magnetization-pinned layer configured to include a first magnetic layer, a second magnetic layer, and a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer, a free magnetization layer spaced apart from the magnetization-pinned layer, a tunnel barrier layer interposed between the magnetization-pinned layer and the free magnetization layer, and a magnetic spacer configured to come in contact with a side of the first magnetic layer and at least part of a side of the second magnetic layer.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: March 7, 2017
    Assignee: SK hynix Inc.
    Inventors: Jin-Ho Lee, Ki-Seon Park
  • Patent number: 9590172
    Abstract: A sensing device is provided. The sensing device includes a semiconductor layer, a first electrode and a second electrode, a first detection electrode and a second detection electrode, and at least one conductive pattern. The first electrode and the second electrode are disposed at opposite ends of the semiconductor layer. The first detection electrode and the second detection electrode are disposed at the other opposite ends of the semiconductor layer, wherein a virtual connection line is provided through the first detection electrode and the second detection electrode. The at least one conductive pattern is disposed on the semiconductor layer, wherein the conductive pattern does not overlap with the virtual connection line.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: March 7, 2017
    Assignee: Au Optronics Corporation
    Inventors: Chih-Che Kuo, Tokuro Ozawa, Koji Aoki, Chia-Wei Chang
  • Patent number: 9590173
    Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayoshi Iwayama
  • Patent number: 9590174
    Abstract: According to one embodiment, a manufacturing method of a magnetoresistive memory device includes forming a first magnetic layer on a substrate, forming a magnetoresistive effect element on the first magnetic layer, forming a mask on a part of the magnetoresistive effect element, selectively etching the magnetoresistive effect element using the mask, forming a sidewall insulating film on a sidewall of the magnetoresistive effect element exposed by the etching, selectively etching the first magnetic layer using the mask and the sidewall insulating film and forming a deposition layer containing a magnetic material on a sidewall of the first magnetic layer and the sidewall insulating film, and introducing ions into the deposition layer.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 7, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaru Toko, Kuniaki Sugiura, Yutaka Hashimoto, Katsuya Nishiyama, Tadashi Kai
  • Patent number: 9590175
    Abstract: A semiconductor device includes four or more memory cells arranged on a row, the memory cells each including a first pillar-shaped semiconductor layer, a first gate insulating film around the semiconductor layer, a first gate line around the first gate insulating film, a third gate insulating film around an upper portion of the semiconductor layer, a first contact electrode around the third gate insulating film, a second contact electrode connecting upper portions of the semiconductor layer and the first contact electrode, and a magnetic tunnel junction storage element on the second contact electrode, a first source line connecting lower portions of the semiconductor layers to each other, a first bit line extending in a direction perpendicular to a direction of the first gate line and connected to an upper portion of the storage element, and a second source line extending in a direction perpendicular to the first source line.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: March 7, 2017
    Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
    Inventors: Fujio Masuoka, Hiroki Nakamura
  • Patent number: 9590176
    Abstract: Electrolyte gating with ionic liquids is a powerful tool for inducing conducting phases in correlated insulators. An archetypal correlated material is VO2 which is insulating only at temperatures below a characteristic phase transition temperature. We show that electrolyte gating of epitaxial thin films of VO2 suppresses the metal-to-insulator transition and stabilizes the metallic phase to temperatures below 5 K even after the ionic liquid is completely removed. We provide compelling evidence that, rather than electrostatically induced carriers, electrolyte gating of VO2 leads to the electric field induced creation of oxygen vacancies, and the consequent migration of oxygen from the oxide film into the ionic liquid.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Stuart Stephen Papworth Parkin, Mahesh G. Samant
  • Patent number: 9590177
    Abstract: An organic light-emitting display panel and a fabrication method thereof include using an inkjet printing process to form the organic emission material of the display panel and providing a specific design of the relative position of the spacer and the planarization layer with ink-repellent material such that the spacer can be effectively fixed on the array substrate without falling from the planarization layer.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: March 7, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Shou-Wei Fang, Wei-Hao Tseng, Chia-Yang Lu, Chien-Tao Chen, Tsung-Hsiang Shih, Hung-Che Ting
  • Patent number: 9590178
    Abstract: The invention relates to novel polymers containing one or more 4,8-dioxycarbonylalkyl-benzo[1,2-b:4,5-b?]dithiophene repeating units or their thioester derivatives, methods for their preparation and monomers used therein, blends, mixtures and formulations containing them, the use of the polymers, blends, mixtures and formulations as semiconductor in organic electronic (OE) devices, especially in organic photovoltaic (OPV) devices, and to OE and OPV devices comprising these polymers, blends, mixtures or formulations.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: March 7, 2017
    Assignee: MERCK PATENT GMBH
    Inventors: William Mitchell, Nicolas Blouin, Amy Phillips, Steven Tierney, Miguel Carrasco-Orozco, Toby Cull
  • Patent number: 9590179
    Abstract: Provided are a curable composition for an organic electroluminescent element, which has high light emission efficiency and is applicable to a wet process, a cured product thereof, and an organic electroluminescent element containing the cured product in an organic layer. More specifically, provided are a curable composition containing a compound represented by an indolocarbazole skeleton compound, a cured product obtained by curing the curable composition, and an organic electroluminescent element containing the cured product in an organic layer.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: March 7, 2017
    Assignee: NIPPON STEEL & SUMIKIN CHEMICAL CO., LTD.
    Inventors: Hiroyuki Hayashida, Masashi Niina, Hiroshige Tanaka, Kazuto Shiraishi, Tohru Asari, Kazuaki Yoshimura