Patents Issued in March 28, 2017
-
Patent number: 9606768Abstract: Methods and systems for capturing, transmitting and processing data for generating ratings relating to multimedia programming based on passively obtained user cues are disclosed herein.Type: GrantFiled: February 3, 2014Date of Patent: March 28, 2017Assignee: AT&T Intellectual Property II, L.P.Inventors: Brian Amento, Christopher Harrison, Larry Stead
-
System and method for adaptive compression mode selection for buffers in a portable computing device
Patent number: 9606769Abstract: Systems and methods for adaptive compression mode selection for memory buffers such as those used in or with a portable computing device (“PCD”) are presented. During operation of the PCD a first compression mode is selected for a buffer and the buffer is formatted to the first compression mode. Any access to the buffer by a component of the PCD, core of the PCD or software application running on the PCD is monitored. Based on the amount and/or type of access to the buffer, a second compression mode for the buffer is selected. The buffer is formatted to the second compression mode, providing a cost effective ability to adaptively format buffers based on the component(s), cores(s), and/or software application(s) accessing the buffers, and allowing for improving or optimizing bandwidth, memory footprint, resource conflict, power consumption, latency, and/or performance of component(s), core(s), or software application(s) accessing buffers as desired.Type: GrantFiled: June 13, 2014Date of Patent: March 28, 2017Assignee: QUALCOMM INCORPORATEDInventors: Moinul Khan, Chia-Yuan Teng, Simo Petteri Kangaslampi -
Patent number: 9606770Abstract: A method is described that involves executing a first instruction with a functional unit. The first instruction is a multiply-add instruction. The method further includes executing a second instruction with the functional unit. The second instruction is a round instruction.Type: GrantFiled: December 3, 2014Date of Patent: March 28, 2017Assignee: Intel CorporationInventors: Cristina S. Anderson, Zeev Sperber, Simon Rubanovich, Benny Eitan, Amit Gradstein
-
Patent number: 9606771Abstract: A true random number generator (RNG) has one or more oscillators and an output register for storing a random number output. Each of the oscillators is activated, successively, in a free-running oscillation phase, and a capture phase during which the oscillator is quiescent. The output register latches during the capture phase of each oscillator an end state of that oscillator at or close to the end of its oscillation phase. The random number output is derived from the latched end states.Type: GrantFiled: August 18, 2014Date of Patent: March 28, 2017Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Wangsheng Mei, Yang Wang, Jianzhou Wu, Yan Xiao
-
Patent number: 9606772Abstract: System and method for displaying information regarding a business process. A diagram of the business process may be displayed on a display. The diagram may include a plurality of icons connected by lines, where each of the icons represents a respective step in the business process and the lines indicate flow paths between the steps. Historical data regarding the business process may be received. The historical data may be analyzed to determine information regarding steps and/or flow paths in the business process. Graphical indications associated with one or more icons and/or lines in the diagram may be displayed. The graphical indications may visually indicate characteristics of corresponding steps and/or flow paths in the business process. For example, the graphical indications may indicate lengths of time, costs, or other characteristics associated with various ones of the steps. The graphical indications may indicate path traversals of ones of the flow paths.Type: GrantFiled: December 12, 2006Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Michael N. Nonemacher, Petko Chobantonov
-
Patent number: 9606773Abstract: A computer system may seek to identify at least one contraction metric that satisfies contraction conditions for a design of a dynamical system. The computer system may do so by formulating a search for a candidate contraction metric that is suspected of satisfying the contraction conditions for the design of the dynamical system from a set of simulation traces that describe the behavior of the dynamical system for a specific set of operating conditions. The search for the candidate contraction metric may then be performed. The computer system may seek to verify that a candidate contraction metric for a design of a dynamical system satisfies contraction conditions by performing a process that uses solvers based on decision procedures.Type: GrantFiled: August 18, 2014Date of Patent: March 28, 2017Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.Inventors: Ayca Balkan, Jyotirmoy Vinay Deshmukh, James Kapinski
-
Patent number: 9606774Abstract: Systems, methods, and computer-readable media for wrapping an application with field-programmable business logic are presented. In some embodiments, a computing device may load application code of a mobile application. Subsequently, the computing device may modify the application code to wrap the application with an application wrapper that is configured to manage execution of the application based on one or more policy files and configured to intercept one or more functions of the application code, where the one or more policy files each define one or more access controls that are enforced by a device management system on one or more user devices. Subsequently, the computing device may create a library file comprising field-programmable business logic defining implementation code linked to one or more of the functions intercepted by the wrapper. The computing device may then provide the wrapped application and the library file to at least one user device.Type: GrantFiled: March 27, 2015Date of Patent: March 28, 2017Assignee: Citrix Systems, Inc.Inventor: James Walker
-
Patent number: 9606775Abstract: The present invention includes a method and apparatus for developing a Rich Internet Application. In one embodiment, there is provided a method for developing a Rich Internet Application, comprising: defining a code space used for a code set, the code set being associated with a view that is to be displayed in the Rich Internet Application; and adjusting the code space so that the adjusted code space is independent of another code space used for another code set, wherein the other code set is associated with another view that is to be displayed in the Rich Internet Application. In one embodiment of the present invention, there is provided an apparatus for developing a Rich Internet Application. By means of the method and apparatus as described in the present invention, conflicts between code sets associated with various views to be displayed in the Rich Internet Application may be isolated.Type: GrantFiled: May 27, 2015Date of Patent: March 28, 2017Assignee: International Business MachinesInventors: Ran Jiang, Qi Ruan, Qiao Yun Sun, Shu Chao Wan, Xiang Zhou
-
Patent number: 9606776Abstract: A programming device creating a program in FBD language describing processes by connecting FBD parts on an editor screen, includes: a part information managing unit managing size information indicating a size of an FBD part; a recommended order determining unit acquiring, when operation to newly arrange an FBD part relative to an already-arranged FBD part on the editor screen is performed, size information on the already-arranged FBD part and size information on the FBD part to be newly arranged, from the part information managing unit, detecting regions where the FBD part to be newly arranged can be arranged based on the acquired size information, and determining a recommended priority order of part arrangement among the regions based on positions of the detected regions; and an editor unit displaying the recommended priority order determined by the recommended order determining unit in the regions.Type: GrantFiled: March 7, 2014Date of Patent: March 28, 2017Assignee: Mitsubishi Electric CorporationInventor: Yusuke Osakabe
-
Patent number: 9606777Abstract: Deploying portlet(s) onto a displayed portal page by dragging and dropping portlet related artifacts from the IDE like portlet deployment descriptor node or a specific portlet node, and, responsively displaying the portlet(s), corresponding to the dropped node, in the displayed portal page. The updating of the portal page is accomplished by an internal IDE browser of a stand-alone type IDE working co-operatively with a remote portal server.Type: GrantFiled: February 25, 2016Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Carsten Leue, Jaspreet Singh
-
Patent number: 9606778Abstract: Techniques for reusing logic implemented in an existing software application such that the logic can be exposed as a Web service or in any other service-oriented context. In one set of embodiments, a design-time technique is provided that comprises, inter alia, receiving program code for an existing software application, generating metadata based on the program code, and customizing the metadata to align with an intended Web service. Artifacts for the Web service are then generated based on the customized metadata. In another set of embodiments, a run-time technique is provided that comprises, inter alia, receiving a payload representing an invocation of a Web service operation of the generated Web service, processing the payload, and, based on the processing, causing the existing software application to execute an operation in response to the invocation of the Web service operation.Type: GrantFiled: June 24, 2014Date of Patent: March 28, 2017Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Nagaraj Srinivasan, Ananthalakshmi Anbuselvan, Keshava Rangarajan, Sudharsan Krishnamurthy, Murari Sinha, Yuling Chen, Aditya Ramamurthy Rao, Jayateja Dasararaju, Harish Gupta
-
Patent number: 9606779Abstract: The present invention relates to a data processing system and to a method for implementing simulation in the system, and the invention comprises: a process of inputting an application code for implementing a simulation; a process of converting the input application code into assembly data format; a process of generating basic blocks for the assembly data format; and a process of implementing the simulation via the generated basic blocks. Consequently the simulation implementation time is shortened as the simulation is implemented from instruction units to basic block units.Type: GrantFiled: January 30, 2013Date of Patent: March 28, 2017Assignee: SAMSUNG ELECTRONICS CO., LTDInventors: Ui Son Yoon, Bum Sik Kim, Kyoung Soo Cho, Ji Joong Moon
-
Patent number: 9606780Abstract: A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a bi-endian environment, wherein the processor architecture contains instructions with an inherent endian bias. The compiler uses a code generation endian preference that is specified by the user, and that determines a natural element order. When the compiler processes a computer program, it generates instructions for vector operations by determining whether the vector instruction has an endian bias that matches the specified endian preference. When the vector instruction has no endian bias, or when the endian bias of the vector instruction matches the specified endian preference, the compiler generates one or more instructions for the vector instruction as it normally does. When the endian bias of the vector instruction does not match the specified endian preference, the compiler generates instructions to fix the mismatch.Type: GrantFiled: December 27, 2014Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Jin Song Ji, William J. Schmidt
-
Patent number: 9606781Abstract: A parser engine programming tool configured to receive an input file representing a directly connected cyclical graph or tree of decision points for parsing a range of incoming packet headers, automatically generate all possible paths within the graph and thereby the associated possible headers, and convert the determined paths/headers into a proper format for programming memory of a parser engine to parse the determined headers (represented by the paths).Type: GrantFiled: March 31, 2015Date of Patent: March 28, 2017Assignee: Cavium, Inc.Inventors: Kishore Badari Atreya, Ajeer Salil Pudiyapura, Ravindran Suresh
-
Patent number: 9606782Abstract: Technology for a method for backing up and restoring game application state across multiple devices is disclosed herein. The method includes running an instance of a game application, by a distributed system, at a first electronic device, determining a backup event that occurs in the first electronic device, wherein the backup event suggests a backup of application state data and the application state data represent an application state of the game application at the backup event, and transmitting the application state data of the game application to a remote storage service, in response to the backup event. A second electronic device can retrieve the application state data from the remote storage service and restore the game application state.Type: GrantFiled: March 20, 2014Date of Patent: March 28, 2017Assignee: Nextbit Systems Inc.Inventors: Michael A. Chan, Justin Quan, Daniel R. Bornstein, Tom Moss, Linda Tong
-
Patent number: 9606783Abstract: In a method for dynamically replacing code within a software application on a device, an annotated code segment that performs a function according to a first data policy is received. The computer determines an alternate segment that performs the function according to a second data policy.Type: GrantFiled: October 14, 2013Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Swaminathan Balasubramanian, Radha M. De, Brian M. O'Connell, Cheranellore Vasudevan
-
Patent number: 9606784Abstract: A method for determining a common sequence of statements from one or more sets of ordered statements. A data object is created that has a first group of data entries, which is created from a first sequence of statements of a first set of statements. Each data entry defines a link between a source and destination statement from the first sequence. Data entries created from a second sequence of statements of a second set are added to the first group of data entries. Each data entry from the second sequence defines a link between a source statement and a destination statement from the second sequence. A second group of data entries is created, which is determined from the first group of data entries that have an equivalent source and destination statements. The second group of data entries is stored in a database as the common sequence of statements.Type: GrantFiled: December 24, 2013Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventor: Vaibhav Srivastava
-
Patent number: 9606785Abstract: Techniques are disclosed for managing deployment conflicts between applications executing in one or more processing environments. A first application is executed in a first processing environment and responsive to a request to execute the first application. During execution of the first application, a determination is made to redeploy the first application for execution partially in time on a second processing environment providing a higher capability than the first processing environment in terms of at least a first resource type. A deployment conflict is detected between the first application and at least a second application.Type: GrantFiled: February 5, 2016Date of Patent: March 28, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Adam T. Clark, Michael T. Kalmbach, John E. Petri, Kevin Wendzel
-
Patent number: 9606786Abstract: An information-processing apparatus includes a communication unit that transmits a first command to register in a memory a service provided by an application using a first communicative method. The communication unit transmits a second command to register in the memory a service indicator of the service using a second communicative method different from the first communicative method.Type: GrantFiled: June 20, 2011Date of Patent: March 28, 2017Assignee: SONY CORPORATIONInventor: Yasuo Takeuchi
-
Patent number: 9606787Abstract: Method and system are disclosed for restoring multiple instances of a software application to a predetermined baseline state. The method/system of the invention creates a baseline template from a single correct or “golden” installation of the software application. The baseline template may then be deployed to restore previously used instances of the software application to a baseline state.Type: GrantFiled: August 22, 2014Date of Patent: March 28, 2017Assignee: United Services Automobile AssociationInventors: Richard Douglas Weathersby, Darren John Black
-
Patent number: 9606788Abstract: A computer-implemented method of updating a system of customized software is provided. The method includes receiving an update request and collecting contextual information relative to the system of customized software. A query is generated for updates applicable to the system of customized software based on the contextual information. A query response is received indicative of at least one applicable update. A selection relative to the at least one applicable update is received. At least one update is selectively applied based on the selection.Type: GrantFiled: August 11, 2014Date of Patent: March 28, 2017Assignee: Microsoft Technology Licensing, LLCInventors: Arunpriyaa Nachimuthu, Satish J. Thomas, Amit Gupta, Nathan S. Premo, Dmitry Gorn
-
Patent number: 9606789Abstract: A storage device includes first and second data transceivers connected to an upper level device through first and second paths, respectively, and a third processor. The first data transceiver includes a first processor configured to perform an access control of a first logical memory group by executing first firmware. The second data transceiver performs an access control of a second logical memory group. The third processor is configured to change, when all of logical memories included in the first logical memory group are included in the second logical memory group, recommendation levels of the first path and the second path such that a first recommendation level of the first path is lower than a second recommendation level of the second path if the first recommendation level is higher than or equal to the second recommendation level, and update the first firmware when no data is flowing through the first path.Type: GrantFiled: July 28, 2015Date of Patent: March 28, 2017Assignee: FUJITSU LIMITEDInventors: Tomohiko Muroyama, Tadashi Matsumura, Noriyuki Yasu, Motoki Sotani
-
Patent number: 9606790Abstract: Electronic modules in motor vehicles are reflashed without encountering errors due to insufficient electrical power becoming available during a reflashing. A server system stores a database of update files together with data corresponding to a respective current draw and a respective reflash time associated with the respective update files when applied in each respective vehicle. A vehicle sends pedigree information to the server system which then identifies relevant update files and corresponding current draw and reflash time data for the particular vehicle. The relevant update files and corresponding data are sent to the particular vehicle. A state of charge of a battery in the vehicle is determined. A depleted state of charge is estimated that would remain after applying a relevant update file. The update file is not applied if the estimated depleted state of charge is less than a predetermined state of charge.Type: GrantFiled: November 25, 2015Date of Patent: March 28, 2017Assignee: FORD GLOBAL TECHNOLOGIES, LLCInventors: Medville Jay Throop, Brian D. Tillman, Paul A. Mueller, April D. Johnson, Charles H. Nagi
-
Patent number: 9606791Abstract: A method and an apparatus for installing and updating software are provided. The method includes: establishing a first directory corresponding to a current version of software in a pre-defined directory, placing a resource file of the current version of the software in the first directory; searching the pre-defined directory for a directory corresponding to a latest version of the software when a main program of the software is started, and loading the directory corresponding to the latest version of the software; downloading and installing a new version of the software when the software is running, establishing a second directory corresponding to the new version of the software in a directory where a directory corresponding to an old version of the software is stored, and placing a resource file of the new version of the software into the second directory. The apparatus includes: an initial installing module, a main program file and an update process module.Type: GrantFiled: February 24, 2014Date of Patent: March 28, 2017Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Yu Ku, Yamin Wei
-
Patent number: 9606792Abstract: A method includes obtaining, by one or more processor, an indication that a first task assigned to a first entity is complete and that a second task is assigned to a second entity (the second task is subsequent to the first task). In response to obtaining the first indication, the one or more processor generates a third task, which includes a transfer task from the first entity to the second entity before the second entity commences the second task. The one or more processor identifies data to be communicated to the second entity by the first entity, before the commencement of the second task by the second entity. The one or more processor obtains an indication that the third task is complete; and in response to obtaining this indication, determines whether during the third task the first entity communicated a pre-defined portion of the data to the second entity.Type: GrantFiled: November 13, 2015Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Yasuko Andoh, Kazuro Haga, Katsuroh Hayashi, Nozomu Matsushita
-
Patent number: 9606793Abstract: A system and method to facilitate backporting of bug patches to earlier versions of a project are disclosed. In one implementation, an indication that an error has been fixed for a version of a project managed by a code review system is received. An indication that a patch for the error has been applied to the earlier version of the project is received from the code review system. A message is sent to at least one participant of the project identifying the patch and the earlier version of the project, and indicating that the patch has been successfully applied to the earlier version of the project.Type: GrantFiled: September 14, 2016Date of Patent: March 28, 2017Assignee: Red Hat Israel, Ltd.Inventors: Nir Magnezi, Michael Kolesnik
-
Patent number: 9606794Abstract: At least one application is received from a user. The at least one application is stored on a communication platform. A catalog is received. The catalog includes at least one service. Each service of the at least one service is associated with a platform. An indication of a selection, from the user, is received. The selection comprises a first service associated with a first platform, and a second service associated with a second platform. The first service stores the at least one application from the user. The second service runs the at least one application from the user. Responsive to receiving the indication, the at least one application is deployed to the indicated first platform. Additionally, responsive to receiving the indication, a service bridge from the communication platform to the second platform is deployed. The at least one application is run, on the first platform utilizing the service bridge.Type: GrantFiled: December 16, 2015Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Wei-Ting Chou, Chih-Hsiung Liu, Hao-Ting Shih, Joey H. Y. Tseng
-
Patent number: 9606795Abstract: Accessing shared resources by intelligent components is disclosed. In various embodiments, a system is configured to select a host for a bus and includes a bus configured to have a host, a shelf controller configured to host the bus and access an external interface via the bus, a plurality of line cards configured to host the bus and access an external interface via the bus, and a host selection device configured to select the shelf controller or one of the line cards as the host of the bus.Type: GrantFiled: May 5, 2005Date of Patent: March 28, 2017Assignee: Alcatel-Lucent USA Inc.Inventors: Vijay Jaswa, Jeffrey Kidd
-
Patent number: 9606796Abstract: Computers and methods for performing mathematical functions are disclosed. An embodiment of a computer includes an operations level and a driver level. The operations level performs mathematical operations. The driver level includes a first lookup table and a second lookup table, wherein the first lookup table includes first data for calculating at least one mathematical function using a first level of accuracy. The second lookup table includes second data for calculating the at least one mathematical function using a second level of accuracy, wherein the first level of accuracy is greater than the second level of accuracy. A driver executes either the first data or the second data depending on a selected level of accuracy.Type: GrantFiled: October 30, 2013Date of Patent: March 28, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Kyong Ho Lee, Seok-Jun Lee, Manish Goel
-
Patent number: 9606797Abstract: In one embodiment, the present invention includes a processor with a vector execution unit to execute a vector instruction on a vector having a plurality of individual data elements, where the vector instruction is of a first width and the vector execution unit is of a smaller width. The processor further includes a control logic coupled to the vector execution unit to compress a number of execution cycles consumed in execution of the vector instruction when at least some of the individual data elements are not to be operated on by the vector instruction. Other embodiments are described and claimed.Type: GrantFiled: December 21, 2012Date of Patent: March 28, 2017Assignee: Intel CorporationInventors: Aniruddha S. Vaidya, Anahita Shayesteh, Dong Hyuk Woo, Saikat Saharoy, Mani Azimi
-
Patent number: 9606798Abstract: A processor, includes a first comparison operation unit; a second comparison operation unit; a first operation unit; a second operation unit; a third operation unit; and a register, wherein the first comparison operation unit receives a first comparison operation signal, a first input signal, and a second input signal, performs a comparison operation indicated by the first comparison operation signal on the first input signal and the second input signal, and outputs a result of the comparison operation, the second comparison operation unit receives a second comparison operation signal, a third input signal, and a fourth input signal, performs a comparison operation indicated by the second comparison operation signal on the third input signal and the fourth input signal, and outputs a result of the comparison operation, the first operation unit receives the comparison result of the first comparison operation unit.Type: GrantFiled: January 6, 2016Date of Patent: March 28, 2017Assignee: Renesas Electronics CorporationInventor: Yuki Kobayashi
-
Patent number: 9606799Abstract: Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.Type: GrantFiled: May 27, 2016Date of Patent: March 28, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles W. Gainey, Jr., Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Gustav E. Sittmann, III
-
Patent number: 9606800Abstract: A microprocessor includes a front end module and a schedule queue module. The front end module is configured to retrieve first instructions, corresponding to a first thread, from an instruction cache, and retrieve second instructions, corresponding to a second thread, from the instruction cache. The front end module is also configured to decode the first instructions into first decoded instructions, and decode the second instructions into second decoded instructions. The schedule queue module is configured to selectively store the first decoded instructions and the second decoded instructions from the front end module and, for each stored decoded instruction, selectively issue the stored decoded instruction to an execution module. The schedule queue is further configured to reject storing an additional one of the first decoded instructions from the front end module in response to a count of the stored first decoded instructions in the schedule queue module exceeding a threshold.Type: GrantFiled: March 15, 2013Date of Patent: March 28, 2017Assignee: Marvell International Ltd.Inventors: Tom Hameenanttila, R. Frank O'Bleness, Sujat Jamil, Joseph Delgross
-
Patent number: 9606801Abstract: A clock-less asynchronous processing circuit or system utilizes a self-clocked generator to adjust the processing delay (latency) needed/allowed to the processing cycle in the circuit/system. The timing of the self-clocked generator is dynamically adjustable depending on various parameters. These parameters may include processing instruction, opcode information, type of processing to be performed by the circuit/system, or overall desired processing performance. The latency may also be adjusted to change processing performance, including power consumption, speed etc.Type: GrantFiled: September 8, 2014Date of Patent: March 28, 2017Assignee: Huawei Technologies Co., Ltd.Inventors: Wen Tong, Yiqun Ge, Qifan Zhang, Wuxian Shi, Tao Huang
-
Patent number: 9606802Abstract: A processor system is adapted to carry out a predicate swap instruction of an instruction set to swap, via a data pathway, predicate data in a first predicate data location of a predicate register with data in a corresponding additional predicate data location of a first additional predicate data container and to swap, via a data pathway, predicate data in a second predicate storage location of the predicate register with data in a corresponding additional predicate data location in a second additional predicate data container.Type: GrantFiled: March 25, 2011Date of Patent: March 28, 2017Assignee: NXP USA, INC.Inventors: Yuval Peled, Itzhak Barak, Uri Dayan, Amir Kleen, Idan Rozenberg
-
Patent number: 9606803Abstract: This invention addresses implements a range of interesting technologies into a single block. Each DSP CPU has a streaming engine. The streaming engines include: a SE to L2 interface that can request 512 bits/cycle from L2; a loose binding between SE and L2 interface, to allow a single stream to peak at 1024 bits/cycle; one-way coherence where the SE sees all earlier writes cached in system, but not writes that occur after stream opens; full protection against single-bit data errors within its internal storage via single-bit parity with semi-automatic restart on parity error.Type: GrantFiled: July 15, 2014Date of Patent: March 28, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Timothy D. Anderson, Joseph Zbiciak, Duc Quang Bui, Abhijeet A. Chachad, Kai Chirca, Naveen Bhoria, Matthew D. Pierson, Daniel Wu, Ramakrishnan Venkatasubramanian
-
Patent number: 9606804Abstract: Embodiments relate to a method and computer program product for absolute address branching in a reduced instruction set computing (RISC) architecture. One aspect is a method that includes fetching a branch instruction from an instruction stream having a fixed instruction width. A branch target address value is acquired from the instruction stream. The branch target address value represents a target address of the branch instruction. The branch target address value is formatted as an absolute address and sized as a multiple of the fixed instruction width. The branch target address value is loaded into a program counter based on the branch instruction. Execution of the instruction stream is redirected to a next instruction based on the branch target address value in the program counter.Type: GrantFiled: September 5, 2014Date of Patent: March 28, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Michael K. Gschwind
-
Patent number: 9606805Abstract: Technical solutions are described for dynamically managing an operand-store-compare (OSC) prediction table for load and store operations executed out-of-order. One general aspect includes a method that includes receiving a request to retire a queue entry corresponding to an instruction. The method also includes identifying an OSC prediction for the instruction based on an OSC prediction table entry, where the OSC prediction indicates if the instruction is predicted to hit an OSC hazard. The method also includes determining if the instruction hit the OSC hazard. The method also includes in response to the OSC prediction indicating that the instruction is predicted to hit the OSC hazard and the instruction not hitting the OSC hazard, invalidating the OSC prediction table entry corresponding to the instruction. The present document further describes examples of other aspects such as methods, computer products.Type: GrantFiled: October 19, 2015Date of Patent: March 28, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Khary J. Alexander, Jane H. Bartik, Jatin Bhartia, James J. Bonanno, Adam B. Collura, Jang-Soo Lee, James R. Mitchell, Anthony Saporito
-
Patent number: 9606806Abstract: A method includes selecting for execution in a processor a load instruction having at least one dependent instruction. Responsive to selecting the load instruction, the at least one dependent instruction is selectively awakened based on a status of a store instruction associated with the load instruction to indicate that the at least one dependent instruction is eligible for execution. A processor includes an instruction pipeline having an execution unit to execute instructions, a scheduler, and a controller. The scheduler selects for execution in the execution unit a load instruction having at least one dependent instruction. The controller, responsive to the scheduler selecting the load instruction, selectively awakens the at least one dependent instruction based on a status of a store instruction associated with the load instruction to indicate that the at least one dependent instruction is eligible for execution by the execution unit.Type: GrantFiled: June 25, 2013Date of Patent: March 28, 2017Assignee: Advanced Micro Devices, Inc.Inventors: Gregory W. Smaus, Michael Achenbach, Christopher J. Burke, Francesco Spadini
-
Patent number: 9606807Abstract: Devices, systems, and methods of communicating information directly to a sequencer or a buffer in a memory device are provided. In some embodiments, instructions are sent directly from an external processor to a sequencer in the memory device, and the sequencer configures the instructions for an internal processor, such as one or more arithmetic logic units (ALUs) embedded on the memory device. Further, data to be operated on by the internal processor can be sent directly from the external processor to a buffer, and the sequencer can copy the data from the buffer to the internal processor. As power can be consumed each time a memory array is written to or read from, the direct communication of instructions and/or data can reduce the power consumed in writing to or reading from the memory array.Type: GrantFiled: June 4, 2009Date of Patent: March 28, 2017Assignee: Micron Technology, Inc.Inventor: Robert Walker
-
Patent number: 9606808Abstract: A computing device detects divergences between threads in a thread group executing on a parallel processing unit. The computing device includes an address divergence unit that identifies a subset of non-divergent threads included in the thread group. The address divergence unit stores instructions related to the subset of non-divergent threads in a multi-issue queue. The address divergence unit causes the instructions related to the subset of non-divergent threads to be retrieved from the multi-issue queue when the parallel processing unit is available. The address divergence unit causes the subset of non-divergent threads to be issued for execution on the parallel processing unit. The address divergence unit repeats the identifying, storing, and causing steps for the remaining threads in the thread group that are not included in the subset of non-divergent threads.Type: GrantFiled: January 11, 2012Date of Patent: March 28, 2017Assignee: NVIDIA CorporationInventors: Jack Choquette, Xiaogang Qiu, Jeff Tuckey, Michael (Ming Yiu) Siu, Robert J. Stoll, Olivier Giroux
-
Patent number: 9606809Abstract: Computer with flexible operating system, referred to the FOS Computer, it is an invention of the electronic information field, aimed at creating a unique mechanism to run the computer. The FOS Computer abandons the graphical interface operating system that usually were fixed installed on the client computer, and replaced it with Flexible OS. The invention utilizes the sharing advantages of remote server, and an innovative computer hardware, jointly establishes a unique computer operational process. This process makes the computer more powerful, the application more flexible, the operation more secure and reliable. The key composition of the FOS Computer: A. Remote server based operating system, referred to as Server based OS B. Operating System Processing Unit, referred to as OSPU C. OSPU operating system, referred to as OSPU-OS. Among them, OSPU is an innovative computer component. OSPU is also the core hardware of the present invention.Type: GrantFiled: March 15, 2013Date of Patent: March 28, 2017Inventor: Yin Sheng Zhang
-
Patent number: 9606810Abstract: A method for replacing the operating software of a limited-resource portable data carrier at a terminal includes controlling the operation of the data carrier and executing at least one function provided by the data carrier. The terminal includes new operating software, a bootstrap loader for loading new operating software, and a terminal certificate providing authorization for transmitting a loading key. In authentication of the terminal, the terminal certificate is transmitted to the data carrier and verified there and a loading key is transmitted to the data carrier. The operation control of the data carrier changes over to the bootstrap loader which deletes the present operating software of the data carrier and transmits the new operating software using the loading key from the terminal. The new operating software is then verified and activated by the bootstrap loader which transfers the control of the data carrier to the new operating software.Type: GrantFiled: June 19, 2013Date of Patent: March 28, 2017Assignee: GIESECKE & DEVRIENT GMBHInventor: Frank Schmalz
-
Patent number: 9606811Abstract: An operating method of a data storage device includes determining whether the data storage device is in a main boot mode or a sub boot mode, based on data stored in a boot mode register; executing a main boot code stored in a ROM, when the data storage device is determined to be in the main boot mode; and executing a sub boot code loaded on a working memory, when the data storage device is determined to be in the sub boot mode, and then, executing the main boot code.Type: GrantFiled: December 10, 2014Date of Patent: March 28, 2017Assignee: SK Hynix Inc.Inventors: Jong Ju Park, Dong Jae Shin, Young Jin Park
-
Patent number: 9606812Abstract: An electronic apparatus includes a first boot unit and a boot management unit. The first boot unit performs a first boot process for booting a first program. The boot management unit performs control of the first boot unit so as not to boot the first program in the first boot process next time when an interruption of the first boot process occurs and the interruption is caused by the first program being booted. The boot management unit does not perform the control when the interruption is caused by a factor other than the first program.Type: GrantFiled: October 24, 2014Date of Patent: March 28, 2017Assignee: FUJI XEROX CO., LTD.Inventors: Yosuke Kinoshita, Yasushi Amano
-
Patent number: 9606813Abstract: It is determined whether an instruction for initial activation of an application is issued by a user or an operating system (step S702). If the instruction is issued by the user, a splash screen is displayed (step S715). If the instruction is issued by the operating system, the application is to be resident without displaying the splash screen (step S704). If a user issues an activation instruction with respect to the resident application (step S705), it is determined whether a screen display based on the activation instruction from the user is a first time or not (step S706). If it is not the first time, the splash screen is not displayed, and whereas if it is the first time, the splash screen is displayed (step S707).Type: GrantFiled: March 26, 2013Date of Patent: March 28, 2017Assignee: Canon Kabushiki KaishaInventor: Yoshihito Nanaumi
-
Patent number: 9606814Abstract: A method, system, and computer-usable medium are disclosed for providing navigation assistance within a user interface. A request for look-ahead navigation assistance is received and the user's current location within the application is determined. Application state data associated with the user's current location within the application is processed to generate possible destination locations within the application. The resulting possible location destinations within the application are then contextually displayed to the user within a user interface as graphical elements.Type: GrantFiled: December 31, 2009Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Ethan K. Merrill, Valerie M. Bennett
-
Patent number: 9606815Abstract: Methods, computing systems and computer program products implement embodiments of the present invention that include receiving, by a computer, application code including a set of software elements, and identifying dependencies between the software elements. Based on the dependencies, a respective ranking score can be calculated for each of the software elements, the respective ranking score for a given software element indicating a likelihood that the given software element is configured as an application programming interface (API).Type: GrantFiled: February 26, 2015Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Maayan Goldstein, Eitan Daniel Farchi, Onn Shehory
-
Patent number: 9606816Abstract: An aspect includes receiving, by a processor, a capability indicating one or more performance aspects capable of being rendered by at least one hardware device of a computer system, determining a total number of hardware devices in the system, and determining a total number of the hardware devices having the capability. Upon determining, by the processor, that the total number of hardware devices in the system matches the total of the hardware devices having the capability, the capability is enabled for each of the hardware of the system with respect to a corresponding performance aspect.Type: GrantFiled: August 30, 2016Date of Patent: March 28, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Anthony T. Sofia
-
Patent number: 9606817Abstract: A virtual element includes a communication component that controls, from a remote location, communication with an Internet of Things (IoT) device of a plurality of IoT devices. The virtual element also includes a capabilities augmenting component that facilitates access to resources that augment the capabilities of the IoT device of the plurality of IoT devices. The tasks of the IoT device are allocable to one or more different devices and are performed by the one or more different devices. An interface accessing component facilitates access to information that is directed to the IoT device from an interface that is common to the plurality of IoT devices, and facilitates access to information that is provided from the IoT device.Type: GrantFiled: June 23, 2015Date of Patent: March 28, 2017Assignee: Symantec CorporationInventor: Petros Efstathopoulos