Patents Issued in March 28, 2017
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Patent number: 9606870Abstract: In one aspect, a method includes splitting empty RAID stripes into sub-stripes and storing pages into the sub-stripes based on a compressibility score. In another aspect, a method includes reading pages from 1-stripes, storing compressed data in a temporary location, reading multiple stripes, determining compressibility score for each stripe and filling stripes based on the compressibility score. In a further aspect, a method includes scanning a dirty queue in a system cache, compressing pages ready for destaging, combining compressed pages in to one aggregated page, writing one aggregated page to one stripe and storing pages with same compressibility score in a stripe.Type: GrantFiled: March 31, 2014Date of Patent: March 28, 2017Assignee: EMC IP HOLDING COMPANY LLCInventors: David Meiri, Anton Kucherov, Vladimir Shveidel
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Patent number: 9606871Abstract: Techniques for establishing a files system that exposes a virtual file system for backup operations are presented. Changes to files of a file system are maintained separately or collected and presented as a VFS. The VFS is then used to perform backup operations. Moreover, the files identified in the VFS can be customized based on search parameters, criterion, and/or criteria supplied by a user or supplied as parameters to backup and VFS mount operations.Type: GrantFiled: January 8, 2015Date of Patent: March 28, 2017Assignee: Micro Focus Software Inc.Inventor: Dhairesh Oza
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Patent number: 9606872Abstract: A virtual computer system includes a first saving unit that saves at least one or more snapshots each having recorded therein a state of a virtual machine, the state including an application program installed on the virtual machine, the snapshot being saved as a reference snapshot; an applying unit that applies the reference snapshot to the virtual machine when an execution request for the application program is received; and a second saving unit that saves a state of the virtual machine that executes the application program, the state being saved as a snapshot.Type: GrantFiled: January 27, 2015Date of Patent: March 28, 2017Assignee: FUJI XEROX CO., LTD.Inventors: Toshiaki Yoshinari, Bo Liu, Takuya Mizuguchi, Toshio Kamada, Katsuyuki Asai, Kentaro Ikeda, Kazuki Nagashima
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Patent number: 9606873Abstract: A method according to one embodiment includes copying data incoming to and/or generated at a production site to a copy cluster at a remote copy site, thereby creating a redundant copy of the data at the copy cluster. When the copy cluster becomes unavailable, data incoming to and/or generated at the production site is copied to a backup reserve site after the copy cluster becomes unavailable. Additional systems, methods, and computer programs products are also presented.Type: GrantFiled: May 13, 2014Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: David A. Brettell, Vanessa R. Earle, Alan J. Fisher, Duke A. Lee, Joseph M. Swingler
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Patent number: 9606874Abstract: A cluster of computer system nodes connected by a storage area network include two classes of nodes. The first class of nodes can act as clients or servers, while the other nodes can only be clients. The client-only nodes require much less functionality and can be more easily supported by different operating systems. To minimize the amount of data transmitted during normal operation, the server responsible for maintaining a cluster configuration database repeatedly multicasts the IP address, its incarnation number and the most recent database generation number. Each node stores this information and when a change is detected, each node can request an update of the data needed by that node. A client-only node uses the IP address of the server to connect to the server, to download the information from the cluster database required by the client-only node and to upload local disk connectivity information.Type: GrantFiled: September 9, 2014Date of Patent: March 28, 2017Assignee: SILICON GRAPHICS INTERNATIONAL CORP.Inventors: Daniel Moore, Andrew Gildfind
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Patent number: 9606875Abstract: Migration of computer information. In one example embodiment, a method for migration of computer data includes modifying a volume boot record of a destination volume to a first state in which at least a portion of the destination volume becomes inaccessible to a standard file system, writing one or more snapshots of a source volume to the inaccessible portion of the destination volume while the volume boot record is in the first state, and restoring the volume boot record to a second state in which the inaccessible portion of the destination volume becomes accessible to the standard file system.Type: GrantFiled: April 26, 2013Date of Patent: March 28, 2017Assignee: STORAGECRAFT TECHNOLOGY CORPORATIONInventor: Nathan S. Bushman
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Patent number: 9606876Abstract: Embodiments of the present invention provide efficient and cost-effective systems and methods for backing up and recovering a virtual machine and application data therein. Embodiments of the present invention can be used to satisfy near-zero RPOs by providing more recovery points for backups in virtual machine environments, while also providing increased granularity for recovery (i.e., single virtual disk, single file, etc.) and maintaining central management capabilities and back up efficiencies offered by virtual machine-level backups.Type: GrantFiled: August 29, 2014Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Zhengwen He, Mandeep K. Jandir, James P. Smith, Mark L. Yakushev, Christopher Zaremba
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Patent number: 9606877Abstract: The disclosed online system includes a number of processing blocks, including a feeding service that sends a data stream and a consuming service that receives a data stream, without sending back acknowledgements for the data (i.e., “nontransactional”). The system handles failure in the feeding service and/or the consuming service by adding reference points into the data stream and backing up a current sum that is maintained by the consuming service. Upon a failure of the consuming service, the system obtains the last reference point, restores the backup copy of the database, and starts reading the backup copy from that check point. To address a failure of the feeding service, the feeding service creates an identifier for each message in the data stream, and upon failure, the consuming service checks for messages that have the same identifier within a specified period of time, and discards any duplicate messages.Type: GrantFiled: May 18, 2015Date of Patent: March 28, 2017Assignee: Facebook, Inc.Inventors: Jason McHugh, Michael Pechuk
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Patent number: 9606878Abstract: A host swap hypervisor provides a high availability hypervisor for virtual machines on a physical host computer during a failure of a primary hypervisor on the physical host computer. The host swap hypervisor resides on the physical host computer that runs the primary hypervisor, and monitors failure indicators of the primary hypervisor. When the failure indicators exceed a threshold, the host swap hypervisor is then autonomically swapped to become the primary hypervisor on the physical host computer. The original primary hypervisor may then be re-initialized as the new host swap hypervisor.Type: GrantFiled: June 16, 2014Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Bin Cao, Jim C. Chen, Lauren A. Somers
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Patent number: 9606879Abstract: A multi-partition networking device comprising a primary partition running on a first set of hardware resources and a secondary partition running on a further set of hardware resources. The multi-partition networking device is arranged to operate in a first operating state, whereby the first set of hardware resources are in an active state and the primary partition is arranged to process network traffic, and the further set of hardware resources are in a standby state. The multi-partition networking device is further arranged to transition to a second operating state upon detection of a suspicious condition within the primary partition, whereby the further set of hardware resources are transitioned from a standby state to an active state, and to transition to a third operating state upon detection of a failure condition within the primary partition, whereby processing of network traffic is transferred to the secondary partition.Type: GrantFiled: September 29, 2014Date of Patent: March 28, 2017Assignee: NXP USA, INC.Inventors: Avishay Moscovici, Nir Erez
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Patent number: 9606880Abstract: A first information processing apparatus executes an operation corresponding to a message entered thereto. Upon completion of the operation, the first information processing apparatus sends a notification to a second information processing apparatus. The second information processing apparatus stores such notifications in a memory. The second information processing apparatus also receives a message, and upon expiration of a predetermined time after receipt of the message, the second information processing apparatus determines whether the memory contains a notification relevant to the received message. When the memory contains such a notification, the second information processing apparatus avoids execution of an operation corresponding to the received message.Type: GrantFiled: March 26, 2014Date of Patent: March 28, 2017Assignee: FUJITSU LIMITEDInventors: Yuji Aoki, Maya Watanabe
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Patent number: 9606881Abstract: A method, system and computer-readable medium for providing rapid failback of a computer system is described. The method, which operates during failback of a secondary computer to a primary computer, accesses a map to determine a location of a latest version of data corresponding to a read request, where the location may be within either a primary data storage or a secondary data storage. The system comprises a primary computer coupled to a primary data storage and a secondary computer coupled to a secondary data storage. The primary computer maintains a write log and the secondary computer maintains a map. The computer-readable medium contains instructions, which, when executed by a processor, performs the steps embodied by the method.Type: GrantFiled: October 8, 2013Date of Patent: March 28, 2017Assignee: Veritas Technologies LLCInventors: Anand Kekre, Angshuman Bezbaruah, Ankur Panchbudhe
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Patent number: 9606882Abstract: The disclosed method includes, at a storage controller of a storage system, receiving host instructions to modify configuration settings corresponding to a first memory portion of a plurality of memory portions. The method includes, in response to receiving the host instructions to modify the configuration settings, identifying the first memory portion from the host instructions and modifying the configuration settings corresponding to the first memory portion, in accordance with the host instructions. The method includes, after modifying the configuration settings corresponding to the first memory portion, sending one or more commands to perform memory operations having one or more physical addresses corresponding to the first memory portion and receiving a failure notification indicating failed performance of at least a first memory operation of the one or more memory operations. The method includes, in response to receiving the failure notification, executing one or more error recovery mechanisms.Type: GrantFiled: January 13, 2015Date of Patent: March 28, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Scott Creasman, James M. Higgins
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Patent number: 9606883Abstract: Embodiments of the present invention generally provide for multi-dimensional disk arrays and methods for managing same and can be used in video surveillance systems for the management of real-time video data, image data, or combinations thereof.Type: GrantFiled: September 15, 2016Date of Patent: March 28, 2017Assignee: Open Invention Network, LLCInventors: Wing-Yee Au, Alan Rowe
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Patent number: 9606884Abstract: In one embodiment a method of remotely communicating with an information handling system may include a first processing device executing one or more diagnostic routines in response to an error signal corresponding to a failure of an integrated display of a first information handling system. The first processing device may establish a peer to peer connection. The first information handling system may connect remotely to a second information handling system via the peer to peer connection. A web browser of the second information handling system may receive and display a HyperText Markup Language (HTML) page that may include an error description and a diagnostic log corresponding to the failure of the integrated display.Type: GrantFiled: October 15, 2014Date of Patent: March 28, 2017Assignee: DELL PRODUCTS L.P.Inventor: Dirie N. Herzi
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Patent number: 9606885Abstract: Memory devices and methods are described and shown that are capable of being configured in a chain. In one configuration, a single data input port and a single data output port are utilized at a host to communicate with the chain of memory devices. Methods for assigning identifiers to memory devices in the chain are described that include detection of a presence or absence of downstream memory devices. In selected examples, identifiers are assigned sequentially to memory devices in the chain until no additional downstream memory devices are detected.Type: GrantFiled: October 14, 2013Date of Patent: March 28, 2017Assignee: Micron Technology, Inc.Inventors: Victor Tsai, William Henry Radke, Bob Leibowitz
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Patent number: 9606886Abstract: Disclosed are method and device for measuring system performance in real time. The method includes: the foreground receives a real-time measurement task comprising a measurement period parameter constructed by the background according to the concerned service data, with the quantity of the service data being lower than a preset value; the foreground extracts the current data corresponding to the real-time measurement task from a performance measurement cache area according to the measurement period parameter; the foreground acquires the real-time measurement data corresponding to the real-time measurement task according to the current data; and the foreground reports the real-time measurement data to the background. In the present invention, the background sends the concerned service data to the foreground by way of a real-time measurement task, and the foreground merely reports few service data.Type: GrantFiled: July 6, 2011Date of Patent: March 28, 2017Assignee: ZTE CorporationInventor: Pan Li
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Patent number: 9606887Abstract: Embodiments provide a data persisting mechanism that allows for efficient, unobtrusive persisting of large volumes of data while optimizing the use of system resources by the persisting process. In an embodiment, the persisting process includes a self-tuning algorithm that constantly monitors persistence performance and that adjusts persistence time to maintain performance within user-defined criteria. From one aspect, this allows the persisting process to seamlessly adapt to changes in system environment (speeding up persistence during times of low processor usage and slowing down persistence during times of high processor usage) and to reduce or eliminate CPU spikes caused by persisting process. From another aspect, the persisting process results in the data being persisted as quickly as possible given the system constraints, thereby minimizing the possibility of data loss.Type: GrantFiled: March 5, 2014Date of Patent: March 28, 2017Assignee: RIVERBED TECHNOLOGY, INC.Inventors: Joseph D. Mokos, Edward W. Macomber
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Patent number: 9606888Abstract: A hierarchical multi-core debugger interface is described that is configured to enable debugging of a multi-core device. In some implementations, a multi-core debugger renders core-specific user interface components with a core-specific visual characteristic in the hierarchical multi-core debugger interface. In other implementations, the multi-core debugger renders core-specific user interface components in core-specific windows in the hierarchical multi-core debugger interface. In still other implementations, the multi-core debugger renders core-specific user interface components in core-specific windows in the hierarchical multi-core debugger interface, where each core-specific window is displayed with a core-specific visual characteristic.Type: GrantFiled: January 3, 2014Date of Patent: March 28, 2017Assignee: Marvell International Ltd.Inventors: Robert Wiesner, Guido Kehrle
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Patent number: 9606889Abstract: Defective memory may cause expensive and unnecessary replacements of the memory especially for higher density dynamic random access memory that has ever shrinking topologies. Running memory stress tests in the background for a period of time at set intervals while the operating system is idle may detect and identify memory problems in real-time without requiring a re-boot of the information handling system. The memory defects may be repaired in real-time so as not to cause loss of data by future read or write requests to the identified defective memory.Type: GrantFiled: September 4, 2015Date of Patent: March 28, 2017Assignee: Dell Products L.P.Inventors: Dirie N. Herzi, Michael David Shepherd
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Patent number: 9606890Abstract: Analysis system, analysis method and program. The system includes: trace means for acquiring a command issued by software executed in an information processing system and a physical address of a memory used by the command as trace data, and recording the trace data to storage means; event detecting means for detecting an event caused to occur by the software and acquiring event information; conversion means for converting the event information to a memory access pattern configured with a plurality of commands for accessing the memory and a plurality of physical addresses; and memory accessing means for accessing the memory using the converted memory access pattern, causing the trace means to acquire trace data and record the trace data to the storage means.Type: GrantFiled: September 16, 2015Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventor: Seiji Munetoh
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Patent number: 9606891Abstract: An apparatus for tracing data from a data bus in a first clock domain operating at a first clock frequency to a trace array in a second clock domain operating at a second clock frequency, wherein the first clock frequency is lower than the second clock frequency. The apparatus includes a change detector to detect a change of the data on the data bus in the first clock domain, a trigger responsive to the change detector to send a trigger pulse to the second clock domain, pulse synchronization on the second clock domain responsive to the trigger pulse to synchronize the trigger pulse to the second clock frequency of the second clock domain by a meta-stability latch, as well as a data capture in the second clock domain responsive to the pulse synchronization to capture data from the data bus and to store the captured data in the trace array.Type: GrantFiled: June 8, 2015Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Norbert Hagspiel, Sascha Junghans, Matthias Klein, Joerg Walter
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Patent number: 9606892Abstract: Methods and apparatus for monitoring workfiles are disclosed. An authorized user or system programmer may input workfile threshold values and other monitoring information into a configuration file. A server reads the configuration file and starts traces to monitor workfile usage in a system. The server may continuously monitor the system to determine whether workfile usage in the system reaches workfile threshold values set in the configuration file. The server may list SQL queries using workfiles and then alert the system programmer when the threshold values are reached and is capable of reclaiming disk space by dropping and recreating overgrown workfiles with their original definitions.Type: GrantFiled: January 9, 2014Date of Patent: March 28, 2017Assignee: Bank of America CorporationInventor: Deepak Gaikwad
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Patent number: 9606893Abstract: Methods, and computing devices implementing the methods, improve the efficiency and performance of a comprehensive behavioral monitoring and analysis system that is configured to predict whether a software application is causing undesirable or performance depredating behavior. The behavioral monitoring and analysis system may be configured to quickly and efficiently classify certain software applications as being benign by generating a behavior vector that characterizes the activities of the software application, determining whether the generated behavior vector includes a distinguishing behavior or behavioral clue identifying the software application as a trusted software application, and classifying the software application as benign in response to determining that the generated behavior vector includes a distinguishing behavior identifying the software application as a trusted software application.Type: GrantFiled: August 5, 2014Date of Patent: March 28, 2017Assignee: QUALCOMM IncorporatedInventors: Rajarshi Gupta, Charles Bergan
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Patent number: 9606894Abstract: A computing environment includes multiple software programs running on multiple endpoint computing machines. Each software program has associated diagnostics data. Each endpoint machine is running a diagnostics agent. The diagnostics agents are in communication with each other. A monitoring server interacting with the multiple software programs detects a malfunctioning associated with a software program running on a target endpoint, and submits a request to collect the diagnostics data of the malfunctioning software program. This collecting request is submitted to a service software program different from the malfunctioning program. The service software program may be running on a service endpoint different from the target endpoint. The requested diagnostics data is retrieved by the service software program from a diagnostics agent running on the target endpoint. The monitoring server then receives the requested diagnostics data from the service software program.Type: GrantFiled: March 4, 2015Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Gianluca Della Corte, Giancarlo Delle Cese, Antonio M. Sgro, Pia Toro, Ignazio F. Trovato
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Patent number: 9606895Abstract: A method may include, in a computing device comprising at least one processor and a memory, generating at least one information beacon from each of a plurality of applications installed on the computing device. Each information beacon may include application analytics data associated with a corresponding application while the corresponding application is running on the computing device. The at least one information beacon from each of the plurality of applications may be stored in a common location in the computing device. The stored at least one information beacon may be dispatched from each of the plurality of applications to a network device communicatively coupled to the computing device. The generating may be triggered by beacon generation code implemented in each of the plurality of applications installed on the computing device.Type: GrantFiled: November 9, 2015Date of Patent: March 28, 2017Assignee: Google Inc.Inventors: James Joseph Cotugno, Neil Campbell Rhodes
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Patent number: 9606896Abstract: In one example, a controller device includes one or more network interfaces communicatively coupled to one or more devices of a virtual network, and a processor configured to determine, for the virtual network, a set of two or more related processes executed by respective devices in the virtual network, receive via the network interfaces data for the set of two or more related processes, and aggregate the data for the set of two or more related processes to form aggregated data for the set of two or more related processes.Type: GrantFiled: August 3, 2015Date of Patent: March 28, 2017Assignee: Juniper Networks, Inc.Inventors: Anish Mehta, Megh Bhatt, Rajashekar Reddy
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Patent number: 9606897Abstract: A method for automated semantic parsing of an image of a structured document includes acquiring the image of the structured document. The image of the structured document is lexed so as to associate each image element of a plurality of image elements of the image with a predefined token. A user defined template of expected semantically significant elements of the structured document is input into a parser, the expected elements being defined in a visibly pushdown language (VPL) format. The tokens are parsed into the expected elements. A computer readable medium containing executable instructions and a system are also described.Type: GrantFiled: June 16, 2011Date of Patent: March 28, 2017Assignee: Hewlett Packard Enterprise Development LPInventors: David Lehavi, Omer Barkol
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Patent number: 9606898Abstract: The present invention relates to a computing apparatus and to a method for providing a user application to be executed in a media playback apparatus. According to the present invention, the computing apparatus executes a developer application, and tests a user application in the media playback apparatus which is connected to the computer apparatus through a network. Thus, applications stored in a plurality of computing apparatuses can be tested using a single media playback apparatus.Type: GrantFiled: November 26, 2010Date of Patent: March 28, 2017Assignee: SK PLANET CO., LTD.Inventors: Wonjang Baek, John Kim, Doo Hwan Yi
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Patent number: 9606899Abstract: The techniques described herein provide software testing that may concurrently process a user request using a live version of software and a shadow request, which is based on the user request, using a shadow version of software (e.g., trial or test version, etc.). The live version of software, unlike the shadow version, is user-facing and transmits data back to the users while the shadow request does not output to the users. An allocation module may vary allocation of the shadow requests to enable a ramp up of allocations (or possibly ramp down) of the shadow version of software. The allocation module may use allocation rules to dynamically initiate the shadow request based on various factors such as load balancing, user attributes, and/or other rules or logic. Thus, not all user requests may be issued as shadow requests.Type: GrantFiled: June 8, 2015Date of Patent: March 28, 2017Assignee: Amazon Technologies, Inc.Inventors: Muhammad Ali Siddiqui, Peter V. Commons, Ivan Eduardo Gonzalez, Amos Dylan Vance, Kendra A. Yourtee, Thomas L. Keller
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Patent number: 9606900Abstract: Methods and apparatuses are described for intelligent automation of computer software test scripts and code requirements. A server automatically scans code files to identify changes made to the code files. The server selects test automation script files that are related to the changed code files. The server parses each selected script file to determine whether the script file includes changes that correspond to the changes made to the related code files. If the script file includes the corresponding changes, the server determine whether a current version of the script file is located on each of one or more test servers and installs the current version of the script file on each test server that does not have the current version. If the script file does not include the corresponding changes, the server transmits a message to a remote computing device to indicate that the script file requires the corresponding changes.Type: GrantFiled: March 24, 2016Date of Patent: March 28, 2017Assignee: FMR LLCInventors: Amit Pradhan, Sameer Ponkshe
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Patent number: 9606901Abstract: A system, method, and computer program product are provided for generating a detailed design of at least one telecommunications based integration testing project. In use, a scope of at least one integration testing project is analyzed. Additionally, vendor-related information associated with the at least one integration testing project is tracked. Further, an activity library associated with the at least one integration testing project is generated. In addition, scenarios associated with the at least one integration testing project are determined. Furthermore, a high level design of the at least one integration testing project is presented for review. Still yet, testing instructions are generated based on the scenarios associated with the at least one integration testing project. Moreover, a detailed design of the at least one integration testing project is generated utilizing the testing instructions and the activity library.Type: GrantFiled: July 23, 2015Date of Patent: March 28, 2017Assignees: AMDOCS SOFTWARE SYSTEMS LIMITED, AMDOCS DEVELOPMENT LIMITEDInventor: Sharon Elgarat
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Patent number: 9606902Abstract: Provided is a malfunction influence evaluation system comprising a controller simulator that simulates the operation of a controller, an input apparatus that provides input data to the controller simulator, a simulation manager that exercises integrated management of the operation of the input apparatus and the controller simulator, and a database wherein malfunction information and simulation conditions to be referred to by the simulation manager is stored. The controller simulator retains a control program for the controller and an analysis unit, and the analysis unit has a propagation flag tracking function wherein propagation flags are assigned to a variable within the control program, bits of the variable are set by inputting a prescribed value thereto as a malfunction input value, the bits are propagated each time the variable is involved in a calculation within the control program, the states of propagation of the bits are tracked, and the result thereof is output.Type: GrantFiled: July 3, 2012Date of Patent: March 28, 2017Assignee: Hitachi, Ltd.Inventors: Akihiko Hyodo, Yasuo Sugure, Yasuhiro Ito, Tetsuya Yamada
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Patent number: 9606903Abstract: There are provided systems and method for unit test automation for business rules and applications. A service provider, such as a payment provider, may wish to integrate software and platforms offered by Pegasystems, Inc., in particular Pega RULES Process (“PRPC), which offers a business process management system. PRPC allows the service provider to create and manage business rules and build business applications and platforms, such as a customer support platform. In order to provide a more flexible and comprehensive automated unit testing mechanism, a Java framework may be utilized that runs test cases in PRPC for the business rules. The Java framework may feed data into test cases and may enable dynamic data to be entered for the test cases. Additionally, the Java framework may allow for editing of data for the PRPC test cases and may allow the test cases to be reused and deleted.Type: GrantFiled: August 4, 2014Date of Patent: March 28, 2017Assignee: PAYPAL, INC.Inventor: Ilangovan Murugesan
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Patent number: 9606904Abstract: A system and method are provided for data collection and analysis of information related to applications. Specifically, the developer of the application may install analytic software, which may be embodied as a software development kit (SDK), on an integrated development environment (“IDE”) associated with the developer, wherein the analytic software may be installed with a wizard-like interface having a series of easy to follow instructions. Once installed, the application, with the analytic software incorporated therein, may be provided and installed on a plurality of end user devices. Thereafter, the analytic software may work in conjunction with analytic processing logic to assist the developer in obtaining pertinent information related to bugs associated with the application that is being executed on an end user device.Type: GrantFiled: September 3, 2014Date of Patent: March 28, 2017Assignee: Crashlytics, Inc.Inventors: Wayne Chang, Jeffrey H. Seibert, Jr.
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Patent number: 9606905Abstract: Systems, methods, and media for testing software patches are provided. The methods include: injecting a software patch into a program; determining a portion of the program modified by the software patch; concurrently executing a first instance of the portion of the program prior to modification by the software patch and a second instance of the portion of the program that has been modified by the software patch; obtaining a first outcome of the first instance and a second outcome of the second instance; comparing the first outcome and the second outcome with a policy associated with the program; and determining whether the software patch has executed correctly based at least in part on the comparison.Type: GrantFiled: March 7, 2014Date of Patent: March 28, 2017Assignee: The Trustees of Columbia University in the City of New YorkInventors: Angelos D. Keromytis, Stylianos Sidiroglou
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Patent number: 9606906Abstract: A system and method for verifying the output of a system under test is disclosed. An example method begins with receiving a production output from a system under test. A verification data set may be generated from the production output. Then, the verification data set may be provided as input to the system under test. A verification output may be received from the system under test resulting from the system under test ingesting the provided verification data set. The production output and the verification output may be compared with each other to determine whether there are any inconsistencies in the outputs.Type: GrantFiled: April 24, 2014Date of Patent: March 28, 2017Assignee: GOOGLE INC.Inventor: Elizabeth Emily Van Nostrand
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Patent number: 9606907Abstract: A memory module is operable to communicate with a memory controller via a data bus and a control/address bus and comprises a module board; a plurality of memory devices mounted on the module board; and multiple sets of data pins along an edge of the module board. Each respective set of the multiple sets of data pins is operatively coupled to a respective set of multiple sets of data lines in the data bus. The memory module further comprises a control circuit configured to receive control/address information from the memory controller via the control/address bus and to produce module control signals. The memory module further comprises a plurality of buffer circuits each being disposed proximate to and electrically coupled to a respective set of the multiple sets of data pins.Type: GrantFiled: August 20, 2013Date of Patent: March 28, 2017Assignee: Netlist, Inc.Inventors: Hyun Lee, Jayesh R. Bhakta
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Patent number: 9606908Abstract: A memory controller, system including the memory controller and method of controlling the memory. The memory controller receives requests for memory and content sensitively allocates memory space in a mixed cell memory. The memory controller allocates sufficient space including performance memory storing a single bit per cell and dense memory storing more than one bit per cell. Some or all of the memory may be selectable by the memory controller as either Single Level per Cell (SLC) or Multiple Level per Cell (MLC).Type: GrantFiled: August 17, 2012Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Bing Dai, Chung H. Lam, Jing Li
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Patent number: 9606909Abstract: Systems and methods are disclosed which facilitate management of thin provisioned data storage. Specifically, portions of thinly provisioned data stores may be deallocated when they contain invalid data, such as data deleted by a user. A user may transmit notifications, which may include write requests corresponding to a defined bit pattern, to a provider of the data store (or to the data store itself) that data has been deleted. A management component may modify the data store, or metadata corresponding to the data store, to reflect the deletion. The management component may further monitor portions of the data store to determine whether individual portions contain entirely invalid data. If so, the portion may be deallocated from the thin provisioned data store, resulting in more efficient thin provisioning. Deallocation may be enabled even where deletion notifications from a user do not correspond directly to allocated storage portions.Type: GrantFiled: April 5, 2013Date of Patent: March 28, 2017Assignee: Amazon Technologies, Inc.Inventor: Pradeep Vincent
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Patent number: 9606910Abstract: Embodiments of the invention provide data reduction in storage systems. In one embodiment, a computer comprises: a memory; and a controller operable to manage information, which corresponds to a plurality of addresses, of one or more volumes provided from a storage system to the computer and including at least one set of multiple storage areas sharing same data to be stored in the storage system. The controller is operable to manage storing of the shared same data in the memory of the computer by using the information of the storage areas.Type: GrantFiled: January 17, 2013Date of Patent: March 28, 2017Assignee: Hitachi, Ltd.Inventor: Akira Deguchi
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Patent number: 9606911Abstract: A method for maintaining address mapping for a flash memory module is disclosed including: recording a first set of addresses corresponding to a first set of sequential logical addresses in a first section of a first addressing block; recording a second set of addresses corresponding to a second set of sequential logical addresses in a second section of the first addressing block; recording a third set of addresses corresponding to a third set of sequential logical addresses in a first section of a second addressing block; and recording a fourth set of addresses corresponding to a fourth set of sequential logical addresses in a second section of the second addressing block; wherein the second set of logical addresses is successive to the first set of logical addresses, and the third set of logical addresses is successive to the second set of logical addresses.Type: GrantFiled: July 15, 2013Date of Patent: March 28, 2017Assignee: SILICON MOTION, INC.Inventors: Chi-Lung Wang, Chia-Hsin Chen, Chien-Cheng Lin
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Patent number: 9606912Abstract: A recycling method for a solid state drive is disclosed. The method includes selecting a logical block for recycle wherein the logical block includes a plurality of pages across a plurality of flash dies. The method also includes retrieving an address map index record associated with the logical block selected for recycle. For each particular address map index stored in the address map index record, the recycling method retrieves a set of address map entries referenced by the particular address map index, determines whether any page in the logical block is referenced by the set of address map entries, and if at least one page in the logical block is referenced by the set of address map entries, the method writes the at least one page to a different logical block. The method further includes erasing the plurality of pages in the logical block.Type: GrantFiled: November 27, 2013Date of Patent: March 28, 2017Assignee: Seagate Technology LLCInventors: Peng Xu, Alex Ga Hing Tang, LiZhao Ma, Nanshan Shu
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Patent number: 9606913Abstract: A method and apparatus for executing an application program stored in an one-time-programmable, OTP, memory in a system on chip (SoC) is described. The SoC has RAM, a CPU and an OTP controller. The OTP memory stores an application program. The method includes, by the processor unit at power-up, instructing the OTP controller to copy the application program from the OTP memory to RAM, executing the application program from RAM, and setting the system on chip (SoC) in sleep mode. By the OTP controller after a wake-up, copying the application program from the OTP memory to the RAM and after the copying, waking up the CPU and transferring control back to the CPU. By the CPU after being woken up by the OTP controller, executing the application program from RAM.Type: GrantFiled: March 28, 2014Date of Patent: March 28, 2017Assignee: Dialog Semiconductor B.V.Inventors: Nikolaos Moschopoulos, Jakobus Johannes Verhallen, Konstantinos Ninos, Tobias Mueller, Dimitrios Papadopoulos
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Patent number: 9606914Abstract: An apparatus, system, and method are disclosed for allocating non-volatile storage. The storage device may present a logical address, which may exceed a physical storage capacity of the device. The storage device may allocate logical capacity in the logical address space. An allocation request may be allowed when there is sufficient unassigned and/or unallocated logical capacity to satisfy the request. Data may be stored on the non-volatile storage device by requesting physical storage capacity. A physical storage request, such as a storage request or physical storage reservation, when there is sufficient available physical storage capacity to satisfy the request. The device may maintain an index to associate logical identifiers (LIDs) in the logical address space with storage locations on the storage device. This index may be used to make logical capacity allocations and/or to manage physical storage space.Type: GrantFiled: November 5, 2014Date of Patent: March 28, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Jonathan Thatcher, David Flynn
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Patent number: 9606915Abstract: The operation of a pool of solid state drives is orchestrated to manage garbage collection and wear leveling. Each individual solid state drive is operated in either an Active Mode in which I/O commands are processed or in a Maintenance Mode in which garbage collection is performed and no I/O commands are processed. The selection of solid state drives in the Active Mode is further selected to achieve wear leveling over the pool of solid state drives. A virtualization layer provides dynamic mapping of virtual volume addresses to physical solid state drives.Type: GrantFiled: August 11, 2015Date of Patent: March 28, 2017Assignee: Toshiba CorporationInventors: Nigel D. Horspool, Yaron Klein
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Patent number: 9606916Abstract: A memory system includes a high-bandwidth memory device, the high-bandwidth memory device having a relatively high operation bandwidth, the high-bandwidth memory device having a plurality of access channels. A low-bandwidth memory device has a relatively low operation bandwidth relative to the high-bandwidth memory device, the low-bandwidth memory device having one or more access channels. An interleaving unit performs a memory interleave operation among the plurality of access channels of the high-bandwidth memory device and an access channel of the one or more access channels of the low-bandwidth memory device.Type: GrantFiled: June 18, 2014Date of Patent: March 28, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Sung Hyun Lee, Jun Hee Yoo, Dongsoo Kang, Il Park, Kiyeon Lee, Euicheol Lim
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Patent number: 9606917Abstract: An arithmetic processing apparatus includes: first and second core groups each including cores, a first to an Nth (N is plural) caches that process access requests from the cores, and an intra-core-group bus through which the access requests from the cores are provided to the first to Nth caches; and a first to an Nth inter-core-group buses each provided between the first to Nth caches in the first and second core groups respectively. The first to Nth caches in the first core group individually store data from a first to an Nth memory spaces in a memory, respectively. The first to Nth caches in the second core group individually store data from an N+1th to a 2Nth memory spaces, respectively. The first to Nth caches in the first core group access the data in the N+1th to 2Nth memory spaces, respectively, via the first to Nth inter-core-group buses.Type: GrantFiled: March 30, 2015Date of Patent: March 28, 2017Assignee: FUJITSU LIMITEDInventor: Ryuichi Sunayama
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Patent number: 9606918Abstract: Systems and methods for improving caching mechanisms in a storage system are disclosed. The method includes storing data associated with a write input/output (I/O) request at a cache; determining an amount of dirty data stored in the cache, where the dirty data is data in the cache that has not yet been written to a persistent storage location managed by a storage system; determining if the amount of dirty data exceeds a threshold value; determining a cache flush rate based on the amount of dirty data stored at the cache, when the amount of dirty data exceeds the threshold value; and writing data from the cache at the determined cache flush rate to the persistent storage location.Type: GrantFiled: October 20, 2016Date of Patent: March 28, 2017Assignee: NetApp Inc.Inventors: Randolph Wesley Sterns, Mark Edward Regester, Kevin Lee Kidney, Yulu Diao
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Patent number: 9606919Abstract: A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.Type: GrantFiled: October 13, 2014Date of Patent: March 28, 2017Assignee: Intel CorporationInventors: Yang Ni, Rajkishore Barik, Ali-Reza Adl-Tabatabai, Tatiana Shpeisman, Jayanth N. Rao, Ben J. Ashbaugh, Tomasz Janczak