Patents Issued in May 2, 2017
  • Patent number: 9640717
    Abstract: An ultraviolet light emitting apparatus may include a chamber, at least one semiconductor light emitting device, an electron beam irradiation source, and first and second connection electrodes configured to apply a voltage from an external power source to the at least one semiconductor light emitting device. The chamber may define an internal space and include a light emission window. The at least one semiconductor light emitting device may be on the light emission window and include a first conductivity type nitride semiconductor layer, an undoped nitride semiconductor layer, and an active layer between the first conductivity type nitride semiconductor layer and the undoped nitride semiconductor layer. The electron beam irradiation source may be in the internal space of the chamber and configured to irradiate an electron beam onto the undoped nitride semiconductor layer.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: May 2, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Denis Sannikov
  • Patent number: 9640718
    Abstract: According to one embodiment, a method for manufacturing a display element is disclosed. The method can include forming a peeling layer, forming a resin layer, forming a barrier layer, forming an interconnect layer, forming a display layer, and removing. The peeling layer is formed on a major surface of a base body. The major surface has first, second, and third regions. The peeling layer includes first, second, and third peeling portions. The resin layer is formed on the peeling layer. The resin layer includes first and second resin portions. The barrier layer is formed on the first, second, and third peeling portions. The interconnect layer is formed on the barrier layer. The display layer is formed on the interconnect layer. The first peeling portion is removed from the first resin portion and the second peeling portion is removed from the second resin portion.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: May 2, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Miura, Tatsunori Sakano, Tomomasa Ueda, Nobuyoshi Saito, Shintaro Nakano, Yuya Maeda, Hajime Yamaguchi
  • Patent number: 9640719
    Abstract: Disclosed are a light emitting diode (LED), an LED module including the same, and a method of fabricating the same. The light emitting diode includes a first conductive-type semiconductor layer; a second conductive-type semiconductor layer; an active layer interposed between the first conductive-type semiconductor layer and the second conductive-type semiconductor layer; a first electrode pad region electrically connected to the first conductive-type semiconductor layer; a second electrode pad region electrically connected to the second conductive-type semiconductor layer; and a spark gap formed between a first leading end electrically connected to the first electrode pad region and a second leading end electrically connected to the second electrode pad region. The spark gap can achieve electrostatic discharge protection of the light emitting diode.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: May 2, 2017
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Hyeon Chae, Joon Sup Lee, Daewoong Suh, Min Woo Kang, Hyun A Kim
  • Patent number: 9640720
    Abstract: Provided is a surface light-emitting device comprising a substrate composed of an oriented polycrystalline zinc oxide sintered body in a plate shape, a light emitting functional layer provided on the substrate, and an electrode provided on the light emitting functional layer. According to the present invention, a surface light-emitting device having high luminous efficiency can be inexpensively provided.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: May 2, 2017
    Assignee: NGK Insulators, Ltd.
    Inventors: Morimichi Watanabe, Katsuhiro Imai, Jun Yoshikawa, Tsutomu Nanataki, Takashi Yoshino, Yukihisa Takeuchi
  • Patent number: 9640722
    Abstract: A semiconducting structure configured to emit electromagnetic radiation. The structure includes a first zone and a second zone with first and second types of conductivities respectively opposite to each other, the first and second zones being connected to each other to form a semiconducting junction. The first zone includes at least a first and a second part, the first and the second parts being separated from each other by an intermediate layer, as a spreading layer, extending approximately parallel to a junction plane along a major part of the junction. The spreading layer can cause spreading of carriers in the plane of the spreading layer.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: May 2, 2017
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventor: David Vaufrey
  • Patent number: 9640723
    Abstract: Various embodiments include methods of fabricating a semiconductor device that include forming a plurality of nanowires on a support, wherein each nanowire comprises a first conductivity type semiconductor core and a second conductivity type semiconductor shell over the core, forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface, removing a portion of the insulating material layer to define an active region of nanowires, and forming an electrical contact over the substantially planar top surface of the insulating material layer.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: May 2, 2017
    Assignee: GLO AB
    Inventor: Scott Brad Herner
  • Patent number: 9640724
    Abstract: A III-nitride light emitting layer is disposed between an n-type region and a p-type region in a double heterostructure. At least a portion of the III-nitride light emitting layer has a graded composition.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: May 2, 2017
    Assignee: Lumileds LLC
    Inventors: Yu-Chen Shen, Nathan F. Gardner, Satoshi Watanabe, Michael R. Krames, Gerd O. Mueller
  • Patent number: 9640725
    Abstract: A nitride light-emitting diode includes a substrate, an n-type nitride layer, a light-emitting layer, a p-type nitride layer, a p+ layer, an AlInN layer, an n+ layer, and an ITO transparent electrode. A tunneling structure with an AlInN intermediate layer is adopted as the contact layer, which generates polarization charges at the tunneling junction interface and maintains effective width of the depletion region, thereby increasing tunneling probability of holes and reducing contact resistances.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 2, 2017
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Dongyan Zhang, Duxiang Wang, Xiaofeng Liu, Shasha Chen, Liangjun Wang
  • Patent number: 9640726
    Abstract: A light emitting device includes a light emitting structure including a second conduction type semiconductor layer, an active layer, and a first conduction type semiconductor layer, a second electrode layer arranged under the light emitting structure, a first electrode layer having at least portion extending to contact the first conduction type semiconductor layer passing the second conduction type semiconductor layer and the active layer, and an insulating layer arranged between the second electrode layer and the first electrode layer, between the second conduction type semiconductor layer and the first electrode layer, and between the active layer and the first electrode layer, wherein said at least one portion of the first electrode layer contacting the first conduction type semiconductor layer has a roughness.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: May 2, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sang Youl Lee, Ji Hyung Moon, June O Song, Kwang Ki Choi, Chung Song Kim, Hwan Hee Jeong
  • Patent number: 9640727
    Abstract: A light emitting device includes a light emitting element having electrodes, a support, at least one pair of conductive wires that are formed on a surface of the support with a space from each other, and on which the electrodes of the light emitting element are disposed, distance between the pair of conductive wires under an outer edge of the light emitting element being shorter than the distance between the pair of conductive wires at other portions under the light emitting element, and a phosphor layer that continuously covers the outer edge of the light emitting element and a surface of the conductive wires around a region where the light emitting element is disposed.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: May 2, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Hiroshi Kobayashi
  • Patent number: 9640728
    Abstract: An optoelectronic device is provided. The optoelectronic device comprises: an optoelectronic system for emitting light; multiple contact regions on the optoelectronic system and separated from one another; and multiple fingers on the optoelectronic system and opposite to the multiple contact regions; wherein a first contact region in the multiple contact regions is between two adjacent fingers, and a first distance between the first contact region and one of the adjacent fingers is between 5% and 50% of a second distance between the two adjacent fingers.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: May 2, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yi-Ming Chen, Shih-Chang Lee, Yao-Ning Chan, Tzu-Chieh Hsu
  • Patent number: 9640729
    Abstract: Semiconductor LED layers are epitaxially gown on a patterned surface of a sapphire substrate (10). The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact (32) and an n-metal contact (33). A dielectric polymer stress-buffer layer (36) is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads (44, 45) are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: May 2, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Salman Akram, Quanbo Zou
  • Patent number: 9640730
    Abstract: A light emitting device, comprises an element mounting substrate with a circuit pattern at least on an element mounting surface of the element mounting substrate, a light emitting element mounted on the element mounting surface of the element mounting substrate and connected with the circuit pattern, a sealing member that seals the light emitting element and is bonded on the element mounting surface, and a coating layer that covers the element mounting side of the element mounting substrate inside the sealing member, wherein the coating layer has its refractive index smaller than that of the sealing member.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: May 2, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Yoshinobu Suehiro, Koji Tasumi
  • Patent number: 9640731
    Abstract: A light-emitting diode structure comprises a first semiconductor layer; a second semiconductor layer under the first semiconductor layer; a light-emitting layer between the first semiconductor layer and the second semiconductor layer for emitting a light; a first electrical pad on the first semiconductor layer for wire bonding; a first extension connecting to the first electrical pad; and a first reflective layer covering the first extension and exposing the first electrical pad, wherein the first electrical pad and the first extension have the same thickness, and the reflectivity of the first reflective layer is higher than that of the first extension.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: May 2, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Chun-Hsiang Tu, De-Shan Kuo, Chun-Teng Ko, Po-Shun Chiu, Chia-Liang Hsu
  • Patent number: 9640732
    Abstract: Diode includes light emitting region, first metal layer, dielectric layer, and second metal layer. Light emitting diode includes n-type group III-nitride portion, p-type group III-nitride layer, and light emitting region sandwiched between n- and p-type layers. First metal layer may be coupled to p-type III-N portion and plurality of first terminals. First metal layer and p-type III-N portion may have substantially similar lateral size that is smaller than 200 micrometers. A portion of light emitting region and first metal layer may include a single via. Electrically-insulating layer may be coupled to first metal layer and sides of the single via. First terminals may be exposed from electrically-insulating layer. Second metal layer may include second terminal and may be coupled to electrically-insulating layer and to n-type III-N portion through the single via. The thickness of the diode excluding second terminal may be between 2 and 20 micrometers. Other embodiments are described.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: May 2, 2017
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Wunderer, Christopher L. Chua, Noble M. Johnson
  • Patent number: 9640733
    Abstract: A carrier leadframe, including a frame body and a carrier, is provided. The frame body includes at least one supporting portion, and the carrier includes a shell and at least one electrode portion and is mechanically engaged with the frame body via the supporting portion. A method for manufacturing the carrier leadframe as described above, as well as a light emitting device made from the carrier leadframe and a method for manufacturing the device, are also provided. The carrier leadframe has carriers that are separate in advance and mechanically engaged with the frame body, thereby facilitating the quick release of material after encapsulation. Besides, in the carrier leadframe as provided, each carrier is electrically isolated from another carrier, so the electric measurement can be performed before the release of material. Therefore, the speed and yield of production of the light emitting device made from the carrier leadframe is improved.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: May 2, 2017
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Chung-Chuan Hsieh, Yung Chieh Chen
  • Patent number: 9640734
    Abstract: Provided is a small and thin light emitting device which has no connection failure, a high life, high performance and good light extraction efficiency. The light emitting device includes a base body comprising a base material having a pair of connection terminals on at least a first main surface, a light emitting element connected to the connection terminals, and a sealing member that seals the light emitting element, wherein the base material has a linear expansion coefficient within ±10 ppm/° C. of the linear expansion coefficient of the light emitting element.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: May 2, 2017
    Assignee: NICHIA CORPORATION
    Inventors: Takuya Nakabayashi, Takeshi Ikegami, Tadaaki Ikeda, Tadao Hayashi, Hiroto Tamaki
  • Patent number: 9640736
    Abstract: Disclosed is a silicon nano crystal light emitting diode, including: a photoelectric conversion layer formed of a silicon nitride layer including a silicon nano crystal; an electron injection layer formed on the photoelectric conversion layer; and a hole injection layer, which faces the electron injection layer with the photoelectric conversion layer interposed therebetween, has an energy band gap higher than that of the photoelectric conversion layer, and has a refractive index lower than that of a silicon thin film.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: May 2, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chul Huh, Bong Kyu Kim, Chang Geun Ahn
  • Patent number: 9640737
    Abstract: Horizontal light emitting diodes include anode and cathode contacts on the same face and a transparent substrate having an oblique sidewall. A conformal phosphor layer having an average equivalent particle diameter d50 of at least about 10 ?m is provided on the oblique sidewall. High aspect ratio substrates may be provided. The LED may be directly attached to a submount.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: May 2, 2017
    Assignee: Cree, Inc.
    Inventors: Matthew Donofrio, John Adam Edmond, James Ibbetson, David Todd Emerson, Michael John Bergmann, Kevin Haberern, Raymond Rosado, Jeffrey Carl Britt
  • Patent number: 9640738
    Abstract: A light-emitting device includes a light-emitting element, a sealing material for sealing the light-emitting element, a phosphor particle having an average particle size of not more than 20 nm and dispersed in the sealing material, a dispersed particle dispersed in the sealing material and forming a three-dimensional network structure in the sealing material, and a light-scattering particle dispersed in the sealing material, having an average particle size greater than that of the phosphor particle and that of the dispersed particle, and having a refractive index greater than that of the sealing material. A concentration gradient of the phosphor particle in a height direction is formed such that a concentration thereof increases according as a position thereof decreases. An average position of the phosphor particle is lower than that of the light-scattering particle.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: May 2, 2017
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Yuta Morimura, Yuhki Ito
  • Patent number: 9640739
    Abstract: Various embodiments relate to an optoelectronic component, including a carrier element, on which at least one optoelectronic semiconductor chip is arranged, and a cover, which is mounted on the carrier element in a region extending circumferentially around the semiconductor chip and together with the carrier element forms a sealed cavity in which the at least one optoelectronic semiconductor chip is arranged in an inert gas.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: May 2, 2017
    Assignee: OSRAM GMBH
    Inventors: Krister Bergenek, Ralph Wirth, Axel Kaltenbacher, Andreas Biebersdorf, Joerg Sorg, Christine Maier, Harald Jaeger, Gertrud Kraeuter, Frank Jermann, Stefan Lange
  • Patent number: 9640740
    Abstract: The disclosure relates to a LED lighting device and a packaging method. The LED lighting device comprises a frame and at least one chip fixed in the frame, and further comprises a light emitting layer and a light condensing layer, wherein the light emitting layer wraps the chip, and the light condensing layer is arranged on the light emitting layer and configured for converging light passing through the light emitting layer.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: May 2, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BOE OPTICAL SCIENCE AND TECHNOLOGY CO., LTD.
    Inventor: Tao Wang
  • Patent number: 9640741
    Abstract: Provided is a concentrating lens of a light emitting diode lamp comprising a lens body. The lens body comprises a top portion, a bottom portion opposite the top portion, a light output surface positioned on the top portion, an optical surface formed concavely on the light output surface, and a light input surface concavely formed on the bottom portion and towards the top portion. The light input surface is disposed on a same axis with the optical surface. The light input surface comprises a light input side plane and a light input concave plane connected with the light input side plane. The concentrating lens is capable of distributing the light of LED to positions on each of the side walls of a light box close to and distal from the LED, and allowing the light emitted from the LED to lighten the light box uniformly.
    Type: Grant
    Filed: November 1, 2015
    Date of Patent: May 2, 2017
    Assignee: ARTLED TECHNOLOGY CORP.
    Inventor: Chan-Ching Lin
  • Patent number: 9640742
    Abstract: The present disclosure provides an LED package which includes electrodes, an LED die electrically connected with the electrodes, an encapsulation covering the LED die; and a casing surrounding the encapsulation and the LED die. The casing includes a base, a reflecting cup and a supporting portion. The reflecting cup extends from the base upwards, the reflecting cup surrounds the LED die, and the supporting portion is located inside the reflecting cup and across the electrodes.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: May 2, 2017
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Hou-Te Lin, Chao-Hsiung Chang, Pin-Chuan Chen, Lung-Hsin Chen
  • Patent number: 9640743
    Abstract: A method for manufacturing a package, includes preparing a lead frame that, in a region where the package is to be formed, has a first electrode and a second electrode that is different from the first electrode; clamping the first electrode and the second electrode between an upper molding die and a lower molding die; injecting a first resin into the molding dies between which the first electrode and the second electrode have been clamped, through an injection opening formed adjacent to the first electrode and on the outside of the region where the package is to be formed; curing or solidifying the injected first resin; and cutting out an injection mark of the injection opening for the first resin from next to the first electrode after the first resin has been cured or solidified.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: May 2, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Mayumi Fukuda
  • Patent number: 9640744
    Abstract: A LED module includes a substrate, a LED chip supported on the substrate, a metal wiring installed on the substrate, the metal wiring including a mounting portion on which the LED chip is mounted, an encapsulating resin configured to cover the LED chip and the metal wiring, and a clad member configured to cover the metal wiring to expose the mounting portion, the encapsulating resin arranged to cover the clad member.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: May 2, 2017
    Assignee: Rohm Co., Ltd.
    Inventor: Masahiko Kobayakawa
  • Patent number: 9640745
    Abstract: A light emitting diode includes: at least one light emitting chip; a substrate including lead frames electrically connected to electrodes of the at least one light emitting chip; a lens disposed on the substrate and enclosing the at least one light emitting chip; and an oil disposed in the lens and the substrate.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: May 2, 2017
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Yu Dae Han, Ki Bum Nam, Jung Doo Kim, Sung Soo Kim
  • Patent number: 9640746
    Abstract: The present invention provides a composite thermoelectric material. The composite thermoelectric material can include a semiconductor material comprising a rare earth metal. The atomic percent of the rare earth metal in the semiconductor material can be at least about 20%. The composite thermoelectric material can further include a metal forming metallic inclusions distributed throughout the semiconductor material. The present invention also provides a method of forming this composite thermoelectric material.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: May 2, 2017
    Assignee: California Institute of Technology
    Inventors: James M. Ma, Sabah K. Bux, Jean-Pierre Fleurial, Vilupanur A. Ravi, Samad A. Firdosy, Kurt Star, Richard B. Kaner
  • Patent number: 9640747
    Abstract: The disclosed relates to a thermoelectric device for generating electrical currents exploiting the Seebeck effect, more specifically a structural thermoelectric device which can replace a structural component of a body. The structural thermoelectric device can include a first conductor layer, a second conductor layer and located therebetween a polymer thermocouple layer having a reinforcement formed from a structural support, wherein the internal surface of the support includes at least one layer of at least one conducting polymer. The reinforcement can be is porous material with a plurality of voids, wherein the internal surfaces of the voids are coated with a conducting polymer, which is capable of providing the Peltier effect.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: May 2, 2017
    Assignee: BAE SYSTEMS PLC
    Inventors: Sajad Haq, Michael Dunleavy, Martyn John Hucker, Joseph Maurice Davies
  • Patent number: 9640748
    Abstract: A thermal oscillator (10) for creating an oscillating heat flux from a stationary spatial thermal gradient between a warm reservoir (20) and a cold reservoir (30) is provided. The thermal oscillator (10) includes a thermal conductor (11) which is connectable to the warm reservoir (20) or to the cold reservoir (30) and configured to conduct a heat flux from the warm reservoir (20) towards the cold reservoir (30), and a thermal switch (12) coupled to the thermal conductor (11) for receiving the heat flux and having a certain difference between two states (S1, S2) of thermal conductance for providing thermal relaxation oscillations such that the oscillating heat flux is created from the received heat flux.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: May 2, 2017
    Assignee: International Business Machines Corporation
    Inventors: Bernd Gotsmann, Fabian Menges
  • Patent number: 9640749
    Abstract: A piezoelectric/electrostrictive element having a piezoelectric body, a through-hole electrode, a first electrode, a second electrode, a third electrode. The piezoelectric body includes a through-hole in communication with a first main surface and a second main surface. The through-hole electrode is formed on an inner side surface of the through-hole. The first electrode is formed on the first main surface of the piezoelectric body, and connected to the through-hole electrode. The second electrode is formed on the second main surface of the piezoelectric body, and is connected to the through-hole electrode. The third electrode is formed on the second main surface of the piezoelectric body and isolated from the second electrode. A calculated average roughness in the inner side surface is larger than 0.11 microns and smaller than 16 microns. A maximum height roughness in the inner side surface is larger than 0.2 microns and smaller than 20 microns.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 2, 2017
    Assignees: NGK Insulators, Ltd., NGK Ceramic Device Ltd.
    Inventors: Shinya Takemura, Takashi Ebigase, Kenichi Tsuge
  • Patent number: 9640750
    Abstract: In an acoustic wave device, an unnecessary high-order transverse mode wave is suppressed. The acoustic wave device includes a piezoelectric substrate, at least one pair of interdigital transducer (IDT) electrodes formed on the piezoelectric substrate, and a dielectric film which covers at least a part of the piezoelectric substrate and the IDT electrodes. The IDT electrodes each have a plurality of electrode fingers interleaved with each other. An acoustic velocity of an acoustic wave in the area in which the electrode fingers are interleaved with each other is greater than an acoustic velocity of an acoustic wave in an edge area including end portions of the electrode fingers.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: May 2, 2017
    Assignee: SKYWORKS FILTER SOLUTIONS JAPAN CO., LTD.
    Inventors: Hidekazu Nakanishi, Hiroyuki Nakamura, Tetsuya Tsurunari, Joji Fujiwara
  • Patent number: 9640751
    Abstract: A device for performing a precision movement comprising a plate composed of piezoelectric material and comprising electrodes which are provided at mutually opposite and preferably parallel planes, are connectable to a controlled voltage source having electrical voltage and in this case bring about a change in the form and/or mass of the plate is characterized in that at least one of the electrodes is designed in an elastic fashion to form a base module.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: May 2, 2017
    Inventors: Alexander Potemkin, Petr Nikolaevich Luskinovich, Vladimir Alexandrovich Zhabotinsky
  • Patent number: 9640752
    Abstract: According to one embodiment, a magnetoresistive element includes a recording layer having magnetic anisotropy perpendicular to a film surface and having a variable magnetization direction, a reference layer having magnetic anisotropy perpendicular to a film surface and having an invariable magnetization direction, an intermediate layer provided between the recording layer and the reference layer, and a underlayer containing AlTiN and provided on an opposite side of a surface of the recording layer on which the intermediate layer is provided.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: May 2, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Kitagawa, Tadashi Kai, Hiroaki Yoda
  • Patent number: 9640753
    Abstract: A sensor and fabrication process are provided for forming reference layers with substantially orthogonal magnetization directions having zero offset with a small compensation angle. An exemplary embodiment includes a sensor layer stack of a magnetoresistive thin-film based magnetic field sensor, the sensor layer stack comprising a pinning layer; a pinned layer including a layer of amorphous material over the pinning layer, and a first layer of crystalline material over the layer of amorphous material; a nonmagnetic coupling layer over the pinned layer; a fixed layer over the nonmagnetic coupling layer; a tunnel barrier over the fixed layer; and a sense layer over the nonmagnetic intermediate layer. Another embodiment includes a sensor layer stack where a pinned layer including two crystalline layers separated by a amorphous layer.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: May 2, 2017
    Assignee: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Jijun Sun, Phillip Mather, Srinivas Pietambaram, Jon Slaughter, Renu Whig, Nicholas Rizzo
  • Patent number: 9640754
    Abstract: This invention provides a production process in which in a process for producing a magnetoresistive effect element, noble metal atoms in a re-deposited film adhered to a side wall after element isolation are efficiently removed to prevent short-circuiting due to the re-deposited film. The noble metal atoms are selectively removed from the re-deposited film by applying an ion beam, formed using a plasma of a Kr gas or a Xe gas, to the re-deposited film formed on the side wall of the magnetoresistive effect element after the element isolation.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: May 2, 2017
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yukito Nakagawa, Yoshimitsu Kodaira, Motozo Kurita, Takashi Nakagawa
  • Patent number: 9640755
    Abstract: A magnetic memory device includes a reference magnetic pattern having a magnetization direction fixed in one direction, a free magnetic pattern having a changeable magnetization direction, and a tunnel barrier pattern disposed between the free and reference magnetic patterns. The free magnetic pattern has a first surface being in contact with the tunnel barrier pattern and a second surface opposite to the first surface. The magnetic memory device further includes a sub-oxide pattern disposed on the second surface of the free magnetic pattern, and a metal boride pattern disposed between the sub-oxide pattern and the second surface of the free magnetic pattern. The magnetization directions of the free and reference magnetic patterns are substantially perpendicular to the first surface of the free magnetic pattern.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: May 2, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joonmyoung Lee, Kwangseok Kim, Ki Woong Kim, Whankyun Kim, Sang Hwan Park
  • Patent number: 9640756
    Abstract: According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: May 2, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisanori Aikawa, Masayoshi Iwayama
  • Patent number: 9640757
    Abstract: A double self-aligned phase change memory device structure, comprising spaced-apart facing phase change memory film members symmetrically arranged with respect to one another, each of the phase change memory film members at an upper portion thereof being in contact with a separate conductive element, and each of the phase change memory film members being in a range of from 5 nm to 25 nm in thickness. Also described are various methods of making such phase change memory device structure.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: May 2, 2017
    Assignee: Entegris, Inc.
    Inventor: Jun-Fei Zheng
  • Patent number: 9640758
    Abstract: A phase-change memory device and a method of fabricating the same are provided. The phase-change memory device includes a semiconductor substrate in which a word line is arranged, a diode line disposed over the word line and extending parallel to the word line, a phase-change line pattern disposed over the diode line, and a projection disposed between the diode line and the phase-change line pattern and protruding from the diode line. The diode line and the projection are formed of a single layer to be in continuity with each other.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: May 2, 2017
    Assignee: SK Hynix Inc.
    Inventor: Il Yong Lee
  • Patent number: 9640759
    Abstract: A resistive memory element is provided having a layer structure. The layer structure includes two layers forming two electrically conductive electrodes, respectively, a resistively switchable material sandwiched between the two layers forming the two electrodes, and in electrical connection therewith, and a confining material. The resistively switchable material is laterally confined within the confining material, between the two layers forming the electrodes. The confining material is sufficiently electrically insulating for an electric signal applied between the two conductive electrodes to change a resistance state of the memory element in operation. The confining material has a thermal conductivity greater than 0.5 W/(m·K), and preferably greater than or equal to 30 W/(m·K). The resistively switchable material is an amorphous compound comprising carbon, which has a maximal lateral dimension, along a direction parallel to an average plane of the two layers forming the electrodes, that is less than 60 nm.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: May 2, 2017
    Assignee: International Business Machines Corporation
    Inventors: Alessandro Curioni, Wabe W. Koelmans, Abu Sebastian, Federico Zipoli
  • Patent number: 9640760
    Abstract: There is disclosed a slot-die coating method and apparatus, and a substrate having a patterned coating layer. The method comprises controlling an intermittent transfer of the coating fluid from a slot-die coating head onto the substrate surface to provide, by said intermittent transfer, coated areas on the substrate surface separated by uncoated areas. The substrate surface comprises a pre-patterned layer of high surface energy areas and low surface energy areas; wherein a contact angle of the coating fluid on the substrate surface is lower in the high surface energy areas than in the low surface energy areas. Boundaries between the low surface energy areas and high surface energy areas are arranged along a slit direction of the slot die coating head.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: May 2, 2017
    Assignee: NEDERLANDSE ORGANISATIE VOOR TOEGEPAST—NATUURWETENSCHAPPELIJK ONDERZOEK TNO
    Inventors: Sabine Juliane Gabel, Ike Gerke de Vries
  • Patent number: 9640761
    Abstract: An organic light-emitting diode (OLED) display and a method of manufacturing the same are disclosed. In one aspect, the method includes performing a first mask process of forming an active layer of a thin-film transistor (TFT) over a substrate and performing a second mask process of i) forming a gate insulating layer over the active layer and ii) forming a gate electrode of the TFT over the gate insulating layer. The method also includes performing a third mask process of i) forming an interlayer insulating layer over the gate electrode and ii) forming a contact hole in the interlayer insulating layer so as to expose a portion of the active layer and performing a fourth mask process of forming a pixel electrode over the interlayer insulating layer.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: May 2, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Chungi You
  • Patent number: 9640762
    Abstract: A method for producing a transparent electrode includes a forming step, an applying step and an irradiating step. The forming step is a step of forming a conductive metal layer on a transparent resin substrate. The applying step is a step of applying a composition containing a conductive polymer and a nonconductive polymer over the transparent resin substrate and the conductive metal layer so as to form a conductive polymer layer. The irradiating step is a step of irradiating the conductive polymer layer with an infrared ray having a ratio of spectral radiance at a wavelength of 5.8 ?m to spectral radiance at a wavelength of 3.0 ?m of 5% or less.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: May 2, 2017
    Assignee: KONICA MINOLTA, INC.
    Inventors: Masaki Goto, Akihiko Takeda, Toshiyuki Matsumura
  • Patent number: 9640763
    Abstract: A display screen and a method of preparing the same are disclosed. The method includes steps of: forming a flexible base layer (20) on a rigid base substrate (10), wherein the rigid base substrate (10) includes a first region (101), a second region (102), and a connection region (103) between the first region and the second region, and the flexible base layer (20) is at least formed in both the second region (102) and the connection region (103); fabricating an organic light emitting diode device on the substrate with the flexible base layer (20) formed thereon; and stripping the rigid base substrate (10) in the second region (102) along a boundary between the second region (102) and the connection region (103). By means of a flexible display technology, the above method can achieve seamless assembly between adjacent sub-screens, and therefore increases display quality of pictures.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: May 2, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Song Song, Kazuyoshi Nagayama
  • Patent number: 9640764
    Abstract: A carbon nanotube-based ternary comparator including a first decoder, a second decoder, and a comparison circuit. The comparison circuit includes: a first comparison unit for producing a greater-than-or-equal-to signal, and a second comparison unit for producing a less-than-or-equal-to signal. A first two-bit ternary signal is input into the signal input terminal of the first decoder. A first three-bit binary signal and a phase inverted signal of the first three-bit binary signal are output from a signal output terminal of the first decoder. A second two-bit ternary signal is input into the signal input terminal of the second decoder. A second three-bit binary signal and a phase inverted signal of the second three-bit binary signal are output from the signal output terminal of the second decoder.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: May 2, 2017
    Assignee: NINGBO UNIVERSITY
    Inventors: Pengjun Wang, Weitong Tang, Qian Wang
  • Patent number: 9640765
    Abstract: Embodiments of the present invention provide a method of forming carbon nanotube based semiconductor devices. The method includes creating a guiding structure in a substrate for forming a device; dispersing a plurality of carbon nanotubes inside the guiding structure, the plurality of carbon nanotubes having an orientation determined by the guiding structure; fixating the plurality of carbon nanotubes to the guiding structure; and forming one or more contacts to the device. Structure of the formed carbon nanotube device is also provided.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: May 2, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Lawrence A. Clevenger, Chandrasekhar Narayan, Gregory A. Northrop, Carl J. Radens, Brian C. Sapp
  • Patent number: 9640766
    Abstract: The present specification relates to an organic light emitting diode having high light emitting efficiency.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: May 2, 2017
    Assignee: LG CHEM, LTD.
    Inventors: Boonjae Jang, Dong Hoon Lee, Jungoh Huh, Minyoung Kang, Dong Uk Heo, Miyeon Han, Min Woo Jung, Wooyung Jung
  • Patent number: 9640767
    Abstract: Provided are an electronic device including a novel structured interface material capable of improving interface properties of the electronic device, and the novel interface material, and more specifically, an electronic device including the interface material of the present disclosure to allow easy extraction and injection of electrons, thereby exhibiting excellent interface properties, and a phosphine oxide functionalized triazine derivative having a structure in which an electron acceptor phosphine oxide group is substituted in 1,3,5-triazine-based skeleton, which is the interface material.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: May 2, 2017
    Assignee: PUSAN NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATION
    Inventor: Sung Ho Jin
  • Patent number: 9640768
    Abstract: A heterocyclic compound of Formula 1 and an organic light-emitting device including the same are provided. Ar and X in Formula 1 are defined as in the specification.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: May 2, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seok-Hwan Hwang, Young-Kook Kim, Jun-Ha Park, Hye-Jin Jung, Jin-O Lim, Eun-Young Lee, Sang-Hyun Han, Eun-Jae Jeong, Soo-Yon Kim