Abstract: A power on reset circuit according to the present disclosure includes: a reference voltage generating circuit that generates a reference voltage, and also outputs, as a control voltage, a voltage at a node at which a voltage rise is slower than the reference voltage; a comparison voltage generating circuit that operates in response to the control voltage output from the reference voltage generating circuit, and outputs a comparison voltage depending on a power source voltage; and a comparison circuit that compares the comparison voltage output from the comparison voltage generating circuit to the reference voltage output from the reference voltage generating circuit, and outputs an operation signal while the comparison voltage exceeds the reference voltage.

Abstract: A semiconductor assembly includes a first FET integrated within the semiconductor assembly and comprising gate, source and drain terminals. The semiconductor assembly further includes a low voltage switching device integrated within the semiconductor assembly and being configured to electrically short a gate-source capacitance of the first FET responsive to a control signal.

Abstract: A photoelectric switch, including: a main body, an upper cover, an infrared tube, an elastic shading mechanism, a bridge piece, a slidable switch member, a key, a sound mode trigger block, a silent mode trigger block, and an accommodating space. The slidable switch member is transversely slidable between the main body and the upper cover. The handle of the slidable switch member protrudes out of the main body. Both the sound mode trigger block and the silent mode trigger block are up-down movably disposed on the slidable switch member and move along with the slidable switch member. When the slidable switch member is slid to one side, the sound mode trigger block is disposed right beneath the key; and when the slidable switch member is slid to the other side, the silent mode trigger block is disposed right beneath the key.

Abstract: A keyboard with a distance detecting function includes a plurality of keyswitches, and each keyswitch includes a keycap, a base, a supporting component, a recovering component and a distance detecting unit. The base has a guide slot structure. The supporting component has a first end connecting to the keycap, and a second end movably assembled with the guide slot structure. The recovering component is disposed between the supporting component and the guide slot structure. The distance detecting unit is detachably disposed on the base, and adapted to detect a movement of the keycap relative to the base for determining whether the keyswitch is actuated.

Abstract: Electronic logic gates that operate using N logic state levels, where N is greater than 2, and methods of operating such gates. The electronic logic gates operate according to truth tables. At least two input signals each having a logic state that can range over more than two logic states are provided to the logic gates. The logic gates each provide an output signal that can have one of N logic states. Examples of gates described include NAND/NAND gates having two inputs A and B and NAND/NAND gates having three inputs A, B, and C, where A, B and C can take any of four logic states. Systems using such gates are described, and their operation illustrated. Optical logic gates that operate using N logic state levels are also described.

Abstract: A semiconductor die includes at least one flexible interface block. The flexible interface block includes at least one interconnect, and at least one buffer coupled to the at least one interconnect. The flexible interface block further includes a routing interface coupled to circuitry integrated in the semiconductor die, and a controller coupled to provide communication between the routing interface and the at least one buffer.

Abstract: Logic circuits, or logic gates, are disclosed comprising vertical transport field effect transistors and one or more active gates, wherein the number of CPP's for the logic circuit, in isolation, is equal to the number of active gates. The components of the logic circuit can be present in at least three different vertical circuit levels, including a circuit level comprising at least one horizontal plane passing through a conductive element that provides an input voltage to the one or more gate structures and another conductive element that provides an output voltage of the logic circuit, and another circuit level that comprises a horizontal plane passing through a conductive bridge from the N output to P output of the field effect transistors. Such logic circuits can include single-gate inverters, two-gate inverters, NOR2 logic gates, and NAND3 logic gates, among other more complicated logic circuits.

Abstract: Systems and methods for configuring circuitry for use with a field programmable gate array (FPGA) are disclosed. The circuitry includes an array of signal processing accelerators (SPAs) and an array of network nodes. The array of SPAs is separate from a field programmable gate array (FPGA), and the array of SPAs is configured to receive input signals from the FPGA. The array of network nodes controllably route the input signals to the array of SPAs.

Abstract: Reconfigurable Integrated Circuit with On-Chip Configuration Generation A circuit and method are provided in which reconfiguration is achieved through the modification of a dynamic data path using configuration information generated on the basis of run-time variables. Rather than storing a plurality of pre-set configurations, this can allow configurations optimised to processing tasks to be implemented during operation.

Abstract: The present disclosure describes current steering phase control for current-mode logic (CML) circuits. In some aspects, a circuit for frequency division comprises a current sink connected to a ground rail. The circuit also includes first and second current-carrying branches of frequency-dividing circuitry operably connected to respective load resistors, which are connected to a power rail. A first switch element of the circuit is connected between the current sink and the first current-carrying branch and a second switch element of the circuit is connected between the current sink and the second current-carrying branch. The first and second switch elements may steer current sank by the current sink between the first and second current-carrying branches effective to alter a phase of a signal provided by the frequency division circuit.

Abstract: Embodiments herein describe a reference-less CDR circuit that receives electrical signals that may have been transmitted along either an electrical or optical interconnect which are then processed to identify the original data. To do so, the CDR circuit includes a frequency locking loop (FLL) and a phase locking loop (PLL) which generate control signals for a voltage controlled oscillator (VCO). In one embodiment, the FLL generates a coarse adjustment signal which the VCO uses to output a recovered clock that substantially matches the frequency of the received electrical signal. The PLL, on the other hand, generates a fine adjustment signal which the VCO uses to make small adjustments (e.g., half cycle phase shifts) to the recovered clock. The recovered clock outputted by the VCO is then fed back and used as an input in both the FLL and the PLL.

Abstract: A phase locked loop circuit (30, 100, 110) includes a controllable oscillator (42) for generating an output signal of desired frequency responsive to a control signal, a first phase detection circuit (32, 102, 112) for generating an output indicative of phase differential responsive to the output signal and a first edge of a reference signal and a second phase detection circuit (34, 104, 114) for generating an output indicative of phase differential responsive to the output signal and a second edge of a reference signal. The control signal to the controllable oscillator (42) is driven by the outputs of the first and second phase detections circuits.

Abstract: A method of operating a cold atom clock to maintain a highly homogeneous microwave field is provided. The method includes: driving a subset of microwave feed lines to excite a microwave field in a resonator, while a power and a phase of at least one microwave feed line in the subset is held constant, and while the power or the phase of at least one other microwave feed line in the subset is changed; measuring a strength of the atomic transition excited by the microwave field; extracting a relative power and a relative phase between or among the subset of microwave feed lines by processing the strength of the atomic transitions excited by the microwave field measured in at least one auxiliary-measurement sequence; and determining if an adjustment to one or more of the microwave feed lines is needed to improve the homogeneity of the microwave field phase and amplitude.

Abstract: An atomic cell is filled with an alkali metal therein and includes an inner wall which is formed from a material containing a compound having a polar group, a first coating layer which coats the inner wall and is formed from a first molecule having a nonpolar group and a functional group that undergoes an elimination reaction with the polar group, and a second coating layer which coats the first coating layer and is formed from a nonpolar second molecule, wherein the second molecule is polypropylene, polyethylene, or polymethylpentene.

Abstract: A quantum interference device (atomic oscillator) includes a light source unit as a coherent light source, a unit that superimposes microwave on the light source unit to generate a side band, an atom cell in which an alkali metal gas is enclosed, and a light receiving unit that detects light transmitted through the atom cell, wherein the light source unit is a surface-emitting laser that outputs a zero-order mode light and a plurality of higher-order mode lights, and a mode filter that cuts the higher-order mode lights is placed between the light source unit and the atom cell.

Abstract: The present disclosure relates to an analog-to-digital converter (ADC) that uses voltage-based signal processing and time-based signal processing to convert an analog input signal to a digital output signal. In some embodiments, the ADC has a voltage-based signal processing element configured to receive an input signal and to generate a first digital signal having a plurality of most significant bits and a residue voltage. A residue offset circuit is configured to provide a residue offset voltage to the residue voltage. A voltage-to-time conversion element is configured to convert a sum of the residue voltage and the residue offset voltage to a time domain representation, and a time-based signal processing element is configured to convert the time domain representation to a second digital signal having a plurality of least significant bits.

Abstract: When a level of a signal output from a pixel is higher than a comparison level, the signal output from the pixel is converted into a digital signal during a first period by using a first reference signal. If the level of the signal output from the pixel is lower than the comparison level, the signal output from the pixel is converted into a digital signal during a second period that is longer than the first period by using a second reference signal.

Abstract: A method and system for extending the dynamic range of non-discontinuous analog data.

Abstract: A hybrid analog-to-digital converter (ADC) includes a plurality of analog-to-digital conversion circuits and a combining circuit. The analog-to-digital conversion circuits generate a plurality of partial digital outputs for a same analog input, respectively, wherein the analog-to-digital conversion circuits include a digital slope ADC used to perform signal quantization in a time domain. The combining circuit combines the partial digital outputs generated from the analog-to-digital conversion circuits to generate a final digital output of the analog input.

Abstract: A system and method for low-power digital signal processing, for example, comprising adjusting a digital representation of an input signal.

Abstract: A parallel-serial conversion circuit including a data transmission unit to output first data and second data of a prescribed pattern in accordance with a second clock obtained by dividing a first clock, a first flip flop to receive the first data so as to output the first data in accordance with the first clock, a second flip flop to receive the second data so as to output the second data in accordance with the first clock, a selector to select one of the first data and the second data so as to output the selected data in accordance with the first clock, and an adjustment unit to compare the second data to be received by the second flip flop and the first data output from the first flip flop so as to adjust, based on a comparison result, a timing for the first flip flop to receive the first data.

Abstract: A detection circuit performs a turbo detection process to recover a frame of data symbols from a received signal, the data symbols of the frame having been effected, during transmission, by a Markov process with the effect that the data symbols of the frame in the received signal are dependent one or more preceding data symbols which can be represented as a trellis having a plurality of trellis stages.

Abstract: [Object] To make it possible to transmit data more flexibly and with a lesser burden in an IDMA system. [Solution] There is provided an apparatus including: an acquisition unit configured to acquire an information block generated from transmission data for a user and subjected to error correction coding; and an interleaving unit configured to interleave a bit sequence of the information block using an interleaver unique to the user. The interleaving unit interleaves the bit sequence by interleaving each of two or more partial sequences obtained from the bit sequence.

Abstract: An apparatus for polar coding includes an encoder circuit that implements a transformation C=u1N-sBN-s{tilde over (M)}n, wherein u1N-s, BN-s, {tilde over (M)}n, and C are defined over a Galois field GF(2k), k>1, wherein N=2n, s<N, u1N-s=(u1, . . . , uN-s) is an input vector of N?s symbols over GF(2k), BN-s is a permutation matrix, {tilde over (M)}n=((N?s) rows of Mn=), the matrix M1 is a pre-defined matrix of size q×q, 2<q and N=qn, and C is a codeword vector of N?s symbols, and wherein a decoding complexity of C is proportional to a number of symbols in C; and a transmitter circuit that transmits codeword C over a transmission channel.

Abstract: The present application provides a multiplex antenna matching circuit and method for coupling multiple signal ports to an antenna via cascaded diplexers. The multiplex antenna includes a diplexer for coupling a single merged port associated with an antenna with two separated signal nodes. The multiplex antenna further including at least one cascaded sub-diplexer. Each cascaded sub-diplexer is associated with a respective one of the two separated signal nodes, where the cascaded sub-diplexer further couples the respective one of the two separated signal nodes with a respective two further separated signal ports.

Abstract: A multiplexer includes a common terminal connected to an inductance element at a connection path with an antenna element, filter elements including different pass bands and connected to the antenna element with the common terminal therebetween, and an inductance element arranged in series between a transmission filter with a largest capacitance when viewed from the antenna side among the filter elements and the common terminal. An inductive component of the inductance element and a capacitive component of the transmission filter element define an LC series resonant circuit, and a resonant frequency of the LC series resonant circuit is lower than any of pass bands of the filter elements.

Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters also include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may also be included on the common port of the multi-path RF switch to provide additional impedance matching capability.

Abstract: A broadband digital transmitter is disclosed. The digital transmitter includes a vector decomposer circuit, a phase selector circuit, and a digital power amplifier (DPA). The vector decomposer circuit receives baseband in-phase (I) and quadrature (Q) signals and decomposes the baseband I and Q signals into an offset envelope signal and a non-offset envelope signal. The phase selector circuit receives a plurality of phase offset local oscillator (LO) signals and outputs, responsive to the baseband I and Q signals, offset LO signals and non-offset LO signals. The DPA processes the offset envelope signal, the non-offset envelope signal, the offset LO signals, and the non-offset LO signals to generate an output signal of the digital transmitter.

Abstract: A method (100) in a network node serving a User Equipment (UE) capable of network assisted interference cancellation is disclosed. The method involves a signaling (104) of an indication to the UE indicating whether the UE should enable or disable (108) the network assisted interference cancellation, or whether the UE should autonomously choose (110) to enable or disable the network assisted interference cancellation. The enabling or disabling is done for at least one of demodulating the downlink channel or computing the channel state information. The method further involves a receiving (106) of information from the UE about whether the network assisted interference cancellation has been used by the UE for at least one of demodulating the downlink channel and computing the channel state information. A related method in a UE is also disclosed, together with the network node and the UE as such.

Abstract: An object is to mitigate interference by using effective knowledge or information as to an interference signal while reducing an increase in the amount of calculation. A terminal device includes a reception unit that receives downlink control information from a base station apparatus. In a case of a prescribed transmission mode, a downlink shared channel destined for the terminal apparatus is demodulated on the basis of a power offset between transmit power of the terminal apparatus and transmit power of another terminal apparatus in the downlink shared channel included in the downlink control information. Whether or not to perform interference cancellation is determined according to a value of the power offset.

Abstract: A wireless sensor device capable of constant operation without replacement of batteries. The wireless sensor device is equipped with a rechargeable battery and the battery is recharged wirelessly. Radio waves received at an antenna circuit are converted into electrical energy and stored in the battery. A sensor circuit operates with the electrical energy stored in the battery, and acquires information. Then, a signal containing the information acquired is converted into radio waves at the antenna circuit, whereby the information can be read out wirelessly.

Abstract: This invention relates to a square with rounded angles smart card, in a non-conventional size, with a plurality of electronic circuits embedded in a specified pattern and assigned to different functionalities. This smart card with the means of a wired or contactless reader-writer apparatus, can be used for commercial, business or payment transactions and offers a number of advantages versus the old cards.

Abstract: A hand strap for an electronic apparatus is provided with a first gripper, which is attached to a rear surface of an electronic apparatus in a removable manner, and a second gripper. The first gripper has a main body and an accommodation portion. The second gripper includes a fixed portion and an extra-long portion, one end of which is a free end. The extra-long portion is accommodated inside the accommodation portion, and can adjust the entire length of the second gripper. A finger accommodation space in which a finger other than a thumb is disposed between the first gripper and the second gripper, is defined. By gripping the first gripper with the pad and the tip end of a finger other than a thumb, it is possible to perform operation with a thumb over a wide area of a touch panel while holding an electronic apparatus with one hand.

Abstract: A protective case for a smartphone is described, which includes a first frame part, and a second frame for retaining the smartphone therein. One frame part has a ball at an end thereof, the other includes a socket adapted to fixedly retain the ball therein. One of the frame parts is pivotable relative to the other via the ball and socket between open and closed states spanning up to 90 degrees, with one of the two frame parts further rotatable 360 degrees about its own longitudinal axis thereof via the ball and socket.

Abstract: A case having a standing leg for an electronic device includes a soft protective cover, a hard protective frame, and a standing leg. An opening is formed on a back portion of the hard protective frame to receive the standing leg therein. The standing leg is pivoted with the soft protective cover and the hard protective frame. The standing leg is configured to rotate up to about a predetermined angle until the rotation of the standing leg is prevented by a pivoting end wall of the hard protective frame. The opening is sized to receive the standing leg. The standing leg is rotatable from a closed position in which it is received in the opening to an open position in which the standing leg is rotated about the predetermined angle. In an open position, the electronic device rests on a surface at a preferred viewing angle.

Abstract: A transceiver circuit with a front-end and a back-end is provided. The front-end has terminals for coupling to a first and a second capacitor and tunable resistors coupled between the terminals and a reference terminal. The front-end is configured to receive receiver signals at the terminals utilizing a first setting for the resistors. The front-end is configured to generate a receiver data packet based on the receiver signals. The back-end is configured to check the receiver data packet for errors with respect to a defined tuning data packet. If an error is found, the back-end sets the resistors to a default setting. If no errors are found, the back-end sets the resistors to a second setting.

Abstract: In an RFIC provided in a semiconductor device according to an embodiment, a low-noise amplifier (41) for reception and a power amplifier (11) for transmission are connected to a common antenna connection terminal (5). Between the antenna connection terminal (5) and an LNA (41), a circuit (31) is connected to be used for impedance matching, and a semiconductor switch (SW1) is connected in parallel with the circuit (31).

Abstract: Generally discussed herein are systems, devices, and methods for waveform watermarking. A device can include an overt symbol modulator to receive mapped overt data and provide overt data modulated in accord with an overt data modulation scheme, a covert symbol modulator to receive mapped covert data and provide, using dither modulation and micro-amplitude modulation, covert data modulated in accord with a covert data modulation scheme, a switch to receive the modulated covert data and the modulated overt data and forward the covert data and modulated overt data based on a signal indicating whether covert data is to be transmitted or covert data is to be transmitted, and transmission circuitry to produce an electromagnetic waveform of the modulated data from the switch.

Abstract: Recursive constellations of Ultra-Wide Band (“UWB”) transceivers are optimized based on a desired functionality or objective. By structuring transceivers of an UWB network into a plurality of subsets or constellations of UWB nodes each constellation can be optimized for a particular purpose while maintaining connectivity and cohesiveness within the overarching network. Implementations of specific functionality can be applied to Intra-Vehicle, Inter-Vehicle and Vehicle-to-Infrastructure constellations resulting in localized optimizations while maintaining a cohesive and coherent UWB network.

Abstract: An example apparatus for supporting digital pre-distortion (DPD) and full duplex (FDX) in cable network environments is provided and includes a first path for signals being transmitted out of the apparatus, a second path for signals being received into the apparatus, a DPD actuator located on the first path, an amplifier located on the first path, an echo cancellation (EC) actuator located on the second path, and a data interface including a plurality of channels connecting the apparatus to a signal processor. DPD coefficients, EC coefficients and delay parameters are provided over the data interface from the signal processor to the apparatus. The DPD actuator predistorts signals on the first path using the DPD coefficients compensating for distortions introduced by the amplifier, and the EC actuator reduces interferences in signals on the second path using the EC coefficients and the delay parameters, facilitating FDX communication by the apparatus.

Abstract: A method of transmitting data from a transmitter device to a plurality of receiver devices each of which is connected to the transmitter device via a respective wire connection the method comprising transmitting a common signal onto all or both of the respective wire connections and using a multiple access technique to enable respective virtual data channels to be generated for transmitting data from the transmitter device to each of the receiver devices via its own respective virtual data channel.

Abstract: Systems and methods for improving data communication over less than perfect power lines or transmission lines are described. The systems and methods allow for pushing out electrically any null within a frequency range of interest and/or for lossless transmission by providing impedance matching between communication devices and the transmission line. This is achieved by implementing line equalizing modules within the transceivers, at the transmitter side and/or the receiver side, or by plugging, as a stand-alone module, into an electrical outlet within a building. The line equalizing module includes multiple inductor-capacitor cells coupled in cascade where multiple switches allow for selective and concurrent connection between the inductor-capacitor cells. In another embodiment, the line equalizing module includes variable inductor-capacitor cells. The line equalizing module provides a variable propagation delay that allows for stretching electrically the transmission line.

Abstract: Aspects of the subject disclosure may include, for example, receiving wirelessly a first transmission of data from a network interface device, wherein the network interface device includes a receiver and a transmitter. The network interface device receives, via the receiver, electromagnetic waves that propagate on a surface of a dielectric transmission medium. The network interface device converts, via the receiver, the electromagnetic waves to an electrical signal, and transmits, via the transmitter, a first transmission of the data based on the electrical signal. A determination is made that the data is to be directed towards a recipient device connected to at least one electrical circuit and, based on the determination, a second transmission of the data is initiated as a power line communication transmission of a utility power line via the at least one electrical circuit. Other embodiments are disclosed.

Abstract: Provided is a plug connector to which a multicore cable having at least two or more individual conductors can be connected, wherein the plug connector has at least one signal transmitter for contactless signal transmission, wherein the plug connector has a microchip, wherein the microchip can be electrically connected to the individual conductors and is electrically connected to the at least one signal transmitter. Also provided is a system including a plug connector and a mating connector, each of which having at least one signal transmitter, wherein the respective signal transmitters are aligned parallel to each other when mated.

Abstract: An embodiment of a system includes a transmitter and a receiver that is remote from the transmitter. The transmitter includes a first number of transmit antennas and a signal generator. The transmit antennas are each spaced from another of the transmit antennas by approximately a distance and configured to provide, at one or more wavelengths that are greater than twice the distance, a channel capacity that exceeds a saturation channel capacity. And the signal generator is configured to generate a second number of signals each having a wavelength that is greater than twice the distance, the second number related to a third number of signal pipes, and to couple each of the second number of signals to a respective one of the transmit antennas. The receiver includes a fourth number of antennas and a signal analyzer.

Abstract: Methods, systems, and devices for wireless communication are described. A base station may identify two (or more) beamforming directions associated with simultaneous communications to a set of receivers. Each receiver may be associated with a different one of the two beamforming directions. The base station may schedule resources for simultaneous communications with the set of receivers based on the identified two beamforming directions. The base station may schedule simultaneous transmissions to the set of receivers using the scheduled resources.

Abstract: There is disclosed a method performed by a User Equipment, UE, for Hybrid Automatic Repeat Request, HARQ, retransmission of data in a multi-antenna wireless communication system. The method comprises, receiving Acknowledgement/Negative Acknowledgement, ACK/NACK, feedback information relating to data transmitted on two streams, and performing, upon rank reduction where only one stream is available for transmission, retransmission of data on a cancelled stream over the remaining stream. There is furthermore disclosed a UE configured for performing the method. A transmission method together with an arrangement for a UE is also disclosed.

Abstract: An embodiment of a receiver includes a first number of antennas and a signal analyzer. The antennas are each spaced from another of the antennas by approximately a distance, and are configured to provide, at one or more wavelengths that are greater than twice the distance, a channel capacity that exceeds a saturation channel capacity. The signal analyzer is configured to recover information from a second number of signals each received by at least one of the antennas over a respective one of a third number of signal pipes, and each having a wavelength that is greater than twice the distance, the second number being related to the third number. Such a receiver can be a multiple-input-multiple-output orthogonal-frequency-division-multiplexing (OFDM-MIMO) receiver that can be configured to increase the information-carrying capacity of a channel (i.e., increase the channel capacity) above and beyond a saturation capacity of the channel.

Abstract: An embodiment of a transmitter includes a first number of antennas and a signal generator. The antennas are each spaced from another of the antennas by approximately a distance, and are configured to provide, at one or more wavelengths that are greater than twice the distance, a channel capacity that exceeds a saturation channel capacity. The signal generator is configured to generate a second number of signals each having a wavelength that is greater than twice the distance, the second number being related to a third number of signal pipes. And the signal generator is configured to couple each of the signals to a respective one of the antennas. Such a transmitter can be a multiple-input-multiple-output orthogonal-frequency-division-multiplexing (OFDM-MIMO) transmitter that can be configured to increase the information-carrying capacity of a channel (i.e., increase the channel capacity) above and beyond a saturation capacity of the channel.

Abstract: An embodiment of a system includes a first number of antennas, a transmitter, and a receiver. The antennas are each spaced from another of the antennas by approximately a distance and are configured to provide, at one or more wavelengths that are greater than twice the distance, a channel capacity that exceeds a saturation channel capacity. The transmitter is configured to generate a second number of signals each having a wavelength that is greater than twice the distance, the second number related to a third number of signal pipes, and to couple each of the second number of signals to a respective one of the antennas. And the receiver is configured to receive from at least one of the antennas a fourth number of signals each having a wavelength that is greater than twice the distance, and to recover information from each of the fourth number of signals, the fourth number being related to the third number.