Abstract: A control system for a multi-phase switched reluctance (SR) machine, having at least two phases, is disclosed. The control system may include a converter circuit and a controller. The controller may include a phase voltage estimator module configured to determine a first phase voltage and a second phase voltage associated with a second phase second phase for the SR machine. The controller may further include a flux estimator module configured to determine first and second estimated fluxes, the first estimated flux associated with the first phase and based on the first phase voltage and an associated first mutual voltage and the second estimated flux the second estimated flux associated with the second phase and based on the second phase voltage and an associated second mutual voltage, and a position observer module configured to determine a rotor position based at least partially on the first estimated flux, the second mutual flux.

Abstract: One example includes a half-bridge switching circuit system. The system includes a first plurality of switches arranged between a first rail voltage and an output on which an output voltage is provided and a second plurality of switches arranged between a second rail voltage and the output, the first and second pluralities of switches being controlled via a plurality of switching signals. The system also includes a plurality of flying capacitors arranged to interconnect the first and second pluralities of switches, and further includes a plurality of snubber circuits that are each arranged in parallel with a respective one of the plurality of flying capacitors, the first plurality of switches, and the second plurality of switches.

Abstract: A drive apparatus is provided with a motor, a plurality of substrates and a plurality of connectors. The substrates are provided in one side of the motor in the axial direction thereof, the substrates including switching elements and control components mounted thereon. The connectors are provided in an opposite side against the motor across the substrates, the connectors including connector terminals connected to one of the substrates. The substrates include two or more non-overlapped regions where no substrates are overlapped when projecting the substrates in the axial direction. The non-overlapped regions include a connector connecting region connected to the connector terminals, and a motor line connecting region connected to winding groups of the motor corresponding to every phase of each winding group.

Abstract: An LED indicator 4 connected to industrial machinery including an inverter 1, includes: an LED substrate 8 into which a display control signal according to a state relating to the industrial machinery is input; and a plurality of displays 31, 32, and 33 configured to display in a lighting state corresponding to a state of the industrial machinery, on the basis of the display control signal input by the LED substrate 8. The plurality of displays 31, 32, and 33 each include a partially circular-arc shape, and are generally arranged in an approximately annular shape. The plurality of displays 31, 32, and 33 include the two displays 31, 32 that generally configure a half ring at one side of the approximately annular shape, and the one display 33 that generally configures a half ring at the other side of the approximately annular shape.

Abstract: In a control apparatus for an AC motor, a voltage waveform specifying unit of an inverter control unit specifies a voltage waveform for operating the inverter, based on a voltage vector calculated by a voltage command calculation unit. A spectrum amplitude extraction unit acquires values of bus current of the inverter and extracts the spectrum amplitude of the specific frequency that corresponds to the LC resonance frequency of the converter. A boost/non-boost state judgement unit of a converter control unit determines whether the state required by the converter in the next control cycle is the boost state or the non-boost state. When the spectrum amplitude of the specific frequency, correlated with the voltage waveform, is higher than the judgement threshold value and the converter is in the non-boost state, a voltage command value alteration unit changes the voltage command reference value such that the converter transitions to the boost state.

Abstract: A control apparatus for an AC motor includes an inverter, a voltage-command calculation unit calculating a vector used for giving a command to the inverter, a voltage-waveform specifying unit specifying, as a voltage waveform for operating the inverter based on the vector, a pulse pattern selected from previously stored voltage waveforms, or a voltage waveform of a PWM signal generated by a comparison between a phase voltage and a carrier wave, an amplitude-spectrum extraction unit obtaining a bus current of the inverter to extract an amplitude spectrum of a specific frequency corresponding to a resonance frequency of a circuit through which the bus current flows, and a voltage-amplitude limiting unit limiting an amplitude of the vector so that the amplitude spectrum of the specific frequency becomes less than a threshold, if the amplitude spectrum of the specific frequency correlating with the voltage waveform is the threshold or more.

Abstract: A drive control apparatus for multiple-winding motor includes: a modulation rate phase command generation unit which calculates currents of first and second inverters for driving a multiple-winding three-phase motor and generates a modulation rate command and a phase command for equalizing the currents; a pulse number determination unit which determines the number of pulses per half cycle on the basis of a frequency command; a pattern table for storing switching patterns; and gate signal generators which control the first and second inverters, using an optimal switching pattern based on the number of pulses, wherein the modulation rate phase command generation unit performs control for equalizing currents of the first and second inverters, and the phase or frequency at which the control is performed is changed in accordance with any of the number of pulses, the modulation rate, the frequency command, and the switching pattern.

Abstract: An apparatus for controlling a motor having a housing in which a stator and a rotor are disposed. The motor is cooled by a cooling oil in the housing. The apparatus includes a control unit configured to control the motor. The control unit has a temperature increase mode for heating the cooling oil with use of heat generated by a resistance of a coil provided in the stator.

Abstract: A solar cell module includes a solar panel and a protecting portion. The solar panel has first and second surfaces each having a rectangular shape. The protecting portion holds the solar panel along each of a first side and a second side of the solar panel that are opposed to each other, and exposes a third side of the solar panel except at end portions of the third side. The protecting portion includes first and second protecting members. The first protecting member sandwiches the first side from both the first and second surface sides to protect the first side. The second protecting member sandwiches the second side from both the first and second surface sides to protect the second side. The first and second sides each includes a portion located on an outer side of the solar panel than the third side in a first direction along the first side.

Abstract: Photovoltaic modules are mounted onto a solar tracker array torque tube via pairs or left-handed and right-handed photovoltaic array connectors having spring latch assemblies. The left-handed and right-handed photovoltaic array connectors have orientation projections that couple with and extend into the interior body of the torque tube. The orientation projections on the spring latch assemblies of each pair of left-handed and right-handed photovoltaic array connector allow for the photovoltaic array connectors to fit over and settle on a torque tube, and thereby support and mount a photovoltaic module as part of a solar tracker array.

Abstract: A mounting assembly for mounting a solar panel to a surface includes a mounting base. The mounting base supports a fastener. A module mount has a module mount sidewall supporting the fastener. The module mount is movable with respect to the fastener when the fastener is received through the module mount opening. A first distance between a bottom surface of the module mount and a top surface of the mounting base is adjustable. A mounting clamp has a mounting clamp sidewall defining a mounting clamp opening through which the fastener is received. The mounting clamp is movable with respect to the fastener when the fastener is received through the mounting clamp opening such that a second distance between a bottom surface of the mounting clamp and a top surface of the module mount is adjustable. The solar panel is mounted between the mounting clamp and the module mount.

Abstract: Photovoltaic modules are mounted onto a solar tracker array torque tube via pairs or left-handed and right-handed photovoltaic array connectors or brackets. The left-handed and right-handed photovoltaic array connectors have orientation projections that couple with and extend into the interior body of the torque tube. Pairs of left-handed photovoltaic array connectors and pairs of right-handed photovoltaic array connectors of adjacent photovoltaic modules can further be fastened together, thereby securing the photovoltaic modules to the torque tube and distributing the load of the overall number of photovoltaic modules mounted on the solar tracker array.

Abstract: Photovoltaic module assemblies are mounted onto a solar tracker array torque tube via photovoltaic module brackets. The photovoltaic module brackets provide for stacking photovoltaic module assemblies in a nested configuration. The photovoltaic module assemblies are pre-assembled off-site, at a location different than the photovoltaic array installation site, and the nested configuration allows for efficient transportation of pre-assembled photovoltaic module assemblies to the installation site.

Abstract: There is provided a solar power generation system comprising: a main body being hollow and having an inner space defined therein, wherein the main body has a top hole defined in a top wall thereof; a rotation assembly received in the main body; a hydraulic or pneumatic cylinder assembly received in the main body; a power generation assembly configured to be withdrawn from the main body or retracted into the main body through the top hole using the hydraulic or pneumatic cylinder assembly, wherein the power generation assembly has a solar cell structure at a top end thereof, wherein the rotation assembly is configured to change an orientation of the solar cell structure; a controller configured to control operations of the rotation assembly and the hydraulic or pneumatic cylinder assembly.

Abstract: A method of producing a wall section is described. The method includes vacuum forming a carbon fiber sheet to a pyramidal mold core to create a first layer having a plurality of pyramidal shapes. A conductive frame is disposed on the carbon fiber sheet. A first set of solar panel post slots are trimmed from the first layer. Vents are cut in the carbon fiber sheet to expose frame connectors. The carbon fiber sheet is clamped to the conductive frame and wrapped around the conductive frame and over the first layer to create a second layer. A second set of solar panel post slots are trimmed from the second layer so as to overlap the first solar panel post slots. The second layer is trimmed to expose locking post slot areas. The method also includes affixing locking posts to the peaks of the plurality of pyramidal shapes.

Abstract: A photovoltaic panel includes: a plurality of power generation portions each having a light receiving surface, each power generation portion including a plurality of power generating elements each configured to generate power in accordance with an amount of received light; and a coupling portion configured to couple each power generation portion, wherein each power generation portion is coupled so as to be rotatable about the coupling portion used as a rotation axis, and the power generation portions are capable of, by being rotated, taking a light receiving position at which the power generation portions are located such that the light receiving surfaces of the power generation portions are oriented to an identical direction, and a fold position at which the power generation portions are located such that a set of the light receiving surfaces of the power generation portions face each other.

Abstract: According to one embodiment, a photovoltaic system contains a photovoltaic element comprising a photoelectromotive force part, a first transmitting member, and a second transmitting member, the photoelectromotive force part having a light transmitting property and generating an electromotive force by light irradiation, the first transmitting member and the second transmitting member being arranged at both sides of the photoelectromotive force part in a thickness direction, light transmittances of the first transmitting member and the second transmitting member being electrically changed; a control part configured to maximize a power generation amount of the photovoltaic element by changing the respective light transmittances of the first transmitting member and the second transmitting member while a light transmittance of a whole photovoltaic element is kept constant.

Abstract: Provided are a cascaded photovoltaic grid-connected inverter, a control method and a control device for the same. The method includes: determining whether at least one of inverter units of the cascaded photovoltaic grid-connected inverter is over-modulated; injecting a reactive current to a power grid to make a grid-connected current effective value greater than or equal to ?{square root over (2)}*idcmin, in a case that at least one of the inverter units is over-modulated; determining a voltage U0 required for grid connection for the cascaded photovoltaic grid-connected inverter corresponding to a current grid-connected current effective value; and adjusting an output active voltage of each of the inverter units according to Ujd=Pj/P0*U0d, and adjusting an output reactive voltage of each of the inverter units in a case that none of the inverter units is over-modulated.

Abstract: Solar thermal units and methods of operating solar thermal units for the conversion of solar insolation to thermal energy are provided. In some examples, solar thermal units have an inlet, and a split flow of heat absorbing fluid to either side of the solar thermal unit, along a first fluid flow path and a second fluid flow path. Optionally, one or more photovoltaic panels can be provided as part of the solar thermal unit, which may convert solar insolation to electric power that may be used by a system connected to the solar thermal unit.

Abstract: A power generation abnormality detection method includes: operating a power converter to controllably operate a solar cell module at a plurality of predetermined voltage points to obtain a plurality of measured currents; utilizing the predetermined voltage points and measured currents to calculate a plurality of first power data; comparing the plurality of first power data with a first PV curve; or operating the power converter to controllably operate the solar cell module at a plurality of predetermined current points to obtain a plurality of measured voltages; utilizing the predetermined current points and measured voltages to calculate a plurality of second power data; comparing the plurality of second power data with a second PV curve.

Abstract: A harmonic-rejection mixer apparatus includes a mixing circuit and a combining circuit. The mixing circuit receives mixes an input signal and a first local oscillator (LO) signal to generate a first output signal, and mixes the same input signal and a second LO signal to generate a second output signal, wherein the first LO signal and the second LO signal have a same frequency but different phases. The combining circuit combines the first output signal and the second output signal, wherein harmonic rejection is at least achieved by combination of the first output signal and the second output signal.

Abstract: A wireless communication device configured to prevent a transmission time period for sending a wireless signal and a receiving time period for receiving a wireless signal from being overlap, comprises: a transmitter that includes an orthogonal modulator that orthogonally modulates an IQ-modulated modulation signal and a transmission power amplifier that power-amplifies the orthogonally modulated signal; a receiver that includes a demodulator that demodulates a received signal; a first power source that is the power source for the transmission power amplifier and the receiver; and a second power source that is the power source for the orthogonal modulator; and a controller which outputs the modulation signal to the orthogonal modulator. The first power source outputs a constant voltage to the receiver during the receiving time period, and outputs, during the transmission time period, to the transmission power amplifier, a fluctuating voltage according to an envelope of the modulation signal.

Abstract: Bias circuit for radio-frequency amplifier. In some embodiments, an amplifier circuit for radio-frequency applications can includes an amplifying transistor having an input. The amplifier circuit can further include a bias circuit having a first bias path implemented between a supply node and the input to provide a bias signal to the input of the amplifying transistor, and a second bias path implemented between the supply node and the input to provide an additional bias signal to the input of the amplifying transistor under a selected condition. The first bias path can include a first transistor configured to facilitate the bias signal provided to the input of the amplifying transistor, and the second bias path can include a second transistor configured to facilitate the additional bias signal provided to the input of the amplifying transistor.

Abstract: Bias circuit for power amplifier. In some embodiments, a bias circuit for an amplifier can include an input node, an output node, a supply voltage node, and a ground node. The bias circuit can further include a first transistor and a second transistor, with each transistor having a base, a collector, and an emitter. The base, collector and emitter of the second transistor can be coupled to the output node, input node and ground node, respectively. The base and collector of the first transistor can be coupled to the input node and supply voltage node, respectively. The bias circuit can further include a voltage adjustment circuit implemented between the emitter of the first transistor and the output node, and be configured to adjust a voltage at the emitter of the first transistor to a voltage at the output node.

Abstract: A millimetre (mm) wave power amplifier includes a plurality of amplifiers, each amplifier including an amplifying FET including a gate, drain and source. The mm wave power amplifier also includes an input port, an output port, a VDS port being connected to a VDS voltage source for setting the drain-source voltage of the FET, and a VGS port being connected to a VGS voltage source for setting the gate-source voltage of the FET. The output ports of the amplifiers are connected to a signal combiner and the input ports of the amplifiers are connected to a signal splitter. At least one of (a) at least two of the VGS ports are connected to different VGS voltage sources, and (b) at least two of the VDS ports are connected to different VDS voltage sources.

Abstract: A method and an apparatus for improving signal quality through noise detection in an electronic device are provided. The electronic device may include a power amplifier configured to amplify and output a transmitted signal, a noise detector configured to detect noise in a receiving band by the power amplifier and to output a power level of the detected noise, and a processor configured to acquire the power level of the noise through the noise detector, acquire control information to change the output power of the power amplifier based on the power level of the noise, and control the output power of the power amplifier based on the control information.

Abstract: A multi-frequency tunable low-noise amplifier and a multi-frequency tuning implementation method therefor. The amplifier comprises: a system controller (13) and a micro-electro-mechanical system (MEMS) matching tuner (12) connected to the system controller (13). The system controller (13) is configured to respond to a first operation executed by a user via a user interface (15) when in a first mode, to acquire a first matching value produced on the basis of the first operation, and to output the first matching value to the MEMS matching tuner (12). The MEMS matching tuner (12) is configured to be controlled by the system controller (13) and to support the amplifier working on different frequency bands in tuning processing, thus allowing the matching value of the MEMS matching tuner (12) itself to match a current working frequency band.

Abstract: An adaptive power amplifier and a radio frequency transmitter thereof are described. The radio frequency transmitter is a transmitter to transmit a transmission signal for a wireless communication system. The radio frequency transmitter includes at least one direct-current (DC) to direct-current (DC) converter coupled to an external power supply device for operation, a digital-to-analog converter configured to convert a digital signal into an analog signal, a filter configured to filter a harmonic component of the analog signal to generate an input signal, a RF up-converter configured to up-convert the input signal according to a desired channel frequency for generating a modulated signal, and a power amplifying circuit coupled to the DC-to-DC converter and the external power supply device, for selectively receiving one of different supply voltages for operation, and amplifying the modulated signal to generate a RF output signal.

Abstract: Amplifiers can be used for a variety of electronic-based applications. Therefore, amplifier performance is of importance. A low noise amplifier can be interfaced after an antenna or a band-select filter as a first active stage, in a receiver since its bandwidth characteristics can be closely related to a system data rate. A bandwidth enhancement technique can be leverage for low noise amplifiers by embedding a transformer between a gate and a drain terminal of a common gate transistor in a cascode topology. The embedded transformer can introduce an additional high-frequency conjugate zero pair, which can push the gain rolling-off start-up point to a higher frequency, peak the higher frequency gain, and broaden the low noise amplifier gain bandwidth.

Abstract: A semiconductor device includes: a semiconductor substrate whose contour is a pentagon; a front-stage amplifier formed relatively near a vertex of the pentagon of the semiconductor substrate; and a rear-stage amplifier formed relatively near a side opposed to the vertex of the semiconductor substrate and amplifying an output from the front-stage amplifier.

Abstract: An audio amplifier system is described comprising: a variable gain audio processor for processing digital audio signal, a digital to analog converter coupled to the audio processor, and configured to receive the processed digital audio signal, a variable gain amplifier having an input coupled to the output of the digital to analog converter and operably connected to a power supply, a controller coupled to the variable gain audio processor and the variable gain amplifier and configured to switch the audio amplifier system between a first operating mode having a first power supply voltage value and a second operating mode having a second higher power supply voltage value; wherein the controller is operable in the first operating mode to set the audio amplifier system gain to a desired gain value and in the second operating mode to maintain the desired gain value.

Abstract: A device includes a variable gain amplifier, a voltage shifter, a variable gain amplifier half replica module, and an analog to digital converter. The variable gain amplifier includes an input terminal to receive an input signal, an output terminal to provide a first output signal that is biased based on a first common-mode voltage reference. The voltage shifter circuit includes first and second input terminals, and an output terminal to provide, to the analog to digital converter, a third output signal that is biased based on a second common-mode voltage reference. The variable gain amplifier half replica module includes an output terminal coupled to the second input terminal of the voltage shifter circuit, the variable gain amplifier half replica module to control the third output signal of the voltage shifter circuit based on the first common-mode voltage reference and the second common-mode voltage reference.

Abstract: A system for processing audio data is disclosed that includes a plurality of gain adjustment devices, each gain adjustment device having an associated audio input frequency band. A plurality of control signal processing systems are configured to receive audio input data for one of the associated audio input frequency bands and to generate a gain adjustment device control signal. The gain adjustment device control signal is configured to decrease a gain setting of an associated gain adjustment device for a predetermined period of time as a function of a transient in the associated audio input frequency band.

Abstract: A system that incorporates teachings of the present disclosure may include, for example, an adaptive impedance matching network having an RF matching network coupled to at least one RF input port and at least one RF output port and comprising one or more controllable variable reactive elements. The RF matching network can be adapted to reduce a level of reflected power transferred from said at least one input port by varying signals applied to said controllable variable reactive elements. The one or more controllable variable reactive elements can be coupled to a circuit adapted to map one or more control signals that are output from a controller to a signal range that is compatible with said one or more controllable variable reactive elements. Additional embodiments are disclosed.

Abstract: A fluidic sensing device includes a first sidewall, a second sidewall, a bulk acoustic resonator structure, a biomolecule, and a cover. A fluidic channel is defined between the first and second sidewalls. The bulk acoustic resonator structure has a surface defining at least a portion of the bottom of the channel. The biomolecule is attached to the surface of the bulk acoustic resonator that forms the bottom of the channel. The cover is disposed over the channel and the first and second sidewalls. A portion of the cover disposed over the channel defines at least a portion of the top of the channel and blocks UV radiation from being transmitted through the cover. A first portion of the cover disposed over the first sidewall is transparent to UV radiation, and a second portion of the cover disposed over the second sidewall is transparent to UV radiation.

Abstract: A resonance structure of bulk acoustic wave resonator comprises a bottom electrode, a dielectric layer and a top electrode, wherein the dielectric layer is formed on the bottom electrode; the top electrode is formed on the dielectric layer. A resonance area is defined by the overlapping area of the projection of the bottom electrode, the dielectric layer and the top electrode. The resonance area has a contour. The contour includes at least three curved edges and is formed by connecting the at least three curved edges. Each curved edge is concave to a geometric center of the contour.

Abstract: A piezoelectric film that includes crystalline AlN; at least one first element partially replacing Al in the crystalline AlN; and a second element doping the crystalline AlN and which has an ionic radius smaller than that of the first element and larger than that of Al.

Abstract: An acoustic wave device includes: a first piezoelectric substrate; a first IDT that includes a plurality of first electrode fingers and is located on a first surface of the first piezoelectric substrate; a second piezoelectric substrate that is located above the first surface; and a second IDT that is located on a second surface of the second piezoelectric substrate, and includes a plurality of second electrode fingers that are non-parallel to the plurality of first electrode fingers, the second surface of the second piezoelectric substrate facing the first surface across an air gap.

Abstract: A filter device includes first, second and third filter circuits that are connected to a common terminal. The first filter circuit includes a first inductor that is closest to the common terminal along a first signal line and a first capacitance element that is connected in parallel with the first inductor, the second filter circuit includes a series arm resonator, which is a second acoustic resonator, that is closest to the common terminal along a second signal line, and the third filter circuit includes a third acoustic resonator that is closest to the common terminal along a third signal line.

Abstract: A composite filter device includes a first filter and a plurality of second filters with different passbands. End portions of the first filter and the plurality of second filters are connected to a common connection. The first filter includes a piezoelectric substrate made of LiNbO3, an IDT electrode provided on the piezoelectric substrate, and a dielectric layer provided on the piezoelectric substrate so as to cover the IDT electrode. The first filter utilizes a fundamental wave of Rayleigh waves. The passband of the first filter is arranged in a frequency band that is lower than any of the passbands of the plurality of second filters.

Abstract: A polyphase decimation FIR filter apparatus including a modulo integrator circuit configured to integrate input samples and to provide integrated input samples; and a polyphase FIR filter circuit configured to process the integrated input samples, the polyphase FIR filter circuit including a plurality of multiplier accumulator circuits, each configured to accumulate products of coefficients and respective integrated signal samples, wherein each of the multiplier accumulator circuits receives a subset of FIR filter coefficients, wherein the FIR filter coefficients are derived as the nth difference of original filter coefficients, where n is a number of integrators in the integrator circuit, and wherein the FIR filter circuit is configured to perform computation operations with modulo arithmetic.

Abstract: A semiconductor system may include a first semiconductor device configured to output a command and receive data. The semiconductor system may include a second semiconductor device configured to generate a period signal, the period signals periodically toggled in response to the command, output the data in response to the period signal, and discharge the charges of an internal node if the period signal is not toggled during a predetermined section.

Abstract: The method for automated manufacturing of an electronic circuit tolerant to faults by temporal redundancy of maximum order N, comprising a step implemented by computer, according to which every memory cell of the circuit is replaced by a memory block (40) comprising a chain of memory cells in series, and a selection block which, in a temporal redundancy mode of order n1, n1?[1,N], selects as output data of the memory block the majority content of n1 cells of the block, and can furthermore deliver a fault signal if the contents of the n1 cells differ. Said method is characterized in that the inserted memory blocks allow a dynamic switching from a temporal redundancy mode of order n1 to any other mode of order n2. Said method for N=2, in association with a mechanism for recording with roll-back, allows an error with only a double redundancy instead of a triple redundancy.

Abstract: Method for controlling a power electronics system for a vehicle in which, while maintaining a current timing of a modulator of the power electronics system, one switching state of the power electronics system from a number of possible switching states of the power electronics system is selected in dependence on at least one requirement, to be provided in advance, for spectral characteristics of an error signal of an output voltage of the power electronics system and is set in the power electronics system.

Abstract: An electronic device with substrate current management. The electronic device has a semiconductor substrate in which a Schottky diode is formed. A parasitic PN diode is also formed in the semiconductor substrate, and coexisted with the Schottky diode in parallel. The forward voltage of the Schottky diode is limited to be larger than the forward conduction threshold voltage of the Schottky diode and to be smaller than the forward conduction threshold voltage of the parasitic PN diode.

Abstract: Disclosed are a dynamic clock switching method and apparatus as well as a computer readable medium. The apparatus comprises a clock selection signal generation unit, a clock enable signal generation unit, a synchronization unit and a gating unit; the clock selection signal generation unit is configured to generate two or more clock selection signals and transmit same to the clock enable signal generation unit; the clock enable signal generation unit is configured to generate a clock enable signal based on a plurality of clock selection signals transmitted by the clock selection signal generation unit and transmit the clock enable signal to the synchronization unit; the synchronization unit is configured to synchronize the clock enable signal and transmit the synchronized clock enable signal to the gating unit; and the gating unit is configured to open or close the output of the clock signal based on the clock enable signal synchronized by the synchronization unit.

Abstract: A circuit for processing an input-signal voltage comprises an input capacitance coupled between an input node of the circuit and a sense node of a comparator and a reference capacitance coupled to the sense node of the comparator. A method for processing an input-signal voltage comprises configuring a reference capacitance coupled to an input capacitance; during a charge phase, charging the reference capacitance to a first-level reference voltage; and, during an operative phase, setting the input capacitance to an input-signal voltage to obtain, at the sense node, a sense voltage.

Abstract: A circuit for processing an input-signal voltage comprises a first comparator comprising a first-comparator sense node and a reference capacitance that is coupled to the first-comparator sense node, a second comparator comprising a second-comparator sense node, and a comparator select switch coupled between a path input terminal of the circuit and the first-comparator sense node and the second-comparator sense node. A method of processing at least one input-signal voltage using at least one associated threshold voltage in a circuit, wherein a plurality of comparators comprises more comparators than there are path input terminals coupled to path output terminals, comprises selectively making a coupling via one comparator of two comparators provided in parallel to form a coupling path from the path input terminal to an associated path output terminal, while breaking the coupling via the other comparator.

Abstract: In an example, a system and method for centering in a high-performance interconnect (HPI) are disclosed. When an interconnect is powered up from a dormant state, it may be necessary to “center” the clock signal to ensure that data are read at the correct time. A multi-phase method may be used, in which a first phase comprises a reference voltage sweep to identify an optimal reference voltage. A second phase comprises a phase sweep to identify an optimal phase. A third sweep comprises a two-dimensional “eye” phase, in which a plurality of values within a two-dimensional eye derived from the first two sweeps are tested. In each case, the optimal value is the value that results in the fewest bit error across multiple lanes. In one example, the second and third phases are performed in software, and may include testing a “victim” lane, with adjacent “aggressor” lanes having a complementary bit pattern.

Abstract: Circuitry for soft shutdown of a power switch and a power converters that includes circuitry for soft shutdown are described. In one aspect, circuitry for soft shutdown of a power switch includes a sense input to be coupled to a power switch receive a signal representative of current passing through the power switch, a comparator to compare the signal with an overcurrent threshold indicative of an overcurrent condition of the power switch and to output a triggering signal in response to the comparison indicating the overcurrent condition, and a gating transistor to be coupled to a control terminal of the power switch, the gating transistor configured to divert a portion of a drive signal away from the control terminal of the power switch in response to the triggering signal.