Patents Issued in October 24, 2017
  • Patent number: 9798516
    Abstract: Smart Phones that support wireless printing of e-mails to a printer in a wireless local area network (WLAN) is disclosed and enabled. The new Smart Phone includes a touch sensitive screen, an operating system, an e-mail application, and a wireless communication unit supporting a protocol within IEEE 802.11 for WLAN communication. To print an email in an inbox of the email application, the smart phone provides a print item on the touch sensitive screen and also a list of one or more printers detected to be available in the WLAN on the touch sensitive screen, subsequent to the user having selected the print item and a selected printer from the list, a print job related to the email is transmitted to the selected printer over the WLAN. Additionally, the smart phone further supports voice activated commands, such as printing or replying to emails received at the Smart Phone.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: October 24, 2017
    Assignee: Flexiworld Technologies, Inc.
    Inventors: William Ho Chang, Christina Ying Liu
  • Patent number: 9798517
    Abstract: Embodiments may relate to intuitive user-interface features for a head-mountable device (HMD), in the context of a hybrid human and computer-automated response system. An illustrative method may involve a head-mountable device (HMD) that comprises a touchpad: (a) sending a speech-segment message to a hybrid response system, wherein the speech-segment message is indicative of a speech segment that is detected in audio data captured at the HMD, and wherein the speech-segment is associated with a first user-account with the hybrid response system, (b) receiving a response message that includes a response to the speech-segment message and an indication of a next action corresponding to the response to the speech-segment message, (c) displaying a screen interface that includes an indication of the response, and (d) while displaying the response, detecting a singular touch gesture and responsively initiating the at least one next action.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: October 24, 2017
    Assignee: X Development LLC
    Inventors: Chun Yat Frank Li, Daniel Rodriguez Magana, Thiago Teixeira, Charles Chen, Anand Agarawala
  • Patent number: 9798518
    Abstract: Certain aspects of the present disclosure relate to a technique for processing data based on touch events on a touch sensitive device. A first touch event is detected indicating a selection of a value for an attribute using a touch input device from a first portion of a touch sensitive display screen of the touch sensitive device. A second touch event is detected indicating a change in position of the touch input device from the first portion to a second portion of the touch sensitive display screen of the touch sensitive device. In response to detecting the second touch event, a query is determined for searching a database based on the value for the attribute.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: October 24, 2017
    Assignee: Open Invention Network LLC
    Inventors: Farid Khafizov, Margarita Khafizova
  • Patent number: 9798519
    Abstract: A microprocessor comprises an instruction pipeline, a shared memory, and first and second arithmetic processing units in the instruction pipeline, each capable of reading or receiving operands from and writing or providing results to the shared memory. The first arithmetic processing unit performs a first portion of a mathematical operation to produce an intermediate result vector that is not a complete, final result of the mathematical operation. The first arithmetic processing unit generates a plurality of non-architectural calculation control indicators that indicate how subsequent calculations to generate a final result from the intermediate result vector should proceed. The second arithmetic processing unit performs a second portion of the mathematical operation, in accordance with the calculation control indicators, to produce a complete, final result of the mathematical operation.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: October 24, 2017
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventor: Thomas Elmer
  • Patent number: 9798520
    Abstract: A division operation apparatus is provided. The division operation apparatus includes a memory, a non-zero bit detection circuit, a mapping calculation circuit, a look-up circuit, a compensation circuit and a multiplication circuit. The memory stores a divisor look-up table including a plurality of entries. The non-zero bit detection circuit detects a number of a highest non-zero bit of the divisor. The mapping calculation circuit generates a mapped value of the divisor within a range of the divisor look-up table according to a mapping function. The look-up circuit retrieves a corresponding entry having a stored reciprocal according to the mapped value. The compensation circuit generates a compensation value according to the mapping function. The multiplication circuit multiplies a dividend, the stored reciprocal and the compensation value to generate a divided result of the dividend and the divisor.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: October 24, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hung-Chang Chuang, Li-Ming Chen
  • Patent number: 9798521
    Abstract: A system, method and apparatus for generating random numbers. An electronic device operates an electric motor to drive a mechanical device. The electronic device includes a processing device structured to take one or more current measurements of the electric motor. The processing device is also structured to generate a seed and/or a random number based on at least one of the current measurements of the electric motor.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: October 24, 2017
    Assignee: Schlage Lock Company LLC
    Inventors: Devin Love, Raymond F. Rettig
  • Patent number: 9798522
    Abstract: A system and method for generating a command line interface (CLI) in view of an application programming interface (API) specification is disclosed. An instance of a CLI may be initialized. Responsive to the initializing, the system or method may request an application programming interface (API) specification for a software application installed on a server system. The system or method may receive the API specification for the software application. The system and method, in view of the API specification may create a command definition of the CLI.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: October 24, 2017
    Assignee: Red Hat, Inc.
    Inventors: Tomá{hacek over (s)} Strachota, Martin Ba{hacek over (c)}ovský
  • Patent number: 9798523
    Abstract: Disclosed are a method of modeling a workflow used in the field of big data and a method and apparatus for executing a workflow model. The method of executing the workflow model according to an embodiment of the present invention comprises receiving a Unified Modeling Language (UML)-based workflow model needing at least one data storage engine and at least one data processing engine, parsing the received workflow model to generate structured information, verifying the validity of the workflow model using the structured information, and transmitting jobs included in the workflow model to data processing engines corresponding to the jobs when it is determined that the workflow model is valid. Thus, developers can be allowed to easily acquire a workflow runnable on various data storage engines and various data processing engines.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 24, 2017
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Nguyen Minh Chau, Hee-Sun Won
  • Patent number: 9798524
    Abstract: A system and method for accessing a native platform API is disclosed herein. The method includes serving the application code as a container on the server-side and instantiating a content of the code with a plurality of JavaScript calls, which allows APIs to access and retrieve information from the code and to process the content of the code.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: October 24, 2017
    Assignee: Axway, Inc.
    Inventors: Paul Colton, Uri Sarid, Kevin Edward Lindsey, Jeffrey George Haynie, Matthew David Langston
  • Patent number: 9798525
    Abstract: Disclosed are improved methods, systems, and computer program products for implementing an action command engine to simplify an end user's experience in executing processes in applications by enabling an action command engine to guide a user through the process in a step by step fashion. Embodiments of the invention can be implemented in different modes of operations, such as manual mode, auto-entry mode, or batch fill mode. A universal next button may be deployed to guide end user's through any process or task in software applications.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: October 24, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Michael Patrick Rodgers, Gurbinder Singh Bali
  • Patent number: 9798526
    Abstract: A multi-domain decision manager facilitates software development of a software application across knowledge domains, based on relationships between a first knowledge domain and a second knowledge domain. The multi-domain decision manager includes an assessment engine configured to construct a first assessment as an instantiation of a first knowledge base model of the first knowledge domain, and a second assessment as an instantiation of a second knowledge base model of the second knowledge domain. A relationship engine may be configured to characterize relationships between the first assessment and the second assessment, wherein the relationships characterize a likelihood that inclusion of a first selectable assessment option of the first assessment is associated with inclusion of a second selectable assessment option of the second assessment.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: October 24, 2017
    Assignee: SAP SE
    Inventors: Gilles Montagnon, Cedric Hebert, Elton Mathias, Wihem Arsac, Jakub Sendor
  • Patent number: 9798527
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating efficient compiled code. In an example method, a compilation system obtains an un-optimized computational graph comprising a plurality of nodes representing operations and directed edges representing data dependencies. The un-optimized computational graph is analyzed using pattern matching to determine fusable operations that can be fused together into a single fusion operation. The un-optimized computational graph is transformed into an optimized computational graph by replacing the nodes representing the fusable operations in the un-optimized computational graph with a fusion node representing the single fusion operation. The compilation system produces efficient code by translating the fusion node of the optimized computational graph as a call that performs the fused operations.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: October 24, 2017
    Assignee: Google Inc.
    Inventors: Eli Bendersky, Robert Hundt, Mark Heffernan, Jingyue Wu
  • Patent number: 9798528
    Abstract: A solution for cooperative data prefetching that enables software control of a memory-side data prefetch and/or a processor-side data prefetch is provided. In one embodiment, the invention provides a solution for generating an application, in which access to application data for the application is improved (e.g., optimized) in program code for the application. In particular, a push request, for performing a memory-side data prefetch of the application data, and a prefetch request, for performing a processor-side data prefetch, are added to the program code. The memory-side data prefetch results in the application data being copied from a first data store to a second data store that is faster than the first data store while the processor-side data prefetch results in the application data being copied from the second data store to a third data store that is faster than the second data store.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: October 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Yaoqing Gao, Gheorghe C. Cascaval, Allan H. Kielstra, Robert B. Tremaine, Michael E. Wazlowski, Lixin Zhang
  • Patent number: 9798529
    Abstract: A computer readable medium including computer readable code for causing a computer system to perform a method. The method includes receiving an application, receiving application information for the application, and determining an access privilege for the application based, in part, on the application information. The method also includes generating a deployment package for the application using the application and the access privilege, and publishing the application.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: October 24, 2017
    Assignee: ORACLE AMERICA, INC.
    Inventors: Bernard A. Traversat, James A. Gosling, Michael J. Duigou, Henry Jen, Mohamed M. Abdelaziz, Brian Goetz
  • Patent number: 9798530
    Abstract: Systems and methods for application level authentication are provided for use with the low energy Bluetooth device and accessory. This includes receiving accessory credentials from a server, establishing a Bluetooth low energy connection with the accessory, authenticating with the accessory, and lastly transferring data to the accessory. The transferring of the data may be either a bulk transfer, or a data stream. The authenticating may be an application layer authentication between a device and the accessory using a shared secret key and using a hash function. Additional embodiments include methods for over-the-air firmware updates, and device control of a low energy Bluetooth accessory.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: October 24, 2017
    Assignee: ARM Limited
    Inventor: Jason Edward Robert Hillyard
  • Patent number: 9798531
    Abstract: An on-demand executable system includes an application acquisition engine configured to acquire a first application that is programmed to perform a first function and a second function. An applet extractor includes a function analyzer configured to analyze the first application to identify functions that the first application is programmed to perform. The identified functions include the first function. The applet extractor includes a code analyzer configured to analyze code of the first application to identify first code segments that implement the first function. The applet extractor includes an applet packager configured to package the first code segments into a first executable. An executable request servicer is configured to, in response to a request, transmit the first executable to a user device.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: October 24, 2017
    Assignee: Quixey, Inc.
    Inventors: Gilead Mark, Manikandan Sankaranarasimhan, Kalyan Desineni, Eric Glover
  • Patent number: 9798532
    Abstract: Systems and methods for accessing locally-stored content for a web application are disclosed. In some aspects, a user input for requesting a web application is received at a client computing device. A network request for the web application is provided via a network. That software code for the web application is stored in local storage of the client computing device is determined. The stored software code for the web application is placed into a random access memory (RAM) of the client computing device. At least a portion of the stored software code is precompiled prior to receiving a response to the network request.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: October 24, 2017
    Assignee: Google Inc.
    Inventors: Robert Hundt, Mark Heffernan
  • Patent number: 9798533
    Abstract: The disclosure is related to providing an operation environment of a registered network having first devices to a user in an unregistered network having second devices. In order to provide, the second devices in the unregistered network may be detected when user equipment associated with the user enters a service area of the unregistered network. As compatible devices, devices compatible with the first devices in the registered network may be selected from the detected second devices. Then, system images of the first devices compatible with the selected compatible devices may be obtained. The obtained system images of the first devices may be installed at the selected compatible devices, respectively.
    Type: Grant
    Filed: April 24, 2016
    Date of Patent: October 24, 2017
    Assignee: KT CORPORATION
    Inventor: Jeong-Yeop Yang
  • Patent number: 9798534
    Abstract: Embodiments are directed to a method of online storage device firmware upgrades by suspending input/output (I/O) operations to the storage device upon notification of a firmware upgrade to the storage device, maintaining a stripe log that contains data stripes updated by I/O operations issued to the storage device during suspension of the storage device, triggering the firmware upgrade to the storage device while the storage device is in suspension, reactivating the disk and new firmware upon completion of the firmware upgrade, and reconstructing the updated data stripes from the stripe log on the storage device after the reactivating step.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: October 24, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Zhengli Yi, Colin Zou, Joel Miller, Chris Liu, Man Lv
  • Patent number: 9798535
    Abstract: An apparatus and method of automatically installing an application in different terminals by storing terminal information of a user and allowing the user to install an application when the user installs an application in at least two terminals, and in which an installation process may be automatically conducted is provided. Information related to an application installed in a first terminal is received from the first terminal; and a second terminal is requested to install another application corresponding to the application, in the second terminal, by using the received information related to the application.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: October 24, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youl-woong Sung, Jong-baek Kim, Il-joo Kim, Young-chul Sohn, Soo-min Shin, Ho Jin
  • Patent number: 9798536
    Abstract: A method, computer program product, and computer system for receiving, from a first and second application by a computing device, shapes of artifacts and components of the first and second application. The shapes of the artifacts and components of the first and second application are conformed to a standard format. One or more changes to the shapes of the artifacts and components of the first and second application are tracked. One or more suspicious relationships across the first and second application are displayed based upon, at least in part, the one or more changes to the shapes of the artifacts and components of the first and second application.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Marc A. Baumbach, Patrick J. Danford, George P. DeCandio, Christian Funkhouser, David K. Grotjohn, Vishwanath Ramaswamy
  • Patent number: 9798537
    Abstract: An operationally monolithic application is provided, where the application resides in a first program address space of an application server. The application calls to an application component residing in a second program address space of the application server, the application component being built upon a framework of the operationally monolithic application. The operationally monolithic application loads at least a first library upon which it depends to invoke a first method, and the application component loads at least a second library upon which it depends to invoke a second method. The first and second libraries can co-exist on the application server despite being different versions of the same libraries.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: October 24, 2017
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Douglas Paul Forguson, Weihua Zhou, Uday Kumar Survi
  • Patent number: 9798538
    Abstract: Supplemental functionalities may be provided for an executable program. In some embodiments, a computer program (e.g., an executable program or other computer program) associated with an ontology may be caused to be run. The ontology may include information indicating attributes for a set of applications. Based on the ontology, supplemental information may be generated for the computer program. The supplemental information may be related to one or more functionalities of an application (of the set of applications) to be added to the executable program. The supplemental information may be provided as input to the computer program. The supplemental information may cause the one or more functionalities of the application to be made available via the executable program.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: October 24, 2017
    Assignee: REACTIVECORE LLC
    Inventor: Michel Dufresne
  • Patent number: 9798539
    Abstract: A record of comments made in previous artifact versions is displayed in the latest artifact version. Comment and reply chains are maintained in the latest artifact version, linking them with the artifact versions where they were introduced. The comment/reply history of an artifact, is viewable in a single latest version of the artifact.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: October 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Atul Kumar, Deepa Saini, Siddharth K. Saraya
  • Patent number: 9798540
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for automatically classifying static analysis rules as being anomalous or not. One of the methods includes receiving alerts generated by a particular static analysis rule for a plurality of different software projects analyzed by a static analysis system. For each project, a respective alert proportion metric value is computed. Each of the plurality of different software projects is classified according to the alert proportion metric values as being one non-outlier projects or outlier projects. If more than a threshold number of projects were classified as being outlier projects for the particular static analysis rule, the particular static analysis rule is classified as an anomalous static analysis rule.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: October 24, 2017
    Assignee: Semmle Limited
    Inventor: Jean Helie
  • Patent number: 9798541
    Abstract: An apparatus and method for propagating conditionally evaluated values are disclosed. For example, a method according to one embodiment comprises: reading each value contained in an input mask register, each value being a true value or a false value and having a bit position associated therewith; for each true value read from the input mask register, generating a first result containing the bit position of the true value; for each false value read from the input mask register following the first true value, adding the vector length of the input mask register to a bit position of the last true value read from the input mask register to generate a second result; and storing each of the first results and second results in bit positions of an output register corresponding to the bit positions read from the input mask register.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: October 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Jayashankar Bharadwaj, Nalini Vasudevan, Victor W. Lee, Daehyun Kim, Albert Hartono, Sara S. Baghsorkhi
  • Patent number: 9798542
    Abstract: A method and apparatus for zero overheard loops is provided herein. The method includes the steps of identifying, by a decoder, a loop instruction and identifying, by the decoder, a last instruction in a loop body that corresponds to the loop instruction. The method further includes the steps of generating, by the decoder, a branch instruction that returns execution to a beginning of the loop body, and enqueing, by the decoder, the branch instruction into a branch reservation queue concurrently with an enqueing of the last instruction in a reservation queue.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: October 24, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Tariq Kurd, John Redford, Geoffrey Barrett
  • Patent number: 9798543
    Abstract: One embodiment of the present invention sets forth a technique for allocating register file entries included in a register file to a thread group. A request to allocate a number of register file entries to the thread group is received. A required number of mapping table entries included in a register file mapping table (RFMT) is determined based on the request, where each mapping table entry included in the RFMT is associated with a different plurality of register file entries included in the register file. The RFMT is parsed to locate an available mapping table entry in the RFMT for each of the required mapping table entries. For each available mapping table entry, a register file pointer is associated with an address that corresponds to a first register file entry in the plurality of register file entries associated with the available mapping table entry.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: October 24, 2017
    Assignee: NVIDIA Corporation
    Inventors: Michael Fiyak, Ming Y. Siu
  • Patent number: 9798544
    Abstract: Systems and methods for scheduling instructions for execution on a multi-core processor reorder the execution of different threads to ensure that instructions specified as having localized memory access behavior are executed over one or more sequential clock cycles to benefit from memory access locality. At compile time, code sequences including memory access instructions that may be localized are delineated into separate batches. A scheduling unit ensures that multiple parallel threads are processed over one or more sequential scheduling cycles to execute the batched instructions. The scheduling unit waits to schedule execution of instructions that are not included in the particular batch until execution of the batched instructions is done so that memory access locality is maintained for the particular batch. In between the separate batches, instructions that are not included in a batch are scheduled so that threads executing non-batched instructions are also processed and not starved.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: October 24, 2017
    Assignee: NVIDIA CORPORATION
    Inventors: Olivier Giroux, Jack Hilaire Choquette, Xiaogang Qiu, Robert J. Stoll
  • Patent number: 9798545
    Abstract: Embodiments relate to prefetching data on a chip having a scout core and a parent core coupled to the scout core. A method includes determining that a program executed by the parent core requires content stored in a location remote from the parent core. The method includes sending a fetch table address determined by the parent core to the scout core. The method includes accessing a fetch table that is indicated by the fetch table address by the scout core. The fetch table indicates how many of pieces of content are to be fetched by the scout core and a location of the pieces of content. The method includes based on the fetch table indicating, fetching the pieces of content by the scout core. The method includes returning the fetched pieces of content to the parent core.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: October 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian R. Prasky, Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-lung K. Shum
  • Patent number: 9798546
    Abstract: An aspect includes pruning a design space when generating a maximum power stressmark. A multi-stage design space search process is performed. Each stage includes calculating a number of instructions per cycle (IPC) for each instruction sequence in a set of instruction sequences that place a power stress on a system under analysis, removing one or more of the instruction sequences having an IPC lower than a pruning threshold from the set, evaluating at least one power metric of the remaining instruction sequences in the set, removing one or more of the instruction sequences having at least one power metric evaluated outside of one or more pruning ranges from the set, and passing the remaining instruction sequences in the set to a next stage. A maximum power stressmark is generated based on the evaluating of the at least one power metric from a final stage.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ramon Bertran, Pradip Bose, Alper Buyuktosunoglu, Timothy J. Slegel
  • Patent number: 9798547
    Abstract: A very long instruction word (VLIW) processor that performs efficient processing including extended bits operations is provided. The VLIW processor includes an instruction control unit, a register file unit, and an instruction execution unit. The instruction execution unit includes a plurality of slots, and a state register arranged between the second slot and the third slot to transfer N-bit data between the second and third slots. The VLIW processor stores data output from the third slot into the state register and uses the data, and thus achieves efficient processing including bit-expanded operations, such as processing performed in response to instructions commonly used in image processing, image recognition, and other processing, while preventing scaling up of the circuit.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: October 24, 2017
    Assignee: MegaChips Corporation
    Inventors: Shohei Nomoto, Yusuke Mizuno
  • Patent number: 9798548
    Abstract: Systems and methods for scheduling instructions using pre-decode data corresponding to each instruction. In one embodiment, a multi-core processor includes a scheduling unit in each core for selecting instructions from two or more threads each scheduling cycle for execution on that particular core. As threads are scheduled for execution on the core, instructions from the threads are fetched into a buffer without being decoded. The pre-decode data is determined by a compiler and is extracted by the scheduling unit during runtime and used to control selection of threads for execution. The pre-decode data may specify a number of scheduling cycles to wait before scheduling the instruction. The pre-decode data may also specify a scheduling priority for the instruction. Once the scheduling unit selects an instruction to issue for execution, a decode unit fully decodes the instruction.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: October 24, 2017
    Assignee: NVIDIA Corporation
    Inventors: Jack Hilaire Choquette, Robert J. Stoll, Olivier Giroux
  • Patent number: 9798549
    Abstract: An instruction sequencing unit in an out-of-order (OOO) processor includes a Most Favored Instruction (MFI) mechanism that designates an instruction as an MFI. The processing queues in the processor identify when they contain the MFI, and assures processing the MFI. The MFI remains the MFI until it is completed or is flushed, and which time the MFI mechanism selects the next MFI.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: October 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Maarten J. Boersma, Robert A. Cordes, David A. Hrusecky, Jennifer L. Molnar, Brian W. Thompto, Albert J. Van Norstrand, Jr., Kenneth L. Ward
  • Patent number: 9798550
    Abstract: A method and device for memory access in processors is provided. A processor, comprising a plurality of computational units, is capable of executing a single instruction on multiple pieces of data simultaneously (SIMD). A read operation is initiated to load data from memory into the plurality of computational units (CUs) arranged into a plurality of CU groups. The memory is arranged into a plurality of memory macro-blocks each associated with a respective CU group of the plurality of CU groups. For each CU group a respective first memory address is determined and for each CU group, the data in the associated memory macro-block is accessed at the respective first memory address.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: October 24, 2017
    Assignee: NXP USA, Inc.
    Inventors: Malcolm Stewart, Ali Osman Ors, Daniel Laroche
  • Patent number: 9798551
    Abstract: A method and apparatus for providing a scalable compute fabric are provided herein. The method includes determining a workflow for processing by the scalable compute fabric, wherein the workflow is based on an instruction set. A pipeline in configured dynamically for processing the workflow, and the workflow is executed using the pipeline.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: October 24, 2017
    Assignee: Intel Corporation
    Inventors: Scott Krig, Teresa Morrison
  • Patent number: 9798552
    Abstract: A network element (NE) comprising a receiver configured to couple to a cloud network; and a multi-core central processing unit (CPU) coupled to the receiver and configured to receive a first partition configuration from an orchestration element, partition a plurality of processor cores into a plurality of processor core partitions according to the first partition configuration, and initiate a plurality of virtual basic input/output systems (vBIOSs) such that each vBIOS manages a processor core partition.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: October 24, 2017
    Assignee: Futurewei Technologies, Inc.
    Inventors: An Wei, Kangkang Shen
  • Patent number: 9798553
    Abstract: Systems enable secure communication links with classified or unclassified networks using a single mobile computing device. In one embodiment, the system includes: a mobile computing device without an integrated data storage device that is configured to interchangeably receive an unclassified or classified data storage device; an encrypter device in signal communication with the mobile computing device; network security device in signal communication with the encrypter device; a classified data storage device loaded with a computer readable code configured for booting the mobile computing device when the classified data storage device is connected to the mobile computing device; and an unclassified data storage device loaded with a computer readable code configured for booting the mobile computing device when the unclassified data storage device is connected to the mobile computing device.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: October 24, 2017
    Assignee: National Information Assurance Corporation
    Inventor: Giovanni M. Suarez Morales
  • Patent number: 9798554
    Abstract: An audio/video (A/V) hub provides feedback to a user of a portable electronic device with a touch-sensitive display (such as a cellular telephone) that is used as a wireless remote control for an audio/video (A/V) display device, the A/V hub and/or a consumer-electronic device. In particular, when the A/V hub receives, from the portable electronic device, user-interface activity information associated with a user interface displayed on a touch-sensitive display, the A/V hub generates visual feedback based on the user-interface activity information. Then, the A/V hub provides the visual feedback to the A/V display device for display on the A/V display device. The visual feedback indicates a position of at least a touch contact point of a user of the portable electronic device relative to a strike area of at least a virtual command icon in the user interface.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 24, 2017
    Assignee: EVA Automation, Inc.
    Inventor: Gaylord Yu
  • Patent number: 9798555
    Abstract: Application implementation methods and apparatus are described, which are used to implement a function of a target application without installation of the target function. An example method may include acquiring an installation package of the target application; generating a proxy interface for managing the target application; and dynamically loading, by the proxy interface, the installation package by using an operating parameter of a terminal, and starting an operation interface of the target application.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: October 24, 2017
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yusheng Zhong, Shengwei Lin, Deliang Zhu, Difei Zou
  • Patent number: 9798556
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: October 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Mani Ayyar, Eric Richard Delano, Ioannis Y. Schoinas, Akhilesh Kumar, Doddaballapur Jayasimha, Jose A. Vargas
  • Patent number: 9798557
    Abstract: Technology is disclosed for updating an Agent. One embodiment comprises running the Agent for the Application while the Application is also running. The Agent is associated with an identified source of code for the Agent. The code for the Agent is updated, and the updated Agent is run with the Application.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: October 24, 2017
    Assignee: CA, Inc.
    Inventor: Marco Gagliardi
  • Patent number: 9798558
    Abstract: A method and system for operating a modified Java Virtual Machine (JVM) which is able to simultaneously host multiple Java application programs is disclosed. In a first modification the JVM is modified to permit multiple class definitions of some of the Java Application Programming Interface (API) classes, so called non-sensitive classes, to be loaded multiple times but restrict other Java API classes, so called sensitive classes, to be loaded only once, preferably onto a bootstrap class loader. In a second modification the Java API classes are also modified. Preferably in a further modification, some or all of the sensitive API classes are modified not to use synchronization.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: October 24, 2017
    Assignee: Waratek Limited
    Inventor: John Matthew Holt
  • Patent number: 9798559
    Abstract: In an example, a computing device may include a trusted execution environment (TEE) for executing signed and verified code. The device may receive a trusted binary object in a first form, but the object may need to be converted to a second format, either on-the-fly, or in advance. This may include, for example, a bytecode interpreter, script interpreter, runtime engine, compiler, just-in-time compiler, or other species of binary translator. The binary translator may be run from the TEE, and the output may then be signed by the TEE and treated as a new trusted binary.
    Type: Grant
    Filed: December 27, 2014
    Date of Patent: October 24, 2017
    Assignee: McAfee, Inc.
    Inventors: Samir Shah, Ned M. Smith, Jason Martin, Micah J. Sheller, Somnath Chakrabarti, Bin Xing
  • Patent number: 9798560
    Abstract: Some embodiments provide a method for extracting and adapting system configuration. The method extracts a first configuration from a first node of a first hosting system. The first node includes several resources for hosting the first configuration. The method analyzes the first configuration in order to determine attributes of the first configuration. The determined attributes are relevant to hosting the first configuration on a second node of a second hosting system having several nodes. The method generates a second configuration based on the determined attributes. The method hosts the second configuration at the second node of the second hosting system.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: October 24, 2017
    Assignee: GOGRID, LLC
    Inventors: John Martin Keagy, Jeffery Carr, Paul Lappas
  • Patent number: 9798561
    Abstract: A virtual machine (VM) is designated as a guarded VM so that restricted operations may not be performed on the VM without permission from the VM's owner. A request to perform at least one of the restricted operations on the VM is received. When the VM is a guarded VM, the request to perform at least one of the restricted operations on the VM is sent to the VM's owner. When the VM's owner at least partially approves the request, at least some of the restricted operations on the VM are enabled.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: October 24, 2017
    Assignee: VMware, Inc.
    Inventors: Sudhish Panamthanath Thankappan, Jithesh Kuruppath
  • Patent number: 9798562
    Abstract: Apparatuses, methods, and computer-readable media for buffer provision application (“BFA”) are described. The BPA may facilitate display of a guest application executing in a host operating system (“host OS”). The host OS may provide for execution of a guest application, such as through use of an emulator configured to emulate a guest OS environment. The BFA may provide a drawing buffer for use by the guest application. The drawing buffer may be caused to be allocated within the host OS by the BFA. The BFA may then cause the allocated buffer to be provided to the guest application so that the guest application may draw frame data directly to the drawing buffer. The BFA may then facilitate access to the drawing buffer by the host OS when compositing drawing buffer data with other drawing data of the host OS. Other embodiments may be described and claimed.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: October 24, 2017
    Assignee: Intel Corporation
    Inventors: Jinkui Ren, Dongxiao Xu, Xiantao Zhang
  • Patent number: 9798563
    Abstract: A network management device includes an information acquisition unit that receives a management packet from a virtual machine, the management packet containing management information that includes a combination of priority of applications operable on the virtual machine and information on communication bandwidth used for operation of the applications and a selection unit that selects an application to be stopped based on the management information and information on currently available communication bandwidth, and sends a reply packet containing information on the selected application to the virtual machine, in order for the virtual machine to stop the selected application.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: October 24, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Tsutomu Kaneko
  • Patent number: 9798564
    Abstract: An arrangement configured to allocate one or more resources of one or more computing devices to a virtual machine, the arrangement comprising: an interface configured to receive a request for the allocation of one or more resources to the virtual machine, the request including information regarding one or more computer programs to be operated by or as a part of the virtual machine; and a hypervisor module configured to use the information regarding one or more computer programs to identify economic information associated with at least one of the computer programs, and to allocate one or more resources to the virtual machine based at least in part on the economic information.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: October 24, 2017
    Assignee: Qatar Foundation
    Inventors: Simon Ponsford, William Yip
  • Patent number: 9798565
    Abstract: A data processing system includes one or more processors that each execute one or more operating systems. Each operating system includes one or more applications. An accelerator provides a shared resource for a plurality of the applications and has one or more input/output interfaces for the submission of tasks to the accelerator from an application. A hypervisor manages the allocation of the input/output interfaces to the one or more operating systems and a hypervisor interface enables communication between the hypervisor and the accelerator. The system is capable of being configured such that an operating system that has been allocated an input/output interface is capable of communicating with the accelerator via the input/output interface independently of the hypervisor. A memory management unit is capable of providing an isolated region of a memory for use by the operating system while the operating system retains its allocated input/output interface.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: October 24, 2017
    Assignee: Arm Limited
    Inventors: Hakan Persson, Matt Evans, Jason Parker, Marc Zyngier