Patents Issued in April 24, 2018
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Patent number: 9952867Abstract: A processor core in an instruction block-based microarchitecture utilizes instruction blocks having headers that include an index to a size table that may be expressed using one of memory, register, logic, or code stream. A control unit in the processor core determines how many instructions to fetch for a current instruction block for mapping into an instruction window based on the block size that is indicated from the size table. As instruction block sizes are often unevenly distributed for a given program, utilization of the size table enables more flexibility in matching instruction blocks to the sizes of available slots in the instruction window as compared to arrangements in which instruction blocks have a fixed sized or are sized with less granularity. Such flexibility may enable denser instruction packing which increases overall processing efficiency by reducing the number of nops (no operations, such as null functions) in a given instruction block.Type: GrantFiled: June 26, 2015Date of Patent: April 24, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Douglas C. Burger, Aaron Smith, Jan Gray
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Patent number: 9952868Abstract: One embodiment of the present invention sets forth a graphics processing system. The graphics processing system includes a screen-space pipeline and a tiling unit. The screen-space pipeline is configured to perform visibility testing and fragment shading. The tiling unit is configured to determine that a first set of primitives overlaps a first cache tile. The tiling unit is also configured to first transmit the first set of primitives to the screen-space pipeline with a command configured to cause the screen-space pipeline to process the first set of primitives in a z-only mode, and then transmit the first set of primitives to the screen-space pipeline with a command configured to cause the screen-space pipeline to process the first set of primitives in a normal mode. In the z-only mode, at least some fragment shading operations are disabled in the screen-space pipeline. In the normal mode, fragment shading operations are enabled.Type: GrantFiled: October 1, 2013Date of Patent: April 24, 2018Assignee: NVIDIA CorporationInventors: Ziyad S. Hakura, Jerome F. Duluk, Jr.
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Patent number: 9952869Abstract: A system and method is provided for executing a conditional branch instruction. The system and method may include a branch predictor to predict one or more instructions that depend on the conditional branch instruction and a branch mis-prediction buffer to store correct instructions that were not predicted by the branch predictor during a branch mis-prediction.Type: GrantFiled: November 4, 2009Date of Patent: April 24, 2018Assignee: Ceva D.S.P. Ltd.Inventors: Jeffrey Allan (Alon) Jacob (Yaakov), Michael Boukaya
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Patent number: 9952870Abstract: An apparatus and method for filtering biased conditional branches in a branch predictor in favor of non-biased conditional branches are disclosed. Biased conditional branches, which are consistently skewed toward one direction or outcome, are filtered such that an increased number of non-biased conditional branches which resolve in both directions may be considered. As a result, more useful branches may be captured over larger distances, thereby providing correlations deeper in a global history. In addition, by tracking only the latest occurrences of non-biased conditional branches using a recency stack structure, even more distant branch correlations may be made.Type: GrantFiled: June 13, 2014Date of Patent: April 24, 2018Assignee: Wisconsin Alumni Research FoundationInventors: Mikko Lipasti, Dibakar Gope
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Patent number: 9952871Abstract: An apparatus comprises a processing pipeline comprising out-of-order execution circuitry and second execution circuitry. Control circuitry monitors at least one reordering metric indicative of an extent to which instructions are executed out of order by the out-of-order execution circuitry, and controls whether instructions are executed using the out-of-order execution circuitry or the second execution circuitry based on the reordering metric. A speculation metric indicative of a fraction of executed instructions that are flushed due to a mis-speculation can also be used to determine whether to execute instructions on first or second execution circuitry having different performance or energy consumption characteristics.Type: GrantFiled: June 5, 2015Date of Patent: April 24, 2018Assignee: ARM LimitedInventors: Ian Michael Caulfield, Peter Richard Greenhalgh, Simon John Craske, Max John Batley, Allan John Skillman, Antony John Penton
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Patent number: 9952872Abstract: An arithmetic processing device includes an instruction decode unit, an instruction execution unit and an instruction hold unit, wherein the instruction hold unit includes; a first holder including a plurality of first entries each configured to hold a decoded instruction; a second holder including a smaller number of second entries than the number of the first entries; a first selector configured to select an instruction to be registered in the second holder from instructions held in the first entries and store identification information that identifies the selected instruction into any of the second entries; and a second selector configured to sequentially select an executable instruction from instructions registered in the second holder, input the selected executable instruction to the instruction execution unit, and detect a dependency between the instruction inputted to the instruction execution unit and the instructions registered in the second holder.Type: GrantFiled: May 20, 2016Date of Patent: April 24, 2018Assignee: FUJITSU LIMITEDInventors: Sota Sakashita, Yasunobu Akizuki
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Patent number: 9952873Abstract: Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.Type: GrantFiled: June 30, 2017Date of Patent: April 24, 2018Assignee: Intel CorporationInventor: Gopalan Ramanujam
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Patent number: 9952874Abstract: Operation of a multi-slice processor including execution slices and load/store slices, where the load/store slices are coupled to the execution slices via a results bus and the results bus includes segments assigned to carry results of a different instruction type, includes: receiving a producer instruction that includes an identifier of an instruction type and an identifier of the producer instruction, including storing the identifier of the instruction type and the identifier of the producer instruction in an entry of a register; receiving a source instruction dependent upon the result of the producer instruction including storing, in an issue queue, the source instruction, the identifier of the instruction type of the producer instruction, and an identifier of the producer instruction; and snooping the identifier of the producer instruction only from the segment of the results bus assigned to carry results of the instruction type of the producer instruction.Type: GrantFiled: February 18, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden, Rokesh Jayasundar, Dung Q. Nguyen, David R. Terry
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Patent number: 9952875Abstract: A superscalar pipelined microprocessor includes a register set defined by an instruction set architecture of the microprocessor, execution units, and a store unit, coupled to the cache memory and distinct from the other execution units of the microprocessor. The store unit comprises an ALU. The store unit receives an instruction that specifies a source register of the register set and an operation to be performed on a source operand to generate a result. The store unit reads the source operand from the source register. The ALU performs the operation on the source operand to generate the result, rather than forwarding the source operand to any of the other execution units of the microprocessor to perform the operation on the source operand to generate the result. The store unit operatively writes the result to the cache memory.Type: GrantFiled: October 30, 2009Date of Patent: April 24, 2018Assignee: VIA TECHNOLOGIES, INC.Inventors: Gerard M. Col, Colin Eddy, Rodney E. Hooker
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Patent number: 9952876Abstract: There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running SPMD (Single Program Multiple Data) code on SIMD (Single Instruction Multiple Data) machine. The machine runs an instruction stream over input data streams. The machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation. The machine updates the lane-PC of each active lane according to targets of the branch operation. The machine selects an active lane and activates only lanes whose lane-PCs match the thread-PC. The machine decrements the lane depth counters of the selected active lanes and updates the lane-PC of each active lane upon the instruction stream reaching a first instruction. The machine assigns the lane-PC of a lane with a largest lane depth counter value to the thread-PC and activates all lanes whose lane-PCs match the thread-PC.Type: GrantFiled: August 26, 2014Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Gheorghe Almasi, Jose Moreira, Jessica H. Tseng, Peng Wu
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Patent number: 9952877Abstract: In one embodiment, a physical device (e.g., packet switching device, computer, server) is booted using custom-created frozen partially-booted virtual machines, avoiding the time required for an end-to-end boot process. In one embodiment while the system is operating under a current version, a partially-booted virtual image of a new operating version for each of multiple processing elements of the device is produced according to static configuration information specific to the device, with each of these partially-booted virtual machines frozen. The device is rebooted to a fully operational device by unfreezing these partially-booted virtual machines, thus removing this portion of a boot process from the real-time booting of the device. The generation of the frozen partially-booted virtual machines is advantageously performed by the device itself based on current static configuration information and the availability of the specific hardware configuration of the device.Type: GrantFiled: April 23, 2014Date of Patent: April 24, 2018Assignee: Cisco Technology, Inc.Inventors: Akash R. Deshpande, Michael E. Lipman, Peter Weinberger
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Patent number: 9952878Abstract: In a system and operating method wherein the system includes a medical apparatus and an operator console, a first input processor is assigned to the operator console and acquires a shutdown command that triggers a shutdown operation of the operator console, and a second input processor is assigned to the medical apparatus and acquires a startup command that triggers a startup operation of the medical device. A first interface forwards the shutdown command from the operator console to the medical apparatus wherein a shutdown operation of the medical apparatus is triggered, and a second interface forwards the startup command from the medical apparatus to the operator console, wherein a startup operation of the operator console is triggered.Type: GrantFiled: July 22, 2016Date of Patent: April 24, 2018Assignee: Siemens Healthcare GmbHInventors: Andreas Grimme, Rolf Heinrichs, Ludwig Kreischer, Andreas Schmidt
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Patent number: 9952879Abstract: A software layout system is described herein that speeds up computer system boot time and/or application initialization time by moving constant data and executable code into byte-addressable, persistent random access memory (BPRAM). The system determines which components and aspects of the operating system or application change infrequently. From this information, the system builds a high performance BPRAM cache to provide faster access to these frequently used components, including the kernel. The result is that kernel or application code and data structures have a high performance access and execution time with regard to memory fetches. Thus, the software layout system provides a faster way to prepare operating systems and applications for normal operation and reduces the time spent on initialization.Type: GrantFiled: August 30, 2012Date of Patent: April 24, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Edmund Nightingale, Ky Srinivasan
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Patent number: 9952880Abstract: A wake up system for electronic device includes a detecting circuit, an amplifier circuit, a switch circuit, and a south bridge chip. The detecting circuit detects an ambient temperature change as a result of the physical proximity of a user, converts the temperature change to a weak voltage signal, and amplifies the voltage signal for the first time. The amplifier circuit receives the amplified voltage signal and amplifies the voltage signal for the second time. The switch circuit receives the voltage signal that is amplified for the second time, and outputs a wake up signal when the voltage signal amplified for the second time is greater than a turn-on voltage. The south bridge chip receives the wake up signal, and wakes up the electronic device accordingly.Type: GrantFiled: December 31, 2014Date of Patent: April 24, 2018Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Tong-Qi Huang, Chun-Sheng Chen
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Patent number: 9952881Abstract: A virtual assistant system includes a mobile device to receive an input command corresponding to a function to be performed at one or more external services, to translate the input command into a semantic atom representing the command, and to transmit the semantic atom, and an assistant server configured to receive the transmitted semantic atom, the assistant server including a plurality of plugins, each plugin corresponding to a respective one of the external services and configured to generate a proprietary language command corresponding to the received semantic atom for each external service in which the function is to be performed.Type: GrantFiled: April 18, 2017Date of Patent: April 24, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Vishal Sharma, Elhum Amjadi
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Patent number: 9952882Abstract: Methods, systems, and machine-readable media include identifying a plurality of task items associated with a user. The plurality of task items includes a plurality of task types. They also include selecting a subset of the plurality of task items based on user activity information. The subset of task items includes at least two different task types. They also include providing a launcher user interface for display to the user on a computing device. The launcher user interface includes a plurality of elements corresponding to the selected subset of task items arranged on a single surface. The plurality of elements is selectable to launch respective applications associated with the corresponding task items.Type: GrantFiled: October 27, 2014Date of Patent: April 24, 2018Assignee: Google LLCInventors: Alexander Friedrich Kuscher, Katie Jane Messerly, Jennifer Shien-Ming Chen
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Patent number: 9952883Abstract: According to the invention, a method for determining what hardware components are installed on a computing device is disclosed. The method may include identifying the computing device, and determining, based on the computing device, a hardware component of the computing device. The method may also include retrieving information about the hardware component, and setting, based at least in part on the information about the hardware component, a parameter for an algorithm of software on the computing device.Type: GrantFiled: August 5, 2015Date of Patent: April 24, 2018Assignee: Tobii ABInventor: Henrik Eskilsson
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Patent number: 9952884Abstract: Embodiments relate to optimizing an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler identifies potential target functions and indicates the potential target functions in the program code. Additionally, the compiler determines and indicates in the program code that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module. A linker can read the indication the compiler made in the program code and optimize the indirect call function.Type: GrantFiled: January 31, 2017Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Ulrich Weigand
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Patent number: 9952885Abstract: Some embodiments provide a method for an application operating on a host machine. The method receives a configuration of a Dynamic Host Configuration Protocol (DHCP) service for implementation within a virtualized container on the host machine. The configuration includes several database table entries. The method converts the several database table entries into a configuration file for use by a process that operates in the virtualized container. the method initializes the process in the virtualized container. The process in the virtualized container reads the configuration file in order to perform DHCP services for machines connected to at least one logical forwarding element of a logical network.Type: GrantFiled: October 31, 2013Date of Patent: April 24, 2018Assignee: NICIRA, INC.Inventors: Anupam Chanda, Pankaj Thakkar, Igor Ganichev, Ronghua Zhang, Ansis Atteka
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Patent number: 9952886Abstract: Embodiments are directed towards employing a traffic management system (TMS) that is enabled to deploy component virtual machines (CVM) to the cloud to perform tasks of the TMS. In some embodiments, a TMS may be employed with one or more CVMs. In at least one embodiment, the TMS may maintain an image of each CVM. Each CVM may be configured to perform one or more tasks, to operate in specific cloud infrastructures, or the like. The TMS may deploy one or more CVMs locally and/or to one or more public and/or private clouds. In some embodiments, deployment of the CVMs may be based on a type of task to be performed, anticipated resource utilization, customer policies, or the like. The deployment of the CVMs may be dynamically updated based on monitored usage patterns, task completions, customer policies, or the like.Type: GrantFiled: December 27, 2016Date of Patent: April 24, 2018Assignee: F5 Networks, Inc.Inventors: Richard Roderick Masters, Brent Wayne Blood, Paul Imre Szabo, Benn Sapin Bollay
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Patent number: 9952887Abstract: A secure mode of a computer system is used to provide simulated devices. In operation, if an instruction executing in a non-secure mode accesses a simulated device, then a resulting exception is forwarded to a secure monitor executing in the secure mode. Based on the address accessed by the instruction, the secure monitor identifies the device and simulates the instruction. The secure monitor executes independently of other applications included in the computer system, and does not rely on any hardware virtualization capabilities of the computer system.Type: GrantFiled: June 23, 2014Date of Patent: April 24, 2018Assignee: VMware, Inc.Inventors: Andrei Warkentin, Harvey Tuch
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Patent number: 9952888Abstract: A virtual machine/function of repository is used to collect information for use in providing a particular service to a particular user in a network. The virtual machine/function of repository is dynamically instantiating in a front end of the network upon receiving a request to provision the particular service for the particular user. The collected information pertains only to providing the particular service to the particular user. The virtual machine/function of repository is synchronized with one or more consolidated databases in a back end of the network. The virtual machine/function of repository is deleted upon discontinuation of the particular service for the particular user.Type: GrantFiled: January 10, 2017Date of Patent: April 24, 2018Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.Inventors: Sangar Dowlatkhah, Venson Shaw
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Patent number: 9952889Abstract: In one embodiment, a system for managing communication connections in a virtualization environment, comprises a plurality of host machines implementing a virtualization environment, wherein each of the host machines comprises a hypervisor, at least one user virtual machine (UVM), a connection agent, and an I/O controller; and a virtual disk comprising a plurality of storage devices, the virtual disk being accessible by all of the I/O controllers, wherein the I/O controllers conduct I/O transactions with the virtual disk based on I/O requests received from the UVMs, and wherein, for each of the host machines: each of the UVMs on the host machine sends its respective I/O requests to a selected one of the I/O controllers, and for each of the UVMs on the host machine, the connection agent on the host machine selected one of the I/O controllers for the UVM based on a list of the available I/O controllers.Type: GrantFiled: November 11, 2015Date of Patent: April 24, 2018Assignee: Nutanix, Inc.Inventors: Miao Cui, Robert Schwenz, Gregory A. Smith
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Patent number: 9952890Abstract: Methods, systems, and computer program products are included for collecting kernel data in a protected kernel environment. A method includes allocating a first portion of a memory for a first kernel and reserving a second portion of the memory for a second kernel. The second kernel is stored in the second portion of the memory. A hypervisor is provided a memory address corresponding to the second portion of the memory. The hypervisor disables write and execute access privileges corresponding to the second portion of the memory. After a crash occurs corresponding to the first kernel, the second kernel is attempted to be executed. The hypervisor detects the attempted execution of the second kernel. The hypervisor enables execute access privileges corresponding to the second portion of the memory. After the execute access privileges are enabled, the second kernel is executed to collect data corresponding to the first kernel.Type: GrantFiled: February 29, 2016Date of Patent: April 24, 2018Assignee: RED HAT ISRAEL, LTD.Inventors: Michael Tsirkin, Paolo Bonzini
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Patent number: 9952891Abstract: The present disclosure is related to systems and methods for analysis of anomalous usage of a resource. An example system can include a plurality of virtual computing instances (VCIs) deployed in a software defined data center and a respective monitoring agent associated with each of the plurality of VCIs. The monitoring agent can be configured to collect information regarding resources used by a plurality of processes running on an associated VCI, maintain a sliding window of top resource users among the plurality of processes, analyze the top resource users among the plurality of processes for anomalous usage of the resources, and take an action in response to the anomalous usage.Type: GrantFiled: March 22, 2016Date of Patent: April 24, 2018Assignee: VMware, Inc.Inventors: Dan Zada, Noam Peretz, Hilik Paz
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Patent number: 9952892Abstract: Methods, systems, and computer programs for creating virtual machines (VM) and associated networks in a virtual infrastructure are presented. The method defines virtual network templates in a database, where each virtual network template includes network specifications. A configuration of a virtual system is created, which includes VMs, virtual lab networks associated with virtual network templates, and connections from the VMs to the virtual lab networks. Further, the configuration is deployed in the virtual infrastructure resulting in a deployed configuration. The deployment of the configuration includes instantiating in the virtual infrastructure the VMs of the configuration, instantiating in the virtual infrastructure the virtual lab networks, retrieving information from the database, and creating and executing programming instructions for the VMs.Type: GrantFiled: June 30, 2017Date of Patent: April 24, 2018Assignee: NICIRA, INC.Inventors: Anupam Dalal, Min-Ken Lai, Aastha Bhardwaj
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Patent number: 9952893Abstract: A spreadsheet model is employed to facilitate distributed computations. Spreadsheets and cells are generalized to correspond to arbitrary data sources that can be remote from each other, among other things. Functions can be specified with respect to these arbitrary data sources to produce combinations of data or mashups, for example, wherein changes initiate re-computation with respect to dependent data sources.Type: GrantFiled: November 3, 2010Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventor: Henricus Johannes Maria Meijer
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Patent number: 9952894Abstract: Systems and methods are disclosed for distributing an in-memory data store over a plurality of independent data partitions. For example, the method includes associating each of the plurality of independent data partitions with at least one of a plurality of processing units such that one or more data sets in a corresponding each of the plurality of independent data partitions are processed by the at least one of the plurality of processing units. A query execution engine is provided for causing the plurality of processing units to execute, in parallel, a series of queries to the plurality of independent data partitions.Type: GrantFiled: January 27, 2015Date of Patent: April 24, 2018Assignee: MicroStrategy IncorporatedInventor: Scott Cappiello
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Patent number: 9952895Abstract: A method is provided for handling interrupts in a processor, the interrupts including regular interrupts having a range of priorities and a pseudo non-maskable interrupt (PNMI) that is of a higher priority than any of the regular interrupts. The method includes the steps of obtaining an interrupt vector corresponding to a received interrupt, and if the received interrupt is a regular interrupt, enabling interrupts in the processor so that a PNMI can be received while handling the regular interrupt, executing a regular interrupt handler using the interrupt vector, and disabling interrupts in the processor. On the other hand, if the received interrupt is a PNMI, a PNMI interrupt handler is executed using the interrupt vector as an input thereto.Type: GrantFiled: October 7, 2015Date of Patent: April 24, 2018Assignee: VMware, Inc.Inventors: Andrei Warkentin, Irfan Ulla Khan, Cyprien Laplace, Harvey Tuch, Alexander Fainkichen
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Patent number: 9952896Abstract: Systems and methods are described for managing asynchronous code executions in an on-demand code execution system or other distributed code execution environment, in which multiple execution environments, such as virtual machine instances, can be used to enable rapid execution of user-submitted code. When asynchronous executions occur, one execution may become blocked while waiting for completion of another execution. Because the on-demand code execution system contains multiple execution environments, the system can efficiently handle a blocked execution by saving a state of the execution, and removing it from its execution environment. When a blocking dependency operation completes, the system can resume the blocked execution using the state information, in the same or different execution environment.Type: GrantFiled: June 28, 2016Date of Patent: April 24, 2018Assignee: Amazon Technologies, Inc.Inventors: Timothy Allen Wagner, Marc John Brooker, Ajay Nair
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Patent number: 9952897Abstract: One or more techniques and/or systems are provided for suspending logically related processes associated with an application, determining whether to resume a suspended process based upon one or more wake policies, and/or managing an application state of an application, such as timer and/or system message data. That is, logically related processes associated with an application, such as child processes, may be identified and suspended based upon logical relationships between the processes (e.g., a logical container hierarchy may be traversed to identify logically related processes). A suspended process may be resumed based upon a set of wake policies. For example, a suspended process may be resumed based upon an inter-process communication call policy that may be triggered by an application attempting to communicate with the suspended process. Application data may be managed while an application is suspended so that the application may be resumed in a current and/or relevant state.Type: GrantFiled: September 12, 2011Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Neeraj Kumar Singh, Hari Pulapaka, Arun Kishan, James A. Schwartz, Jr.
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Patent number: 9952898Abstract: A system and method are disclosed for managing the execution of tasks. Each task in a first set of tasks included in a pipeline is queued for parallel execution. The execution of the tasks is monitored by a dispatching engine. When a particular task that specifies a next set of tasks in the pipeline to be executed has completed, the dispatching engine determines whether the next set of tasks can be executed before the remaining tasks in the first set of tasks have completed. When the next set of tasks can be executed before the remaining tasks have completed, the next set of tasks is queued for parallel execution. When the next set of tasks cannot be executed before the remaining tasks have completed, the next set of tasks is queued for parallel execution only after the remaining tasks have completed.Type: GrantFiled: March 13, 2014Date of Patent: April 24, 2018Assignee: Tact.ai Technologies, Inc.Inventor: Dhananjay Prasanna
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Patent number: 9952899Abstract: The present disclosure relates to automatically generating execution sequences from workflow definitions.Type: GrantFiled: October 9, 2014Date of Patent: April 24, 2018Assignee: Google LLCInventor: Marcos Novaes
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Patent number: 9952900Abstract: A scheduler allocating a task to a socket, where the socket comprises a plurality of processor cores and a micro code engine. The scheduler receives metrics from the micro code engine, where the metrics are calculated by the micro code engine based on data receive from an event counter located on each of the plurality of processor cores. The scheduler determines whether a socket level load is below a socket threshold. Based on determining that the socket level load is below the socket threshold value, the scheduler determines whether a core level load is below a core threshold value. Based on determining that the core level load is below the core threshold value, the scheduler determines whether there is an available thread and based on determining that there is an available thread, the scheduler assigns the task to the available thread.Type: GrantFiled: December 1, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Pradipta K. Banerjee, Aneesh K. Kizhake Veetil, Dipankar Sarma, Vaidyanathan Srinivasan
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Patent number: 9952901Abstract: Described herein are technologies related to enforcing thread dependency using a hybrid scoreboard. An encoded video information that includes a plurality of threads is received, a first set and a second set of threads from the plurality of thread is determined, the first and second sets of threads are assigned to a hardware and a software, respectively, and dependency threads in the first and second sets of threads is enforced.Type: GrantFiled: December 9, 2014Date of Patent: April 24, 2018Assignee: Intel CorporationInventors: Haihua Wu, Julia A. Gould, Li-An Tang
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Patent number: 9952902Abstract: An application can be tested to determine whether declared resources for the application are deemed to be required for the application. Instructions can be sent to an operating system to launch the application, to simulate user interactions with the application, and to generate a log of resource requests by the application during launch of the application and during the simulated user interactions with the application. For each of the declared resources, a determination can be made whether a sufficient number of resource requests for the resource is in the log. If there are enough instances of resource requests for the resource in the log, the resource can be included in a list of actual resources for the application.Type: GrantFiled: April 10, 2013Date of Patent: April 24, 2018Assignee: Amazon Technologies, Inc.Inventors: Sridhar Chellappa, Jacek Stolcman
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Patent number: 9952903Abstract: Among other things, one or more techniques and/or systems are provided for controlling resource access for background tasks. For example, a background task created by an application may utilize a resource (e.g., CPU cycles, bandwidth usage, etc.) by consuming resource allotment units from an application resource pool. Once the application resource pool is exhausted, the background task is generally restricted from utilizing the resource. However, the background task may also utilize global resource allotment units from a global resource pool shared by a plurality of applications to access the resource. Once the global resource pool is exhausted, unless the background task is a guaranteed background task which can consume resources regardless of resource allotment states of resource pools, the background task may be restricted from utilizing the resource until global resource allotment units within the global resource pool and/or resource allotment units within the application resource pool are replenished.Type: GrantFiled: October 14, 2015Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Arun Kishan, Hari Pulapaka, Alain Gefflaut, Alex Bendetov, Pedro Miguel Sequeira de Justo Teixeira
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Patent number: 9952904Abstract: Provided are a computer program product, system, and method for distributing tracks to add to cache to processor cache lists based on counts of processor access requests to the cache. There are a plurality of lists, wherein there is one list for each of the plurality of processors. A determination is made as to whether the counts of processor accesses of tracks are unbalanced. A first caching method is used to select one of the lists to indicate a track to add to the cache in response to determining that the counts are unbalanced. A second caching method is used to select one of the lists to indicate the track to add to the cache in response to determining that the counts are balanced. The first and second caching methods provide different techniques for selecting one of the lists.Type: GrantFiled: August 21, 2015Date of Patent: April 24, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta
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Patent number: 9952905Abstract: Methods and systems to identify computer system nodes to which a computer program thread is to be migrated. An example method disclosed herein includes storing data records containing node identifying information collected from a plurality of sampled memory operations executed by a plurality of computer program threads including a first computer program thread. Example methods further include identifying a currently executing computer program thread and, if the currently executing computer program thread is the first computer program thread, target remote nodes having a memory address accessed during execution of at least one of the plurality of sampled memory operations are identified. At least one of the target remote nodes is selected as a migration destination candidate for the first computer program thread.Type: GrantFiled: March 18, 2016Date of Patent: April 24, 2018Assignee: INTEL CORPORATIONInventor: Jin Yao
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Patent number: 9952906Abstract: A native environment on a local device and a virtual environment on a server device linked to the native device over a network can concurrently execute. The concurrently executing can share state information to keep activities between both environments substantially time-synched. The native environment can be a user-machine interactive environment of a machine-to-user interactive interface. The native environment can perform stand-alone operation without appreciable end-user experience degradation. A process in the native environment requiring an excessive quantity of processing cycles can be detected. The native environment can not perform the processing using resources of the native environment. The virtual environment can perform the process and synchronize the result to the native environment, thereby permitting the native environment to continue to function as if the process was performed by the native environment.Type: GrantFiled: May 31, 2016Date of Patent: April 24, 2018Inventor: Brian K. Buchheit
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Patent number: 9952907Abstract: A method and apparatus for managing data is provided, including determining one or more network services associated with user-uploaded data stored in a database, and linking the user-uploaded data with the one or more network services to provide the user-uploaded data via the one or more network services.Type: GrantFiled: September 19, 2011Date of Patent: April 24, 2018Assignee: Samsung Electronics Co., LtdInventors: Hyung-rae Cho, Hyun-joo Oh, Ji-hyeon Kweon
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Patent number: 9952908Abstract: A first party, such as a residential subscriber to an Internet Service Provider (ISP), logically partitions its computing resources into an end user partition and a crowd sourced cloud partition. The first party installs a crowd sourced cloud application in each cloud partition. Together, a cloud provider computing system and each cloud application orchestrate cloud services over a communications network, such as the Internet. For each crowd sourced cloud application, orchestration involves registering cloud services with the cloud provider, provisioning each registered cloud service that is requested by the cloud provider, and operating each provisioned service. For the cloud provider, orchestration involves publishing each registered service as available to crowd sourced cloud users, receiving requests for cloud services from a crowd sourced cloud user, and requesting, from a crowd sourced cloud application, a registered service responsive to the request for cloud services.Type: GrantFiled: September 11, 2015Date of Patent: April 24, 2018Assignee: CISCO TECHNOLOGY, INC.Inventors: Plamen Nedeltchev, John Christopher Cottrell
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Patent number: 9952909Abstract: In various exemplary embodiments, a system, article of manufacture, and method for providing, a cloud computing infrastructure on a system infrastructure comprising, a first virtual computing environment associated with a first class of service, the first class of service defining, in one embodiment, a first set of obligations, restrictions, and/or capabilities; providing, in the same cloud, a second virtual computing environment associated with a second class of service, the second class of service defining a second set of obligations, restrictions, and/or capabilities different from those of the first class of service; and executing the first virtual computing environment according to the first class of service and the second virtual computing environment according to the second class of service, the first virtual computing environment having a different access to the hardware platform than the second virtual environment based on the respective class of service.Type: GrantFiled: June 20, 2012Date of Patent: April 24, 2018Assignee: PayPal, Inc.Inventor: Jean-Christophe Martin
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Patent number: 9952910Abstract: Managing a virtual computer resource on at least one virtual machine. The managing of the virtual computer resource on the at least one virtual machine is by controlling execution of the virtual computer resource on the at least one virtual machine by a virtual machine instance, such as a firmware facility, of a trusted part of a computer system. The virtual machine instance is unique in the computer system.Type: GrantFiled: November 30, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Jakob C. Lang, Angel Nunez Mencias, Albert Schirmer, Jochen Schweflinghaus
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Patent number: 9952911Abstract: Systems, methods, and computer program products to perform an operation comprising providing a plurality of assist threads configured to process data units received by a network adapter, wherein each of the plurality of assist threads comprises a queue configured to store data units allocated to the respective assist thread, allocating data units received by the network adapter to assist threads in a subset of the plurality of assist threads according to a first function, wherein the subset includes a first assist thread and does not include a second assist thread, of the plurality of assist threads, monitoring the queues of the assist threads in the subset, and upon determining that a count of data units in the queue of the first assist thread exceeds a first threshold, modifying the first function to include the second assist thread in the subset of the plurality of assist threads.Type: GrantFiled: March 7, 2016Date of Patent: April 24, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bernard A. King-Smith, Kavitha Vittal Murthy Baratakke
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Patent number: 9952912Abstract: A method of executing an algorithm in a parallel manner using a plurality of concurrent threads includes generating a lock-free barrier that includes a variable that stores both a total participants count and a current participants count. The total participants count indicates a total number of threads in the plurality of concurrent threads that are participating in a current phase of the algorithm, and the current participants count indicates a total number of threads in the plurality of concurrent threads that have completed the current phase. The barrier blocks the threads that have completed the current phase. The total participants count is dynamically updated during execution of the current phase of the algorithm. The generating, blocking, and dynamically updating are performed by at least one processor.Type: GrantFiled: December 30, 2014Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Emad Omara, John Duffy
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Patent number: 9952913Abstract: Implementations are disclosed for a centralized peripheral access controller (PAC) that is configured to protect one or more peripheral components in a system. In some implementations, the PAC stores data that can be set or cleared by software. The data corresponds to an output signal of the PAC that is routed to a corresponding peripheral component. When the data indicates that the peripheral is “unlocked” the PAC will allow write transfers to registers in the peripheral component. When the data indicates that the peripheral component is “locked” the PAC will refuse write transfers to registers in the peripheral component and terminate with an error.Type: GrantFiled: January 23, 2017Date of Patent: April 24, 2018Assignee: Atmel CorporationInventors: Frode Milch Pedersen, Sebastien Jouin, Stein Danielsen, Francois Fosse, Thierry Delalande, Ivar Holand, James Hallman
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Patent number: 9952914Abstract: Aspects of the present invention disclose a method for customizing a parameter value in a software program. The method includes one or more processors receiving one integrated input requesting a change to the original value of a parameter in a software program to a new value of the parameter and defining a persistence level of the new value of the parameter. The method further includes one or more processors changing the original value of the parameter to the new value of the parameter based on the one integrated input and setting the persistence level of the new value based on the one integrated input.Type: GrantFiled: October 28, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: James L. Lentz, David R. Schwartz
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Patent number: 9952915Abstract: Embodiments described herein are directed to methods, and systems for generating event processing language code in a development environment using an event processing compiler. A query in event processing language is received in a development environment. The query can be associated with sample data from input files or an input data source. An event processing compiler compiles the query, where the compiler transforms the query from event processing language code to a development environment script language code. In particular, the event processing language code transforms the code based on event processing attributes that are intricately aligned in syntax and semantic between the event processing language and the development environment script language. The query as a development environment script is executed using sample data.Type: GrantFiled: March 17, 2015Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Olivier Nano, Ivo Jose Garcia Dos Santos, Dirk Siemer, Laurent Bussard, Clemens A. Szyperski, Ziv Kasperski
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Patent number: 9952916Abstract: A pageable query can be generated based on an event-processing query. The pageable query is a form of the event-processing query that supports swapping the event-processing query into and out of memory. For instance, page-in and page-out triggers can be inserted. After detection of a page-in trigger, the event-processing query can be loaded into the memory, and after detection of a page-out trigger, the event-processing query can be unloaded from memory.Type: GrantFiled: April 10, 2015Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventor: Bart De Smet