Patents Issued in April 24, 2018
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Patent number: 9952917Abstract: A computer system may generate a lineage graph for a data processing system. The lineage graph may contain one or more nodes, and it may identify the flow of data through the data processing system. The computer system may determine that a first node in the lineage graph defunct. The computer system may then generate a report for the data processing system and provide the report to a user. The report may include an explanation of why the first node is defunct. The computer system may insert an indication that the first node is defunct into metadata for the first node. The indication may also include the explanation of why the first node is defunct.Type: GrantFiled: August 15, 2017Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Marc N. Haber, Boris Melamed, Gideon Sireling, Gidi Weber
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Patent number: 9952918Abstract: Digital objects are stored and accessed within a fixed content storage cluster by using a page mapping table and a pages index. A stream is read from the cluster by using a portion of its unique identifier as a key into the page mapping table. The page mapping table indicates a node holding a pages index indicating where the stream is stored. A stream is written by storing the stream on any suitable node and then updating a pages index stored within the cluster responsible for knowing the location of digital objects having unique identifiers that fall within a particular address range. The cluster recovers from a node failure by first replicating streams from the failed node and reallocating a page mapping table to create a new pages index. The remaining nodes send records of the unique identifiers corresponding to objects they hold to the new pages index.Type: GrantFiled: July 31, 2015Date of Patent: April 24, 2018Assignee: CARINGO INC.Inventors: Paul R. M. Carpentier, Russell Turpin
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Patent number: 9952919Abstract: In order to reduce data traffic in a network, a master node sends master data to at least one checking instance. The master data are checked by the checking instance. In the absence of errors, either the master data or slave data determined by the slave node are sent by the checking instance to the data-processing unit. When an error is recognized, all master data and slave data available at the checking instance are sent by the checking instance to the data-processing unit.Type: GrantFiled: August 26, 2014Date of Patent: April 24, 2018Assignee: SIEMENS AKTIENGESELLSCHAFTInventors: Joachim Feld, Ludger Fiege, Johannes Riedl, Thomas Schmid, Andreas Zirkler
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Patent number: 9952920Abstract: An information processing device according to an embodiment includes a buffer, a memory, and a controller. The buffer is capable of storing target data for transfer. The memory is capable of storing a fact that predetermined abnormality detection data is written in the buffer and storing an abnormality detection result of the buffer, the abnormality detection result being written by an external controller which controls a first control target. The controller controls a second control target which is different than the first control target; writes, in the buffer, the abnormality detection data to be transferred to the external controller; makes the memory to hold the fact; and, when the abnormality detection result indicates detection of abnormality, prohibits writing of data in at least such memory areas, from among memory areas in the buffer, in which abnormality is detected.Type: GrantFiled: November 20, 2014Date of Patent: April 24, 2018Assignee: Kabushiki Kaisha ToshibaInventor: Atsushi Inoue
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Patent number: 9952921Abstract: Provided are a system and method for detecting and predicting anomalies based on analysis of time-series data. According to an embodiment of the present disclosure, an abnormality detecting and predicting system includes a database configured to store past case data related to a state of a monitored object; a data collector configured to collect time-series status information of the monitored object; an abnormality detector configured to compare the status information with an abnormality detecting reference in a preset detecting interval and detect an occurrence of an abnormality of the monitored object; a similar case selector configured to select a similar case having a highest degree of similarity to the status information among the past case data when the occurrence of an abnormality is detected by the abnormality detector; and a predictor configured to predict proliferation or diminishing of a detected abnormality using the similar case and an abnormality proliferation predicting reference.Type: GrantFiled: December 24, 2014Date of Patent: April 24, 2018Assignee: SAMSUNG SDS CO., LTD.Inventors: Sundeuk Kim, Hyuntaek Oh, Sungil Kim
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Patent number: 9952922Abstract: Apparatus suitable for detecting a fault in a processor comprises a monitor which receives input and output signals from the processor and generates a hash index key which is used to access entries in a hash table. The entries may include actions such as setting a timer so that the response of an output to a change of state of an input may be confirmed as valid within a specified time interval.Type: GrantFiled: July 18, 2013Date of Patent: April 24, 2018Assignee: NXP USA, Inc.Inventors: Graham Edmiston, Alan Devine, David McMenamin, Andrew Roberston, James Andrew Collier Scobie
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Patent number: 9952923Abstract: Systems and techniques are described for transferring data. A described technique includes receiving a request to transmit a data block from a first data storage device to a second data storage device. An attempt to read the data block from the first data storage device is made. A media error resulting from the attempt to read the data block from the first data storage device is detected. In response to detecting the media error, a new data block is generated and includes mismatched checksum data that causes a checksum mismatched error when the new data block is accessed. The new data block is transmitted for storage at the second data storage device in place of the data block.Type: GrantFiled: June 30, 2016Date of Patent: April 24, 2018Assignee: VMware, Inc.Inventors: Enning Xiang, Eric Knauft, Pascal Renauld, Xin Li
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Patent number: 9952924Abstract: A memory device has a plurality of memory units, an error correction processor, and a memory controller. The memory units include semiconductor memories, and read and write in parallel. The error correction processor converts input content data into recording data which includes the content data and an error correction code. The error correction processor decodes the content data by performing conversion including error correction of recording data read out of the memory units. The memory controller writes recording data divided into a number of data into an area of areas extending over the memory units. The memory controller reads the divided recording data from the area. The memory controller determines that writing into the area has been completed normally if the number of the semiconductor memories of which abnormality has been detected is less than or equal to a number of abnormalities correctable by the error correction processor.Type: GrantFiled: April 18, 2014Date of Patent: April 24, 2018Assignee: Kabushiki Kaisha ToshibaInventor: Yuichiro Hanafusa
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Patent number: 9952925Abstract: Examples of the present disclosure provide apparatuses and methods for error code calculation. The apparatus can include an array of memory cells that are coupled to sense lines. The apparatus can include a controller configured to control a sensing circuitry, that is coupled to the sense lines, to perform a number of operations without transferring data via an input/output (I/O) lines. The sensing circuitry can be controlled to calculate an error code for data stored in the array of memory cells and compare the error code with an initial error code for the data to determine whether the data has been modified.Type: GrantFiled: January 6, 2016Date of Patent: April 24, 2018Assignee: Micron Technology, Inc.Inventors: Perry V. Lea, Timothy P. Finkbeiner
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Patent number: 9952926Abstract: A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: reading memory cells based on a default hard-decision voltage level and decoding the obtained hard-bit information; if the decoding fails, reading the memory cells based on default soft-decision voltage levels and then decoding the obtained soft-bit information; if the decoding still fails, reading the memory cells based on first test voltage levels to obtain first soft-bit information and reading the memory cells based on second test voltage levels to obtain second soft-bit information; obtaining a first estimating parameter and a second estimating parameter according to the first soft-bit information and the second soft-bit information, respectively; and updating the default hard-decision voltage level according to the first estimating parameter and the second estimating parameter. As a result, a decoding efficiency can be improved.Type: GrantFiled: July 13, 2016Date of Patent: April 24, 2018Assignee: EpoStar Electronics Corp.Inventors: Heng-Lin Yen, Yu-Hua Hsiao
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Patent number: 9952927Abstract: A data storage apparatus comprising a plurality of data storage devices configured to store data blocks, and one or more protection devices configured to store protection blocks, wherein the data devices and the protection devices are associated by a plurality of stripes, wherein each stripe comprises a memory block on each data device or protection device, and wherein each protection block in a protection device comprises a value for reconstructing storage blocks in the same stripe, and a controller configured to select a data device, store data blocks sequentially to the memory blocks in the selected data devices, store protection blocks in the protection devices for each updated stripe, read data blocks from a selected data device, and reconstruct damaged storage devices. It operates a cold storage system with less power consumption, low component wear, and flexible in capacity expansion.Type: GrantFiled: January 27, 2016Date of Patent: April 24, 2018Assignee: Futurewei Technologies, Inc.Inventor: Xiaogang Zhu
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Patent number: 9952928Abstract: Embodiments of the present invention provide a method comprising performing an operation on a first flash drive of a plurality of flash drives configured in a parallel flash drive architecture, wherein the operation occupies a flash controller corresponding to the first flash drive, sending a signal to a processor coupled with the parallel flash drive architecture to indicate that the flash controller is occupied, and writing data to two or more of the plurality of flash drives, other than the first flash drive, by striping the data amongst the two or more of the plurality of flash drives in response to the signal to the processor. Other embodiments may be described and/or claimed.Type: GrantFiled: March 11, 2016Date of Patent: April 24, 2018Assignee: Marvell International Ltd.Inventors: Wei Zhou, Chee Hoe Chu, Po-Chien Chang
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Patent number: 9952929Abstract: A method and system are provided for spare capacity usage for critical redundancy in storage arrays. The method may include monitoring a Redundant Array of Independent Disks (RAID) array to determine whether one or more redundancy units are at a critical level. A redundancy unit may be in a critical level when an additional drive failure will result in loss of data from the redundancy unit. The method may further include identifying available regions in the RAID array which are not allocated to user data in response to determining that a particular redundancy unit is critical. The method may further include determining an available region for the particular redundancy unit, where the available region is in a drive of the RAID array that does not contain data of the particular redundancy unit. The method may further include storing a critical stripe in the available region.Type: GrantFiled: April 21, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: John P. Agombar, Ian Boden, Gordon D. Hutchison, Lee J. Sanders
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Patent number: 9952930Abstract: A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and a processing module operably coupled to the interface and memory such that the processing module, when operable within the computing device based on the operational instructions, is configured to perform various operations. When a is to DSN undergo a change from a first system configuration of a Decentralized, or Distributed, Agreement Protocol (DAP) to a second system configuration of the DAP (e.g., such as based on addition, and/or removal of storage unit(s) (SU(s)) within the DSN or reallocation of data within the DSN, etc.), a computing device identifies a DAP transition mapping between the first system configuration of the DAP to the second system configuration of the DAP. Then, the computing device directs SU(s) to operate based on the DAP transition mapping during the transition.Type: GrantFiled: October 21, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Kumar Abhijeet, Manish Motwani, Jason K. Resch, Ethan S. Wozniak
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Patent number: 9952931Abstract: A versioned records management computing system that uses a restart era in order to promote rapid recovery. A persistent store includes a multi-versioned record collection. The records are also associated with a restart era that corresponds to the era of operation of the computing system after a restart. Upon a recovery, the current restart era changes. An object collection media has an object collection that conforms to an object model such that the object model is used to operate upon the records. The object collection media is operable such that the object collection is durable so as to survive restarts of the system to thereby allow for accelerated recovery.Type: GrantFiled: January 19, 2016Date of Patent: April 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Per-Ake Larson, Robert Patrick Fitzgerald, Cristian Diaconu
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Patent number: 9952932Abstract: A computer implemented method for providing fault tolerance to a plurality of instances in a system including a plurality of surviving instances includes: determining, for each of the surviving instances, an aggregate load by: retrieving a job load of each job assigned to the respective surviving instance; and summing the job loads of all of the jobs assigned to the respective surviving instance; and selecting to recover and perform, by one of the surviving instances, an orphaned job based upon the aggregate loads of the surviving instances.Type: GrantFiled: November 2, 2015Date of Patent: April 24, 2018Assignee: Chicago Mercantile Exchange Inc.Inventor: Erik Helleren
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Patent number: 9952933Abstract: Various systems, methods, and processes for caching and referencing multiple fingerprints while data operations are ongoing are disclosed. A first fingerprint is generated based on a first fingerprinting process. The first fingerprint is stored in association with a second fingerprint, which is based on a second fingerprinting process. The first fingerprint and the second fingerprint are associated with the same data segment. Data operations such as a backup operation, a restore operation, or a replication operation can be performed while the conversion of the data segment from the second fingerprint to the first fingerprint is ongoing.Type: GrantFiled: December 31, 2014Date of Patent: April 24, 2018Assignee: Veritas Technologies LLCInventors: Xianbo Zhang, Haigang Wang
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Patent number: 9952934Abstract: Disclosed methods and systems leverage resources in a storage management system to partially synchronize primary data files based on synchronizing selected portions thereof without regard to changes that may be occurring in other non-synchronized portions. Accordingly, a number of primary data files may be partially synchronized by synchronizing designated portions thereof via auto-restore operations from backup data. This approach relies on storage management resources to designate portions of source data that is to be kept synchronized across any number of targets; detect changes to the designated portions; back up changes to secondary storage; and distribute the changes from secondary storage to the associated targets, with minimal impact to the primary data environment. The approach may be mutually applied, so that changes in any one of an associated group of source data files may be likewise detected, backed up, and distributed to the other members of the group.Type: GrantFiled: January 20, 2015Date of Patent: April 24, 2018Assignee: COMMVAULT SYSTEMS, INC.Inventor: Prosenjit Sinha
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Patent number: 9952935Abstract: Approaches presented herein enable automatically detecting and preventing backup of content from a client system to a remote backup system based on specified criteria. Specifically, content on a client system is analyzed to determine one or more of content items to be backed up from the client system to a remote backup system. A set of content items from among the content items that match one or more specified criteria is detected. The specified criteria may include classes of content (e.g., document, text message, e-mail message, photograph, etc.) and contact names associated with the classes of content (e.g., creator, recipient, sender, owner, etc.). Responsive to detecting the set of content items that match the one or more specified criteria, the set of content items is prevented from being backed up to the remote backup system.Type: GrantFiled: January 6, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Lisa Seacat DeLuca, Dana L. Price, Aaron J. Quirk, Shelbee D. Smith-Eigenbrode
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Patent number: 9952936Abstract: In a storage system for backing up data of an external apparatus, the external apparatus and a storage apparatus collaboratively perform efficient de-duplication. A storage system stores data from the external apparatus in a unit of content, and includes a backup apparatus configured to execute backup processing to create backup data of the data from the external apparatus in the unit of content; and a storage apparatus coupled to the backup apparatus in a communication-enabled manner and configured to store the backup data received from the backup apparatus. A first backup processing part of the backup apparatus determines whether or not a content is already stored in the storage apparatus by using first redundancy determination information that is information for determining whether or not each of contents of the backup data is already stored in the storage apparatus.Type: GrantFiled: December 5, 2012Date of Patent: April 24, 2018Assignee: Hitachi, Ltd.Inventors: Mitsuo Hayasaka, Koji Yamasaki
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Patent number: 9952937Abstract: Methods, devices and systems enable restoring a database system more efficiently. A server computing device may be configured to receive a database transaction request that includes information identifying a database operation, determine a priority value for the database operation, and add the database operation to a journaling log based on the determined priority value. After detecting a failure event, the server computing device may perform the database operations identified in the journaling log to restore the database system.Type: GrantFiled: October 24, 2014Date of Patent: April 24, 2018Assignee: OPENET TELECOM LTD.Inventors: David Rolfe, Cameron Ross Dunne, Alan McNamee, Andrew D'Souza
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Patent number: 9952938Abstract: Methods, devices and systems enable restoring a database system more efficiently. A server computing device may be configured to determine a recovery time interval for a session store database system so as to allow a large number of sessions (e.g., ninety percent of sessions, etc.) to start and finish within that interval, periodically review database records to identify a database record that has not been updated within a most recent recovery time interval, add the identified database record to a journaling log, and update the identified database record to include information identifying a time at which the database record was last added to the journaling log. After detecting a failure event, the server computing device may perform the database operations identified in the journaling log to restore the database system.Type: GrantFiled: October 24, 2014Date of Patent: April 24, 2018Assignee: OPENET TELECOM LTD.Inventors: David Rolfe, Cameron Ross Dunne, Alan McNamee, Andrew D'Souza
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Patent number: 9952939Abstract: In some embodiments of the present invention, a data storage system includes a controller and a non-volatile memory array having a plurality of memory pages. The controller performs a method that efficiently resolves the lower page corruption problem. In one embodiment, the method selects programmed lower page(s) for which paired upper page(s) have not been programmed, reads data from those selected lower page(s), corrects the read data, and reprograms the read data into those lower page(s). Since the number of lower pages in this condition is typically low (e.g., several pages in a block with hundreds or thousands of pages), this is a much more efficient method than reprogramming the entire block. In another embodiment, a similar reprogramming method is applied as a data recovery scheme in situations in which only lower pages are programmed (e.g., SLC memory, MLC memory in SLC mode, etc.).Type: GrantFiled: April 30, 2015Date of Patent: April 24, 2018Assignee: Western Digital Technologies, Inc.Inventors: Yongke Sun, Dengtao Zhao, Jui-Yao Yang
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Patent number: 9952940Abstract: Operating a shared nothing cluster system (SNCS) in order to perform a backup of a data element. The SNCS includes at least a first and a second storage node connected via a first network of the SNCS. The first and second storage nodes are configured to store a first set and a second set of blocks, respectively, in which the first and second set of blocks form a single data element. A backup server is connected to the first and second storage nodes, and the backup server includes a backup information table. The first and second storage nodes are configured to act as backup clients in a client-server configuration involving the backup server, upon receiving at the first and the second storage nodes a request to backup the data element. For each node of the first and second storage nodes, the node identifies one or more block sequences of consecutive blocks in a set of blocks of the data element stored in the node.Type: GrantFiled: August 17, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Christian Bolik, Nils Haustein, Dominic Mueller-Wicke, Thomas Schreiber
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Patent number: 9952941Abstract: Technologies for virtual multipath access include a computing device configured to sequester a recovery partition from a host partition while allowing the recovery partition to access one or more resources of the host partition such as host memory or data storage. A remote computing device determines whether the host partition is responsive. The recovery partition receives a request for host state data of the host partition from the remote computing device in response to a determination that the host partition is not responsive. The recovery partition retrieves the requested host state data using a host state index maintained by the host partition and transmits the requested host state data to the remote computing device. The host state index may identify the location of the requested host state data. The remote computing device may perform a recovery operation based on the received host state data. Other embodiments are described and claimed.Type: GrantFiled: December 19, 2013Date of Patent: April 24, 2018Assignee: Intel CorporationInventors: Kshitij A. Doshi, Rahul Khanna, Minh Tung Duy Le, Paul H. Dormitzer
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Patent number: 9952942Abstract: Embodiments enable distributed data processing with automatic caching at multiple system levels by accessing a master queue of data processing work comprising a plurality of data processing jobs stored in a long term memory cache; selecting at least one of the plurality of data processing jobs from the master queue of data processing work; pushing the selected data processing jobs to an interface layer including (i) accessing the selected data processing jobs from the long term memory cache; and (ii) saving the selected data processing jobs in an interface layer cache of data processing work; and pushing at least a portion of the selected data processing jobs to a memory cache of a first user system for minimizing latency in user data processing of the pushed data processing jobs.Type: GrantFiled: February 12, 2016Date of Patent: April 24, 2018Assignee: Bank of America CorporationInventors: Shawn Cart Gunsolley, Erin Cassell, Siva Shankar Potla, Adam Nathaniel Desautels, Jeffrey Scott Poore, Marshall Bright Thompson
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Patent number: 9952943Abstract: A transactional memory system salvages a partially executed hardware transaction. A processor of the transactional memory system saves state information in a first code region of a first hardware transaction. The processor executes an about-to-fail handler, the about-to-fail handler using the saved state information to determine whether the first hardware transaction is to be salvaged or to be aborted. The processor executing the about-to-fail handler, based on the transaction being to be salvaged, uses the saved state information to determine what portion of the first hardware transaction to salvage.Type: GrantFiled: March 11, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Harold W. Cain, III, Michael Karl Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz
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Patent number: 9952944Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.Type: GrantFiled: October 25, 2016Date of Patent: April 24, 2018Assignee: SanDisk Technologies LLCInventors: Idan Alrod, Eran Sharon, Alon Eyal, Liang Pang, Evgeny Mekhanik
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Patent number: 9952945Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.Type: GrantFiled: July 5, 2013Date of Patent: April 24, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventor: Kiyotaka Matsuo
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Patent number: 9952946Abstract: According to some embodiments, a virtual machine manager is operable to manage a virtual machine (VM) that spans a plurality of hardware appliances. The virtual machine manager receives a request to provide a service to a device, selects an application instance to provide the service to the device, and forwards the request for the service to the selected application instance. The selected application instance is running in an instance of the virtual machine associated with a first hardware appliance. The virtual machine manager determines session data associated with the service and provides the session data associated with the service to a second hardware appliance of the VM in order to enable the VM to provide high availability of the service to the device.Type: GrantFiled: February 4, 2014Date of Patent: April 24, 2018Assignee: Telefonaktiebolaget L M Ericsson (publ)Inventors: Zhongwen Zhu, Claes Goran Robert Edstrom
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Patent number: 9952947Abstract: A method for processing a fault of a lock server in a distributed system is disclosed, where the distributed system includes m lock servers, which locally store same lock server takeover relationship information. Lock servers in the distributed system that are not faulty receive a notification message, which carries information about a fault of a first lock server; after receiving the notification message, a second lock server determines that it is a takeover lock server of the first lock server according to the lock server takeover relationship information, and the takeover lock server enters a silent state; after receiving the notification message, a third lock server in the distributed system determines that it is not the takeover lock server of the first lock server according to the lock server takeover relationship information. After receiving a locking request, the third lock server allocates lock permission information according to the locking request.Type: GrantFiled: May 11, 2017Date of Patent: April 24, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Rui Feng, Jun Liu, Guangyou Xiang
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Patent number: 9952948Abstract: A method for fault tolerant controller readiness. Executing functions by a first controller operating in a primary status mode. Operating in a hot standby status mode by a second controller and mirroring the first controller by executing functions to operate as a redundant controller. Operating in a cold standby status mode by at least one backup controller under normal operating conditions. The second controller is reconfigured while operating under normal operating conditions from the hot standby status mode to the primary standby status mode if a failure occurs in the first controller. Reconfiguring the at least one backup controller operating under normal operating conditions from cold standby status mode to hot standby status mode to operate as a redundant controller in response to the reconfiguring the second controller from the hot standby status mode to the primary status mode.Type: GrantFiled: March 23, 2016Date of Patent: April 24, 2018Assignee: GM Global Technology Operations LLCInventors: Soheil Samii, Thomas E. Fuhrman, Massimo Osella
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Patent number: 9952949Abstract: For a high availability cache, a cache module obtains permission to manage the cache in response to a failover event in a server cluster by communicating a cache coherency token. An update module rebuilds a cache directory from data stored in the cache and accesses the cache without reloading the data stored in the cache.Type: GrantFiled: November 20, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Lawrence Y. Chiu, Yang Liu, Paul H. Muench, Timothy L. Toohey
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Patent number: 9952950Abstract: A data storage system includes a plurality of Data Storage Devices (DSDs) that each includes at least one disk for storing data. Data is received for storage in a data stripe across the plurality of DSDs with each DSD of the plurality of DSDs storing a different portion of the data stripe. A strip size is determined for each portion of the data stripe based on a radial location where the portion of the data stripe will be stored on the at least one disk of its respective DSD. The data stripe is stored across the plurality of DSDs with each portion of the data stripe arranged in a radial location on the at least one disk of its respective DSD so that, when the data stripe is accessed, the radial locations of access in the plurality of DSDs progress in the same radial direction.Type: GrantFiled: June 16, 2015Date of Patent: April 24, 2018Assignee: Western Digital Technologies, Inc.Inventor: John Spongr
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Patent number: 9952951Abstract: One or more techniques and/or computing devices are provided for preserving coredump data. A first storage controller, of a first storage cluster, may have a disaster recovery relationship with a second storage controller of a second storage cluster. When the first storage controller fails, the first storage controller performs a coredump process to dump memory contents of the first storage controller into a storage device. During implementation of the coredump process, the first storage controller stores a storage device identifier of the storage device into a disk mailbox. Upon detecting the failure, the second storage controller reads the storage device identifier from the disk mailbox. The second storage controller performs a switchover operation to change ownership of storage devices, but excluding the storage device used by the coredump process, from the first storage controller to the second storage controller for providing clients with failover access to the storage devices.Type: GrantFiled: October 22, 2015Date of Patent: April 24, 2018Assignee: NetApp Inc.Inventors: Hrishikesh Keremane, Sravana Kumar Elpula, Vijay Singh, Kalaivani Arumugham
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Patent number: 9952952Abstract: Multi-reliability regenerating (MRR) erasure codes are disclosed. The erasure codes can be used to encode and regenerate data. In particular, the regenerating erasure codes can be used to encode data included in at least one of two or more data messages to satisfy respective reliability requirements for the data. Encoded portions of data from one data message can be mixed with encoded or unencoded portions of data from a second data message and stored at a distributed storage system. This approach can be used to improve efficiency and performance of data storage and recovery in the event of failures of one or more nodes of a distributed storage system.Type: GrantFiled: February 13, 2017Date of Patent: April 24, 2018Assignee: AT&T Intellectual Property I, L.P.Inventor: Chao Tian
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Patent number: 9952953Abstract: Technologies are provided for non-monotonic eventual convergence for desired state configuration. One class of problem in DSC is that, in some situations, DSC cannot move forward toward a desired state without first moving further from the desired state. For example, an executable file providing a service that needs to be replaced with a newer version, but that is currently executing (i.e., in the desired state of “operating”), cannot be replaced with the newer version without first being stopped. But stopping the service moves in the wrong direction relative to the desired state, which is to have the service operating. This moving away from the desired state so as to be able to move closer to the desired state is a problem for conventional DSC systems that results in failures. The solution to this problem is herein referred to as “non-monotonic eventual convergence” or “NMEC”.Type: GrantFiled: December 29, 2015Date of Patent: April 24, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING LLCInventors: Bruce Gordon Payette, Hemant Mahawar, Kenneth M. Hansen, Mark Gray, Narayanan Lakshmanan
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Patent number: 9952954Abstract: A method for operating a multi-core processor system, wherein different of a program are each executed simultaneously by a different respective processor core of the multi-core processor system includes inserting a breakpoint in a first of the threads for interrupting the first processor core and instead executing an exception handling routine. At least one processor core to be additionally interrupted is determined with the exception handling routine on the basis of an association matrix, and an inter-processor interrupt (IPI) is sent to the at least one processor core by the exception handling routine in order to interrupt the at least one processor core.Type: GrantFiled: April 9, 2013Date of Patent: April 24, 2018Assignee: SIEMENS AKTIENGESELLSCHAFTInventor: Rene Graf
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Patent number: 9952955Abstract: A method of phase calibration for a system to control a double data rate memory device includes setting a scanning frequency at an initial value to determining if a built-in self-test passes, decreasing the scanning frequency by a frequency decrement and then performing the BIST again until the BIST passes, performing a phase calibration procedure to obtain a phase window with respect to the scanning frequency and obtain a target phase obtained based on the phase window to determine if the scanning frequency is lower than a maximum value, and increasing the scanning frequency by a frequency increment and then performing the phase calibration procedure again, until the scanning frequency being determined not lower than the maximum value.Type: GrantFiled: January 21, 2016Date of Patent: April 24, 2018Assignee: NOVATEK Microelectronics Corp.Inventor: Chia-Ta Lai
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Patent number: 9952956Abstract: Apparatuses, methods, systems, and computer program products are disclosed for calculating a clock rate of a processor. A baseline data module receives a first set of performance data associated with a processor. The performance data is generated using a hardware element that captures performance data for the processor. The hardware element is external to the processor. An update data module receives a second set of performance data associated with the processor a predefined time interval after the first set of performance data is received. The second set of performance data corresponds to the first set of performance data. A rate module calculates a clock rate for the processor based on the first set of performance data and the second set of performance data.Type: GrantFiled: July 6, 2015Date of Patent: April 24, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Rajarshi Das, Philip L Vitale
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Patent number: 9952957Abstract: A method for dynamically modifying a characteristic for an electronic device. The method includes activating by a processor a first profile having a first characteristic setting and a first state for an input/output (IO) device. Once the first profile is activated, receiving an input by a sensor and communicating the input to the processor. The method then includes activating by the processor a second profile having a second characteristic setting and a second state for the IO device. The second profile modifies a component of the IO device to include a second characteristic setting and a second state.Type: GrantFiled: January 29, 2016Date of Patent: April 24, 2018Assignee: Apple Inc.Inventors: Christopher T. Mullens, Jesse Michael Devine, Marco Sebastiani, Nima Parivar
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Patent number: 9952958Abstract: Performance of a computer system is measured based, at least in part, on a performance metric. In response to determining that the computer system is experiencing a performance issue based on measuring the performance, the performance metric is matched with an anti-pattern to identify a performance issue, wherein the anti-pattern defines an incorrect solution to a defined problem occurring in the computer system. Also, a pattern repository is queried to identify a pattern that defines a correct solution to the defined problem based, at least in part, on the match between the performance metric and the anti-pattern. In response to identifying the pattern, implementing the pattern in the computer system to improve the performance.Type: GrantFiled: March 31, 2016Date of Patent: April 24, 2018Assignee: CA, Inc.Inventors: Eitan Hadar, Kieron John James Connelly, Olga Lagunova, Peter Anthony Lazzaro
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Patent number: 9952959Abstract: A logging tool running on a computing device serializes system and application events. The logging tool analyzes a logging stream from a process to identify if the logging stream includes a formatting instruction. The logging tool identifies at least one argument associated with the formatting instruction, and serializes the formatting instruction and the at least one argument by recording, to a buffer, the formatting instruction and the at least one argument without formatting the logging stream.Type: GrantFiled: May 29, 2012Date of Patent: April 24, 2018Assignee: Red Hat, Inc.Inventors: Steven C. Dake, Angus Salkeld
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Patent number: 9952960Abstract: A method of analyzing a hazard of a software control system which is operated by a computer and based on STPA (System Theoretic Process Analysis) is provided. The method includes determining an attribute and function demands of the system, analyzing tasks of the system based on the determined attribute and the function demands, generating specification of a relation between the tasks using CTT (Concur Task Tree) method, the CTT method representing a hierarchical relation of a control flow between the tasks, determining at least one of the hazard of the system based on the specification and generating a safety constraint of the system based on the determined hazard. The determining at least one of the hazard of the system uses a guide word mapping table of CTT based STPA.Type: GrantFiled: December 1, 2017Date of Patent: April 24, 2018Assignee: SANGMYUNG UNIVERSITY SEOUL INDUSTRY—ACADEMY COOPERATION FOUNDATIONInventors: Hyuk Soo Han, EunBi Kim
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Patent number: 9952961Abstract: A computer-implemented method and system for assessing risk of a software program and software updates to a program to prioritize verification resources, which includes receiving code for a software product for a testing assessment. The code is analyzed according to a risk assessment criteria, and the risk assessment criteria includes risk assessment factors. The risk assessment factors for the code are weighted as part of the criteria. A risk assessment score of the code is determined based on the criteria. Testing resources are allocated in response to the risk assessment score.Type: GrantFiled: September 29, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Balaji V. Atyam, Nicholas E. Bofferding, Andrew Geissler, Michael C. Hollinger
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Patent number: 9952962Abstract: According to an embodiment of the present invention, an artifact is received, and unstructured content of the artifact is parsed and analyzed to identify data for one or more of missing structured content of the artifact and inaccurate structured content of the artifact. The identified data is then added to the artifact. Embodiments of the present invention can be used, for example, to provide data for missing and inaccurate structured content in artifacts of Application Lifecycle Management (ALM) frameworks, and improve accuracy of structured information that used to run queries and create reports.Type: GrantFiled: March 26, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Muhtar B. Akbulut, Mario A. Maldari, David D. Taieb
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Patent number: 9952963Abstract: The present invention relates to aSoC, which includes a master device, a slave device, a high-speed bus, and a monitoring apparatus. The master device is connected to a first port of the high-speed bus, and the slave device is connected to a second port of the high-speed bus, so that the master device is capable of accessing the slave device. The monitoring apparatus is arranged between the first port of the high-speed bus and the master device, and/or between the second port of the high-speed bus and the slave device, and configured to record, based on a high-speed bus communication protocol, state information of each command that passes through the first port and/or the second port, and when state information of a command indicates that an operation of the command is in a timeout state, report an interrupt to locate a faulty node on the high-speed bus.Type: GrantFiled: November 13, 2013Date of Patent: April 24, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Chenglei Mou, Qi Han
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Patent number: 9952964Abstract: Embodiments of the present invention provide methods, systems, and computer program products for building an environment. Embodiments of the present invention can be used to allocate resources and build an environment such that the environment is built when a user is prepared to test one or more portions of code in the environment. Embodiments of the present invention can be used to reduce the “lag time” developers experience between waiting for the code to be built and for resources to be provisioned, and can also provide a less costly alternative to maintaining and operating dedicated environments.Type: GrantFiled: September 29, 2016Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Jason A. Collier, David L. Leigh, Yi-Hsiu Wei, Scott A. Will
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Patent number: 9952965Abstract: A method, program product, and computer system is provided for test case self-validating. A probe builder, instruments one or more source code modules with a test probe. The test probe placement is based on at least one criterion including: an application program interface (API), a component, a test case name, a product release, and a product feature. The probe builder registers the test probe in a probe database. The registered test probe has record in the probe database that includes a probe identifier, a probed command, a probed file name, a line number, the test case name, and a location of an executable binary containing the test probe. The probe builder compiles the instrumented source code modules into one or more binary executable modules. The test case generator creates a test case that includes at least one registered test probe. The test case validator validates the test case.Type: GrantFiled: August 6, 2015Date of Patent: April 24, 2018Assignee: International Business Machines CorporationInventors: Su Liu, Priya Paul, Jun Su, Cheng Xu
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Patent number: 9952966Abstract: When a controller receives a new command from a main controller during overwrite-deletion processing for a specific storage apparatus, the received command is stored at least until completion of the overwrite-deletion processing when the received command is a command to the specific storage apparatus. Alternatively, progression of overwrite-deletion process is stored and priority processing of the received command is executed. On the other hand, when the received command is not a command to the specific storage apparatus, processing for the command is executed.Type: GrantFiled: November 22, 2013Date of Patent: April 24, 2018Assignee: CANON KABUSHIKI KAISHAInventor: Akihiro Matsumoto