Patents Issued in November 6, 2018
  • Patent number: 10120748
    Abstract: Provided is a method of providing a fault management service in a cloud. During requisition of a cloud service involving a service element provided by the cloud it is determined whether solutions are available for potential faults related to the service element. The available solutions are highlighted for potential faults related to the service element to a user. Upon selection of a highlighted solution by the user, the selected solution is applied to the service element.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: November 6, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Sandhya Balakrishnan
  • Patent number: 10120749
    Abstract: ECC (error checking and correction) can be extended to allow an ECC code to correct memory subarray errors. A memory device includes multiple input/output (I/O) connectors to interface with an external device such as a controller. The memory device includes multiple arrays or subarrays that are specifically mapped to I/O connectors instead of arbitrarily routed. As such, the data paths of the memory subarrays can be exclusively routed to a specific I/O connector. The I/O connector can be uniquely associated with a single memory subarray, or multiple memory subarrays can be mapped to a specific I/O connector. The mapping is in accordance with an error checking and correcting (ECC) code matrix, where a code of the ECC code matrix corresponding to the specific I/O connector is to check and correct data corruption errors and I/O errors for the associated one or multiple memory subarrays.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventor: Pete D. Vogt
  • Patent number: 10120750
    Abstract: A cache memory includes cache memory circuitry that is accessible per cache line and a redundant-code storage that stores one or more numbers of first redundant codes to be used for error correction of cache line data stored in the cache memory circuitry per cache line and one or more numbers of second redundant codes to be used for error detection of a part of the cache line data.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: November 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Susumu Takeda, Hiroki Noguchi, Kazutaka Ikegami, Shinobu Fujita
  • Patent number: 10120751
    Abstract: Examples may include techniques to recover data from a solid state drive (SSD) using exclusive OR (XOR) parity information. Data saved to non-volatile types of block-erasable memory such as NAND memory included in the SSD may be recovered via use of XOR parity information saved to types of write-in-place memory such as a 3-dimensional cross-point memory also included in the SSD.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 6, 2018
    Assignee: INTEL CORPORATION
    Inventors: Jawad B. Khan, Anand S. Ramalingam, Pranav Kalavade
  • Patent number: 10120752
    Abstract: The present invention provides a data-storage device including a flash memory and a controller. The flash memory includes a plurality of blocks, and each of the blocks has a plurality of pages, wherein each of the pages has a plurality of sub-pages and a plurality of spare areas, each of the spare areas is arranged to store a spare data sector, and the spare data sector respectively corresponds to the sub-pages. The controller is arranged to access the sub-pages according to the spare data sector.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: November 6, 2018
    Assignee: SILICON MOTION, INC.
    Inventors: Li-Shuo Hsiao, Chang-Kai Cheng
  • Patent number: 10120753
    Abstract: Embodiments of the present invention disclose methods and apparatuses for correcting errors in data stored in a solid state device. The solid state device may have a plurality of bits stored in multi-level memory cells. The method may include identifying one or more errors in a plurality of memory cells. The method may further include converting the erroneous cells to erasures. The method may further include correcting the one or more erasures.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: November 6, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Chandra C. Varanasi
  • Patent number: 10120754
    Abstract: Apparatuses and methods for data storage error protection are described. One example apparatus for data storage error protection includes an array of memory cells arranged in a first dimension and a second dimension. A controller is configured to determine a set of symbols corresponding to data stored in the memory cells. The controller is configured to add subsets of the set of symbols obliquely oriented to the first dimension and the second dimension to determine a number of parity check symbols. The controller is configured to use a same number of parity check symbols for protection of a first subset of memory cells oriented parallel to the first dimension as used for protection of a second subset of memory cells oriented parallel to the second dimension.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: November 6, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Amato, Marco Sforzin
  • Patent number: 10120755
    Abstract: A method includes encoding data into pluralities of sets of encoded data slices. The method further includes outputting the pluralities of sets of encoded data slices to DST units, wherein each of the DST units stores a slice grouping of encoded data slices. The method further includes dividing the task into a decode threshold number of partial tasks. The method further includes sending a slice deletion policy to the DST units. On a data chunkset by data chunkset basis: the method further includes selecting a decode threshold number of DST units; assigning the decode threshold number of partial tasks to the decode threshold number of DST units; executing the decode threshold number of partial tasks on the slice groupings to produce partial results; and deleting the plurality of sets of encoded data slices of the given data chunkset in accordance with the slice deletion policy.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: November 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Grube, Timothy W. Markison, Jason K. Resch
  • Patent number: 10120756
    Abstract: A method for execution by a dispersed storage and task (DST) processing unit includes obtaining audit records for an audit object and determining when the audit object is complete. When the audit object is complete, aggregating the audit records of the audit object within the audit object by generating the audit object to include the audit records; generating identifier (ID) information and generating integrity information. Fields of the audit object are populated with the audit records, the ID information, and the integrity information and a name of the audit object is determined for storage of the audit object and the name of the audit object in a dispersed storage network (DSN).
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: November 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jason K. Resch, Wesley B. Leggette
  • Patent number: 10120757
    Abstract: A method for prioritizing dispersed storage network memory (DSN) operations during a critical juncture. The method begins by a device of the DSN, during a data access request, determining when a DSN memory operation related to the data access request is at a critical juncture. A decode threshold number of encoded data slices is required to recover the data segment, a write threshold number of encoded data slices is required for a successful write operation, and the critical juncture includes the DSN memory operation being within one of a first offset of the decode threshold number and a second offset of the write threshold number. When the DSN memory operation is at the critical juncture, the method continues with detecting an outstanding action with respect to the DSN memory operation, suspending execution of non-critical DSN operations and prioritizing execution of the outstanding action.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: November 6, 2018
    Assignee: International Business Machines Corporation
    Inventor: Adam M. Gray
  • Patent number: 10120758
    Abstract: An information processing system includes a storage unit storing application identification information of an application for executing a first process in association with information relating to the first process; a receiving unit that receives a request including the application identification information and information relating to electronic data from a device; a process execution unit that executes the first process on electronic data based on the information relating to the first process stored in association with the application identification information included in the request and the information relating to the electronic data included in the request; and a process generation unit that generates information relating to a second process for rolling back a processing result of the first process executed by the process execution unit. The process execution unit executes the second process based on the generated information relating to the second process when an error occurs in the first process.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: November 6, 2018
    Assignee: Ricoh Company, Ltd.
    Inventors: Yuuichiroh Hayashi, Kazunori Sugimura, Kohsuke Namihira, Dongzhe Zhang
  • Patent number: 10120759
    Abstract: Techniques are disclosed for restoring application services in a computer network following a service disruption. A faster service restoration (FSR) engine identifies one or more servers hosting a service. The service is associated with dependencies between the service and another one of the services. The FSR engine determines successive phases for restoring the application based on the dependencies. Each phase includes one or more clusters of servers, where each server in the cluster executes an instance one of the services. The FSR engine restores the application by each successive phase. In each phase, the restoration maintains a minimum availability of the instances of the services executed in each cluster.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: November 6, 2018
    Assignee: INTUIT INC.
    Inventors: Aravind Gv, Debajit Kataki
  • Patent number: 10120760
    Abstract: The invention relates to a vehicle infotainment system, comprising a system-on-chip with a restart monitoring device. In this arrangement, the restart monitoring device is designed to determine a number of restarts of the system-on-chip and to deactivate the system-on-chip or to switch it in an idle mode when the number of restarts of the system-on-chip exceeds a predetermined threshold value. In this manner, the restart monitoring device can prevent a discharge of the battery of the vehicle by a faulty loop of restarts.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: November 6, 2018
    Assignee: Continental Automotive GmbH
    Inventors: Holger Braun, Wolfgang Weber
  • Patent number: 10120761
    Abstract: A method for data communication within an I2C system is provided. The method includes the steps of: a) generating a communication error code indicative of error status when data transmission from a master module to a slave module via an I2C bus fails; b) determining whether to retransmit the data to the slave module according to the communication error code; c) when the determination made in step c) is affirmative, determining whether a number of times of data retransmission(s) associated with the data reaches a predetermined number; d) when the determination made in step c) is affirmative, resetting the master module; and e) recording a communication error event according to the communication error code after step a).
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: November 6, 2018
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Jen-Chih Lee, Kwang-Chao Chen
  • Patent number: 10120762
    Abstract: A system, method, and computer readable medium for consistent and transparent replication of multi process multi threaded applications. The computer readable medium includes computer-executable instructions for execution by a processing system. Primary applications runs on primary hosts and one or more replicated instances of each primary application run on one or more backup hosts. Replica consistency between primary application and its replicas is provided by imposing the execution ordering of the primary on all its replicas. The execution ordering on a primary is captured by intercepting calls to the operating system and libraries, sending replication messages to its replicas, and using interception on the replicas to enforce said captured primary execution order. Replication consistency is provided without requiring modifications to the application, operating system or libraries.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: November 6, 2018
    Assignee: OPEN INVENTION NETWORK LLC
    Inventor: Allan Havemose
  • Patent number: 10120763
    Abstract: In one example, a method for managing backed up data includes marking a current backup version to indicate that the current backup version has no expiration time, and then determining a currency span for a backup version that immediately precedes the current backup version. Next, one or more curtains crossed by the currency span are identified, each curtain being associated with a respective expiration rule. The expiration rules are then applied to the immediately preceding backup version, and an expiration time assigned to the immediately preceding backup version based on application of the expiration rules.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: November 6, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Ray David Whitmer, Ajit Kumar Verma
  • Patent number: 10120764
    Abstract: Systems for storage system rollover and rollback. A data mover agent is installed on a source storage system to capture disaster recovery data and send to a target system. Upon receiving a rollover event signal, a virtualized controller creates one or more replica user virtual machines running on the target system that serve to replicate functions of the user virtual machines from the source storage system. The virtualized controller on the target system converts the target disaster recovery data from a first format to a second format to facilitate use of the target disaster recovery data by the replica user virtual machines. Rollback is initiated when the target system receives a rollback event signal. Differences in the data that have occurred between the rollover event and the rollback signal are calculated and sent to the rollback system. The calculated differences are applied to a registered snapshot on the rollback system.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: November 6, 2018
    Assignee: Nutanix, Inc.
    Inventors: Parthasarathy Ramachandran, Manosiz Bhattacharyya, Karthik Chandrasekaran
  • Patent number: 10120765
    Abstract: In one example, a method is provided for creating an inversion patch that can be used to locally restore a file to an earlier version of that file. Initially, a datacenter receives information concerning a target file version that resides at the datacenter and that is associated with a file stored locally at a client. The information includes an identification of the file and an identification of the target file version. Next, byte ranges are identified that are affected by changes that took place with respect to the file after the target file version was created. The byte ranges are then combined to form a unified set of byte ranges. Finally, the original content of the byte ranges in the unified set is identified and used to create the inversion patch.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 6, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventor: Ray David Whitmer
  • Patent number: 10120766
    Abstract: An improved model-based approach for undoing actions in an application that was not previously configured with an undo feature is disclosed. Object models are constructed for each object invoked by the application. Snapshots of the object model are captured after every action to preserve the object model state at different points in time. The object model includes an object tree data structure having multiple nodes comprising data and metadata for the object. The object model is frozen and editing of the object is only permitted via an undo management engine. In response to edits from the application, the undo management engine responds by unfreezing the path of object nodes from leaf node to root node in the object tree data structure. Edits are applied to the object model at the leaf node. The object model can then be re-frozen to maintain the state of the object after each action.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: November 6, 2018
    Assignee: BUSINESS OBJECTS SOFTWARE LIMITED
    Inventor: Viren Kumar
  • Patent number: 10120767
    Abstract: A virtual database is attached to a server database management system (“DBMS”) such that the DBMS believes it needs to recover the database to a last known point of consistency. In order to perform this recovery, the DBMS requests the transaction log file entries to be read from what it believes is the database's transaction log file. However, the requests are intercepted and translated into requests to read the transaction log portion of the backup file. The DBMS then uses the transaction log records to bring the database to a point of transactional consistency, unaware that the log records are actually being sourced from the backup file. All changes made to the data during the recovery phase and subsequent execution of any TSQL statements are routed into a cache file. Accordingly, a “virtual” database is created and used by the server DBMS engine as if it were a real database.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: November 6, 2018
    Assignee: Idera, Inc.
    Inventors: Lon Jones Cherryholmes, Chandrashekhar M. Vaidya, George Eddie Bailey, Jr., Brett Hawton
  • Patent number: 10120768
    Abstract: A data management system for backup, recovery, and mount of a partition including a specific number of records recorded in a time-series mode includes a backup managing part configured to record partition data in a backup file in response to an input conditional clause, and a recovery processing part configured to recover a database by reading the backup file in a case of receiving a recovery instruction, wherein the partition data includes at least a part of time-series data and is classified from other partition data through a partition index to which a recording time of the at least a part of time-series data is applied.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: November 6, 2018
    Assignee: MACHBASE, INC.
    Inventor: Sung Jin Kim
  • Patent number: 10120769
    Abstract: A disclosed storage management method includes detecting an unrecoverable failure associated with a logical block of a first physical storage device that is one of a plurality of storage devices within a redundant virtual drive that also includes a hot spare drive. Data for the unrecoverable block may be rebuilt from data in the remaining storage devices and stored in a logical block of the hot spare drive. One or more logical block maps may be maintained to identify unrecoverable logical blocks and to indicate the logical blocks and storage devices to which each of the unrecoverable logical blocks is relocated. I/O operations that access “good” logical blocks are normally while accesses to unrecoverable logical blocks are rerouted according to the logical block map. One or more unrecoverable thresholds may be supported to initiate operations to replace storage devices containing unrecoverable blocks exceeding an applicable threshold.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: November 6, 2018
    Assignee: Dell Products L.P.
    Inventors: Deepu Syam Sreedhar M, Sandeep Agarwal, Krishna Kumar P. K.
  • Patent number: 10120770
    Abstract: Embodiments detect and group multiple failure events to enable batch processing of those failure events, such as in a virtual datacenter executing a plurality of virtual machines (VMs). A long timer, adaptive short timer, and adaptive polling frequency enable a computing device to efficiently detect and group the failure events that may be related (e.g., resulting from one failure). The grouped failure events are processed in parallel thereby reducing the time for recovery from the failure events.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: November 6, 2018
    Assignee: VMware, Inc.
    Inventors: Anjaneya Prasad Gondi, Hemanth Kalluri, Naveen Kumar Kalaskar
  • Patent number: 10120771
    Abstract: The present invention relates to an arrangement for providing a test environment for testing test objects. The arrangement includes a first test case implementation unit and a second test case implementation unit, as well as a first test object and a second test object. In one embodiment, the test environment is configured such that at least the first test case implementation unit is coupled to at least one of the first test object and the second test object for implementing a test case.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: November 6, 2018
    Assignee: Airbus Defence and Space GmbH
    Inventors: Philipp Wager, Bernd Schumacher
  • Patent number: 10120772
    Abstract: A module health system includes a module health circuit comprising a hardware register that is set to a first value in response to the system starting, an application register that is set to the first value in response to the system starting and a watchdog timer register that is set to the first value in response to the system starting. The system further includes a power on self-test that determines whether the system has passed a plurality of tests and that selectively sets the hardware register to a second value based on the determination, an external software application that determines whether a safety critical system is healthy and selectively sets the application register based on the determination, a watchdog timer application that selectively sets the watchdog timer register, a central processing unit that determines whether to de-assert a module health signal.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: November 6, 2018
    Assignee: Artesyn Embedded Computing, Inc.
    Inventors: Pasi Jukka Petteri Vaananen, Martin Peter John Cornes, Shlomo Pri-Tal
  • Patent number: 10120773
    Abstract: Methods and systems are disclosed for determining a CPU usage adjustment factor and for automatically applying the CPU usage adjustment factor to provide a CPU usage estimate for an SMT processor. In one implementation, the methods and systems obtain samples of CPU usage reported by the operating system at a predefined sampling rate over a predefined sampling interval. Thread states for the threads substantially corresponding to the reported CPU usage are so obtained at the predefined sampling rate and over the predefined sampling interval. This sampling may be performed for servers running different applications and having diverse processing loads. An estimate of the distribution of the number of threads running for the CPU usages reported may then be determined from the sampled data. A CPU usage adjustment factor may then be derived, based on the distribution, and used to provide a CPU usage estimate.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: November 6, 2018
    Assignee: United Services Automobile Association (USAA)
    Inventor: Glen A. Becker
  • Patent number: 10120774
    Abstract: An agent is provided to include state table storage to hold a set of state tables to represent a plurality of coherence protocol actions, where the set of state tables is to include at least one nested state table. The agent further includes protocol logic associated with the state table storage, the protocol logic to receive a coherence protocol message, and determine a coherence protocol action of the plurality of coherence protocol actions from the set of state tables based at least in part on the coherence protocol message.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventors: Robert Beers, Yuvraj S. Dhillon
  • Patent number: 10120775
    Abstract: Embodiments are directed towards mobile application development in a cloud-based architecture. Mobile applications may be designed to communicate with a cloud platform over a network. Mobile application developers may be enabled to submit cloud code to cloud platforms for use by mobile applications. If cloud code is provided to a cloud platform, the cloud platform may perform one or more actions to authenticate the cloud code, such as, ensuring that that the user providing the cloud code is authorized to provide the cloud code. If the cloud code is authenticated the cloud platform may perform one or more actions to validate the cloud code. If validated, the cloud code may be activated for use by mobile applications and/or mobile application developers. Activation of the cloud code may include associating the cloud code with one or more function calls and/or with one or more trigger points.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: November 6, 2018
    Assignee: PARSE INC.
    Inventors: Shyamsundar Jayaraman, Henele Litaka Adams, Bryan Jay Klimt, Jr., Kevin David Lacker, Charity Hope Majors, David Eitan Poll, Ilya Sukhar, James Jacob Yu
  • Patent number: 10120776
    Abstract: The described technology is directed towards having document files (e.g., a JSON object) associated with objects of a computer program. The document files may include validation information that is used during runtime to validate one or more parts of the object via validation code such as a validation function. For example, a function of an object may have one validation function that during runtime validates whether the input parameter(s) are valid (their types and/or values are correct), and another validation function that during runtime validates whether the return values from the function are valid. Also described is processing the document files into more easily readable documentation, e.g., without any source code.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: November 6, 2018
    Assignee: HOME BOX OFFICE, INC.
    Inventors: Tyler R. Furtwangler, Brandon C. Furtwangler, Nathan J. E. Furtwangler
  • Patent number: 10120777
    Abstract: Techniques for remediating serialization incompatibilities are disclosed. A runtime environment of a module system identifies a first serializable runtime object comprising a reference to a second serializable runtime object. The first serializable runtime object is an instantiation of a first element in a first package of the module system. The first package is open to one or more reflective operations. Based on determining that (a) the second serializable runtime object is an instantiation of a second element in a second package of the module system and (b) the second element is not open to the one or more reflective operations, a remedial operation, associated with the first serializable runtime object, is executed.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 6, 2018
    Assignee: Oracle International Corporation
    Inventors: Chris Hegarty, Alan Bateman
  • Patent number: 10120778
    Abstract: An electronic computing device obtains application source code to be tested. The application source code is automatically categorized into one or more hardware or software classifications. One or more tests are identified for the application source code based on the one or more hardware or software classifications. The one or more tests are run against the application source code. The one more tests are monitored as they are running. Based on results from the one or more tests, a test score representing a security risk of the application source code is automatically determined. A summary of the results from the one or more tests, including the test score, is visually displayed on the electronic computing device.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: November 6, 2018
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Peter A. Makohon, Ross Cavanaugh
  • Patent number: 10120779
    Abstract: Techniques for debugging of hosted computer programs are described herein. Execution of a set of instances of a computer program may be hosted by a service on behalf of a developer. The developer may indicate one or more error conditions and an amount of program instances to be monitored for the error conditions. The error conditions may include breakpoints, processing conditions, memory conditions, network packet conditions, and others. A subset of the program instances may be monitored for an error conditions. An error condition may then be detected at a first program instance. A notification of the occurrence of the error condition may be provided to the developer along with information for connecting to the first program instance. The developer may connect to and debug the first program instance, and may also access information such as a memory dump, performance logs, network packet information, and more.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: November 6, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Hok Peng Leung, Antonio Vargas Garcia, Geoffrey Scott Pare
  • Patent number: 10120780
    Abstract: The invention relates to a method for loading at least one native code on at least one target secure element comprising a java card virtual machine, said method comprising the following steps: providing a modified CAP file composed of at least one custom CAP component comprising a native code; extracting said native code from the custom CAP component; installing said native code in the target secure.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: November 6, 2018
    Assignee: GEMALTO SA
    Inventors: Francois Bogusz, Francois Millet, Julien Glousieau, Abdellah El Marouani, Andre Sintzoff, Ilyas Landikov
  • Patent number: 10120781
    Abstract: Various embodiments are generally directed to detecting race conditions arising from uncoordinated data accesses by different portions of an application routine by detecting occurrences of a selected cache event associated with such accesses. An apparatus includes a processor component; a trigger component for execution by the processor component to configure a monitoring unit of the processor component to detect a cache event associated with a race condition between accesses to a piece of data and to capture an indication of a state of the processor component to generate monitoring data in response to an occurrence of the cache event; and a counter component for execution by the processor component to configure a counter of the monitoring unit to enable capture of the indication of the state of the processor component at a frequency less than every occurrence of the cache event. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: November 6, 2018
    Assignee: INTEL CORPORATION
    Inventors: Shiliang Hu, Gilles A. Pokam, Cristiano L. Pereira, Justin E. Gottschlich
  • Patent number: 10120782
    Abstract: The present invention enables an automated testing of computer software applications for efficiently determining the quality and/or performance characteristics of the computer software applications and assists testing designers when determining software application scalability and performance under load. Embodiments of the present invention may be implemented to, for example, determine how many test servers are required to test computer software applications for correct function under the load of many concurrently active users, and periodically test and/or monitor computer software applications for quality control and/or other purposes. Additionally, embodiments of the present invention may be implemented to, for example calibrate a set of one or more test servers for testing a computer software application.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: November 6, 2018
    Assignee: APPVANCE INC.
    Inventor: Frank Cohen
  • Patent number: 10120783
    Abstract: A computer-implemented method, computer program product, and system is provided for determining test case efficiency. In an implementation, a method may include determining each code unit executed by a test case in a test suite including a plurality of test cases, wherein a product-under-test includes a plurality of code units. The method may also include determining an execution time for the test case. The method may further include calculating an efficiency rating of the test case based upon, at least in part, a number of code units executed by the test case and the execution time for the test case.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: November 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael S. Fulton, John R. MacMillan
  • Patent number: 10120784
    Abstract: Embodiments of the present invention provide methods, computer program products, and systems to increase code coverage. Embodiments of the present invention can receive a copy of source code and data associated with a sample execution of a set of instructions specified by the copy of the source code. Embodiments of the present invention can insert, into the set of instructions specified by the copy of the source code, an instruction that corresponds to a code statement that precedes an untraversed code path within the received copy of the source code. Embodiments of the present invention can execute the set of instructions that include the inserted instruction and provide an option to redirect execution of the set of instructions at the inserted instruction. Embodiments of the present invention can generate a test case that increases code coverage based on the redirected execution of the set of instructions.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: November 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Steven Cooper, Michael S. Fulton
  • Patent number: 10120785
    Abstract: An automatic test generator (ATG) parses a computer-executable design model of operational software of an aircraft electronic device to identify design model data coupling and design model control coupling between functional modules of the design model. The ATG generates a plurality of test conditions configured to test whether the operational software of the aircraft electronic device satisfies the design model data coupling and the design model control coupling. A test procedure that implements the plurality of test conditions is generated. The test procedure is executed on the operational software of the aircraft electronic device. An indication of whether the operational software of the aircraft electronic device satisfies each respective one of the plurality of test conditions is output.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: November 6, 2018
    Assignee: Rosemount Aerospace Inc.
    Inventor: Scott C. Meyers
  • Patent number: 10120786
    Abstract: Techniques of validating access controls within an application are disclosed. A validation test is performed by receiving test data comprising one or more privilege elements selected from a set of privilege elements representing a privilege scheme defined in an application. The test data and a data set are accessed. The application is executed using the data set according to the one or more privilege elements. A set of interaction indicators is generated representing interactions of the application with a portion of the data set. The set of interaction indicators is presented at a display device of a computing device.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: November 6, 2018
    Assignee: SAP SE
    Inventor: Juergen Kremp
  • Patent number: 10120787
    Abstract: An apparatus in one embodiment comprises at least one processing platform including a plurality of processing devices. The processing platform implements compute services for users and further comprises a copy data manager configured to maintain a data version repository. The data version repository stores under the control of the copy data manager a plurality of data versions for each of one or more of the compute services implemented by the processing platform. A code version repository stores a plurality of code versions for each of one or more of the compute services implemented by the processing platform. The code versions stored in the code version repository and the data versions stored in the data version repository collectively provide a two-dimensional test plane. Automated testing the code versions is carried out by an automated code testing system using multiple distinct ones of the data versions selected from the two-dimensional test plane.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: November 6, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Jehuda Shemer, Amit Lieberman, Kfir Wolfson, Assaf Natanzon
  • Patent number: 10120788
    Abstract: Cloud Connected automated testing (CCAT) provides a low-cost, high-throughput, automated multi-thread testing platform for testing application with multiple test cases in a variety of operating environments. The platform may be hosted on cloud infrastructure. Unlike other test automation platforms, inputs to CCAT are based on human readable formats, such as keyword entries in a spreadsheet. CCAT thereby reduces the need for testers to understand highly specialized and difficult to use coding languages such as Java or Python.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: November 6, 2018
    Assignee: Accenture Global Solutions Limited
    Inventors: Jonathan Saginaw, Austin J. Darigo, Alexis M. Stevens, John C. Anderson
  • Patent number: 10120789
    Abstract: A method, computer program product, and computer system for editing code, by a computing device, via an integrated development environment. The code is determined to be syntactically valid. While editing the code, a subset of automated tests associated with the code is executed in response to determining that the code is syntactically valid. It is determined whether at least one automated test error is detected. The at least one automated test error is reported.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: November 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Matthew G. Marum, Samuel G. Padgett, Steven K. Speicher, Michael J. Tabb
  • Patent number: 10120790
    Abstract: A method, computer program product, and computing system for receiving telemetry data from a remote storage system. The remote storage system includes a plurality of subsystems. The telemetry data is analyzed to assign a subsystem health score to each of the plurality of subsystems, thus defining a plurality of subsystem health scores. A system health score is assigned to the remote storage system based, at least in part, upon each of the subsystem health scores.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: November 6, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael G. Varteresian, Muzhar Khokhar, Charles S. Langley, Peter T. Beale
  • Patent number: 10120791
    Abstract: A data read apparatus includes a nonvolatile memory comprising a plurality of blocks, each of the blocks including an area storing block information, in which a position of a next block is written, or storing the block information and file management information, and an area storing actual data; a volatile memory; a power-on circuit configured to turn on supply of power to the nonvolatile memory and the volatile memory; and a processor. The processor is configured to: read out the block information stored in each of the blocks of the nonvolatile memory, or the block information and the file management information, when the supply of power was turned on by the power-on circuit, and register the read-out block information, or the block information and the file management information, in the volatile memory as file position information.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: November 6, 2018
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Shunsuke Yamada
  • Patent number: 10120792
    Abstract: A method that includes sending to an embedded flash storage device (EFSD) and during a transaction, a data unit and recovery metadata that differs from a flash memory unit memory management data structure (FMUMMDS); instructing the EFSD to program the data unit and the recovery metadata to a group of flash memory cells; sending to the host computer a transaction completion indication in response to a successful completion of the programming and before a completion of a management process that comprises updating by the flash memory controller, the FMUMMDS to reflect (a) the recovery metadata and (b) physical address information related to the group of the flash memory cells; and programming, by the EFSD, the FMUMMDS to the flash memory unit; wherein the data structure is reconstructible based upon the recovery metadata and the physical address information related to the group of the flash memory cells.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: November 6, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Avigdor Segal, Hanan Weingarten, Igal Maly, Irena Shemesh
  • Patent number: 10120793
    Abstract: According to one embodiment, a memory device includes a nonvolatile memory, address translation unit, generation unit, and reception unit. The nonvolatile memory includes erase unit areas. Each of the erase unit areas includes write unit areas. The address translation unit generates address translation information relating a logical address of write data written to the nonvolatile memory to a physical address indicative of a write position of the write data in the nonvolatile memory. The generation unit generates valid/invalid information indicating whether data written to the erase unit areas is valid data or invalid data. The reception unit receives deletion information including a logical address indicative of data to be deleted in the erase unit area.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventor: Shinichi Kanno
  • Patent number: 10120794
    Abstract: A storage device includes a nonvolatile memory including a buffer region and a main region, and a memory controller responsive to a write request to store successively received blocks of write data at the nonvolatile memory. The memory controller is configured to initially store blocks among the successively received blocks of write data in the main region of the nonvolatile memory, and to subsequently store remaining blocks among the successively receive blocks of write data in the buffer region when a continuity count exceeds a reference count. The continuity count denotes a number of times a data size of the successively received blocks consecutively equals or exceeds a reference data size.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: November 6, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dongjun Shin
  • Patent number: 10120795
    Abstract: A wear-leveling NandFlash memory reading/writing method can identify a bad block, avoid the bad block, and equalize writing operations to ensure that all the blocks are identical in number of the writing operations so as to guarantee wear-leveling NandFlash memory reading and writing of the entire memory. This method has characteristics of low computational and small RAM cost, is suitable for the application scenario like operating a single file for a long time with an imbedded system with low cost and poor hardware resource, and can provide a complete file system solution.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: November 6, 2018
    Assignee: INSTITUTE OF GEOLOGY AND GEOPHYSICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Yongyou Yang, Wenxuan Chen, Qingyun Di, Wenxiu Zhang, Yuntao Sun, Jian Zheng
  • Patent number: 10120796
    Abstract: Managing memory allocations in a computer system may include tagging a class of data structures with a tag that identities a longer memory-allocation time for objects that correspond to the class. In response to a memory-allocation request for an object, whether or not the object is associated with the tag can be determined through the class. If the object is not associated with the tag, memory can be allocated for the object from a first memory-allocation area that corresponds to a shorter memory-allocation time, and if the object is associated with the tag, memory can be allocated for the object from a second memory-allocation area that corresponds to the longer memory-allocation time.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 6, 2018
    Assignee: SAP SE
    Inventor: Martin Moser
  • Patent number: 10120797
    Abstract: A method is used in managing mapping metadata in storage systems. A request is received to access data organized on a storage device of a storage system. Checksum information is used for validating the data. The checksum information is stored on the storage system separate from a location at which the data has been stored.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: November 6, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Robert P. Foley, Peter Puhov, Lili Chen, Marc Cassano