Patents Issued in March 19, 2019
  • Patent number: 10234463
    Abstract: Some embodiments are directed to a method of collecting information useful in predicting clinical outcome in a subject, the method including providing a sample from said subject, and determining the level of octameric PTX3 in said sample, wherein determining the level of octameric PTX3 includes measuring the total amount of PTX3 present, and measuring the amount of octameric PTX3 present, and calculating the proportion of total PTX3 which is present as octamer, wherein if the proportion of octameric PTX3 is greater than 50%, the subject is identified as a likely non-survivor. Some embodiments are also directed to a method of collecting information useful in predicting clinical outcome in a subject, the method including providing a sample from said subject, and determining the level of octameric PTX3 in said sample, wherein an elevated level of octameric PTX3 compared to a reference level indicates a reduced likelihood of survival.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: March 19, 2019
    Assignee: KING'S COLLEGE LONDON
    Inventors: Manuel Mayr, Friederike Cuello
  • Patent number: 10234464
    Abstract: The present invention is directed to a method of identifying a patient having heart failure as likely to respond to a therapy comprising a statin. The method is based on measuring the level of at least one marker selected from GDF-15 (Growth Differentiation Factor 15), Urea, SHBG (Sex Hormone-Binding Globulin), Uric acid, PLGF (Placental Growth Factor), IL-6 (Interleukin-6), Transferrin, a cardiac Troponin, sFlt-1 (Soluble fms-like tyrosine kinase-1), Prealbumin, Ferritin, Osteopontin, sST2 (soluble ST2), and hsCRP (high sensitivity C-reactive protein) in a sample from a patient. Further envisaged is a method of predicting the risk of a patient to suffer from death or hospitalization, wherein said patient has heart failure and undergoes a therapy comprising a statin. The method is also based on the measurement of the level of at least one of the aforementioned markers.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: March 19, 2019
    Assignee: Roche Diagnostics Operations, Inc.
    Inventors: Dirk Block, Hans-Peter Brunner, Thomas Dieterle, Ursula-Henrike Wienhues-Thelen, Christian Zaugg, Andre Ziegler
  • Patent number: 10234465
    Abstract: Methods for identifying subjects as candidates for embryo implantation are provided. In some embodiments, the methods include providing a sample of endometrium isolated from a subject during the second half of the subject's menstrual cycle and determining whether the subject is a candidate based on the expression of BCL6 in the sample. Also provided are methods for identifying an increased risk for implantation failure subsequent to in vitro fertilization (IVF) and/or frozen embryo transfer (FET), methods for detecting endometrial receptivity, methods for facilitating diagnoses of infertility, methods for increasing the likelihood of embryo implantation, methods for detecting the presence of endometriosis, and methods for managing treatment of subjects with potential endometriosis, subfertility, or both.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: March 19, 2019
    Assignees: The University of North Carolina at Chapel Hill, Greenville Health Systems
    Inventors: Steven Young, Bruce Lessey
  • Patent number: 10234466
    Abstract: Diagnostic kits and methods configured to rapidly and non-invasively determine physiologic levels of hemoglobin. A diagnostic kit may include a chamber pre-filled with an indicator, the indicator solution including a tetramethylbenzidine (TMB) solution, the indicator being configured to change color; a collection device configured to collect a test sample from a subject. The kit may also include a hemoglobin physiologic level identifier legend, the legend indicating 1) at least one color of the indicator and 2) a physiologic level and/or range of the hemoglobin and/or disease state associated with the color.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 19, 2019
    Inventors: Wilbur A. Lam, Morgan Byrd, Erika Tyburski, Michael L. McKinnon, Siobhan O'Connor, Nathan A. Hotaling
  • Patent number: 10234467
    Abstract: Apparatus for testing the solubility of a medical dosage form includes a chamber (12) for holding a solvent medium (18), in the preferred embodiment a bicarbonate based buffer system. The apparatus also includes a pH probe (66) which is connectable to a supply of carbon dioxide (32, 34), as well as to a supply of helium (40), the supplies being controlled by a control unit (50). The control unit (50) monitors changes in pH of the solvent medium (18) and, as appropriate, feeds pH increasing and/or pH reducing gas from the supplies (32, 34, 40) into the chamber (12). The control unit (50) is able to maintain a uniform pH during testing or to provide a dynamically adjustable pH during testing, for example to three or more different pH levels in order to test the performance of a drug carrier at different levels of acidity or alkalinity for example, mimicking the conditions of the gastrointestinal tract.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: March 19, 2019
    Assignee: UCL Business PLC
    Inventors: Hamid Ali Merchant, John Andrew Frost, Abdul Waseh Basit
  • Patent number: 10234469
    Abstract: A blood state analysis device (1) that analyzes a state of a blood sample, as used for clotting time testing, said blood sample comprising a plasma and at least one reagent, including a correction unit (11) configured to correct a measured blood coagulation evaluation result of the blood sample based on a relation between reference concentrations of the at least one reagent in plasma and reference blood coagulation evaluation results, the at least one reagent is an anticoagulation treatment releasing agent, a coagulation activator, an anticoagulant, a platelet activator, an antiplatelet drug, or a combination thereof and is present in the blood sample. For instance, such device (1) allows to correct blood clotting time results with respect to concentrations of an anti-coagulant drug present in the blood sample.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: March 19, 2019
    Assignee: Sony Corporation
    Inventors: Yoshihito Hayashi, Marcaurele Brun, Kenzo Machida
  • Patent number: 10234470
    Abstract: The present invention discloses an enzyme-linked immunosorbent assay kit for detecting dinitolmide and use thereof. The enzyme-linked immunosorbent assay kit of the present invention comprises dinitolmide antibody and coating antigen and enzyme conjugate; wherein, the dinitolmide antibody is dinitolmide monoclonal antibody or dinitolmide polyclonal antibody; when the coating antigen is the conjugate of dinitolmide hapten and carrier protein, the enzyme conjugate is enzyme-labeled secondary antibody, or enzyme-labeled specific anti-dinitolmide monoclonal or polyclonal antibody; when the coating antigen is dinitolmide antibody or secondary antibody, the enzyme conjugate is enzyme-labeled dinitolmide hapten. The enzyme-linked immunosorbent assay kit has a simple structure, and it is convenient for use, cheap and portable. Its detection is high effective, accurate, and convenient. It can be used for on-site monitoring and is suitable for qualitative and quantitative screenings of a great number of samples.
    Type: Grant
    Filed: July 4, 2012
    Date of Patent: March 19, 2019
    Assignee: Beijing Kwinbon Biotechnology Co., Ltd.
    Inventors: Fangyang He, Yuping Wan, Caiwei Feng, Xiaoqin Luo, Jing Feng, Haifeng Cui, Nianqin Xu, Liangliang Zhu, Yumei Liu, Fangfang Jia, Zhengmiao Zhao
  • Patent number: 10234471
    Abstract: The present invention relates to a method for determining the position of a multiplicity of measurement locations in a measurement system of an automated analysis device, and a corresponding automated analysis device with an integrated circuit, which is configured as phase locked loop.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: March 19, 2019
    Assignee: Siemens Healthcare Diagnostics Products GmbH
    Inventor: Wolfgang Steinebach
  • Patent number: 10234472
    Abstract: Disclosed is an automatic analysis device in which a check item at a time of an analysis start can be set in accordance with a skill level of an operator, an analysis can be performed after the check item being displayed and confirmed, and erroneous measurement caused due to a missed check can be prevented. The check item such as checking the remaining quantity of a reagent or the like displayed in a check screen before the analysis start can be set for each type of operator, each day, each time. The set check item is configured to be displayed in a screen before the analysis start, and unless the operator confirms the check item, the analysis start is not allowed in principle. An automatic analysis device which can prevent erroneous measurement caused due to a missed check of the operator before the analysis start is realized.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: March 19, 2019
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hirofumi Sasaki, Toshihide Hanawa, Tsuguhiko Satou, Yoshihiro Naitou
  • Patent number: 10234473
    Abstract: An analytical device for automated determining of a measured variable of a liquid sample comprises: a liquid storage, which includes one or more liquid containers for one or more liquids; a measuring cell for accommodating the liquid sample, especially a liquid sample, to which has been added one or more liquids from the liquid storage, and a measuring arrangement for providing one or more measurement signals correlated with the measured variable; an electronics unit, which includes a control unit for control of the analytical device and for determining the measured variable based on the measurement signals provided by the measuring arrangement; and a handling unit including a supply- and dosing, or metering, system for supplying and metering the liquid sample and liquids from the liquid storage into the measuring cell, wherein the analytical device includes at least one exchangeable cassette, into which are integrated at least parts of the liquid storage and/or at least parts of the handling unit.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: March 19, 2019
    Assignee: Endress+Hauser Conducta GmbH+Co. KG
    Inventors: Ralf Steuerwald, Ulrich Kathe
  • Patent number: 10234474
    Abstract: The technology described herein generally relates to systems for extracting polynucleotides from multiple samples, particularly from biological samples, and additionally to systems that subsequently amplify and detect the extracted polynucleotides. The technology more particularly relates to microfluidic systems that carry out PCR on multiple samples of nucleotides of interest within microfluidic channels, and detect those nucleotides. The technology still more particularly relates to automated devices for carrying out pipetting operations, particularly on samples in parallel, consistent with sample preparation and delivery of PCR-ready nucleotide extracts to a cartridge wherein PCR is run.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 19, 2019
    Assignee: HandyLab, Inc.
    Inventors: Jeff Williams, Kerry Wilson
  • Patent number: 10234475
    Abstract: Manufacturing method by addition for at least one part of a piece of aeronautic equipment intended to equip an aircraft, the equipment piece including at least one part intended to be arranged at a skin of the aircraft and heating elements for that part, which include a thermodynamic loop including a closed circuit at least partially integrated, in which a heat transfer fluid circulates, the closed circuit including an evaporator and a zone in which condensation of the heat transfer fluid can occur in the appendage to heat it, outside the evaporator, the circuit being formed by a tubular channel with an empty section at least partially integral with the equipment piece, at least the part of the equipment piece arranged outside the aircraft is made by additive manufacturing and includes a base for fastening on the skin of the aircraft from which support elements for a Pitot tube extend.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: March 19, 2019
    Assignee: THALES
    Inventors: Claude Sarno, Romain Hodot, Marc Duval-Destin
  • Patent number: 10234476
    Abstract: Systems and methods are described herein for extracting inertial information from nonlinear periodic signals. A system for determining an inertial parameter can include circuitry configured for receiving a first periodic analog signal from a first sensor that is responsive to motion of a proof mass, converting the first periodic analog signal to a first periodic digital signal, determining a result of trigonometrically inverting a quantity, the quantity based on the first periodic digital signal, and determining the inertial parameter based on the result.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 19, 2019
    Assignee: Google LLC
    Inventors: Richard Lee Waters, Mark Steven Fralick, Charles Harold Tally, IV, John David Jacobs
  • Patent number: 10234477
    Abstract: Systems and methods are described herein for detecting and measuring inertial parameters, such as acceleration. In particular, the systems and methods relate to vibratory inertial sensors implementing time-domain sensing techniques. Within a composite mass sensor system, a sense mass may oscillate at a frequency different from its actuation frequency, allowing flexibility when integrating the sensor into drive systems without sacrificing sensitivity.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: March 19, 2019
    Assignee: Google LLC
    Inventors: Ozan Anac, Xiaojun Huang
  • Patent number: 10234478
    Abstract: A method for detecting a malfunction or defect of a sensor of a vehicle safety device uses a control unit of the vehicle safety device and at least one self-testing sensor which is separate from the control unit and transmits measuring values to the control unit.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: March 19, 2019
    Assignee: TRW AUTOMOTIVE GmbH
    Inventors: Dominik Weiland, Paul Melton, Carl A. Munch, Oliver Buntz, Matthias Webert
  • Patent number: 10234479
    Abstract: The resonance structure is that two rows of ground via holes are placed symmetrically along two sides of the CB-CPW central conductor; each row of the via holes are equally spaced; every via hole connects a top shield plane layer, a first middle layer and a bottom shield plane layer of the magnetic probe; every via hole is placed out of a rectangle gap at the bottom of the magnetic probe; the via holes form a fence. The construction method: 1. constructing a simulation model formed by the magnetic probe and a 50? microstrip in a CST® microwave studio; 2. simulation setting; 3. placing via holes along two sides of the central conductor; 4. connecting a 50? matching load to the second end of the microstrip and defining the first end as microstrip port1; defining the end on which mount a SMA connector as probe port2; simulating S21.
    Type: Grant
    Filed: April 8, 2017
    Date of Patent: March 19, 2019
    Assignee: BEIHANG UNIVERSITY
    Inventors: Zhaowen Yan, Jianwei Wang, Wei Zhang, Donglin Su
  • Patent number: 10234480
    Abstract: Methods of fabricating a plurality of carbon nanotube-bundle probes on a substrate are disclosed. In some embodiments, the method includes the following: providing a substrate having a top surface and a bottom surface; forming an array of electrically conductive pads on the top surface, the array of electrically conductive pads being formed to mirror an array of pads on an integrated circuit that is to be tested; applying a catalyst for promoting growth of carbon nanotubes on each of the array of electrically conductive pads; heating the substrate in a carbon-rich environment thereby growing nanotubes extending upwardly from each of the array of electrically conductive pads and above the top surface of the substrate thereby forming a plurality of carbon nanotube-bundle probes extending upwardly above the top surface of the substrate; and capping each of the plurality of carbon nanotube-bundle probes with an electrically conductive material.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: March 19, 2019
    Assignee: Wentworth Laboratories, Inc.
    Inventor: Alexander Brandorff
  • Patent number: 10234481
    Abstract: A detection data storage device includes a detection probe, an inspection instrument, a processor and a storage controller. The processor includes a software component. The storage controller includes a key and a prompt lamp. When a circuit is detected by the detection probe, a detection signal is generated. After the detection signal is received by the inspection instrument, a detection data is generated and transmitted to the software component of the processor. If the software component judges that the detection data matches a standard value, the software components issues a prompt signal to the prompt lamp of the storage controller. In response to the prompt signal, the prompt lamp emits a light beam. After the light beam from the prompt lamp is received by the user and the key is pressed, the detection data is stored in a storage unit.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: March 19, 2019
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventor: Pei-Ming Chang
  • Patent number: 10234482
    Abstract: A probe card includes a probe board and a needle disposed on the probe board, the needle including a needle tip. The needle tip includes a bottom surface having a long axis and a short axis that crosses the long axis. The needle tip includes a top surface being spaced apart from the bottom surface, wherein the top surface has a long axis and a short axis that crosses the long axis, and wherein the long axis of the bottom surface and the long axis of the top surface extend in different directions. The needle tip includes a side surface connecting the bottom surface with the top surface, wherein the side surface is twisted between the top and bottom surfaces.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: March 19, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Sangboo Kang
  • Patent number: 10234483
    Abstract: A frequency synthesizer 11a outputs a periodic signal r(t) at a frequency detuned by a predetermined frequency ?f [Hz] from a frequency of 1/integer of a frequency of a reference clock signal f0 synchronized with a signal to be measured ws. A first sampler unit 12 samples the signal to be measured ws at a timing of the trigger signal CLK. A second sampler unit 13a samples an I signal I(t) at the timing of the trigger signal CLK. A phase shifter 13b outputs a Q signal Q(t) obtained by shifting a phase of the reference clock signal f0 by 90°. A third sampler unit 13c samples the Q signal at the timing of the trigger signal CLK. A correction value calculation unit 13d calculates a correction value ?t(n) based on sampling data I(n) and Q(n) and a set value t(n) of a sampling time.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: March 19, 2019
    Assignee: ANRITSU CORPORATION
    Inventors: Ken Mochizuki, Takashi Murakami, Seiya Suzuki
  • Patent number: 10234484
    Abstract: A power monitoring system includes a plurality of current sensors suitable to sense respective changing electrical current within a respective conductor to a respective load and a conductor sensing a respective voltage potential provided to the respective load. A power monitors determines a type of circuit based upon a signal from at least one of the current sensors and a signal from the conductor, wherein the type of circuit includes at least one of a single phase circuit, a two phase circuit, and a three phase circuit. The power meter configures a set of registers corresponding to the determined type of circuit in a manner such that the configuring is different based upon each of the single phase circuit, two phase circuit, and three phase circuit suitable to provide data corresponding to the determined type of circuit.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: March 19, 2019
    Assignee: Veris Industries, LLC
    Inventors: Martin Cook, Michael Bitsch
  • Patent number: 10234485
    Abstract: A measuring arrangement for determining at least one measured variable with a sensor device (2), a signal outlet for outputting of an output signal and a current-adjusting device for adjusting the current of the output signal provides a measuring arrangement whose power consumption is at a maximum for preferably all states of operation. The object is obtained the measuring arrangement that a load current device and a regulating device are provided. Here, the regulating device controls the load current device based on a voltage drop via the current-adjusting device (4).
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: March 19, 2019
    Assignee: KROHNE MESSTECHNIK GMBH
    Inventor: Steffen Dymek
  • Patent number: 10234486
    Abstract: Vertical sense devices in vertical trench MOSFET. In accordance with an embodiment of the present invention, an electronic circuit includes a vertical trench metal oxide semiconductor field effect transistor configured for switching currents of at least one amp and a current sensing field effect transistor configured to provide an indication of drain to source current of the MOSFET. A current sense ratio of the current sensing FET is at least 15 thousand and may be greater than 29 thousand.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: March 19, 2019
    Assignee: VISHAY/SILICONIX
    Inventors: M. Ayman Shibib, Wenjie Zhang
  • Patent number: 10234487
    Abstract: A current sense circuit for a pass transistor is described. The circuit comprises a sense transistor having input and control ports that are coupled to input and control ports respectively of the pass transistor. The circuit comprises a differential amplifier comprising a differential input and output. An output port of the pass transistor is coupled to a first port of the differential input and an output port of the sense transistor is coupled to a second port of the differential input. The differential amplifier comprises a first sub-amplifier and a second sub-amplifier that are arranged in parallel and which are operated in an auto-zero phase and in an amplification phase in an alternating manner, and which are operated in the auto-zero phase in a mutually exclusive manner. The output of the differential amplifier is used to control voltage drops across the sense transistor and the pass transistor.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 19, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Nicolo Nizza, Danilo Gerna
  • Patent number: 10234488
    Abstract: A hand tool for current sensing includes a body (110) and a current sensing module (200). The body (110) includes two clamping handles (120) pivotally connected by a pivot (130), two pliers jaws (140) disposed at respective one ends of the two clamping handles (120) respectively, and a clamping structure (150) disposed at the two pliers jaws (140). The current sensing module (200) is detachably coupled to any of the pliers jaws (140) and is arranged adjacent to the clamping structure (150). The current sensing module (200) includes an alert unit (220) for sending out an alert signal. Accordingly, an operator can sense whether a cable carries a current by means of the hand tool, thus ensuring safety of the operator during work.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: March 19, 2019
    Inventor: Chao-Chin Yen
  • Patent number: 10234489
    Abstract: A method for managing an assembling process of an electrical product. The electrical product at least includes a substrate with a semiconductor component mounted thereon and a power supply circuit. In the method, during assembly of the electrical product, a potential difference between two points on electric wires or signal wires electrically connected with an impedance element, which is inside the electrical product, interposed therebetween is constantly measured. Also, in the method, if a change that exceeds a predetermined threshold value, based on which electrostatic discharge noise and a normal potential range are distinguished from each other, occurs in the potential difference between the two points, measurement data on the potential difference between the two points is recorded and a mark for indicating that the electrical product was affected by electrostatic discharge is provided to the electrical product.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: March 19, 2019
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Norihiro Suzuki, Shigehiko Matsuda
  • Patent number: 10234490
    Abstract: An electricity meter assembly includes a meter and a module assembly. The meter includes a meter cavity, at least one electrical component within the meter cavity, and a module compartment having a module cavity. The module compartment is within the meter cavity and the meter cavity is isolated from the module cavity. The module assembly includes at least one supplemental board configured to supplement the at least one electrical component. The module assembly is removably positioned within the module cavity such that the module assembly is field-removable, and wherein the module assembly is hot pluggable with the meter.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: March 19, 2019
    Assignee: Landis+Gyr Innovations, Inc.
    Inventors: Louay Abdul-Hadi, Keith Mario Torpy, Nikhil Tanwani
  • Patent number: 10234491
    Abstract: A method and apparatus for analyzing a signal, in which a spectrum of the signal is provided, which spectrum is the result of a multiplication of the signal by a predefined window function and a subsequent Fourier transform, the highest spectral line and the adjacent second-highest spectral line are determined in the spectrum in the region of at least one local maximum, the amplitude of the highest spectral line and of the second-highest spectral line is determined, at least one value dependent on the amplitude of the highest spectral line and on the amplitude of the second-highest spectral line is determined, a frequency correction value is determined for the frequency of the highest spectral line from the determined value using a frequency correction characteristic curve which was created for the predefined window function, and the frequency of the highest spectral line is corrected by the frequency correction value.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 19, 2019
    Assignee: Siemens Aktiengesellschaft
    Inventor: Martin Hempl
  • Patent number: 10234492
    Abstract: A non-intrusive system which monitors a data center by detecting electromagnetic waves alleviates a resource burden on components and is inexpensive to deploy and scale within a data center. The system detects waves using omnidirectional antennas positioned throughout the data center, thus alleviating the need to physically attach directional antennas to components. The system performs a learning phase wherein representations of detected waves are mapped to occurrence of events within the data center. Once the learning phase is complete, operation of existing network monitoring tools, such as agents and probes, may cease, and the system may begin monitoring for events based on the detected waves. The system may also analyze wave data prior to the occurrence of events to identify event prediction indicators, e.g. distinctive wave values or patterns, which may be used to predict the occurrence of an event.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: March 19, 2019
    Assignee: CA, Inc.
    Inventors: Smrati Gupta, Thomas Howard Ferrin, Victor Muntés-Mulero
  • Patent number: 10234493
    Abstract: A wireless module includes a substrate, an antenna provided on a surface of the substrate, and a circuit, provided on the substrate, and configured to transmit and receive signals through the antenna. The antenna includes a terminal provided on a tip end part thereof.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: March 19, 2019
    Assignee: FUJITSU COMPONENT LIMITED
    Inventors: Hironobu Matsumoto, Masahiro Yanagi, Kimihiro Maruyama, Tatsushi Shibuya
  • Patent number: 10234494
    Abstract: A system for testing radio frequency (RF) characteristics of a wireless device includes a test fixture. The test fixture includes a base plate that receives a wireless device, and a back plate that receives an RF antenna and positions the RF antenna relative to the wireless device. Additionally, the system includes test equipment that in operation performs RF testing on the wireless device using the RF antenna to determine RF characteristics of the wireless device.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: March 19, 2019
    Assignee: FEDEX SUPPLY CHAIN LOGISTICS & ELECTRONICS, INC
    Inventors: Carlos Valmonte Jimenez, Jimmie Paul Partee, Fredrick Oluoch Onyango
  • Patent number: 10234495
    Abstract: The present invention discloses a decision tree SVM fault diagnosis method of a photovoltaic diode-clamped three-level inverter in view of fault diagnosis problems of the photovoltaic three-level inverter in a photovoltaic microgrid. Taking an inverting state for example, firstly, analyzing running conditions of an inverter main circuit and performing fault classification, then taking the middle, upper and lower bridge leg voltages as measurement signals, extracting feature signals with a wavelet multiscale decomposition method, and thereby generating a decision tree SVM fault classification model with a particle swarm clustering algorithm, to finally achieve multi-mode fault diagnosis of the photovoltaic diode-clamped three-level inverter. Advantages of the present invention are that, this algorithm can obviously distinguish various fault states of the photovoltaic diode-clamped three-level inverter, complete the failure diagnostic task with fewer classification models And the diagnosis precision is high.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: March 19, 2019
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Hongfeng Tao, Chaochao Zhou, Yan Liu, Yajun Tong
  • Patent number: 10234496
    Abstract: The subject matter of this specification can be embodied in, among other things, a method that includes evaluating an analog electrical current waveform, determining a Boolean waveform based on the evaluated analog electrical current waveform, determining a collection of one or more first durations based on one or more on times identified from the Boolean waveform, determining a collection of one or more second durations based on one or more off times identified from the Boolean waveform, comparing the first durations and the second durations, determining, based on the comparing, an event based on the comparing, identifying a time at which the event occurred, and providing the time as a completion time.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: March 19, 2019
    Assignee: Woodward, Inc.
    Inventors: Suraj Nair, Doyle Kent Stewart
  • Patent number: 10234497
    Abstract: Techniques are disclosed for increasing a quantity of candidate electronic-component states determinable from one or more input pins. The techniques may use an internal pull resistor to test a strength of an external resistor to gain two extra candidate pin states. Additional candidate electronic-component states are then gained based on the extra candidate pin states, combinations of pin states of two or more input pins, and/or detecting a short between two or more input pins.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: March 19, 2019
    Assignee: Google LLC
    Inventors: Chiu-Mao Chang, Chih-Chung Chang
  • Patent number: 10234498
    Abstract: An automated test equipment for testing a device under test includes a control unit and a plurality of tester subunits. The control unit is configured to put the tester subunits in a state of lower activity in dependence on a current demand on the test resources.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: March 19, 2019
    Assignee: ADVANTEST CORPORATION
    Inventors: Jonas Horst, Heinz Nuessle, Bernd Laquai
  • Patent number: 10234499
    Abstract: Techniques and test structures for determining reliability and performance characteristics of an integrated circuit (IC) device are disclosed. For example, an IC device includes multiple functional elements and multiple test elements. The test elements are electrically coupled in series between a first test port and a second test port. A method of testing the IC device includes applying an electrical stimulus between the first test port and the second test port, measuring a parametric value in response to the electrical stimulus, comparing the parametric value and a statistical value, and determining a pass or fail status of the IC device. The statistical value is representative of a predicted reliability of the IC device.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: March 19, 2019
    Assignee: Keysight Technologies, Inc.
    Inventors: Martin W. Dvorak, Ben Keppeler
  • Patent number: 10234500
    Abstract: A method and apparatus for separating real DVC via defects from nuisance based on Net Tracing Classification of eBeam VC die comparison inspection results are provided. Embodiments include performing an eBeam VC die comparison inspection on each via of a plurality of dies; determining DVC vias based on the comparison; performing a Net Tracing Classification on the DVC vias; determining S/D DVC vias based on the Net Tracing Classification; and performing a die repeater analysis on the S/D DVC vias to determine systematic design-related DVC via defects.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: March 19, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Weihong Gao, Xuefeng Zeng, Yan Pan, Peter Lin, Hoang Nguyen, Ho Young Song
  • Patent number: 10234501
    Abstract: A sensor head of a test and measurement instrument can include an input configured to receive an input signal from a device under test (DUT), an optical voltage sensor having signal input electrodes and control electrodes or one set of electrodes, wherein the input is connected to the signal input electrodes, and a bias control unit connected to the control electrodes and configured to reduce an error signal or the input signal bias control signal are electrically combined and applied to a single set of electrodes.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: March 19, 2019
    Assignee: Tektronix, Inc.
    Inventors: Michael J. Mende, Richard A. Booman
  • Patent number: 10234502
    Abstract: Various aspects of the disclosed technology relate to circuit defect diagnosis based on sink cell fault models. Defect candidates are determined based on path-tracing from failing bits into the circuit design. Based on the defect candidates and one or more conventional fault models, failing test pattern simulations are performed to determine initial defect suspects. Initial defective sink cell suspects are then determined by comparing driving strengths for fan-out cells of the initial defect suspects with driving strengths for corresponding driver cells. Defective sink cell suspects may be identified in the initial defective sink cell suspects based on fault effect propagations and passing test pattern simulations.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: March 19, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: Huaxing Tang, Manish Sharma, Robert Brady Benware, Wu-Tung Cheng
  • Patent number: 10234503
    Abstract: A circuit debugging method includes: utilizing a debugging circuit to determine an operating status of a specific circuit to generate a result; utilizing a register located in a scan chain path to store the result, wherein the scan chain path is arranged for a scan test; and utilizing an output pad located in the scan chain path to output the result, wherein the result is arranged to be indicative of the operating status of the specific circuit.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: March 19, 2019
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chun-Yi Kuo, Ying-Yen Chen, Jih-Nung Lee
  • Patent number: 10234504
    Abstract: According to certain aspects, the present embodiments relate to optimizing core wrappers in an integrated circuit to facilitate core-based testing of the integrated circuit. In some embodiments, an integrated circuit design flow is adjusted so as to increase the use of shared wrapper cells in inserted core wrappers, and to reduce the use of dedicated wrapper cells in such core wrappers, thereby improving timing and other integrated circuit design features. In these and other embodiments, the increased use of shared wrapper cells is performed even in the presence of shift registers in the integrated circuit design.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: March 19, 2019
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Subhasish Mukherjee, Jagjot Kaur, Vivek Chickermane, Susan Marie Genova
  • Patent number: 10234505
    Abstract: A disclosed integrated circuit includes first and second clock generation circuits, a stagger circuit, and a plurality of scan chains. The first clock generation circuit receives a first clock signal and generates a first set of clock pulses having a first frequency in response to receipt of a first clock trigger signal and a first enable signal. The second clock generation circuit receives a second clock signal and generates a second set of clock pulses having a second frequency in response to receipt of a second clock trigger signal and a second enable signal. The stagger circuit generates the first and second clock trigger signals from the global trigger signal at different times. The first set of clock pulses are staggered relative to the second set of clock pulses. The plurality of scan chains test functionality of logic circuitry within the IC chip using the first and second set of clock pulses.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: March 19, 2019
    Assignee: XILINX, INC.
    Inventors: Banadappa V. Shivaray, Ismed D. Hartanto, Alex S. Warshofsky, Pranjal Chauhan
  • Patent number: 10234506
    Abstract: A method for applying test patterns to scan chains in a circuit-under-test. The method includes providing a compressed test pattern of bits; decompressing the compressed test pattern into a decompressed test pattern of bits as the compressed test pattern is being provided; and applying the decompressed test pattern to scan chains of the circuit-under-test. The actions of providing the compressed test pattern, decompressing the compressed test pattern, and applying the decompressed pattern are performed synchronously at the same or different clock rates, depending on the way in which the decompressed bits are to be generated. A circuit that performs the decompression includes a decompressor such as a linear finite state machine adapted to receive a compressed test pattern of bits. The decompressor decompresses the test pattern into a decompressed test pattern of bits as the compressed test pattern is being received.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: March 19, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee
  • Patent number: 10234507
    Abstract: A method and circuit for implementing register array repair using Logic Built In Self Test (LBIST), and a design structure on which the subject circuit resides are provided. Register array repair includes identifying and creating a list of any repairable Register Arrays (RAs) that effect an LBIST fail result. Next a repair solution is detected for each of the repairable Register Arrays (RAs) isolating a failing location for the detected repair solution for each array.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: March 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Steven M. Douskey, Michael J. Hamilton, Amanda R. Kaufer, Phillip A. Senum
  • Patent number: 10234508
    Abstract: Various examples are provided for parameter estimation of generators. In one example, among others, a method includes collecting data corresponding to a generator using a phasor management unit (PMU) and estimating dynamic parameters of the generator using extended Kalman filtering (EKF) and the collected PMU data. In another example, a system includes at least one application executable in a processing device that obtains operational data corresponding to a generator and estimates a dynamic parameter of the generator using EKF and the operational data. In another example, an EKF estimator includes a dynamics estimator configured to estimate a state variable of a generator, a geometry estimator configured to estimate phasor values associated with the generator, and a Kalman filter gain configured to determine a correction to the state variable.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: March 19, 2019
    Assignee: University of South Florida
    Inventors: Zhixin Miao, Lingling Fan
  • Patent number: 10234509
    Abstract: The controller is equipped with a detection signal acquiring unit adapted to acquire a detection signal from a sensor that detects a physical quantity caused by vibrations generated at a detected location due to rotation of an electric motor, a phase information acquiring unit adapted to acquire phase information of the electric motor, a time width determining unit adapted to determine a time width, which coincides with a period of a phenomena occurring at the detected location due to rotation of the electric motor, on the basis of the phase information, a signal dividing unit adapted to divide the detection signal based on the determined time width, and an adding and averaging unit adapted to add and average a plurality of divided signals divided by the time width.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: March 19, 2019
    Assignee: FANUC CORPORATION
    Inventor: Toshifumi Muramatsu
  • Patent number: 10234510
    Abstract: The present invention relates to a state of charge (SOC) management system of an energy storage device, the system comprising at least one energy storage device, wherein the SOC management system of the energy storage device manages SOC of the energy storage device by performing P-f (active power-frequency) droop control on the basis of a droop coefficient, a reference frequency, and a dead band, which determine the output of each energy storage device.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: March 19, 2019
    Assignee: HYOSUNG HEAVY INDUSTRIES CORPORATION
    Inventors: Geon Ho An, In Sun Choi, Dong Jun Won, Jin Young Choi, Sang Ji Lee
  • Patent number: 10234511
    Abstract: Systems and methods for optimal sizing of one or more grid-scale batteries for frequency regulation service, including determining a desired battery output power for the one or more batteries for a particular period of time. A battery size is optimized for the one or more batteries for the particular period of time, and the optimizing is repeated using different time periods to generate a set of optimal battery sizes based on at least one of generated operational constraints or quality criteria constraints for the one or more batteries. A most optimal battery is selected from the set of optimal battery sizes.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: March 19, 2019
    Assignee: NEC Corporation
    Inventors: Ali Hooshmand, Ratnesh Sharma
  • Patent number: 10234512
    Abstract: An arrangement provides simulation of important battery factors such as state of charge or state of health, and the estimates are provided to the human user in ways that permit the human user to make better use of the battery, for example in an electric car. The arrangement is made up in part of nodes, each individually simulated, and at least some of the nodes communicate with each other by means of values which within the domain of the simulator are understood as currents but which may have real-world significance for some value that is not a current at all. The currents are passed on a (simulated) analog bus. Some lines on the analog bus, while understood as “currents” in the domain of the simulator, are actually values that merely pass messages between modeling elements, the “current” values not necessarily representing any real-life measurable such as the aforementioned temperature value.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: March 19, 2019
    Assignee: Sendyne Corporation
    Inventor: Yannis Tsividis
  • Patent number: 10234513
    Abstract: A magnetic field sensor includes a lead frame, a semiconductor die supporting a magnetic field sensing element, a non-conductive mold material enclosing the die and a portion of the lead frame, a ferromagnetic mold material secured to the non-conductive mold material and a securing mechanism to securely engage the mold materials. The ferromagnetic mold material may comprise a soft ferromagnetic material to form a concentrator or a hard ferromagnetic material to form a bias magnet. The ferromagnetic mold material may be tapered and includes a non-contiguous central region, as may be an aperture or may contain the non-conductive mold material or an overmold material. Further embodiments include die up, lead on chip, and flip-chip arrangements, wafer level techniques to form the concentrator or bias magnet, integrated components, such as capacitors, on the lead frame, and a bias magnet with one or more channels to facilitate overmolding.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: March 19, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Ravi Vig, William P. Taylor, Andreas P. Friedrich, Paul David, Marie-Adelaide Lo, Eric Burdette, Eric Shoemaker, Michael C. Doogue