Abstract: Arbitrating circuitry arbitrates between a plurality of inputs and a selection of at least one of said plurality of inputs. The arbitrating circuitry includes an array of interconnected arbiter devices operating with respect to a set of Q inputs. The array comprises M sub-levels with at least a first sub-level having T arbiter devices each operating with respect to U inputs, where Q=UM and Q=TU. For each sub-level other than a first sub-level, each arbiter device in a sub-level receives as input requests signals indicating an arbitration outcome for two or more arbiter devices in a preceding sub-level and arbitrates between those input requests.

Abstract: Systems and methods for adding a logic layer between FPGA I/O and the core logic of the FPGA. With the extra layer, users can monitor and/or modify the I/O to the FPGA. In addition, users can monitor and/or modify input/output to the core logics of the FPGA, thereby filtering both I/O to the FPGA and the logic blocks of the FPGA. With the filtering in place, a non-intrusive digital scope can be implemented which can, in turn, be used to create a “black box” regarding FPGA I/O during the occurrence of the catastrophic events within the system.

Abstract: Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A receiving device captures a sending device address during bus arbitration and receives a datagram subsequent to the bus arbitration. The datagram includes at least a register address and a payload. The receiving device obtains an address region specific to the sending device within a register space of the receiving device based on the captured sending device address and the register address included in the datagram and writes the payload of the datagram to the register space according to the obtained address region.

Abstract: A processor applies offset values to read and write pointers to a first-in-first-out buffer (FIFO) for data being transferred between clock domains. The pointer offsets are based on a frequency ratio between the clock domains, and reduce latency while ensuring that data is not read by the receiving clock domain from an entry of the FIFO until after the data has been written to the entry, thereby reducing data transfer errors. The processor resets the pointer offset values in response to a change in clock frequency at one or both of the clock domains, allowing the processor to continue to accurately transfer data in response to clock frequency changes.

Abstract: A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream port enables communication with the processor; a downstream port enables communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager (APM-F) to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager (APM-S) to assist the APM-F in executing the acceleration instruction.

Abstract: A plurality of software programmable processors is disclosed. The software programmable processors are controlled by rotating circular buffers. A first processor and a second processor within the plurality of software programmable processors are individually programmable. The first processor within the plurality of software programmable processors is coupled to neighbor processors within the plurality of software programmable processors. The first processor sends and receives data from the neighbor processors. The first processor and the second processor are configured to operate on a common instruction cycle. An output of the first processor from a first instruction cycle is an input to the second processor on a subsequent instruction cycle.

Abstract: Examples include techniques to access or operate a dual in-line memory module (DIMM) via one or multiple data channels. In some examples, memory devices at or on the DIMM may be accessed via one or more data channels. The one or more data channels arranged such that the DIMM is configured to operate in a dual channel mode that includes two data channels or to operate in a single channel mode that includes a single data channel.

Abstract: Aspects include sending a request to perform a unit of work that includes a synchronous I/O operation. The sending is from an operating system (OS) executing on a server to firmware located on the server. The synchronous I/O request includes a command request block that includes an operation code identifying the synchronous I/O operation and an identifier of a persistent storage control unit (SCU). The OS waits for the synchronous I/O to complete and the unit of work remains active during the waiting. The firmware detects that the synchronous I/O operation has completed. A command response block that includes completion status information about the synchronous I/O operation is received by the OS from the firmware. The unit of work is completed in response to the I/O operation completing.

Abstract: The described technology is generally directed towards accelerating data handling in a cloud data storage system by using smart network interface cards (SmartNICs) at the nodes. Instead of copying data to kernel space, many input/output (I/O) operations can be handled primarily by the SmartNIC, using the SmartNIC's memory. For example, mirrored data writes can be sent directly from the SmartNIC's memory associated with the node handling the write to other nodes, without first copying the data to kernel space. Object reads can be handled at a node by having segments of the object queued, in order, in the node's associated SmartNIC's memory, and sent to a requesting client without having to be copied to the handling node's kernel space, unless low memory conditions exist in the SmartNIC's memory.

Abstract: A master-slave system, a command execution method, and a data access method are provided. The master-slave system includes a master device and a slave device. The master device provides a first command and a clock signal to the slave device. The slave device executes a first operation corresponding to the first command according to the first command and the clock signal. When the first operation corresponding to the first command is completed, the slave device generates a response signal according to the clock signal to notify the master device an execution result of the first operation corresponding to the first command.

Abstract: A data processing system for processing data messages received from multiple user terminals over one or more data networks includes a processor, an input/output (I/O) range, and multiple processing layers configured to run on the processor. The multiple processing layers include an application layer, including an application, configured when run on the processor to process data messages from the I/O range, a hardware layer configured when run on the processor to communicate with hardware devices including the user terminals, and an operating system kernel layer configured when run on the processor to provide data communications between the application layer and the hardware layer. The application layer can bypass the operating system kernel layer when communicating with the hardware layer to poll the I/O range for data messages for input to and processing by the application.

Abstract: A system includes a processor and a hardware accelerator coupled to the processor. The hardware accelerator includes data analysis elements configured to analyze a data stream based on configuration data and to output a result, and an integrated circuit device that includes a DMA engine that writes input data to and read output data from the data analysis elements, one or more preprocessing cores that receive the input data from the DMA engine prior to the DMA engine writing the input data to the one or more data analysis elements and perform custom preprocessing functions on the input data, and one or more post-processing cores that receive the output data from the DMA engine after the output data is read from the data analysis elements but prior to the output data being output to the processor and perform custom post-processing functions on the output data.

Abstract: An aspect includes memory access optimization for an I/O adapter in a processor complex. A memory block distance is determined between the I/O adapter and a memory block location in the processor complex and determining one or more memory movement type criteria between the I/O adapter and the memory block location based on the memory block distance. A memory movement operation type is selected based on a memory movement process parameter and the one or more memory movement type criteria. A memory movement process is initiated between the I/O adapter and the memory block location using the memory movement operation type.

Abstract: In one embodiment, a data message is generated at a first system-on-chip (SOC) for transmission to a second SOC. A stream of data words is generated from the data message, the data words alternating between even and odd data words. Each data word in the stream of data words is divided into a first pattern of slices for even data words and a second pattern of slices for odd data words, with the slices distributed across plural output ports at the first SOC. At each output port, two slices from two successive cycles are grouped. The grouped slices are encoded using an encoding scheme to produce an N-bit symbol at M-bits per cycle, alternating between high and low parts of the encoding. Plural metaframes are generated from a stream of symbols and the metaframes for each of the output ports are transmitted to the second SOC.

Abstract: Moving from a back-to-back topology to a switched topology in an InfiniBand network includes, prior to connecting a switch for a first storage controller in the network and during reboot of the first storage controller, waiting for a second storage controller in the network to become master, and upon the second storage controller becoming master, changing cache files for local ports on the first storage controller regarding adjacent ports' LID assignments. An aspect further includes restarting a system manager for the first storage controller, connecting the first storage controller to the system with new LID assignments provided by changed files on first storage controller, and upon the first storage controller becoming active, rebooting the second storage controller, changing the LID assignments in the active storage controller, and adding new switches to the system.

Abstract: A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC, the SoC including the processor including a plurality of central processing unit (CPU) cores, a first bus connected to the processor, a graphic processing unit (GPU) connected to the first bus, a memory controller connected to the first bus, a second bus connected to the processor, an isolation cell including a logic circuit configured to retain a signal value input to the processor according to an isolation signal, and a deadlock controller connected to the first bus and the second bus. The deadlock controller is configured to isolate the processor, which is in a deadlock state, from the first bus by applying the isolation signal on the isolation cell, and to extract, via the second bus, state information of the isolated processor in the deadlock state.

Abstract: Methods and systems are provided routing access requests produced by a function to a physical sharing machine on a computer interconnect fabric. Access requests are routed through a switch that includes an NTB, the NTB using an address-lookup table to ensure that access requests made by multiple physical sharing machines are appropriately isolated from one another.

Abstract: Systems, devices, methods, and techniques for bus receivers operable to provide a data output corresponding to a voltage differential provided on a two-conductor data bus. In one example, a bus receiver comprises a four-quadrant input circuit and a gain stage coupled to the four-quadrant input circuit. In various examples, the four-quadrant input circuit is operable to provide common mode current compensation based on a common mode voltage present on the two-conductor data bus.

Abstract: A universal transponder interface including: a compartment configured to store a vehicle ignition key; a docking station configured to receive a databus cartridge, wherein the databus cartridge includes codes to support a plurality of different types of databus communication; a first interface configured to connect the universal transponder interface to a vehicle databus; and a second interface configured to connect the universal transponder interface to a vehicle security or remote start system.

Abstract: A data network may include a data bus and network nodes. The data bus may be a differential data bus having first and second differential signal lines that convey differential signals between the nodes. A bimodal impedance terminator may be coupled to the first and second differential signal lines at one or both ends of the data bus. The bimodal impedance terminator may include a first resistor coupled between the first differential signal line and a circuit node and a second resistor coupled between the second differential signal line and the circuit node. A capacitor may be coupled between the circuit node and ground. A third resistor may be coupled between the circuit node and ground in series with the capacitor. The bimodal impedance terminator may terminate both the differential-mode impedance and the common-mode impedance of the data bus to reduce signal reflections at the ends of the data bus.

Abstract: According to at least one example embodiment, a multi-chip system includes multiple chip devices configured to communicate to each other and share resources, such as I/O devices. According to at least one example embodiment, a method of synchronizing access to an input/output (I/O) device in the multi-chip system comprises initiating, by a first agent of the multi-chip system, a first operation for accessing the I/O device, the first operation is queued, prior to execution by the I/O device, in a queue. Once the first operation is queued, an indication of such queuing is provided. Upon detecting, by a second agent of the multi-chip system, the indication of queuing the first operation in the queue, initiating a second operation to access the I/O device, the second operation is queued subsequent to the first operation in the queue.

Abstract: Methods and apparatus for virtual channel allocation within an electronic device. In one exemplary embodiment, the device is a consumer electronics device having multiple camera sensors uses a modified high-speed protocol (e.g., DisplayPort Multi-Stream Transport (MST) protocol) to process camera data via one or more virtual channels. Unlike traditional solutions which rely on an intelligent source device to manage a network of devices, the present disclosure describes in one aspect a network of nodes internal to a consumer electronic device that is managed by the sink node (i.e., a “smart sink”). Additionally, since the full suite of protocol (e.g., DisplayPort) capabilities are unnecessary for certain design scenarios, certain further disclosed simplifications improve performance for sink nodes having very modest capabilities.

Abstract: EHF communication systems described herein can selectively implement any one of the USB standards by mapping appropriate USB signal conditions over an EHF contactless communication link. The EHF contactless communication link may serve as an alternative to conventional board-to-board and device-to-device connectors, and as such enables wired connection USB signaling protocols to be used in a non-wired environment provided by the EHF contactless communications link. Use of a USB protocol over the EHF communications link can be accomplished by establishing the EHF link between counterpart EHF communication units, and then by establishing the appropriate USB protocol over the link.

Abstract: A computing device configured to detect proper cable assembly to improve assembly and problem diagnosis is provided. The computing device includes a motherboard, a function board, and a middle plane connecting the motherboard and function board. The motherboard includes a baseboard management controller (BMC). The BMC is connected to I2C buses. The function board includes integrated circuits. The middle plane includes cable connections interconnecting the I2C buses that are connected to the BMC and the integrated circuits. The integrated circuits have unique system addresses that are identifiable by the BMC.

Abstract: A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream endpoint enables communication with the processor; two downstream root ports enable communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager (APM-F) to execute an acceleration instruction. The storage device may include two endpoints of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager (APM-S) to assist the APM-F in executing the acceleration instruction. The processor, the acceleration module, and the storage device may communicate via a Peripheral Component Interconnect Exchange (PCIe) bus.

Abstract: Methods, non-transitory computer readable media and computing device that enabling direct memory access (DMA) capable devices for remote DMA (RDMA) are illustrated. With this technology, a first network message is inserted into a first location of a remote memory region of a computing device via DMA. The remote memory region is defined in an anchor record retrieved from a shared memory of the computing device. A local head pointer is synchronized, via DMA, with a remote head pointer stored by the computing device. The local and remote head pointers correspond to the first location of the remote memory region of the computing device. Following receipt of a DMA completion message, a notification message is sent, via DMA, to the computing device indicating that the network message has been transferred.

Abstract: A node controller for a first processor socket group may include a node memory storing a coherence directory and logic. Logic may cause the node controller to: receive a memory operation request directly from a second processor socket group, follow a coherence protocol based on the memory operation request and the coherence directory and directly access a socket group memory of the first processor socket group based on the request.

Abstract: A GPU architecture employs a crossbar switch to preferentially store operand vectors in a compressed form allowing reduction in the number of memory circuits that must be activated during an operand fetch and to allow existing execution units to be used for scalar execution. Scalar execution can be performed during branch divergence.

Abstract: An operation method of a semiconductor memory device including a memory cell array and an internal processor configured to perform an internal processing operation includes receiving at the memory device a first mode indicator that indicates whether the memory device should operate in a processor mode or in a normal mode, receiving at the memory device processing information for the memory device, when the first mode indicator indicates that the memory device should operate in the processor mode, storing the processing information in a first memory cell region of the memory cell array, using the stored processing information to perform internal processing by the internal processor, and storing a result of the internal processing in the memory cell array.

Abstract: Techniques are described to perform a shuffle operation. Rather than using an all-lane to all-lane cross bar, a shuffler circuit having a smaller cross bar is described. The shuffler circuit performs the shuffle operation piecewise by reordering data received from processing lanes and outputting the reordered data.

Abstract: A technique for managing storage space in a data storage system implements data objects in respective files. In response to an instruction to convert a set of such files from thin to thick or from thick to thin, the data storage system checks whether it has enough available storage space to accommodate the set of files if conversion were to proceed. If so, conversion is performed, and each of the set of files is converted from thin to thick or from thick to thin, in accordance with the instruction.

Abstract: Variety of approaches to control file hydration behavior are described. A filter driver initiates operations to control file hydration behavior upon receiving a process identifier (PID) registration from a synchronization engine. Upon receiving a file operation request associated with a placeholder file, a PID and a process name associated with the file operation is identified. A hydration behavior is detected based on the PID or the process name. A decision associated with the file operation request is rendered based on the hydration behavior.

Abstract: A computer-implemented method of a database statement for a relational database. The database comprises one or more tables comprising one or more data rows. A database statement is received. A set of predicates from the database statement and a set of data rows from the tables to use to generate the result of the database statement are determined. A set of interdiction statements applicable to one or more data rows is obtained. For each predicate, a set of masks applicable to one or more data rows is obtained, where for each mask, the data masked by the mask is used by the predicate. It is determined if a data row has an applicable interdiction statement, and contains data masked by a mask. If so, the result of the database statement without using the result of applying the predicate to the data row.

Abstract: Embodiments of the present disclosure relate to a database system for dynamically and automatically accessing and storing data items from multiple data sources. The system may, for example, determine data sources to access, and ways of accessing data items from those data sources, based on an indication of an analysis level and/or other analysis criteria. Further, the system may selectively and efficiently integrate data items from the multiple data sources. Selective integration of data items may be based, for example, on the indication of the analysis level and/or other analysis criteria. The system may further generate outputs of the selective integration of data items. These outputs may, for example, include specialized reports and/or user interfaces. The outputs of the system, in some implementations, may be interactive and dynamically updated in response to user inputs, for example.

Abstract: This technique improves energy efficiency of MapReduce system by using system performance model without changing any component of the MapReduce system. This involves determining presence of any hardware bottleneck in any node of MapReduce system based on a system performance model and if any hardware bottleneck is present in any node, then the maximum bandwidth value of hardware associated with the bottleneck of each node is determined. Thereafter, an energy efficient value of Central Processing Unit (CPU) frequency of each node having the bottleneck is determined by using the system performance model and the maximum bandwidth value of hardware associated with the bottleneck. Further, the CPU frequency of each node having the bottleneck is set at the energy efficient value determined in the earlier step.

Abstract: Disclosed are some examples of database systems, methods, and computer program products for processing log files. In some implementations, a server of a database system accesses a metadata file indicating algorithms that can be applied to data of log files. The server generates customer-facing log files using the log file and metadata file. The customer-facing log files include new data derived from using the algorithms and the data of the log files.

Abstract: Methods and apparatus for providing consistent data storage in distributed computing systems. A consistent distributed computing file system (consistent DCFS) may be backed by an object storage service that only guarantees eventual consistency, and may leverage a data storage service (e.g., a database service) to store and maintain a file system/directory structure (a consistent DCFS directory) for the consistent DCFS that may be accessed by compute nodes for file/directory information relevant to the data objects in the consistent DCFS, rather than relying on the information maintained by the object storage service. The compute nodes may reference the consistent DCFS directory to, for example, store and retrieve strongly consistent metadata referencing data objects in the consistent DCFS. The compute nodes may, for example, retrieve metadata from consistent DCFS directory to determine whether the object storage service is presenting all of the data that it is supposed to have.

Abstract: Various embodiments relate generally to a system, a device and a method provide for enabling clients to expose secured files via virtual hosts. A request may be received from a user device such that the request is associated with a content item. The request may include a file path and a content identifier. A host name of the file path may be determined from the request. Data representing a physical location of the content item within a file storage system may then be determined based on a mapped bucket associated with the host name and the content identifier. The content item may be retrieved based on the data representing the physical location within the file storage system and provided to the user device responsive to the request.

Abstract: Systems, apparatuses and methods may provide for technology that digitally signs a hash table and a data payload, wherein the data payload is partitioned into a plurality of storage blocks and the hash table specifies how to index into and individually authenticate the plurality of storage blocks. Additionally, a write of the digitally signed hash table and data payload may be initiated to an aggregate storage array. In one example, the aggregate storage array authenticates the digital signature of the hash table and the data payload and conducts a write of the data payload to a plurality of drives in the aggregate storage array in accordance with the hash table.

Abstract: Inter-zone data replication in a distributed storage system can be organized. In one aspect, a replication destination zone can send a new data portion to a replication source zone to reduce inter-zone traffic. The new data portion can be stored within one or more chunks within the replication source zone, which can then provide the replication destination zone with location information (e.g., chunk identifier (ID), offset within chunk, segment size, etc.) indicative of a location of the new data portion within one or more chunks. The location information can be utilized by the replication destination zone to store a backup copy of the new data portion. Since the backup copy is stored without data replication from the replication source zone to the replication destination zone, inter-zone network traffic is significantly reduced.

Abstract: One embodiment provides a method for storage management in a hierarchical file system. The method includes tracking directories for sub-file systems of the hierarchical set of file systems and maintaining a corresponding directory in a top-file system and a number of symbolic pointers in the corresponding directory which each point from the corresponding directory to a sub-file system where any portion of the tracked directory resides. If available space in a first sub-file system is below a threshold, the system identifies a second sub-file system with available space above the threshold, wherein the first sub-file system contains a first portion of the directory. If a second portion of the directory does not exist in the second sub-file system, the system creates the second portion of the directory in the second sub-file system and creates a link from the first portion of the directory to the second portion of the directory.

Abstract: Some embodiments provide a method for determining a relatedness of content items to categories. The method identifies a particular content item, a relevancy score associated with the particular content item, and a set of categories to which the particular content item is classified as related. Based on a set of glossaries associated with the set of categories, the method calculates a set of affinity scores that each represents a degree of relevancy between the particular content item and a category in the set of categories. The method modifies the relevancy score associated with the particular content item based on the calculated set of affinity scores.

Abstract: A computer implemented method for classifying at least one source dataset of a computer system. The method may include providing a plurality of associated reference tables organized and associated in accordance with a reference storage model in the computer system. The method may also include calculating, by a data classifier application of the computer system, a first similarity score between the source dataset and a first reference table of the reference tables based on common attributes in the source dataset and a join of the first reference table with at least one further reference table of the reference tables having a relationship with the first reference table. The method may further include classifying, by the data classifier application, the source dataset by determining using at least the calculated first similarity score whether the source dataset is organized as the first reference table in accordance to the reference storage model.

Abstract: Method and system for identifying and analysing hidden relationships in application databases is provided. During a database session database query language statements (DQLS) are retrieved from log tables in application databases to analyze and identify join indicators. Join indicators represent data fields from two or more tables which are joined using values common to each data field. Based on identified join indicators, data definition language (DDL) file is generated including relationship between two or more tables. Above steps are repeated until all DQLS in log tables are analyzed. Thereafter it is ascertained if content of created DDL file is defined in database schema (DS). DS is represented in physical data models of application databases. If it is not defined in the database schema, a logical data definition language file is generated based on generated DDL file to update logical data model, which represents hidden relationships between tables in application databases.

Abstract: A system and method for facilitating a migration engine to migrate data items in a data directory from a source system to a destination system over multiple migration passes are disclosed. A state file can be used to track migration states of data items during the life cycle of the migration. The state file can be generated and updated by a plugin to the migration engine. During a migration pass, the state file can be loaded into the memory to influence the migration by the migration engine. Prior to the migration pass, migration profile specifying one or more migration actions can be invoked by a migration routine. The invocation of the migration profile can cause the state file to be modified to perform the migration actions accordingly.

Abstract: A method of migrating a data store of wireless communication subscriber data from a source data store system to a target data store system. The method comprises receiving a provisioning request by a computer system, looking up and revising a data entry in the source data store system based on the provisioning request, copying and creating a reference to the revised data entry in the target data store system, and changing the reference in the source data store system to reference empty memory by the computer system. A second portion of data migration comprising creating a list of data entries, softlocking each data entry, reading and copying each data entry to the target data store system, creating a reference to the data entry, changing the reference in the source data store system to reference empty memory, and releasing the softlock by the computer system.

Abstract: In one embodiment, a computer-implemented method comprises receiving, from a second computing device at a first computing device that is communicatively coupled to the second computing device, a request to store a first entity data object, the first entity data object including a first property key-value pair; using the first computing device, storing the first entity data object in one or more digital data repositories in response to the request; receiving, from the second computing device at the first computing device, a delete command that specifies the first property key-value pair to delete by; in response to the delete command that specifies the first property key-value pair to delete by, deleting the first entity data object in the one or more digital data repositories.

Abstract: Systems, methods, and computer-readable and executable instructions are provided for providing a device agnostic active/active data center. Providing a device agnostic active/active data center can include receiving user communication assigned from a content delivery network (CDN) provider. In addition, providing a device agnostic active/active data center can include determining a designated database for the user communication. Furthermore, providing a device agnostic active/active data center can include assigning a destination address to the designated database for the user communication.

Abstract: Disclosed are methods, apparatus, systems, and computer readable storage media for providing a reference to a content object in a user interface using an on-demand database service. A computing device can receive data regarding identification of a content object, where the content object is stored in a data repository external to the on-demand database service. The data regarding the content object can be stored in a persistent object in a database of the on-demand database service. A reference can be provided representing the persistent object to a display device operable to display the reference in a user interface when the display device accesses the on-demand database service. One or more graphical representations can be exposed regarding the content object for display in the user interface by the display device, where the exposed graphical representations depend at least in part on the data repository.

Abstract: Systems, methods, and related technologies for application-centric object storage and interfaces. In certain aspects, a processing device receives, from a first application, one or more requests with respect to a data object. The processing device processes the one or more requests to identify one or more substructures of the data object. Based on an identification of the one or more substructures of the data object, the processing device defines a storage structure for the data object. The processing device defines an interface through which the first application can provide data access commands to the data object as stored in the defined storage structure.