Abstract: An ultrasonic air data system can include a pole having a length longer than a boundary layer thickness of a boundary layer flow such that at least a distal end of the pole is configured to extend outwardly from an aircraft surface to be at least partially outside of the boundary layer flow. The system can include a transmitter disposed on or in the pole at or near the distal end of the pole such that the transmitter is located at least partially outside of the boundary layer flow when in use, wherein the transmitter is configured to output a transmitter signal. The system can include one or more receivers disposed downstream of the pole as defined by the boundary layer flow and configured to receive the transmitter signal.

Abstract: A magnetic roller device and a method for calculating rotation information thereof are disclosed. The magnetic roller device includes a multipole magnet, an MCU, plurality of Hall components, and a roller disposed on a handwriting device, wherein the multipole magnet is disposed on the roller, the multipole magnet includes at least one pair of magnetic poles with opposite polarities, and output ends of the plurality of Hall components are connected to an input end of the MCU; the plurality of Hall components are all located on a same plane of a magnetic field sensing space of the multipole magnet, and distances between each of the plurality of Hall components and the multipole magnet are equal; and a distance between two adjacent ones of the plurality of Hall components is less than half of a width of each magnetic pole in the multipole magnet.

Abstract: A process for producing a piezoelectric sensor includes the following steps: a step of providing a housing made of stainless steel; a step of producing a solution of a compound comprising a metal or metalloid element; a step of depositing a layer of the solution over at least one inner surface of the housing; a step of oxidizing the deposited layer of solution; a step of placing a piezoelectric element inside the housing; a step of closing the housing. A piezoelectric sensor obtained by such a process and comprising a closed steel housing, a piezoelectric element arranged inside the housing and a layer of a solution of a compound comprising a metal or metalloid element that is arranged over at least one inner surface of the housing.

Abstract: An inertial sensor includes a substrate, a first inertial sensor element provided on the substrate, a lid bonded to the substrate so as to cover the first inertial sensor element, a first drive signal terminal that is provided outside the lid and is for a drive signal to be applied to the first inertial sensor element, and a first detection signal terminal that is provided outside the lid and is for a detection signal output from the first inertial sensor element, in which, in plan view of the substrate, the first drive signal terminal and the first detection signal terminal are provided with the lid interposed therebetween.

Abstract: Disclosed herein are aspects of a multiple-mass, multi-axis microelectromechanical systems (MEMS) accelerometer sensor device with a fully differential sensing design that applies differential drive signals to movable proof masses and senses differential motion signals at sense fingers coupled to a substrate. In some embodiments, capacitance signals from different sense fingers are combined together at a sensing signal node disposed on the substrate supporting the proof masses. In some embodiments, a split shield may be provided, with a first shield underneath a proof mass coupled to the same drive signal applied to the proof mass and a second shield electrically isolated from the first shield provided underneath the sense fingers and biased with a constant voltage to provide shielding for the sense fingers.

Abstract: Methods and apparatus for obtaining extremely high sensitivity chemical composition maps with spatial resolution down to a few nanometers. In some embodiments these chemical composition maps are created using a combination of three techniques: (1) Illuminating the sample with IR radiation than is tuned to an absorption band in the sample; and (2) Optimizing a mechanical coupling efficiency that is tuned to a specific target material; (3) Optimizing a resonant detection that is tuned to a specific target material. With the combination of these steps it is possible to obtain (1) Chemical composition maps based on unique IR absorption; (2) spatial resolution that is enhanced by extremely short-range tip-sample interactions; and (3) resonant amplification tuned to a specific target material. In other embodiments it is possible to take advantage of any two of these steps and still achieve a substantial improvement in spatial resolution and/or sensitivity.

Abstract: An atomic force microscope (AFM) and method of operating the same includes a separate Z height sensor to measure, simultaneously with AFM system control, probe sample distance, pixel-by-pixel during AFM data acquisition. By mapping the AFM data to low resolution data of the Z height data, a high resolution final data image corrected for creep is generated in real time.

Abstract: A socket electrically connects a first electric component and a second electric component, including: a base part in which a through hole extending through the base part from a top surface to a bottom surface in a vertical direction is formed; a contact pin inserted to the through hole such that a pin lower end is exposed from the bottom surface, and configured such that, when in use, a pin upper end makes contact with the first electric component; and a sheet member including a through electrode extending therethrough in the vertical direction, disposed at the base part in a state where the sheet member faces the bottom surface, and configured such that, when in use, an upper end of the through electrode makes contact with the pin lower end and a lower end of the through electrode makes contact with the second electric component.

Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.

Abstract: A voltage divider circuit includes: a first voltage divider having first and second capacitors, and an output node configured to output a divider voltage from between the first and second capacitors; a second voltage divider having third and fourth capacitors, and first to third switches, and being connected in parallel to the first voltage divider; and a fourth switch provided between the output node and a connection node of the third and fourth capacitors. In the voltage divider circuit, the switches are controlled based on controlling periods.

Abstract: A system current sensor module can accurately sense or measure system current flowing through a sense current resistor by shunting current through a gain-setting resistor and using an amplifier to measure a resulting voltage, with an output transistor controlled by the amplifier controlling current through the gain setting resistor in a manner that tends to keep the amplifier inputs at the same voltage. The resistors can be thermally coupled to maintain similar temperatures when a system current is flowing. The thermal coupling can include conducting heat from a first resistor layer carrying the current sense resistor to a thermal cage layer located beyond a second resistor layer carrying the gain-setting resistor. This preserves accuracy, including during aging.

Abstract: Presented are one or more embodiments of a device which includes a case and a sensor device. The case includes a first indent configured to secure an electronic device, the first indent in a first side of the case, a second indent in a second side of the case opposite the first side, the second indent extending from a first edge of the case in a first direction such that second indent is open at the first edge of the case, and a securing device in the second indent. The sensor device includes an outer casing configured to slide in the first direction in the second indent and at least partially prevented from leaving the second indent by the securing device, and a sensor at least partially in the outer casing.

Abstract: The present technology is to provide a detector capable of detecting an input voltage outside the guaranteed operating voltage range, even if the delay time caused in a logic element by a decrease in power-supply voltage varies due to an external factor. The detector includes a plurality of first detection circuits, a first detection rate calculation unit, a plurality of second detection circuits, a second detection rate calculation unit, and a comparison determination unit. Each of the plurality of first detection circuits detects whether or not an input voltage has a value outside a guaranteed operating range for a normal operation. The first detection rate calculation unit calculates a first detection rate of the detected number of the first detection circuits, and each of the plurality of second detection circuits detects whether or not a predetermined reference voltage is lower than a threshold voltage.

Abstract: An electric circuit according to an embodiment of the present disclosure includes only a single amperemeter configured to measure either a positive current or a negative current through a respective measurement resistance between a respective high voltage potential and a common ground potential. The respective actual measurement resistance value of the unmeasured measurement resistance is calculated by applying a respectively calculated actual measurement resistance value of the respective measured measurement resistance, a calculated actual positive isolation resistance value, and a calculated negative isolation resistance value.

Abstract: A detection apparatus for unbalanced DC link capacitor voltage, the DC link provides a DC voltage and includes a plurality of capacitors coupled in series to two ends of the DC link and a plurality of balanced resistors coupled in series to two ends of the DC link and corresponding to the capacitors. The detection apparatus includes a plurality of sense resistors and a current sensor. One end of each sense resistor is coupled to a common-connected node of two capacitors, and the other end thereof is coupled to a common-connected node of two balanced resistors. The current sensor is coupled to one of the sense resistors and measures a current value of a current flowing through the sense resistor coupled to the current sensor.

Abstract: A system may include a resistive-inductive-capacitive sensor, a driver configured to drive the resistive-inductive-capacitive sensor at a driving frequency, and a measurement circuit communicatively coupled to the resistive-inductive-capacitive sensor and configured to determine a measured change in a resonant frequency of the resistive-inductive-capacitive sensor and based on the measured change, modify the driving frequency.

Abstract: A method of measuring electromagnetic interference (EMI) to noninvasively identify component degradation or failure in power electronics circuitry. The method involves characterizing the degradation or failure characteristics of the component and modeling those characteristics to enable a machine learning algorithm to identify EMI frequency distribution characteristics that correspond to the degradation or failure. The EMI frequency distribution is measured and the data provided to the machine learning algorithm whereupon the algorithm identifies degradation or failures indicated by the measured data.

Abstract: An instrument interface method and device. Two capacitors, one capacitor has one end as input of the device, connected to live line of power output of a LISN, and has other end as output of the device, connected to one test port of an oscilloscope; the other capacitor has one end as input of the device, connected to neutral line of the power output of the LISN, and has other end as output of the device, connected to another test port of the oscilloscope; without changing the LISN design, existing LISN products can be used for conducted emission test with oscilloscope-based time-domain EMI measurement instruments by means of the method and device. Said two capacitors have a capacity of <0.09 ?F, which reduced the requirements of oscilloscope's A/D conversion, making low-cost oscilloscope can also be used for EMI testing.

Abstract: A detection and measurement unit for detecting electromagnetic interference, the detection and measurement unit being configured to receive a representative digital signal. The detection and measurement unit includes a detection subunit configured to compare the amplitude of the representative digital signal with a first triggering threshold and a second stopping threshold. The second stopping threshold corresponds to an amplitude less than that of the first triggering threshold. The detection subunit is configured to detect an electromagnetic pulse on each detection of the passage of the amplitude of the representative digital signal through the second stopping threshold in a falling edge after the amplitude of the representative digital signal.

Abstract: Some aspects of this disclosure are directed to an automated method to check electrostatic discharge (ESD) effect on a victim device. For example, some aspects of this disclosure relate to a method, including determining a probe point, in a circuit design, for determining effective resistance between the probe point and ground, where the probe point is on an ESD path of in the circuit design. The method includes determining voltage between the probe point and the ground. The method further includes comparing, by a processing device, a resistance value of the ESD path determined based a predefined electric current value at a source point and the measured voltage with a target resistance value range. The method further includes reporting a violation upon determining that the determined resistance value of the ESD path is outside the target resistance value range.

Abstract: In one embodiment, a method generally comprises monitoring real-time electrical data at Power Sourcing Equipment (PSE) transmitting power over a cable to a Powered Device (PD), calculating thermal characteristics for the cable based on the monitored data, and periodically updating the thermal characteristics based on the monitored data. The power comprises multi-phase pulse power, the data comprises voltage and current measured for each phase of the multi-phase pulse power, and the voltage is greater than 60 volts at the PSE.

Abstract: An earth fault detection apparatus includes a switch group configured to switch between a first measurement path including a battery and a capacitor, and a second and third measurement paths including the battery, a positive/negative-side insulation resistance, and the capacitor; a reference resistance and a test switch; and a control unit calculating a first reference value based on each charging voltage in a case where the test switch is opened and the capacitor is charged, and calculating the insulation resistance with reference to a conversion map created to correspond to an electrostatic capacitance between a power supply line and ground, wherein the control unit calculates a second reference value based on each charging voltage in a case where the test switch is closed and the capacitor is charged for a shorter time, and estimates the electrostatic capacitance with reference to a predetermined test conversion map.

Abstract: An inspection system includes a light source, a mirror, Galvano mirrors, a casing that holds the mirror and the Galvano mirrors inside and includes an attachment portion for attaching an optical element, and a control unit that controls a deflection angle of the Galvano mirrors, wherein the control unit controls the deflection angle so that an optical path optically connected to a semiconductor device is switched between a first optical path passing through the Galvano mirrors and the mirror, and a second optical path passing through the Galvano mirrors and the attachment portion, and controls the deflection angle so that the deflection angle when switching to the first optical path has been performed and the deflection angle when switching to the second optical path has been performed do not overlap.

Abstract: A method for indicating a probing target for a fabricated electronic circuit including: generating an electronic, three-dimensional model based on manufacturing layout information of a fabricated circuit; obtaining, with a vision system, visual environment information for the fabricated circuit; scaling and orienting the three-dimensional model by a scaler and mapper based on the visual environment information; overlaying the three-dimensional model with the visual environment information to produce a correlated image; obtaining an identification of a desired network node of the fabricated circuit; and indicating a probing target, the probing target corresponding to the desired network node of the fabricated circuit.

Abstract: A semiconductor device and a method of testing the same are provided. A semiconductor device includes a Design Under Test (DUT), a processing core configured to execute test software to determine an optimum operating voltage of the DUT, and a protection circuit configured to block the transmission of undefined signals generated by the DUT while the processing core executes the test software.

Abstract: A probe position monitoring structure includes a first common line and a contact portion configured for being directly contacted with a probe. The contact portion includes a first zigzag structure, and a first end of the first zigzag structure is directly connected with the first common line. A method of monitoring a position of a probe includes the following steps. The probe position monitoring structure is provided. The first zigzag structure is directly contacted with a first probe. A resistance measurement is performed to measure a resistance of a portion of the first zigzag structure located between the first probe and the first end for monitoring a position of the first probe.

Abstract: An electronic component handling apparatus handles a device under test (DUT). The electronic component handling apparatus includes: transfer units that each include a DUT transfer part that mounts the DUT on a first tray and removes the DUT from the first tray; contact units that each press the DUT mounted on the first tray against a socket disposed on a test head connected to a tester; and a tray transporter that transports the first tray between the contact units and the transfer units. Either or both of (i) at least one of the contact units and (ii) at least one of the transfer units are removably disposed on the electronic component handling apparatus.

Abstract: A multi-bit flip-flop (MBFF) has flip-flops connected to form an internal scan chain. One of the flip-flops outputs a first data-out signal at a first data output terminal of the MBFF, and includes a selection circuit, a latch-based circuit, and a data-out stage circuit. The selection circuit transmits a data signal or a test signal to an output node of the selection circuit to serve as an input signal. The latch-based circuit generates a first signal according to the input signal. The data-out stage circuit receives the first signal, and generates the data-out signal according to the first signal. When the MBFF operates in a test mode, the selection circuit transmits the test signal to serve as the input signal, and the data-out stage circuit keeps the data-out signal at a fixed voltage level regardless of a voltage level of the test signal.

Abstract: A detection circuit for detecting a clock signal includes a multiplexer, a digital-to-analog converter, a comparator, and a counter. The multiplexer outputs either a first signal or a second signal as a selection signal. The digital-to-analog converter outputs a reference voltage according to the selection signal. The comparator compares the clock signal to the reference voltage to generate a comparison signal. The counter counts a reference clock signal to generate an overflow signal, and resets the overflow signal according to the comparison signal. The overflow signal indicates the amplitude of the clock signal.

Abstract: On-chip spread spectrum characterization including obtaining, from a skitter circuit, skitter data comprising a spread width corresponding to an amplitude of a spread of a spread spectrum clock signal; setting an offset pointer to a center of the spread width corresponding to the amplitude of the spread; retrieving, for each of a number of reference clock cycles, edge data indicating a location, within the spread width, of an edge of the spread spectrum during the reference clock cycle; incrementing, using the edge data, an offset counter for each reference clock cycle during which the edge of the spread spectrum crosses the offset pointer; and calculating a frequency of the spread spectrum using the offset counter and the number of reference clock cycles.

Abstract: The present disclosure discloses a method and an apparatus for testing an artificial intelligence chip test, a device and a storage medium, and relates to the field of artificial intelligence. The specific implementation solution is: the target artificial intelligence chip has multiple same arithmetic units, the method includes: obtaining scale information of the target artificial intelligence chip; determining whether the target artificial intelligence chip satisfies a test condition of an arithmetic unit array level according to the scale information; dividing all the arithmetic units into multiple same arithmetic unit arrays, and performing a DFT test on the arithmetic unit arrays, respectively, if it is determined that the test condition of the arithmetic unit array level is satisfied; performing the DFT test on the arithmetic units, respectively, if it is not determined that the test condition of the arithmetic unit array level is not satisfied.

Abstract: A method for identifying observation points for integrated circuit (IC) testing includes receiving a netlist for an IC that includes a first subcircuit and a second subcircuit; determining, from the netlist, one or more observation points, each determined observation point corresponding to an output node which provides observability, into at least the first subcircuit, of an effective number of gates above a specified threshold; and inserting a design for test element into a layout file of the IC at each determined observation point. Observation points can be determined by transforming the netlist into a node graph; assigning a same initial value to a value field of each node; and propagating values in the value fields of the nodes until all nodes with a succeeding edge have a value of zero in their value fields.

Abstract: An error rate measuring apparatus that measures whether or not an FEC operation of the device under test is possible based on a comparison result of the signal received from the device under test and a test signal includes an operation unit that sets a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test, a data comparison unit that compares bit string data obtained by converting the signal received from the device under test with error data to detect an FEC symbol error of each FEC symbol length, a display unit that associates the bit string data of the FEC symbol length as one point with one unit region of a display region and performs color-coding display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

Abstract: In an embodiment, a method for performing scan testing includes: generating first and second scan clock signals; providing the first and second scan clock signals to first and second scan chains, respectively, where the first and second scan clock signals includes respective first shift pulses when a scan enable signal is asserted, and respective first capture pulses when the scan enable signal is deasserted, where the first shift pulse of the first and second scan clock signals correspond to a first clock pulse of a first clock signal, where the first capture pulse of the first scan clock signal corresponds to a second clock pulse of the first clock signal, and where the first capture pulse of the second scan clock signal corresponds to a first clock pulse of a second clock signal different from the first clock signal.

Abstract: Presented embodiments facilitate efficient and effective diagnostic of test system operations, including temperature control of test equipment components. In one embodiment a test equipment diagnostic method includes applying a known/expected first bit pattern to a test equipment component, applying a known/expected second bit pattern to a test equipment component, and performing a test equipment temperature control analysis based upon the results of applying the known/expected first bit pattern and known/expected second bit pattern. The first bit pattern and second bit pattern have known/expected respective thermal loads and corresponding respective first known/expected/expected temperature and second known/expected/expected temperature. In one embodiment, performing a test equipment temperature control analysis includes determining if temperature control components control a temperature of the test equipment component within acceptable tolerances.

Abstract: A method for estimating a property of an electrical switching device that includes an electromagnetic actuator that includes a coil. The method includes: measuring electric current flowing through the coil; measuring supply electrical voltage of a control circuit for the actuator; injecting an electric current pulse into the coil; identifying a first time corresponding to a time for which the current flowing through the coil reaches a predetermined threshold value when the current increases following the injection of the pulse; and identifying a second time corresponding to a time for which the current flowing through the coil again reaches the predetermined threshold value when the current decreases after a spike. The method further includes estimating a resistance of the coil on the basis of a ratio of a sum of the values of the voltage that are measured between the second time and the first time, to a sum of the values of the current that are measured between the second time and the first time.

Abstract: An apparatus and a method for predicting a state of a battery are provided. The apparatus includes a data measuring unit that measures information about the battery and outputs first data, a data producing unit that reflects a change in available capacity of the battery based on at least a portion of the first data to calculate a corrected state of charge and processes the first data based on the corrected state of charge to generate second data, and outputs the second data, and a battery state estimating unit that estimates state information of the battery based on the second data.

Abstract: A method for determining the capacity of at least one lithium-ion cell, in particular of at least one high-voltage battery, during open circuit voltage aging, uses at least one distinct point in a voltage curve and/or in at least one open circuit voltage of the Li-ion cell.

Abstract: A method of determining battery degradation retroactively using historical data is disclosed. The method includes the steps of collecting state of charge (SOC) and DC ampere data for a predetermined time period; determining a delta (?) SOC based on the data collected; creating a set of SOC regimes having a size based on ?SOC; filtering the SOC data and determining a set of points which indicate a charging or discharging event; and calculating overall Coulombs associated with each charging or discharging event and for each event, producing a timestamp and Coulombs associated with each event.

Abstract: An electronic device includes: a first processor; a load that operates with power supplied by a rechargeable battery; and a first sensor that obtains information on an output voltage of the rechargeable battery. The first processor determines whether the rechargeable battery is in a low usage state with regard to power supply by the rechargeable battery. Based on the information obtained by the first sensor, the first processor determines a degree of decrease in the output voltage over a period of time during which the rechargeable battery is determined to be in the low usage state. Based on the determined degree of decrease, the first processor detects a deterioration of the rechargeable battery.

Abstract: A semiconductor device that tests and/or monitors each of batteries provided in an assembled battery is provided. The semiconductor device includes a hysteresis comparator and a circuit, and the circuit has a function of setting a high-level side threshold voltage and a low-level side voltage of the hysteresis comparator. The circuit includes first and second capacitors. A first terminal of the first capacitor is electrically connected to a high-level side reference potential input terminal of the hysteresis comparator and a first terminal of the second capacitor is electrically connected to a low-level side reference potential input terminal of the hysteresis comparator.

Abstract: The present disclosure relates to an electronic load apparatus. An embodiment of the present disclosure includes an electronic load apparatus including: a measurement resistor, a reference circuit, a transistor, and a feedback circuit. The measurement resistor includes a first contact, a second contact, a third contact, and a fourth contact. The first contact and the second contact are located at a first end of the measurement resistor. The third contact and the fourth contact are located at a second end of the measurement resistor. A reference power (or a reference voltage) electrically connects to the reference circuit. The reference circuit and the first contact of the measurement resistor are electrically connected. The transistor includes a drain, a gate, and a source. The reference circuit and the gate of the transistor are electrically connected. One of the source and the drain of the transistor electrically connects to the second contact of the measurement resistor.

Abstract: A ground fault detection device includes: a detection capacitor; a switch group for switching between a first charging path connecting the battery and the detection capacitor, a second charging path connecting the battery, a negative side insulation resistance and the detection capacitor, a third charging path connecting the battery, a positive side insulation resistance and the detection capacitor, and a measurement path for measuring a charging voltage of the detection capacitor; and a controller configured to calculate the insulation resistance based on a charging voltage measured value of the detection capacitor which exists after charging each of the charging paths, wherein after measurement of the charging voltage of the second charging path, the controller is configured to cause the switch group to switch to the third charging path before switching to the first charging path.

Abstract: A method for determining a connection status of a device to a cable within a network environment is provided. The method comprises obtaining a signal from a non-data carrying wire of the cable by a detector that is digitally isolated from data transmitted in a data carrying wire of the cable within the network environment, modifying the signal transmitted by the non-data carrying wire to the device and evaluating the modified signal to determine a connection status of the device to the cable.

Abstract: Techniques for creating a low pass filter associated with a flux line are presented. A qubit device can comprise a first substrate and second substrate. A low pass filter, comprising at least one inductor and at least one capacitor can be formed, wherein respective components of or associated with the low pass filter can be formed on the first or second substrates, and wherein one or more bump bonds can extend between the substrates to connect respective components that are on respective substrates. The filter can receive an input signal via an input line and filter the signal to produce a filtered signal as output to a flux line that is in proximity to a coupler with SQUID loop and one or more flux-tunable qubits that are formed on one of the substrates. The filter can reduce electrical noise and Purcell decay associated with the flux line.

Abstract: The disclosed apparatus, systems and methods relate to interventional magnetic resonance imaging (iMRI). More specifically, clinical applications of the disclosed include magnetic resonance (MR) guided procedures such as endovascular interventions, percutaneous biopsies or deep brain stimulation.

Abstract: A selectively removable closure for closing the open end of an NMR sample tube having an open end and a closed end of the invention includes a cylindrical proximal first and a distal second portion, both portions substantially congruent to a central axis, the second portion has a hollow bore extending therethrough, the hollow bore has: a first and a second distal section, a central section and a proximal section. The first distal section has an inside diameter sized to accept the outside diameter of a preselected size NMR sample tube substantially without an interference, the second distal section has an interference that ends into the central section with a ramp with an angle to the central axis greater than 70 degrees, the central section corresponds in a locked position on the NMR sample tube with a locking ring at least partially surrounding the NMR locking tube to form a secondary locking seal.

Abstract: Methods for forming conformal magnetic resonance imaging (MRI) receive coil devices having at least one receive coil with at least one capacitor are provided and include providing a 3-dimensional (3D) mold structure matching a curvilinear shape of interest, and forming a receive coil pattern on an outer surface of the 3D mold structure. The forming of the receive coil pattern may include spraying and/or depositing a conductive material and a dielectric material on the outer surface of the mold structure to form the receive coil pattern. The forming a receive coil pattern may include forming the receive coil pattern on an outer surface of a flat substrate sheet, and vacuum forming an inner surface of the flat substrate sheet to the outer surface of the mold structure to form a shape-conforming substrate sheet. The shape-conforming substrate sheet may be removed from the mold and used in MRI studies.

Abstract: The nuclear magnetic resonance (NMR) system can have an interrogating subsystem comprising a superconducting path with an alternating plurality series of parallel back and forth segments collectively forming an interrogating surface adjacent the sample area, the interrogating subsystem configured for i) emitting an oscillating magnetic field B1 configured to disrupt a configuration of nuclear spins in the sample in a manner for the disrupted nuclear spins to generate a signal, and ii) receiving the signal.

Abstract: Some aspects comprise a tuning system configured to tune a radio frequency coil for use with a magnetic resonance imaging system comprising a tuning circuit including at least one tuning element configured to affect a frequency at which the radio frequency coil resonates, and a controller configured to set at least one value for the tuning element to cause the radio frequency coil to resonate at approximately a Larmor frequency of the magnetic resonance imaging system determined by the tuning system. Some aspects include a method of automatically tuning a radio frequency coil comprising determining information indicative of a Larmor frequency of the magnetic resonance imaging system, using a controller to automatically set at least one value of a tuning circuit to cause the radio frequency coil to resonate at approximately the Larmor frequency based on the determined information.