Patents Issued in August 20, 2024
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Patent number: 12066887Abstract: In some aspects, the techniques described herein relate to a system including: a memory device including a secure storage area; a server configured to generate cryptographic data and compute a cyclical redundancy check (CRC) value of the cryptographic data; and a manufacturer computing device configured to receive the cryptographic data and the CRC value and issue a command including the cryptographic data and the CRC value to the memory device, wherein the memory device is configured to compute a local CRC value using the cryptographic data in the command, compare the local CRC value to the CRC value, and write the cryptographic data to the secure storage area when the local CRC value matches the CRC value.Type: GrantFiled: August 12, 2022Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventor: Zhan Liu
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Patent number: 12066888Abstract: The technology disclosed herein comprises a processor; a memory to store data and a plurality of error correcting code (ECC) bits associated with the data; and a memory controller coupled to the memory, the memory controller to receive a write request from the processor and, when an access control field is selected in the write request, perform an exclusive OR (XOR) operation on the plurality of ECC bits and a fixed encoding pattern to generate a plurality of encoded ECC bits and store the data and the plurality of encoded ECC bits in the memory.Type: GrantFiled: September 14, 2022Date of Patent: August 20, 2024Assignee: Intel CorporationInventors: Sergej Deutsch, David M. Durham, Karanvir Grewal, Rajat Agarwal
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Patent number: 12066889Abstract: A storage device sharing a host memory of a host, the storage device includes a serial interface that exchanges data with the host, and a storage controller that stores buffering data in a host memory buffer allocated by the host through the serial interface. The storage controller performs error correction encoding and error correction decoding on the buffering data.Type: GrantFiled: April 25, 2021Date of Patent: August 20, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Kicheol Eom, Jaeho Sim, Dong-Ryoul Lee, Hyun Ju Yi, Hyotaek Leem
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Patent number: 12066890Abstract: A memory system uses error detection codes to detect when errors have occurred in a region of memory. A count of the number of errors is kept and a notification is output in response to the number of errors satisfying a threshold value. The notification is an indication to a host (e.g., a program accessing or managing a machine learning system) that the threshold number of errors have been detected in the region of memory. As long as the number of errors that have been detected in the region of memory remains under the threshold number no notification need be output to the host.Type: GrantFiled: March 25, 2022Date of Patent: August 20, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Sudhanva Gurumurthi, Ganesh Suryanarayan Dasika
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Patent number: 12066891Abstract: Methods, systems, and devices for memory operations are described. A read command may be received at a memory device from a host device. As part of an error control operation, a first set of error control bits may be generated for the set of data. Based on the first set of error control bits, a failure of a matching operation associated with the error control operation may be determined. Based on determining the failure of the matching operation, a second set of error control bits that is different than the first set of error control bits may be transmitted to the host device. The second set of error control bits may indicate that the matching operation failed at the memory device.Type: GrantFiled: August 16, 2022Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventor: Scott E. Schaefer
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Patent number: 12066892Abstract: An error associated with host data written to a page of a storage area of a memory sub-system is detected. A determination is made that parity data corresponding to the host data is stored in a cache memory of the memory sub-system. A data recovery operation is performed based on the parity data stored in the cache memory.Type: GrantFiled: March 15, 2023Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventors: Amit Bhardwaj, Naveen Bolisetty, Suman Kumari
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Patent number: 12066893Abstract: A semiconductor memory device includes a memory cell array, a link error correction code (ECC) engine and on-die ECC engine. The memory cell array includes a plurality of volatile memory cells. The link ECC engine provides a main data by performing a first ECC decoding on a first codeword including the main data and a first parity data, and generates a first error flag based on a result of the first ECC decoding. The on-die ECC engine generates a second parity data by performing a first ECC encoding on the main data, provides a target page of the memory cell array with a second codeword including the main data and the second parity data in response to the first error flag being deactivated or generates a third codeword by changing at least one of bits of the second codeword in response to the first error flag being deactivated.Type: GrantFiled: July 26, 2023Date of Patent: August 20, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungrae Kim, Kijun Lee, Myungkyu Lee, Yeonggeol Song, Jinhoon Jang, Sunghye Cho, Isak Hwang
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Patent number: 12066894Abstract: Provided is a storage system that performs inter-node movement of parity and reconfiguration of a stripe when a node configuration is changed. The storage system includes a plurality of nodes and a management unit, in which the nodes are targets for data write and read requests, form a stripe by a plurality of data stored in different nodes and parity generated based on the plurality of data, and store the parity of the stripe to which the data under the write request belongs in a node different from the plurality of nodes that store the plurality of data so as to perform redundancy; and the management unit transmits, to the node, an arrangement change request to perform the inter-node movement of the parity and the reconfiguration of the stripe when the node configuration is changed.Type: GrantFiled: April 24, 2023Date of Patent: August 20, 2024Assignee: HITACHI, LTD.Inventors: Takahiro Yamamoto, Hiroto Ebara, Takeru Chiba, Masakuni Agetsuma
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Patent number: 12066895Abstract: A method for proactively rebuilding user data in a plurality of storage nodes of a storage cluster is provided. The method includes distributing user data and metadata throughout the plurality of storage nodes such that the plurality of storage nodes can read the user data, using erasure coding, despite loss of two of the storage nodes. The method includes determining that one of the storage nodes is unreachable and determining to rebuild the user data for the one of the storage nodes that is unreachable. The method includes reading the user data across a remainder of the plurality of storage nodes, using the erasure coding and writing the user data across the remainder of the plurality of storage nodes, using the erasure coding. A plurality of storage nodes within a single chassis that can proactively rebuild the user data stored within the storage nodes is also provided.Type: GrantFiled: February 27, 2023Date of Patent: August 20, 2024Assignee: PURE STORAGE, INC.Inventors: John Hayes, John Colgrove, Robert Lee, Igor Ostrovsky, Joshua Robinson
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Patent number: 12066896Abstract: A method may include operating a first storage device and a second storage device as a redundant array configured to use parity information to recover information from a faulty storage device, operating the first storage device in a fault resilient mode with at least partial read capability based on a fault condition of the first storage device, and rebuilding information from the first storage device in a parity space of the second storage device. Rebuilding the information from the first storage device in the parity space of the second storage device may include copying the information from the first storage device to the parity space of the second storage device. The method may further include copying the rebuilt information from the parity space of the second storage device to a replacement storage device.Type: GrantFiled: April 9, 2021Date of Patent: August 20, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yang Seok Ki, Sungwook Ryu
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Patent number: 12066897Abstract: Techniques are provided for persistent memory file system reconciliation. As part of the persistent memory file system reconciliation, high level file system metadata associated with a persistent memory file system of persistent memory is reconciled. Client access to the persistent memory file system is inaccessible until reconciliation of the high level file system metadata has completed. A first scanner is executed to traverse pages of the persistent memory in order to fix local inconsistencies associated with the pages. A local inconsistency of a first set of metadata or data of a page is fixed using a second set of metadata or data of the page. The first scanner is executed asynchronously in parallel with processing client I/O directed to the persistent memory file system.Type: GrantFiled: April 18, 2023Date of Patent: August 20, 2024Assignee: NetApp, Inc.Inventors: Matthew Fontaine Curtis-Maury, Ram Kesavan, Ananthan Subramanian, Abdul Basit, Vinay Devadas, Yash Hetal Trivedi
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Patent number: 12066898Abstract: A distributed agent for backup and restoration of virtual machines collects backup data and meta-data. The distributed agent includes an agent inside a virtual machine and an agent outside the virtual machine. The two kinds of agents communicate with each other to collect data of different types used to backup and restore virtual machines.Type: GrantFiled: March 30, 2021Date of Patent: August 20, 2024Assignee: Acronis International GmbHInventors: Victor Batraev, Serguei Beloussov, Stanislav Protasov
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Patent number: 12066899Abstract: Examples are disclosed that relate to backing up data objects. One example provides, at a computing device, a method, comprising detecting one or more conditions triggering backup of a data object, and in response to detecting the one or more conditions, accessing the data object to retrieve, from metadata associated with the data object, instructions for backing up the data object. The method further comprises executing one or more backup sequences specified by the instructions in which at least a portion of the data object is backed up to one or more storage devices.Type: GrantFiled: June 1, 2021Date of Patent: August 20, 2024Assignee: BREAKTHROUGH APPLICATIONS LLCInventor: Tyler Fitzsimons
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Patent number: 12066900Abstract: Managing disaster recovery to a cloud computing environment, including: receiving recovery objectives associated with a dataset that is stored in a primary storage system; creating a cloud-based storage system; suspending the cloud-based storage system; and resuming, periodically and based on the recovery objectives, the cloud-based storage system, including refreshing a copy of the dataset that is maintained by the cloud-based storage system.Type: GrantFiled: October 15, 2021Date of Patent: August 20, 2024Assignee: PURE STORAGE, INC.Inventors: Gregory Schultz, Naveen Neelakantam
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Patent number: 12066901Abstract: A determination is made that a backup of a database in an availability group provided by a relational database management system (RDBMS) should be performed. The availability group includes a node functioning as a primary node and hosting a primary replica of the database and one or more other nodes functioning as secondary nodes and hosting secondary replicas of the database. The availability group is a clusterless availability group in which the one or more other nodes functioning as secondary nodes are not available as automatic failover targets should the primary node become unavailable. A command is issued to a node in the availability group to obtain a globally unique identifier (GUID) of the availability group. The node is instructed to index a backup of the database against the GUID of the availability group.Type: GrantFiled: January 21, 2021Date of Patent: August 20, 2024Assignee: EMC IP Holding Company LLCInventors: Bharat Bhushan, Niketan Kalaskar
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Patent number: 12066902Abstract: A method for recovering data from a database, the method performed by a device having a processor, the method including encrypting information stored in the database using an encrypting cryptographic key, sending encrypted information associated with a specific entity to a remote device associated with the specific entity, where the remote device lacks access to a decrypting cryptographic key enabled to decrypt the information associated with a specific entity, upon failure of the database, sending the encrypted information associated with the specific entity from the remote device to a recovering server, and decrypting the encrypted information by the recovering server.Type: GrantFiled: November 17, 2021Date of Patent: August 20, 2024Assignee: Coinbase IL RD Ltd.Inventors: Guy Pe'er, Nir Steinherz, Elena Gorelikov, Valery Osheter, Danny Tabak
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Patent number: 12066903Abstract: In some examples, a system sends a transaction to a database server to cause storing of data of the transaction in a cache of the database server, where the data in the cache is for inclusion in a backup of data from the database server to a remote data store (e.g., the backup may be in a cloud and may be a snapshot). The system detects a failure associated with the database server, and in response to detecting the failure, requests, from the database server or a replacement database server, transaction information of at least one transaction that was successfully applied to the remote data store, the transaction information based on the backup of data. The system causes replay one or more transactions to recover data at the database server or the replacement database server, to perform recovery of the database server or the replacement database server to a current state.Type: GrantFiled: December 19, 2019Date of Patent: August 20, 2024Assignee: Teradata US, Inc.Inventor: Donald Raymond Pederson
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Patent number: 12066904Abstract: Methods and systems for improving the performance of a primary system that is running one or more virtual machines and capturing snapshots of the one or more virtual machines over time are described. The performance penalty on the primary system when a hypervisor running the one or more virtual machines is used to capture the snapshots of the one or more virtual machines may be reduced by leveraging storage array snapshots to reduce the amount of time that the hypervisor must freeze virtual disks of the one or more virtual machines. In this case, changed block tracking information for changed data blocks associated with the snapshots may be acquired from the hypervisor and the changed data blocks themselves may be pulled from the storage array snapshots without requiring the hypervisor to keep the virtual disks of the one or more virtual machines in a frozen state.Type: GrantFiled: January 14, 2022Date of Patent: August 20, 2024Assignee: Rubrik, Inc.Inventors: Garvit Juniwal, Arvind Nithrakashyap
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Patent number: 12066905Abstract: Disclosed is an operating method of a storage device which includes a plurality of nonvolatile memory chips. The method includes providing, at the storage device, information of a capacity of each of the plurality of nonvolatile memory chips to an external host device, receiving, at the storage device, information of a plurality of groups from the external host device, performing a reset after receiving the information of the plurality of groups, mapping, at the storage device, the plurality of nonvolatile memory chips with the plurality of groups, and configuring the plurality of nonvolatile memory chips so as to correspond to the plurality of groups, after performing the reset.Type: GrantFiled: October 27, 2021Date of Patent: August 20, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Sangwon Jung, Mincheol Kwon
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Patent number: 12066906Abstract: The present disclosure generally relates to managing a failover service. The failover service can receive a list of regions and a list of rules that must be satisfied for a region to be considered available for failover. The failover service can then determine the regions that satisfy each rule of the list of rules and are available for failover. The failover service can then deliver this information to a client. The failover service can determine the regions that do not satisfy one or more of the rules from the list of rules and deliver this information to a client. The failover service can perform automatic remediation to the unavailable failover regions and client remediation to the unavailable failover regions.Type: GrantFiled: July 25, 2022Date of Patent: August 20, 2024Assignee: Amazon Technologies, Inc.Inventors: Nathan Dye, Colm MacCarthaigh, Narjala Prakash Bhasker, Mikhail Ivanovich Golovnykh
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Patent number: 12066907Abstract: The disclosed technology enables quicker initialization of a new master node for a cluster when a previous master node fails by tracking node state in the cluster prior to being designated the new master node. In a particular example, a method includes, in a first node, designated as a current master node for the cluster, managing the cluster based on states of the nodes determined by the first node. While the first node is designated the master node, the method includes each of the nodes collecting, and storing locally, the states of the nodes. In response to a failure of the first node, the method includes selecting a second node of the nodes a new master node. Upon being designated the new master node, the method includes the second node managing the cluster of nodes based on the states of the nodes that the second node collected and stored locally.Type: GrantFiled: April 28, 2023Date of Patent: August 20, 2024Assignee: NetApp, Inc.Inventors: Daniel McCarthy, Lisa Week
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Patent number: 12066908Abstract: A hardware failure prediction and avoidance system executing on a unified endpoint management platform information handling system comprising a network interface device (NID) to receive failed operational telemetries for client devices including power and software analytics, and event viewer error logs, and an error associated with a hardware type, a processor to execute a classification supervised learning algorithm on the failed operational telemetries to determine that a hardware or software configuration will likely co-occur with a future error of the hardware type, identify the hardware or software configuration as problematic, the processor to identify the problematic system configuration in a current operational telemetry by correlating the current operational telemetry with a portion of the failed operational telemetries, and the NID to transmit a recommendation to the first client device to adjust the problematic system configuration in order to avoid occurrence of the error at the first client devicType: GrantFiled: July 29, 2022Date of Patent: August 20, 2024Assignee: DELL PRODUCTS LPInventors: Deeder M. Aurongzeb, Malathi Ramakrishnan, Parminder Singh Sethi
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Patent number: 12066909Abstract: A method includes determining, by an analysis system, a system aspect of a system for a mitigation evaluation. The method further includes determining, by the analysis system, at least one evaluation perspective and at least one evaluation viewpoint for use in performing the mitigation evaluation on the system aspect. The method further includes obtaining, by the analysis system, mitigation evaluation data regarding the system aspect in accordance with the at least one evaluation perspective and the at least one evaluation viewpoint. The method further includes calculating, by the analysis system, a mitigation evaluation rating as a measure of mitigation maturity for the system aspect based on the mitigation evaluation data, the at least one evaluation perspective, the at least one evaluation viewpoint, and at least one evaluation rating metric.Type: GrantFiled: April 30, 2023Date of Patent: August 20, 2024Assignee: UncommonX Inc.Inventors: Raymond Hicks, Ryan Michael Pisani, Thomas James McNeela
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Patent number: 12066910Abstract: A system performs group testing on a population of items. The group testing identifies items satisfying particular criteria from a population of items, for example, defective items from the population. The group testing may be performed for software or hardware testing, for testing a human population, for training of deep learning applications, and so on. The system trains a machine learning based model, for example, a reinforcement learning based model to evaluate groups. The model may further determine system dynamics that may represent priors of items. An agent treats the population and groups of items being tested as the environment and performs actions, for example, adjusting the groups. The system also performs a non-adaptive strategy based on monte carlo simulation of tests based on a simulation results.Type: GrantFiled: October 11, 2021Date of Patent: August 20, 2024Assignee: Salesforce, Inc.Inventors: Lav Raj Varshney, Yingbo Zhou, Caiming Xiong, Govardana Sachithanandam Ramachandran
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Patent number: 12066911Abstract: The present disclosure relates to a method for testing the operation of a target computer system constrained by a set of timed requirements. For each of a plurality of subsets of the set, the method includes: searching for a witness trace satisfying a criterion for detecting a conflict between timed requirements of the subset; when a witness trace is found: searching for a contradicting timed requirement among the timed requirements of the set which are not present in the subset; when a contradicting timed requirement is found: adding the contradicting timed requirement to the incremental subset. An inconsistency of the operation of the target computer system is detected when a witness trace is found for and no contradicting timed requirement is found.Type: GrantFiled: April 28, 2021Date of Patent: August 20, 2024Assignee: Mitsubishi Electric CorporationInventors: Reiya Noguchi, Thierry Jeron, Nicolas Markey, Ocan Sankur
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Patent number: 12066912Abstract: Information as to a group of devices which are part of a monitoring system, can be accumulated in one or more databases. The databases can be addressed via a computer network, such as the Internet. Monitoring systems can access one or more of the databases seeking identification of those devices that correspond to a selected criterion. A database can provide serial numbers of devices that meet the selected criteria. The respective monitoring system can determine if any local devices have serial numbers that match the received serial numbers. A trouble indicator can be generated in response thereto.Type: GrantFiled: May 17, 2022Date of Patent: August 20, 2024Assignee: Honeywell International Inc.Inventor: Daniele Iurissevich
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Patent number: 12066913Abstract: A first storage controller includes a first input and output controller performs input and output processing on host data, and a first management controller. A second storage controller includes a second input and output controller performs input and output processing on host data, and a second management controller. The first management controller is configured to verify software to be executed by the first management controller and software to be executed by the first input and output controller. The second management controller is configured to verify software to be executed by the second management controller and software to be executed by the second input and output controller. The first management controller is configured to verify the software to be executed by the second input and output controller in place of the second management controller when a failure is detected from the second management controller.Type: GrantFiled: March 7, 2022Date of Patent: August 20, 2024Assignee: HITACHI, LTD.Inventor: Madoka Fukushima
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Patent number: 12066914Abstract: Systems and methods are disclosed for enabling a memory sub-system to perform firmware-based monitoring of system state information without adding latency to the memory sub-system. The memory sub-system controller can include multiple CPUs which can be employed to perform different tasks. The memory sub-system controller can employ one of the frontend CPUs as a monitoring CPU capable of executing a data-gathering task to retrieve system state information from another CPU.Type: GrantFiled: September 1, 2021Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventors: Andrei Konan, Byron D. Harris
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Patent number: 12066915Abstract: A computerized method is disclosed for retraining machine learning models based on user feedback. The method includes receiving user feedback indicating a change is to be made to an assignment of one or more alerts, wherein the one or more alerts were assigned by a machine learning model implementing a distance metric, wherein an issue is a grouping of at least one alert, constructing a convex optimization procedure to minimize an adjustment of weights of the distance metric, retraining the machine learning model by adjusting the weights of the distance metric in accordance with the convex optimization procedure, and evaluating one or more subsequently received alert using the retrained machine learning model. Changes to be made to the assignment include any of merging of two issues, splitting of two issues based on time or an alert field, or reassignment of an alert from a first issue to a second issue.Type: GrantFiled: January 31, 2022Date of Patent: August 20, 2024Assignee: Splunk Inc.Inventors: William Deaderick, William Stanton, Thomas Camp Vieth
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Patent number: 12066916Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, another device can be coupled to a memory device with an embedded sensor. The memory device can transmit a signal representing sensor data generated by the embedded sensor using a sensor output coupled to the other device. A controller coupled to a memory device may determine one or more threshold values of a sensor or sensors embedded in a memory device. The memory device may transmit an indication responsive to one or more sensors detecting a value greater or less than a threshold and may transmit the indication to another device.Type: GrantFiled: December 15, 2022Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventors: Cheryl M. O'Donnell, Erica M. Gove, Zahra Hosseinimakarem, Debra M. Bell, Roya Baghi
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Patent number: 12066917Abstract: Techniques described herein can monitor various data metrics. The auto-insight techniques can further detect and rank data segments that contributed to, or counteracted, shifts in data and detect when such shifts occurred. Thus, the techniques described herein can detect and identify root causes in shifts in different metrics. The techniques include pruning and ranking causes to identify the root causes and identify non-relevant factors, as well.Type: GrantFiled: May 16, 2023Date of Patent: August 20, 2024Assignee: Snowflake Inc.Inventors: Christian Kleinerman, Christopher F. Pouliot, Jacobus J. P. Van Ryswyck
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Patent number: 12066918Abstract: Systems and/or techniques for facilitating online-monitoring of machine learning models are provided. In various embodiments, a system can receive monitoring settings associated with a machine learning model to be monitored. In various cases, the monitoring settings can identify a first set of data features that are generated as output by the machine learning model. In various cases, the monitoring settings can identify a second set of data features that are received as input by the machine learning model. In various aspects, the system can compute a first set of statistical metrics based on the first set of data features. In various cases, the first set of statistical metrics can characterize a performance quality of the machine learning model. In various instances, the system can compute a second set of statistical metrics based on the second set of data features.Type: GrantFiled: March 6, 2023Date of Patent: August 20, 2024Assignee: PAYPAL, INC.Inventors: Lokesh Nyati, Jonathan Doering, Sruthi Yapalapalli, Sriharsha Vogeti
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Patent number: 12066919Abstract: Techniques for validating data in shared environments are disclosed. In some embodiments, a system monitors data during data entry windows and sends notifications when potential a data corruption event is detected. Users may identify what data to monitor by registering queries with the system. During the registration process, the system may execute the query to determine an expected query result. The system may then execute the query one or more additional times during the data entry window to determine whether a subsequent query result diverges from the expected result. If so, then the system may trigger a notification that identifies the potential data corruption event. Users may define notification lists for registered queries to identify recipients of the event notifications, which may span members of multiple teams in a development environment.Type: GrantFiled: September 13, 2021Date of Patent: August 20, 2024Assignee: Oracle International CorporationInventors: Miguel Lara, David Alberto Lopez Apodaca, Jorge Ernesto Diaz Verdin, Anil Verma
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Patent number: 12066920Abstract: The technology described herein provides an automated software-testing platform that uses reinforcement learning to discover how to perform tasks used in testing. The technology described herein is able to perform quality testing even when prescribed paths to completing tasks are not provided. The reinforcement-learning agent is not directly supervised to take actions in any given situation, but rather learns which sequences of actions generate the most rewards through the observed states and rewards from the environment. In the software-testing environment, the state can be user interface features and actions are interactions with user interface elements. The testing system may recognize when a sought after state is achieved by comparing a new state to a reward criteria.Type: GrantFiled: June 30, 2022Date of Patent: August 20, 2024Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Xiaoyan Liu, Steve K. Lim, Taylor Paul Spangler, Kashyap Maheshkumar Patel, Marc Mas Mezquita, Levent Ozgur, Timothy James Chapman
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Patent number: 12066921Abstract: Disclosed are systems, computer-readable media and methods for monitoring performance data across microservices. One example method includes establishing a service policy configured on a centralized switch controller, applying the service profile to a virtual interface associated with a microservice, mapping a microservice name for the microservice to an IP address and a port number, tracking a protocol flow for the microservice, wherein the protocol flow is associated with a virtual switch, to yield data, aggregating the data to yield aggregated data and presenting the aggregated data on a user interface.Type: GrantFiled: February 27, 2023Date of Patent: August 20, 2024Assignee: Cisco Technology, Inc.Inventors: Kiran Chunduri, Rajasekhar Manam
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Patent number: 12066922Abstract: A system including one or more processors and one or more non-transitory computer-readable media storing computing instructions configured to run on the one or more processors and perform: onboarding data received from one or more entities to create a version of an artifact of a first distributed architecture; periodically running one or more test cases using the version of the artifact in an environment; detecting a modification to the version of the artifact; automatically generating a modified version of the artifact incorporating the modification; selecting a first artifact from the list of one or more artifacts associated with the first distributed architecture, wherein the first artifact comprises an internet protocol (IP) address; deploying the first artifact, by using the IP address, into a networking sandbox to implement changes to the first artifact corresponding to a particular objective; and building a second artifact. Other embodiments are disclosed.Type: GrantFiled: August 19, 2021Date of Patent: August 20, 2024Assignee: WALMART APOLLO, LLCInventors: Sapna Balan, Pradeep Sekhar, Dileep Kumar Gidwani, Deepak Tiwari, Manoj Kumar Chowdhury
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Patent number: 12066923Abstract: Methods and systems for testing of at least one computer application include receiving from a user a monitoring request; selecting a script; performing at least one automation test with at least one automation application; requesting analytic data from at least one computer application; receiving analytic data associated with the at least one computer application; determining response data of the at least one computer application by inputting the analytic data to a comparison model determined based on an analysis technique configured to detect a failure by the at least one computer application; and generating a report based on an output of the analysis technique if the failure by the at least one computer application is detected.Type: GrantFiled: February 4, 2022Date of Patent: August 20, 2024Assignee: Fidelity Information Services, LLCInventors: Venkatasubramanian Namachivayam, Shanmuga Priya Mariappan, Thirupathipandian Govindaraj, Krishna Kumar Jayendran, Santhosh Bs, Naveen Chander Easwaramoorthy
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Patent number: 12066924Abstract: Disclosed are a vehicle infotainment test device and a method thereof. The vehicle infotainment test device includes: a storage that stores a test case for each module constituting a vehicle infotainment system, a test agent that manages input data and output data of each module, and a controller that applies the test case to each module by interworking with the test agent, and verifies the output data of each module received from the test agent based on the test case for each module.Type: GrantFiled: April 28, 2022Date of Patent: August 20, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventor: Seong Un Kim
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Patent number: 12066925Abstract: A method for providing integration test monitoring and management is disclosed. The method includes receiving, via an application programming interface, an integration contract, the integration contract relating to a dependency agreement between applications; mapping a dependency for each of the applications based on the integration contract; receiving, via the application programming interface, a request that relates to a regression testing request for an application; identifying a test from a test suite based on the request and a result of the mapping; automatically initiating, via an integration layer, the identified test based on a predetermined parameter; and capturing, via an application programming interface, a test result that corresponds to the automatically initiated test.Type: GrantFiled: November 14, 2022Date of Patent: August 20, 2024Assignee: JPMORGAN CHASE BANK, N.A.Inventors: Dan Herington, Russell E Colwell, David M Lin, Maureen Loach
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Patent number: 12066926Abstract: According to one implementation of the present disclosure, an integrated circuit includes comparator circuitry coupled to peripheral circuitry of a multiport memory and configured to transmit one or more data input signals or one or more write enable signals to respective memory outputs when a memory address collision is detected for one or more respective bitcells of the multi-port memory. In another implementation, a method comprises: detecting a read operation and a write operation to a same memory bitcell of a multiport memory in one clock cycle and in response to the detection, performing the read operation of a data input signal or a write enable signal of the multiport memory.Type: GrantFiled: July 8, 2022Date of Patent: August 20, 2024Assignee: Arm LimitedInventors: Andy Wangkun Chen, Yew Keong Chong, Sriram Thyagarajan
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Patent number: 12066927Abstract: Methods, systems, and devices for adaptive user defined health indications are described. A host device may be configured to dynamically indicate adaptive health flags for monitoring health and wear information for a memory device. The host device may indicate, to a memory device, a first index. The first index may correspond to a first level of wear of a set of multiple indexed levels of wear for the memory device. The memory device may determine that a metric of the memory device satisfies the first level of wear and indicate, to the host device, that the first level of wear is satisfied. The host device may receive the indication that the first level of wear is satisfied and indicate, to the memory device, a second level of wear of the set of indexed levels of wear that is different than the first level of wear.Type: GrantFiled: January 5, 2023Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventors: Aaron P. Boehm, Todd Jackson Plum, Mark D. Ingram, Scott E. Schaefer, Scott D. Van De Graaff
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Patent number: 12066928Abstract: A memory system that includes a system protection function implemented by using a double-map scheme, a memory controller, and operation methods thereof are disclosed. The memory system includes a memory device and a memory controller. The memory device includes a plurality of nonvolatile memory cells corresponding to a plurality of physical addresses respectively. The memory controller controls the memory device and uses a first map and a second map. The first map includes physical address mapping information based on a logical address for a physical address where first-type data is stored. The second map includes physical address mapping information based on a logical address for a physical address where second-type data is stored.Type: GrantFiled: January 6, 2023Date of Patent: August 20, 2024Assignee: SK HYNIX INC.Inventor: Eu Joon Byun
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Patent number: 12066929Abstract: Techniques for address translation can include: performing first processing that maintains a first storage tier including first metadata pages of a hierarchical structure, and performing second processing that maintains a second storage tier including second metadata pages of the hierarchical structure. The first processing can include storing updated versions of the first metadata pages in place at static physical addresses of the first storage tier. The second processing can include storing updated versions of the second metadata pages at new physical storage locations. Prior to updating the second metadata pages, prior versions of the second metadata pages can be stored at other physical storage locations of the second storage tier, where the other physical storage location are different from the new physical storage locations. The first storage tier can be a non-parity RAID configuration such as RAID-1. The second storage tier can be a parity configuration such as RAID-5.Type: GrantFiled: July 18, 2022Date of Patent: August 20, 2024Assignee: Dell Products L.P.Inventors: Vladimir Shveidel, Amitai Alkalay
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Patent number: 12066930Abstract: A journal count reflecting a number of logical-to-physical (L2P) journals written to a non-volatile memory device is maintained, wherein each L2P journal is associated with one or more updates to an L2P address mapping table. In response to determining that the journal count satisfies a threshold criterion, a first section of a plurality of sections of the L2P address mapping table is identified, wherein the plurality of sections of the L2P address mapping table is cached in a volatile memory device. The first section of the L2P address mapping table is written to the non-volatile memory device.Type: GrantFiled: May 23, 2023Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventors: Byron Harris, Daniel Boals, Abedon Madril
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Patent number: 12066931Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.Type: GrantFiled: June 28, 2023Date of Patent: August 20, 2024Assignee: Kioxia CorporationInventors: Hideki Yoshida, Shinichi Kanno
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Patent number: 12066932Abstract: The present disclosure describes flash controller for reading data from a flash memory device. A flash memory controller can include a controller storage and one or more processors. The one or more processors are configured to: receive a request for data stored in flash memory dies. The request includes a logical address of the data and at least one flash memory die of the flash memory dies includes one or more on-die static random access memory (SRAM) storage devices. The one or more processors are further configured to: identify an on-die SRAM storage device containing logical-to-physical (L2P) information; search the L2P information to obtain a physical address of the data that corresponds to the logical address; and retrieve the data from a flash memory array of corresponding flash memory die using the physical address.Type: GrantFiled: July 11, 2023Date of Patent: August 20, 2024Assignee: Yangtze Memory Technologies Co., Ltd.Inventor: Ken Hu
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Patent number: 12066933Abstract: Systems and methods are described for a streamlined garbage collection process during which data integrity checking is also performed for a distributed key-value (KV) store utilized by a distributed storage management system. According to one embodiment, by making use of full or truncated block IDs (rather than an intermediate probabilistic data structure, such as a Bloom filter) for garbage collection, data integrity checking can be performed concurrently almost for free. During garbage collection, a block ID compare list is compared to block IDs within the distributed KV store. If a particular block ID is present in the distributed KV store but is missing from the block ID compare list, the corresponding data block represents garbage to be collected. If the particular block ID is present in the block ID compare list but missing from the distributed KV store, a data integrity error has been identified.Type: GrantFiled: February 25, 2022Date of Patent: August 20, 2024Assignee: NetApp, Inc.Inventors: Wei Sun, Mark David Olson, Anil Paul Thoppil
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Patent number: 12066934Abstract: A memory system includes a memory device suitable for storing data and a controller suitable for determining an operation state of the memory device and carrying out garbage collection to the memory device in response to the operation state. The controller can ignore a first command entered from a host while performing the garbage collection.Type: GrantFiled: December 14, 2022Date of Patent: August 20, 2024Assignee: SK hynix Inc.Inventor: Se-Hyun Kim
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Patent number: 12066935Abstract: A central processing unit (CPU) system including a CPU core can include an adaptive cache compressor, which is capable of monitoring a miss profile of a cache. The adaptive cache compressor can compare the miss profile to a miss threshold. Based on this comparison, the adaptive cache compressor can determine whether to enable compression of the cache.Type: GrantFiled: March 16, 2022Date of Patent: August 20, 2024Assignee: International Business Machines CorporationInventors: Bulent Abali, Alper Buyuktosunoglu, Brian Robert Prasky, Deanna Postles Dunn Berger
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Patent number: 12066936Abstract: An example cache memory includes a schedule module, control modules, a datapath, and an output module. The cache memory receives requests to read and/or write cache lines. The schedule module maintains a queue of the requests. The schedule module may assign the requests to the control modules based on the queue. A control module, which receives a request, controls the datapath to execute the request, i.e., to read or write the cache line. The control module can control the execution by the datapath from start to end. Multiple control modules may control parallel executions by the datapath. The output module outputs, e.g., to a processor, responses of the cache memory to the requests after the executions. A response may include a cache line. The cache memory may include a buffer that temporarily stores cache lines before the output to avoid deadlock in the datapath during the parallel executions of requests.Type: GrantFiled: March 21, 2022Date of Patent: August 20, 2024Assignee: Habana Labs Ltd.Inventors: Ehud Eliaz, Eitan Joshua, Yori Teichman, Ofer Eizenberg