Abstract: Software builds can be constructed according to previously recorded software repository metadata. For example, a computing device can record, by a first application programming interface, metadata for a software repository at various times. The metadata can include a timestamp indicating a time that the metadata was recorded. The computing device can receive a metadata request for metadata for the software repository at a particular time. The first application programming interface can determine a latest timestamp that precedes the particular time. The computing device can provide the client device with access to the metadata associated with the latest timestamp for use in producing a software build having characteristics of the metadata at the particular time.

Abstract: Described are systems and methods for client side enrichment and transform via dynamic logic for analytics across various platforms for improved performance, features, and uses. Analytics data collected in client applications is transformed and enriched before being sent to the downstream pipeline using native code and logic bundled into the core application code. The additional logic specific to manipulation of analytics may be unbundled from client-side application code and still be executed on on-device to achieve the same result. The logic may be written in a single language, such as JavaScript, and run across all clients including web browser and mobile operating systems.

Abstract: Embodiments are directed to systems and methods for reuse of FMA execution unit hardware logic to provide native support for execution of get exponent, get mantissa, and/or scale instructions within a GPU. These new instructions may be used to implement branch-free emulation algorithms for mathematical functions and analytic functions (e.g., transcendental functions) by detecting and handling various special case inputs within a pre-processing stage of the FMA execution unit, which allows the main dataflow of the FMA execution unit to be bypassed for such special cases. Since special cases are handled by the FMA execution unit, library functions emulating various functions, including, but not limited to logarithm, exponential, and division operations may be implemented with significantly fewer lines of machine-level code, thereby providing improved performance for HPC applications.

Abstract: Methods and systems relating to improved processing architectures with pre-staged instructions are disclosed herein. A disclosed processor includes a memory, at least one functional processing unit, a bus, a set of instruction registers configured to be loaded, using the bus, with a set of pre-staged instructions from the memory, and a logic circuit configured to provide the set of pre-staged instructions from the set of instruction registers to the at least one functional processing unit in response to receiving an instruction from the instruction memory.

Abstract: Techniques related to executing instructions by a processor comprising receiving a first instruction for execution, determining a first latency value based on an expected amount of time needed for the first instruction to be executed, storing the first latency value in a writeback queue, beginning execution of the first instruction on the instruction execution pipeline, adjusting the latency value based on an amount of time passed since beginning execution of the first instruction, outputting a first result of the first instruction based on the latency value, receiving a second instruction, determining that the second instruction is a variable latency instruction, storing a ready value indicating that a second result of the second instruction is not ready in the writeback queue, beginning execution of the second instruction on the instruction execution pipeline, updating the ready value to indicate that the second result is ready, and outputting the second result.

Abstract: A packet-processing method includes looking up a first match-action table on a network interface card (NIC) for a received packet; in response to finding a matching entry indicating an action, queuing the received packet in a first queue and storing the action data in an instruction memory; and responsive to not finding a matching entry, queuing the received packet in the first queue and a second queue. The method includes selecting a first packet from the first queue for processing, which comprises performing a corresponding action stored in the instruction memory; selecting a second packet from the second queue for processing, which comprises forwarding a portion of the second packet to a processor, which looks up a second match-action table; and receiving, from the processor, a lookup result, thereby allowing a third packet in the first queue corresponding to the second packet to be processed based on the lookup result.

Abstract: Techniques are disclosed relating to load value prediction. In some embodiments, a processor includes learning table circuitry that is shared for both address and value prediction. Loads may be trained for value prediction when they are eligible for both value and address prediction. Entries in the learning table may be promoted to an address prediction table or a load value prediction table for prediction, e.g., when they reach a threshold confidence level in the training table. In some embodiments, the learning table stores a hash of a predicted load value and control circuitry uses a probing load to retrieve the actual predicted load value for the value prediction table.

Abstract: A processor may include a bias prediction circuit and an instruction prediction circuit to provide respective predictions for a conditional instruction. The bias prediction circuit may provide a bias prediction whether a condition of the conditional instruction is biased true or biased false. The instruction prediction circuit may provide an instruction prediction whether the condition of the conditional instruction is true of false. Responsive to a bias prediction that the condition of the conditional instruction is biased true or biased false, the processor may use the bias prediction from the bias prediction circuit to speculatively process the conditional instruction. Otherwise, the processor may use the instruction prediction from the instruction prediction circuit to speculatively process the conditional instruction.

Abstract: Processing circuitry has a handler mode and a thread mode. In response to an exception condition, a switch to handler mode is made. In response to an intermodal calling branch instruction specifying a branch target address when the processing circuitry is in the handler mode, an instruction decoder controls the processing circuitry to save a function return address to a function return address storage location; switch a current mode of the processing circuitry to the thread mode; and branch to an instruction identified by the branch target address. This can be useful for deprivileging of exceptions.

Abstract: Systems, apparatuses, and methods for implementing a low power parallel matrix multiply pipeline are disclosed. In one embodiment, a system includes at least first and second vector register files coupled to a matrix multiply pipeline. The matrix multiply pipeline comprises a plurality of dot product units. The dot product units are configured to calculate dot or outer products for first and second sets of operands retrieved from the first vector register file. The results of the dot or outer product operations are written back to the second vector register file. The second vector register file provides the results from the previous dot or outer product operations as inputs to subsequent dot or outer product operations. The dot product units receive the results from previous phases of the matrix multiply operation and accumulate these previous dot or outer product results with the current dot or outer product results.

Abstract: Techniques and architecture are described for validating and verifying iPXE scripts prior to execution during a booting process. During the booting process of a network device, right after the UEFI/BIOS stage of the booting process, a trusted iPXE script may make a request to a network server for the ownership voucher and owner certificate of the network device. The ownership voucher and owner certificate may then be stored in a trusted platform module (TPM) on the network device. In configurations, the retrieved owner certificate may be validated by the ownership voucher. The owner certificate may be used to validate iPXE scripts. Once validated, the iPXE scripts may be executed and the booting process may be continued to the kernel loading step and the application loading step. During a subsequent booting process of the network device, the ownership voucher and owner certificate may be retrieved from the TPM.

Abstract: An information handling system includes a memory, and a basic input/output system (BIOS). The BIOS receives a request to map multiple processor cores to multiple integrated memory controllers of a multiple core processor. In response to the reception of the request, the BIOS calculates a different latency for each of the processor cores. Based on the calculated different latency for each of the processor cores, the BIOS assigns mapping priority levels to the processor cores of the multiple core processor. Based on the mapping priority levels, the BIOS maps each of the processor cores to an associated one of the integrated memory controllers. The BIOS stores the map of the processor cores in the memory.

Abstract: A baseboard management controller in a multi-processor system may perform operations including: identifying a partitioning mode (partitioned state or unified state) to implement on the multi-processor system having first and second central processing units (CPUs) located on a single motherboard; accessing, in response to the partitioned state, a first partitioned node configuration (P1C) for a first partitioned node (P1) and a second partitioned node configuration (P2C) for a second partitioned node (P2), wherein P1C identifies a first firmware interface level (F1L) and a first operating system to be used by P1, and wherein P2C identifies a second firmware interface level (F2L) and a second operating system to be used by P2; and causing the first CPU to load a first firmware interface having the identified F1L identified in the P1C and causing the second CPU to load a second firmware interface having the F2L identified in the P2C.

Abstract: Configurations for communication interfaces are disclosed. In at least one embodiment, a processor includes one or more circuits to determine a firmware configuration for one or more server components and to transmit the firmware configuration at startup.

Abstract: Using multiple overlays with a data processing array includes loading an application in a data processing array. The data processing array includes a plurality of compute tiles each having a processor. The application specifies kernels executable by the processors and implements stream channels that convey data to the plurality of compute tiles. During runtime of the application, a plurality of overlays are sequentially implemented in the data processing array. Each overlay implements a different mode of data movement in the data processing array via the stream channels. For each overlay implemented, a workload is performed by moving data to the plurality of compute tiles based on the respective mode of data movement.

Abstract: Web-based robotic process automation (RPA) designer systems that allow RPA developers to design and implement web serverless automations, user interface (UI) automations, and other automations are disclosed. Such web-based RPA designer systems may allow a developer to sign in through the cloud and obtain a list of template projects, developer-designed projects, services, activities, etc. Thus, RPA development may be centralized and cloud-based, reducing the local processing and memory requirements on a user's computing system and centralizing RPA designer functionality, enabling better compliance. Automations generated by the web-based RPA designer systems may be deployed and executed in virtual machines (VMs), containers, or operating system sessions.

Abstract: The present method and system provides for recognizing user intent and updating a graphical user interface. In an example, the method and system comprise collecting usage data from users, grouping users based on usage data, assigning a user intent to each group of users, training an intent prediction model using machine learning, providing access to the intent prediction model, assigning an intent to a new user using the intent prediction model, and, modifying the graphical user interface to facilitate the assigned intent of the user.

Abstract: The disclosure relates to the transfer of per-pixel transparency information using video codecs that do not provide an alpha channel (alternatively referred to as “transparency-agnostic video codecs”). For example, alpha information of visual elements may be transcoded into the supported channels of a video stream to generate additional samples of a supported color space, which are representative of the alpha information. After being encoded by a “transparency-agnostic video codec” and transmitted, the received alpha information may then be extracted from the supported channels of the video stream to render the received visuals with corresponding per-pixel transparency.

Abstract: A computing system that provides virtual computing services may generate and manage remote computing sessions between client computing devices and virtual desktop instances hosted on the service provider's network. A computing resource instance manager may monitor connections to and disconnections from a virtual desktop instance during particular time periods, and may apply a resource management policy to determine whether and when to shut down an underlying virtualized computing resource instance following a disconnection (e.g., immediately, after some period of time, or only between certain hours). A storage volume for the virtual desktop instance may be detached during a shutdown. In response to a reconnection request, the virtualized computing resource instance (or another such instance) may be restarted and the storage volume may be reattached. The computing resource instance manager may develop a model for predicting when to shut down or restart an instance based on historical data or machine learning.

Abstract: A method of resizing a block storage volume for a virtual machine includes executing the virtual machine and attaching a virtual storage device to the virtual machine. The virtual storage device exposes the block storage volume on memory hardware to the virtual machine. The block storage volume includes a first storage capacity. The method also includes mounting the block storage volume to the virtual machine and resizing the block storage volume while the virtual machine continues to execute. The block storage volume is resized without attaching an additional virtual storage device to the virtual machine or mounting an additional block storage volume to the virtual machine.

Abstract: In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.

Abstract: One or more storage devices store resource migration schedule information including a plurality of records. Each of the plurality of records indicating a migration source node and a migration destination node of each of one or more resources. One or more processors are configured to determine a priority of each of the plurality of records such that a record having locality after migration has a higher priority than a priority of a record without locality after migration. The locality is determined based on whether a virtual machine and a volume associated with each other in advance exist in the same node. The one or more processors are configured to determine a migration schedule of each of the plurality of records based on the priority of each of the plurality of records.

Abstract: Inadvertent data swaps can be prevented by measuring volume of transactions in distributed computing environment to determine locations for potential data swaps; and managing a correlation between a thread identification (ID) and transaction header (ID) for transactions in the distributed computing environment. In some embodiments, the prevention of data swaps can further include performing a data transmission interruption to avoid data swaps at the locations for potential data swaps. When the thread identification (ID) and transaction header (ID) do not match the potential for data swaps can be high.

Abstract: Various embodiments include systems and methods pertaining to a network sensor host configured to implement a receive side scaling (RSS) configuration component in a security environment. The RSS configuration component may be used to automatically generate an RSS configuration comprising one or more settings customized for the network sensor host based at least in part on hardware information of the network sensor host. In some embodiments, the RSS configuration may be applied to change settings of a network interface driver of the network sensor host, e.g., to implement RSS and multithreading for network sensor tasks.

Abstract: A thread may be de-activated (terminated or hibernated) or activated (e.g., re-activated or create anew if allowed) on a processing node, in response to which it may be desirable to redistribute the I/O jobs among the now active threads. Redistributing the I/O jobs may involve re-associating one or more active threads resulting from the activation or de-activation with one or more of the bin groups and/or re-assigning one or more job bins with one or more bin groups, for example, as will now be described. The bin groups may be re-associated with remaining active threads. I/O jobs may be redistributed among the active threads re-assigning job bins to bin groups. One or more queued I/O jobs may be moved to the thread that now owns the I/O job.

Abstract: A method, apparatus, system, and computer program product for container migration. A set of processors operates to identify a set of containers for a set of applications for a migration using a set of application performance metrics. The set of processors operates to create a set of tasks following a migration strategy to move the set of containers for the set of applications identified for the migration from a set of current physical host computers to a set of target physical host computers using the set of application performance metrics. The set of processors operates to move the set of containers for the set of applications from the set of current physical host computers to the set of target physical host computers using the set of tasks following the migration strategy.

Abstract: Representative apparatus, method, and system embodiments are disclosed for a self-scheduling processor which also provides additional functionality. Representative embodiments include a self-scheduling processor, comprising: a processor core adapted to execute a received instruction; and a core control circuit adapted to automatically schedule an instruction for execution by the processor core in response to a received work descriptor data packet. In another embodiment, the core control circuit is also adapted to schedule a fiber create instruction for execution by the processor core, to reserve a predetermined amount of memory space in a thread control memory to store return arguments, and to generate one or more work descriptor data packets to another processor or hybrid threading fabric circuit for execution of a corresponding plurality of execution threads. Event processing, data path management, system calls, memory requests, and other new instructions are also disclosed.

Abstract: Load balancing processes are performed in an observability pipeline system comprising a plurality of computing resources. In some aspects, the observability pipeline system defines a leader role and worker roles. A plurality of computing jobs each include computing tasks associated with event data. The leader role dispatches the computing tasks to the worker roles according to a least in-flight task dispatch criteria, which includes iteratively: identifying an available worker role; identifying one or more incomplete computing jobs; selecting, from the one or more incomplete computing jobs, a computing job that has the least number of in-flight computing tasks currently being executed in the observability pipeline system; identifying a next computing task from the selected computing job; and dispatching the next computing task to the available worker role. The worker roles execute the computing tasks by applying an observability pipeline process to the event data associated with the respective computing task.

Abstract: Systems and methods are provided for improving autotuning procedures. For example, the system can implement a task launcher, a scheduler, and an agent to launch, schedule, and execute decomposed autotuning stages, respectively. The scheduling policy implemented by the scheduler may perform operations beyond a simple scheduling policy (e.g., a FIFO-based scheduling policy), which produces a high queuing delay. By leveraging autotuning specific domain knowledge, this may help reduce queuing delay and improve resource utilization that is otherwise found in traditional systems.

Abstract: Described are examples for tracking memory usage of a driver. A memory allocation request related to the driver to allocate a portion of memory for the driver can be traced in a kernel mode of an operating system. One or more associated allocation parameters can be recorded, and an allocation history of the driver over a period of time can be reported during execution of the driver and based on the one or more allocation parameters indicated by the memory allocation request.

Abstract: A control plane in a computing system receives a request to perform a management task on a set of computing system resources. The control plane identifies a target scope on which the management task is to be performed and dynamically obtains permissions, for this specific request, to perform the management task on the resources in the identified target scope.

Abstract: A computing system is provided, including a processor configured to identify a plurality of measurement sequences that implement a logic gate. Each measurement sequence may include a plurality of measurements of a quantum state of a topological quantum computing device. The processor may be further configured to determine a respective estimated total resource cost of each measurement sequence of the plurality of measurement sequences. The processor may be further configured to determine a first measurement sequence that has a lowest estimated total resource cost of the plurality of measurement sequences. The topological quantum computing device may be configured to implement the logic gate by applying the first measurement sequence to the quantum state.

Abstract: Techniques for implementing an infrastructure orchestration service are described. A scheduler can receive a configuration file, which can include a first release identifier, for a first deployment of resources at an execution target. The resources can be deployed at the execution target according to the file. A current state of the resources can be stored. The scheduler can receive a second version of the file, which can include a second release identifier, for a new deployment at the execution target. At least one worker node can execute a plugin to compare the first identifier to the second identifier. If the first identifier is different than the second identifier, the plugin can compare a current state of the resources with a desired state according to the second identifier. If the desired state is different than the current state, the resources are deployed at the execution target according to the second identifier.

Abstract: A computer-implemented system, method and computer program product for provisioning cloud computing resources that includes: converting a hand sketch representation of cloud computing resources to a digital image with metadata; generating a cloud deployment representation from the digital image with metadata; preparing cloud deployment manifest and configuration files from the cloud deployment representation; converting the cloud deployment manifest and configuration files into input data to be used to provision cloud computing resources; and transmitting the input data to a cloud computing vendor to provision the cloud computing resources.

Abstract: Techniques are disclosed for using a multi-tenant framework for microservices in a microservices-based application to handle tenant-specific circuit breaking. The microservices-based application can include at least one microservice that incorporates the multi-tenant framework. The multi-tenant framework includes software components configured to provide multi-tenant functionality for the microservice. A first microservice may receive an indication associated with a tenant that a second microservice is overloaded. The first microservice can then receive a request containing tenant context data at an interface. A first software component of the multi-tenant framework can extract the tenant context data from the request. The first microservice may determine whether the tenant context data corresponds to the tenant. The first microservice can then trigger a circuit breaker for the second microservice.

Abstract: Examples include registering a device driver with an operating system, including registering available hardware offloads. The operating system receives a call to a hardware offload, inserts a binary filter representing the hardware offload into a hardware component and causes the execution of the binary filter by the hardware component when the hardware offload is available, and executes the binary filter in software when the hardware offload is not available.

Abstract: An apparatus to facilitate thread synchronization is disclosed. The apparatus comprises one or more processors to execute a producer thread to generate a plurality of commands, execute a consumer thread to process the plurality of commands and synchronize the producer thread with the consumer thread, including updating a producer fence value upon generation of in-order commands, updating a consumer fence value upon processing of the in-order commands and performing a synchronization operation based on the consumer fence value, wherein the producer fence value and the consumer fence value each correspond to an order position of an in-order command.

Abstract: Variable values can be synchronized between an application shell and micro-frontends by using a synchronization system described herein. In one example, an application shell that is executable in a browser window can include a first synchronization handler. The first synchronization handler can determine an updated value for a shared variable that is to be synchronized between the application shell and one or more micro-frontends in the browser window. The first synchronization handler can determine that a micro-frontend in the browser window is subscribed to receive updates for the shared variable. In response to determining that the micro-frontend is subscribed to receive the updates, the first synchronization handler can provide the updated value to a second synchronization handler of the micro-frontend for use by the micro-frontend.

Abstract: An adaptive idle detection method determines whether software defined data centers (SDDCs) in a hyperconverged infrastructure (HCI) environment are idle. Idleness may be quantified via a coefficient of variation (CV) against resource usage, so as to adapt the idle detection method to SDDCs with different hardware specifications and workloads. Management overhead may also be filtered out by the idle detection method, and the idle detection method may use idleness scores to further reduce overhead.

Abstract: A service linkage assistance device includes a reception unit, which receives definition information of a stateless upper-layer API exposed to an upper-layer device that links a plurality of services and definition information of a plurality of stateful lower-layer APIs exposed by a lower-layer device. The service linkage assistance device includes an interpretation unit, which extracts at least one lower-layer API corresponding to the upper-layer API by using the definition information of the upper-layer API and the definition information of the lower-layer APIs, and generates an API correspondence table in which an execution order of the extracted lower-layer API is set.

Abstract: Techniques for providing and servicing listed repository items such as algorithms, data, models, pipelines, and/or notebooks are described. In some examples, web services provider receives a request for a listed repository item from a requester, the request indicating at least a category of the repository item and each listing of a repository item includes an indication of a category that the listed repository item belongs to and a storage location of the listed repository item, determines a suggestion of at least one listed repository item based on the request, and provides the suggestion of the at least one listed repository item to the requester.

Abstract: A method in a computing device includes generating a set of data packets comprising a first referrer data associated with a first resource rendered by the computing device when executing a first application and a second referrer data associated with a second resource rendered by the computing device prior to rendering the first resource. The first resource provides a first content item associated with a second application. The method also includes transmitting the set of data packets to an application server, receiving, from the application server, a deeplink, or a referrer tag, that was generated based on the first referrer data and the second referrer data, and retrieving, by the second application and using the deeplink or the referrer tag, content associated with the first referrer data and the second referrer data for display at the computing device within a content interface of the second application.

Abstract: The present invention relates to methods of synthesizing de novo a polynucleotide storing data using a programmable template independent polymerase.

Abstract: Provided is an uncopyable hologram QR code, According to an embodiment of the present disclosure, a 3D code generation method divides a 2D code having specific information recorded thereon into a plurality of sub 2D codes, and generatES a 3D code by coupling at least one of the divided sub 2D codes at a different depth. Accordingly, a QR code is recorded on a hologram recording medium as a hologram, and is displayed and scanned, so that it is impossible to easily duplicate the QR code unlike an existing 2D QR code.

Abstract: The present disclosure provides a reconstructable visual code. A visual code may be separated into a plurality of individual portions. The plurality of individual portions may be configured to transform between two or more states. In a first state, the plurality of individual portions may be spaced apart to form a non-functional visual code. In a second state, the plurality of individual portions may be moved relative to each other to form a functional visual code.

Abstract: A quality management system for products including a multiplicity of barcoded quality indicators, a barcode indicator reader and a product type responsive indication interpreter, each of the barcoded quality indicators including a first barcode including at least one first colorable area, the first barcode being machine-readable before exceedance of the at least one time and temperature threshold, at least a second barcode including at least one second colorable area, the second barcode not being machine-readable before exceedance of the at least one time and temperature threshold, a coloring agent located at a first location on the indicator and a coloring agent pathway operative to allow the coloring agent to move, from the first location to the first and second colorable areas simultaneously thereby causing the first barcode to become unreadable and at the same time causing the second barcode to become machine-readable.

Abstract: A tip cap assembly for coupling with a syringe body includes a luer lock adaptor, a rigid cap coupled to the luer lock adaptor; a rigid tip cap having distal end and proximal ends, the rigid tip cap being disposed at least partially within the rigid cap, a RFID tag positioned over the distal end of the tip cap, and an adhesive layer formed over the RFID tag. Also provided is RFID inlay for use with medical devices including a meshed substrate, and a RFID antenna and integrated circuit assembly adhered to the meshed substrate. A syringe and label assembly is disclosed, including a body having distal and proximal ends, a tip cap assembly having distal end and proximal ends, and a label at least partially surrounding the distal end of the syringe body and the proximal end of the tip cap, the label comprises an integrated RFID tag.

Abstract: A card-type medium includes: a card body; an internal component embedded in the card body; an exposed component partially exposed on a front surface of the card body; and a circuit board to which the internal component and the exposed component are bonded, wherein the circuit board includes a first connection portion to which the internal component is bonded, a second connection portion to which the exposed component is bonded, the second connection portion being located at a position different from the first connection portion in a card thickness direction connecting the front surface of the card body and a rear surface on an opposite side of the card body to the front surface, and a connection wiring portion that connects the first connection portion and the second connection portion, the connection wiring portion extending in a direction including the card thickness direction.

Abstract: Systems and methods are provided for decoding secure tags using an authentication server and secure tag reader. The system can include at least one processor and at least one non-transitory memory. The memory can contain instructions that, when executed by the at least one processor, cause the secure tag reader to perform operations. The operations can include detecting a potential secure tag in an image and generating a normalized secure tag image using the image and a stylesheet. The operations can further include providing an identification request to an authentication server, the identification request including the normalized secure tag image. The operations can additionally include receiving rules for decoding tag data encoded into the secure tag as tag feature options and decoding the tag data using the received rules.

Abstract: A communication device includes an antenna, a driving unit, a first acquisition unit, an input unit, and a second acquisition unit. The driving unit moves a position of the antenna. The first acquisition unit acquires tag data of each radio tag based on a radio wave of each radio tag received by the antenna at a plurality of positions of the antenna. The input unit inputs the tag data of each radio tag at the plurality of positions of the antenna into a learned model. The second acquisition unit acquires, from the learned model, data indicating whether each radio tag is included in a first range or a second range based on the input of the tag data of each radio tag into the learned model by the input unit.