Fully-sealed Or Vacuum-maintained Chamber (e.g., Ampoule) Patents (Class 117/100)
  • Patent number: 11608567
    Abstract: The present invention relates to a crucible for an ingot growing apparatus capable of increasing the life span of a graphite crucible. One embodiment of the present invention provides a crucible for an ingot growing apparatus including: a quartz crucible containing a silicon melt and having a lower surface part with a curved shape; a graphite crucible accommodating the quartz crucible and having a body shape divided into at least two parts with respect to a lower surface thereof; and an inner supporter supported between the lower surface of the quartz crucible and the graphite crucible.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: March 21, 2023
    Assignee: SK SILTRON CO., LTD.
    Inventors: In Gu Kang, Do Yeon Kim, Young Jung Lee
  • Patent number: 10060047
    Abstract: A nitride semiconductor crystal producing method, includes growing a nitride semiconductor crystal over a seed crystal substrate, while applying an etching action to an outer end of the seed crystal substrate during the growing of the nitride semiconductor crystal.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: August 28, 2018
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Hajime Fujikura, Taichiroo Konno, Yuichi Oshima
  • Patent number: 9890470
    Abstract: A seed crystal holder according to the present invention for growing a crystal by a solution method, and that includes a seed crystal made of silicon carbide; a holding member above the seed crystal; a bonding agent configured to fix the seed crystal and the holding member; and a sheet member made of carbon which is interposed in the bonding agent in a thickness direction, and which has an outer periphery smaller than an outer periphery of the seed crystal in a plan view.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: February 13, 2018
    Assignee: KYOCERA Corporation
    Inventors: Katsuaki Masaki, Yutaka Kuba, Chiaki Domoto, Daisuke Ueyama, Yuichiro Hayashi
  • Patent number: 9777158
    Abstract: This invention is based upon the discovery that hydroxylated carboxylic acids which contain at least 17 carbon atoms and zinc, aluminum or alkaline earth metal salts thereof, such as zinc ricinoleate, act effectively as deodorants in asphalt and asphalt containing compositions. The present invention more specifically discloses an asphalt additive composition which is comprised of (1) an asphalt, (2) 0.05 weight percent to about 4 weight percent of a partitioning agent, and (3) at least 0.1 weight percent of a deodorant selected from the group consisting of (a) a hydroxylated carboxylic acid which contains at least 17 carbon atoms and (b) an aluminum, zinc, or alkaline earth metal salt of a hydroxylated carboxylic acid which contains at least 17 carbon atoms. In many applications it is beneficial for the asphalt additive composition to further include 0.5 weight percent to about 50 weight percent of a polymer additive.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: October 3, 2017
    Assignee: Flow Polymers, LLC
    Inventors: Aaron S. Puhala, Michael S. Ivany, James W. Hoover
  • Patent number: 9469764
    Abstract: This invention is based upon the discovery that a hydroxylated carboxylic acids which contain at least 17 carbon atoms and zinc, aluminium, or alkaline earth metal salts thereof, such as zinc ricinoleate, act effectively as deodorants in asphalt and asphalt containing compositions. The present invention more specifically discloses an asphalt additive composition which is comprised of (1) an asphalt, (2) 0.05 weight percent to about 4 weight percent of a partitioning agent, and (3) at least 0.1 weight percent of a deodorant selected from the group consisting of (a) a hydroxylated carboxylic acid which contains at least 17 carbon atoms and (b) an aluminium, zinc, or alkaline earth metal salt of a hydroxylated carboxylic acid which contains at least 17 carbon atoms. In many applications it is beneficial for the asphalt additive composition to further include 0.5 weight percent to about 50 weight percent of a polymer additive.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: October 18, 2016
    Assignee: Flow Polymers, LLC
    Inventors: Aaron S. Puhala, Michael S. Ivany, James W. Hoover
  • Patent number: 8894766
    Abstract: The invention provides a process for producing polycrystalline silicon, including introduction of a reaction gas containing a silicon-containing component and hydrogen by means of one or more nozzles into a reactor including at least one heated filament rod on which silicon is deposited, wherein an Archimedes number Arn which describes flow conditions in the reactor, as a function of the fill level FL which states the ratio of one rod volume to one empty reactor volume in percent, for a fill level FL of up to 5% is within the range limited at the lower end by the function Ar=2000×FL?0.6 and at the upper end by the function Ar=17 000×FL?0.9, and at a fill level of greater than 5% is within a range from at least 750 to at most 4000.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: November 25, 2014
    Assignee: Wacker Chemie AG
    Inventors: Marcus Schaefer, Oliver Kraetzschmar
  • Patent number: 8760584
    Abstract: A memory space configuration method applied in a video signal processing apparatus is provided. The method includes: arranging a first memory space and a second memory space in a memory, the first and second memory spaces being partially overlapped; determining a type of a signal source; when the signal source is a first video signal source, enabling a first processing circuit and buffering data associated with the first video signal source by using the first memory space; and, when the signal source is a second video signal source, enabling a second processing circuit and buffering data associated with the second video signal source by using the second memory space. The second processing circuit is disabled when the first processing circuit is enabled; the first processing circuit is disabled when the second processing circuit is enabled.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: June 24, 2014
    Assignee: MSTAR Semiconductor, Inc.
    Inventor: Po-Jen Yang
  • Patent number: 8734584
    Abstract: In accordance with one aspect, the present invention provides a method for providing polycrystalline films having a controlled microstructure as well as a crystallographic texture. The methods provide elongated grains or single-crystal islands of a specified crystallographic orientation. In particular, a method of processing a film on a substrate includes generating a textured film having crystal grains oriented predominantly in one preferred crystallographic orientation; and then generating a microstructure using sequential lateral solidification crystallization that provides a location-controlled growth of the grains orientated in the preferred crystallographic orientation.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: May 27, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: James S. Im, Paul C. van der Wilt
  • Patent number: 8709156
    Abstract: Epitaxially coated silicon wafers are produced by placing a wafer polished on its front side on a susceptor in an epitaxy reactor, first pretreating under a hydrogen atmosphere and in a second and a third step with addition of an etching medium to the hydrogen atmosphere, and subsequently providing an epitaxial layer, wherein during the first and second steps the hydrogen flow rate is 20-100 slm, during the second and third steps the flow rate of the etching medium is 0.5-1.5 slm, during the second step the average temperature in the reactor chamber is 950-1050° C., and the power of heating elements above and below the susceptor is regulated such that there is a temperature difference of 5-30° C. between a radially symmetrical region encompassing the central axis of and a part lying outside this region; and during the third step the hydrogen flow rate is reduced to 0.5-10 slm. In a second method, during the third pretreatment step the flow rate of the etching medium is increased to 1.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: April 29, 2014
    Assignee: Siltronic AG
    Inventor: Joerg Haberecht
  • Patent number: 8632633
    Abstract: Engineered defects are reproduced in-situ with graphene via a combination of surface manipulation and epitaxial reproduction. A substrate surface that is lattice-matched to graphene is manipulated to create one or more non-planar features in the hexagonal crystal lattice. These non-planar features strain and asymmetrically distort the hexagonal crystal lattice of epitaxially deposited graphene to reproduce “in-situ” engineered defects with the graphene. These defects may be defects in the classic sense such as Stone-Wales defect pairs or blisters, ridges, ribbons and metacrystals. Nano or micron-scale structures such as planar waveguides, resonant cavities or electronic devices may be constructed from linear or closed arrays of these defects. Substrate manipulation and epitaxial reproduction allows for precise control of the number, density, arrangement and type of defects. The graphene may be removed and template reused to replicate the graphene and engineered defects.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: January 21, 2014
    Assignee: Raytheon Company
    Inventors: Delmar L. Barker, Brian J. Zelinski, William R. Owens
  • Patent number: 8580035
    Abstract: Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 104 cm?2 and an inclusion density below 104 cm?3 and/or a MV density below 104 cm?3.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: November 12, 2013
    Assignee: Crystal IS, Inc.
    Inventors: Robert Bondokov, Kenneth E. Morgan, Glen A. Slack, Leo J. Schowalter
  • Patent number: 8568529
    Abstract: Embodiments disclosed herein generally relate to an HVPE chamber. The chamber may have two separate precursor sources coupled thereto to permit two separate layers to be deposited. For example, a gallium source and a separate aluminum source may be coupled to the processing chamber to permit gallium nitride and aluminum nitride to be separately deposited onto a substrate in the same processing chamber. The nitrogen may be introduced to the processing chamber at a separate location from the gallium and the aluminum and at a lower temperature. The different temperatures causes the gases to mix together, react and deposit on the substrate with little or no deposition on the chamber walls.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: October 29, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Tetsuya Ishikawa, David H. Quach, Anzhong Chang, Olga Kryliouk, Yuriy Melnik, Harsukhdeep S. Ratia, Son T. Nguyen, Lily Pang
  • Patent number: 8475588
    Abstract: A wafer structure and epitaxial growth method for growing the same. The method may include forming a mask layer having nano-sized areas on a wafer, forming a porous layer having nano-sized pores on a surface of the wafer by etching the mask layer and a surface of the wafer, and forming an epitaxial material layer on the porous layer using an epitaxial growth process.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: July 2, 2013
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventor: Sung-Soo Park
  • Patent number: 8470090
    Abstract: Affords large-diametric-span AlN crystals, applicable to various types of semiconductor devices, with superior crystallinity, a method of growing the AlN crystals, and AlN crystal substrates. The AlN crystal growth method is a method in which an AlN crystal (4) is grown by vapor-phase epitaxy onto a seed crystal substrate (2) placed inside a crystal-growth compartment (24) within a crystal-growth vessel (12) provided within a reaction chamber, and is characterized in that during growth of the crystal, carbon-containing gas is supplied to the inside of the crystal-growth compartment (24).
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naho Mizuhara, Michimasa Miyanaga, Tomohiro Kawase, Shinsuke Fujiwara
  • Patent number: 8465587
    Abstract: Hydride vapor-phase deposition (HVPE) systems are disclosed. An HVPE hydride vapor-phase deposition system may include a reactant source chamber and a growth chamber containing a susceptor coupled to the reactant source chamber. The reactant source chamber may be configured to create a reactant gas through a chemical reaction between a solid or liquid precursor and a different precursor gas. The reactant source chamber can be configured to operate at a temperature T(M) significantly above room temperature. The reactant gas can be chemically unstable at or near room temperature. The susceptor is configured to receive a substrate and maintain the substrate at a substrate temperature T(S). The growth chamber includes walls can be configured to operate at a temperature T(C) such that T(M), T(S) are greater than T(C).
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: June 18, 2013
    Assignee: CBL Technologies, Inc.
    Inventors: Glenn S. Solomon, David J. Miller
  • Patent number: 8465588
    Abstract: A high-quality, large-area seed crystal for ammonothermal GaN growth and method for fabricating. The seed crystal comprises double-side GaN growth on a large-area substrate. The seed crystal is of relatively low defect density and has flat surfaces free of bowing. The seed crystal is useful for producing large-volume, high-quality bulk GaN crystals by ammonothermal growth methods for eventual wafering into large-area GaN substrates for device fabrication.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: June 18, 2013
    Assignee: SORAA, Inc.
    Inventors: Christiane Poblenz, James S. Speck, Derrick S. Kamber
  • Patent number: 8394197
    Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 12, 2013
    Assignee: Sub-One Technology, Inc.
    Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman
  • Patent number: 8349077
    Abstract: Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 104 cm?2 and an inclusion density below 104 cm?3 and/or a MV density below 104 cm?3.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 8, 2013
    Assignee: Crystal IS, Inc.
    Inventors: Robert T. Bondokov, Kenneth Morgan, Glen A. Slack, Leo J. Schowalter
  • Patent number: 8241423
    Abstract: A semiconductor wafer for an epitaxial growth is disclosed comprising: a main face on which a vapor phase epitaxial layer grows; a back face provided on an opposite side of the wafer; a main chamfered part along a circumferential edge where the main face and a side face of the wafer meet; and a back chamfered part along a circumferential edge where the back face and the side face meet is provided. After a CVD layer formation process is conducted to form a layer at least on the back face and the back chamfered part, a machining process is conducted on the main face to remove a CVD layer at least partially formed thereon so as to polish the main face to a mirror finished surface with a maximum height of profile (Rz) not exceeding 0.3 ?m.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 14, 2012
    Assignee: Sumco Techxiv Corporation
    Inventors: Eisyun Ikubo, Naoto Hirano, Moritaka Iwasa
  • Patent number: 8092596
    Abstract: Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth, for example to achieve n-, i-, or p-type conductivity.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A Dmitriev
  • Patent number: 8038795
    Abstract: A precursor chiral nanotube with a specified chirality is grown using an epitaxial process and then cloned. A substrate is provided of crystal material having sheet lattice properties complementary to the lattice properties of the selected material for the nanotube. A cylindrical surface(s) having a diameter of 1 to 100 nanometers are formed as a void in the substrate or as crystal material projecting from the substrate with an orientation with respect to the axes of the crystal substrate corresponding to the selected chirality. A monocrystalline film of the selected material is epitaxially grown on the cylindrical surface that takes on the sheet lattice properties and orientation of the crystal substrate to form a precursor chiral nanotube. A catalytic particle is placed on the precursor chiral nanotube and atoms of the selected material are dissolved into the catalytic particle to clone a chiral nanotube from the precursor chiral nanotube.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: October 18, 2011
    Assignee: Raytheon Company
    Inventors: Delmar L. Barker, William R. Owens
  • Patent number: 7998273
    Abstract: An epitaxial growth process for producing a thick III-N layer, wherein III denotes at least one element of group III of the periodic table of elements, is disclosed, wherein a thick III-N layer is deposited above a foreign substrate. The epitaxial growth process preferably is carried out by HVPE. The substrate can also be a template comprising the foreign substrate and at least one thin III-N intermediate layer. The surface quality is improved by providing a slight intentional misorientation of the substrate, and/or a reduction of the N/III ratio and/or the reactor pressure towards the end of the epitaxial growth process. Substrates and semiconductor devices with such improved III-N layers are also disclosed.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: August 16, 2011
    Assignees: Freiberger Compound Materials GmbH, Osram Opto Semiconductors GmbH
    Inventors: Ferdinand Scholz, Peter Brückner, Frank Habel, Matthias Peter, Klaus Köhler
  • Patent number: 7857907
    Abstract: The present invention relates to a method for forming a layered structure with silicon nanocrystals. In one embodiment, the method comprises the steps of: (i) forming a first conductive layer on a substrate, (ii) forming a silicon-rich dielectric layer on the first conductive layer, and (iii) laser-annealing at least the silicon-rich dielectric layer to induce silicon-rich aggregation to form a plurality of silicon nanocrystals in the silicon-rich dielectric layer. The silicon-rich dielectric layer is one of a silicon-rich oxide film having a refractive index in the range of about 1.4 to 2.3, or a silicon-rich nitride film having a refractive index in the range of about 1.7 to 2.3. The layered structure with silicon nanocrystals in a silicon-rich dielectric layer is usable in a solar cell, a photodetector, a touch panel, a non-volatile memory device as storage node, and a liquid crystal display.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: December 28, 2010
    Assignee: AU Optronics Corporation
    Inventors: An-Thung Cho, Chih-Wei Chao, Chia-Tien Peng, Wan-Yi Liu, Ming-Wei Sun
  • Publication number: 20100242834
    Abstract: A method for producing one or more single crystalline diamonds. The method comprises placing one or more substrates on a substrate holder in chemical vapor vaporization (CVD) chamber. A mixture of gases including at least one gas having a carbon component is provided adjacent to the one or more substrates in the CVD chamber. Thereafter, the mixture of gases is exposed to microwave radiation to generate a plasma. Reactive species of nitrogen produced in a remote reactive gas generator are introduced in the plasma. Then, the one or more substrates are exposed to the plasma, such that diamond growth occurs at a rate of 10 to 100 microns per hour, to produce one or more single crystalline diamonds.
    Type: Application
    Filed: July 20, 2009
    Publication date: September 30, 2010
    Inventor: Rajneesh Bhandari
  • Patent number: 7732012
    Abstract: Provided is a method for the preparation of polycrystalline silicon in which, in conducting preparation of polycrystalline silicon by the Siemens method or by the monosilane method, no outer heating means is necessitated for the core member (seed rod), onto which polycrystalline silicon is deposited, from the initial stage of heating, the deposition rate is high and the core member seed rod can be used repeatedly. The method for deposition of high-purity polycrystalline silicon, at a high temperature, onto a white-heated seed rod in a closed reaction furnace by pyrolysis or hydrogen reduction of a starting silane gas supplied thereto, is characterized in that the seed rod is a member made from an alloy having a recrystallization temperature of 1200° C. or higher. It is preferable that the alloy member is of an alloy of Re—W, W—Ta, Zr—Nb, titanium-zirconium, or a carbon-added molybdenum (TZM) in the form of a wire member having a diameter of at least 0.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: June 8, 2010
    Assignees: Shin-Etsu Film Co., Ltd, Sunric Co., Ltd
    Inventors: Tatsuhiko Hongu, Yasuhiro Kato, Hiroshi Hagimoto
  • Patent number: 7625447
    Abstract: SiC is a very stable substance, and it is difficult to control the condition of a SiC surface to be suitable for crystal growth in conventional Group III nitride crystal growing apparatuses. This problem is solved as follows. The surface of a SiC substrate 1 is rendered into a step-terrace structure by performing a heating process in an atmosphere of HCl gas. The surface of the SiC substrate 1 is then treated sequentially with aqua regia, hydrochloric acid, and hydrofluoric acid. A small amount of silicon oxide film formed on the surface of the SiC substrate 1 is etched so as to form a clean SiC surface 3 on the substrate surface. The SiC substrate 1 is then installed in a high-vacuum apparatus and the pressure inside is maintained at ultrahigh vacuum (such as 10?6 to 10?8 Pa). In the ultrahigh vacuum state, a process of irradiating the surface with a Ga atomic beam 5 at time t1 at temperature of 800° C. or lower and performing a heating treatment at 800° C. or higher is repeated at least once.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: December 1, 2009
    Assignee: Japan Science and Technology Agency
    Inventors: Jun Suda, Hiroyuki Matsunami, Norio Onojima
  • Patent number: 7556688
    Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: July 7, 2009
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
  • Patent number: 7553373
    Abstract: A method of producing a silicon carbide single crystal, having: fixing a seed crystal, including setting a seed crystal on a seed crystal fixing part with interposition of an adhesive; applying a uniform pressure on the entire surface of the seed crystal by contacting a flexible bag which is inflatable and deflatable to the seed crystal by charging a gas into the to flexible bag; hardening the adhesive; and sublimating a silicon carbide powder obtained by calcinating a mixture containing at least a silicon source and a resol xylene resin, having a nitrogen content of 100 mass ppm or less and having a content of each impurity elements of 0.1 mass ppm or less, and re-crystallizing for growing a silicon carbide single crystal.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: June 30, 2009
    Assignee: Bridgestone Corporation
    Inventors: Masashi Otsuki, Takayuki Maruyama, Shigeki Endo, Daisuke Kondo, Takuya Monbara
  • Patent number: 7537659
    Abstract: The invention relates to the field of CdTe or CdZnTe single crystal production and to an improved solid-phase method of obtaining large CdTe or CdZnTe crystals having an excellent crystalline structure.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: May 26, 2009
    Inventors: Robert Georges Lucien Triboulet, Said Assoumani Said Hassani
  • Patent number: 7524376
    Abstract: A crystal growth setup within a physical vapor transport growth furnace system for producing AlN monocrystal boules at high temperatures includes a crucible effective to contain an AlN source material and a growing AlN crystal boule. This crucible has a thin wall thickness in at least that portion housing the growing AlN crystal boule. Other components include a susceptor, in case of an inductive heating, or a heater, in case of a resistive heating, a thermal insulation enclosing the susceptor or heater effective to provide a thermal gradient inside the crucible in the range of 5-100° C./cm and a furnace chamber capable of being operated from a vacuum (<0.1 torr) to a gas pressure of at least 4000 torr through filling or flowing a nitrogen gas or a mixture of nitrogen gas and argon gas. The high temperatures contribute to a high boule growth rate and the thin wall thickness contributes to reduced imparted stress during boule removal.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: April 28, 2009
    Assignee: Fairfield Crystal Technology, LLC
    Inventor: Shaoping Wang
  • Patent number: 7431767
    Abstract: An improved apparatus and method for substrate layer deposition in which substrate layers are grown by carrier gas delivery of sequential pulses of reactants to the substrate surface. At least one of the reactants comprises excited species, e.g., radicals. In a specific embodiment, the apparatus of this invention provides sequential repeated pulses of reactants in a flow of carrier gas for reaction at a substrate surface. The reactant pulses are delivered with sufficient intervening delay times to minimize undesirable reaction between reactants in adjacent pulses in the gas phase or undesired uncontrolled reactions on the substrate surface.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: October 7, 2008
    Assignee: ASM America, Inc.
    Inventor: Ivo Raaijmakers
  • Patent number: 7371281
    Abstract: A growth crucible (2) for depositing on a seed crystal substrate (5) a silicon carbide single crystal (6) using a sublimate gas of a silicon carbide raw material (11) is disposed inside of an outer crucible (1). During the course of silicon carbide single crystal, a silicon raw material (22) is continuously fed from outside into a space between the growth crucible and the outer crucible for the purpose of vaporizing the silicon raw material. An atmosphere gas surrounding the growth crucible is constituted of a silicon gas. The pressure of the atmosphere silicon gas is controlled to suppress a variation in the composition of the sublimate gas within the growth crucible to thereby grow a large-sized silicon carbide single crystal with few crystal defects on the seed crystal substrate reliably at a high growth rate.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: May 13, 2008
    Assignee: Showa Denko K.K.
    Inventors: Yasuyuki Sakaguchi, Atsushi Takagi, Naoki Oyanagi
  • Patent number: 7323051
    Abstract: A method is disclosed for producing a high quality bulk single crystal of silicon carbide in a seeded growth system. The method includes positioning a seed crystal on the seed holder with a low porosity backing material that provides a vapor barrier to silicon carbide sublimation from the seed and that minimizes the difference in thermal conductivity between the seed and the backing material to minimize or eliminate temperature differences across the seed and likewise minimize or eliminate vapor transport from the rear of the seed that would otherwise initiate and propagate defects in the growing crystal.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: January 29, 2008
    Assignee: Cree, Inc.
    Inventors: Hudson M. Hobgood, Jason R. Jenny, David Phillip Malta, Valeri F. Tsvetkov, Calvin H. Carter, Jr., Robert Tyler Leonard, George J. Fechko, Jr.
  • Patent number: 7316746
    Abstract: A method for a growing solid-state, spectrometer grade II-VI crystal using a high-pressure hydrothermal process including the following steps: positioning seed crystals in a growth zone of a reactor chamber; positioning crystal nutrient material in the nutrient zone of the chamber; filling the reactor with a solvent fluid; heating and pressuring the chamber until at least a portion of the nutrient material dissolves in the solvent and the solvent becomes supercritical in the nutrient zone; transporting supercritical from the nutrient zone to the growth zone, and growing the seed crystals as nutrients from the supercritical fluid deposit on the crystals.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: January 8, 2008
    Assignee: General Electric Company
    Inventors: Mark Philip D'Evelyn, Dong-Sil Park, John Thomas Leman
  • Publication number: 20070277731
    Abstract: Provided a method and an apparatus for growing high-quality GaN bulk single crystals without causing cracks. The method of growing GaN bulk single crystals includes providing a susceptor in a reaction chamber, providing a seed-accommodating portion having a given depth on an upper surface of the susceptor, providing GaN seeds on a bottom surface of the seed-accommodating portion so that only an upper surface of the GaN seeds is exposed, growing GaN bulk single crystals on the GaN seeds; and cooling the grown GaN bulk single crystals and separating the GaN bulk single crystals from the seed-accommodating portion.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 6, 2007
    Inventor: Jal-yong Han
  • Patent number: 7300519
    Abstract: The invention is an improvement in a method of producing a high quality bulk single crystal of silicon carbide in a seeded sublimation system. The improvement includes etching the front face on each of a first and second SiC seed to a depth of greater than about 20 ?m while protecting the opposite or back face on each of the first and second SiC seeds. Protection of the front faces occurs by placing the faces sufficiently close to one another to shield the back faces from being etched during etching of the respective unprotected front faces. Separation of the first and second SiC seeds occurs after the etching of the front faces is complete.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: November 27, 2007
    Assignee: Cree, Inc.
    Inventors: Valeri F. Tsvetkov, Adrian Powell, Stephan Georg Mueller
  • Patent number: 7141499
    Abstract: An improved apparatus and method for substrate layer deposition in which substrate layers are grown by carrier gas delivery of sequential pulses of reactants to the substrate surface. At least one of the reactants comprises excited species, e.g., radicals. In a specific embodiment, the apparatus of this invention provides sequential repeated pulses of reactants in a flow of carrier gas for reaction at a substrate surface. The reactant pulses are delivered with sufficient intervening delay times to minimize undesirable reaction between reactants in adjacent pulses in the gas phase or undesired uncontrolled reactions on the substrate surface.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: November 28, 2006
    Assignee: ASM America Inc.
    Inventor: Ivo Raaijmakers
  • Patent number: 6932866
    Abstract: The invention relates to a method and a device for depositing especially crystalline layers on especially crystalline substrates in a process chamber of a reactor housing having a water-cooled wall. The floor of said process chamber is heated. At least one reaction gas as a process gas, and hydrogen as a carrier gas, are centrally introduced into the process chamber, and are extracted by a gas evacuation ring surrounding the process chamber. A flush gas flows between the cover of the reactor and the cover of the process chamber. Said flush gas and the flush gas which flushes the area between the reactor wall and the gas evacuation ring are introduced into the outer region of the process chamber, via a gap between the cover of the reactor and the gas evacuation ring which can be lowered for loading the process chamber, in order to be sucked through the openings in the gas evacuation ring with the process gas.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: August 23, 2005
    Assignee: Aixtron AG
    Inventor: Martin Dauelsberg
  • Patent number: 6872253
    Abstract: The invention relates to a method of forming a semiconductor component comprising the steps of: providing a semiconductor substrate, forming a pattern of pores in the semiconductor substrate, the pores having a first depth, photoassisted wet etching of the substrate for etching of the pores to a second depth, the second depth being substantially greater than the first depth.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: March 29, 2005
    Assignee: Avanex Corporation
    Inventors: Georg Bastian, Roland Münzner
  • Patent number: 6616757
    Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: September 9, 2003
    Assignee: Technologies and Devices International, Inc.
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
  • Patent number: 6569240
    Abstract: After an underlying layer, made of a single crystal metal material, has been formed on a semiconductor layer, part or all of the underlying layer is changed into a metal oxide layer by supplying oxygen thereto from above the underlying layer. Then, a ferroelectric or high-dielectric-constant film is further formed on the metal oxide layer. Since the film made of a metal material is formed on the semiconductor layer, a silicon dioxide film or the like is not formed easily. Thus, a dielectric film, which includes an underlying layer with a high dielectric constant and has a large capacitance per unit area, can be obtained. Various defects such as interface states in the semiconductor layer can also be reduced advantageously if these process steps are performed after a thermal oxide film has been formed on the semiconductor layer.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: May 27, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Nishikawa, Kenji Iijima
  • Publication number: 20020170490
    Abstract: A method and an apparatus for growing monocrystalline aluminum nitride are provided, the method and apparatus allowing high single crystal growth rates to be achieved. In one aspect, the seed crystal and the aluminum source are placed in a growth chamber such that the growth surface of the seed crystal is substantially parallel to the evaporating surface of the aluminum surface. In another aspect, the inner surfaces of the growth chamber are comprised of an alloy of tantalum and carbon. In another aspect, during crystal growth the aluminum source is kept at a temperature higher than the seed crystal in order to maintain an axial temperature gradient within the growth chamber. In another aspect, during crystal growth the nitrogen pressure within the growth chamber is at least equal to the pressure exerted by the aluminum-nitrogen vapor mixture.
    Type: Application
    Filed: February 4, 2002
    Publication date: November 21, 2002
    Applicant: The Fox Group, Inc.
    Inventors: Yury Alexandrovich Vodakov, Sergei Yurievich Karpov, Yury Nikolaevich Makarov, Evgeny Nikolaevich Mokhov, Mark Grigorievich Ramm, Alexandr Dmitrievich Roenkov, Alexandr Solomonovich Segal
  • Publication number: 20020166503
    Abstract: A crucible susceptor for a crystal growing process for pulling a crystal ingot from a crystal material melt in a crucible, comprises at least one high purity composite component containing a carbon fiber reinforced carbon matrix, said at least one high purity composite component having a total level of metal impurity less than about 10 parts per million; and at least one high purity graphite component, said at least one high purity graphite component having a total level of metal impurity less than about 10 parts per million. A single crystal growing process for pulling a single crystal ingot from a crystal material melt includes providing a crystal material melt in a crucible and intimately supporting the crucible with the crucible susceptor of the present invention. The crucible susceptor disclosed may be used in a Czochralski crystal growing process for pulling a semiconductor ingot from a semiconductor material melt.
    Type: Application
    Filed: March 8, 2001
    Publication date: November 14, 2002
    Applicant: Hitco Carbon Composites, Inc.
    Inventors: Jan Magras, Kim Fjeldsted, Brian Ferguson
  • Patent number: 6139631
    Abstract: A crystal growth method having the steps of: preparing a growth container having a vapor generating chamber VC provided with a source material 14, a growth chamber GC provided with a seed crystal 12, and a coupling portion 18 having a cross sectional area narrower than a cross sectional area of each of the vapor generating chamber and the growth chamber, the coupling portion coupling the vapor generating chamber and the growth chamber; and vapor-phase growing a single crystal on the seed crystal by forming a temperature gradient in the growth container and by maintaining the seed crystal in the growth chamber at a growth temperature and the source material in the vapor generating chamber at a vapor supply temperature higher than the growth temperature. A crystal having a diameter larger than that of a seed crystal can be formed easily.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: October 31, 2000
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Hiroyuki Kato
  • Patent number: 6132506
    Abstract: An object of the present invention is to provide a method for the heat treatment of ZnSe crystal whereby the crystal can be prevented from deterioration of crystallinity and caused to have low resistivity without occurrence of precipitates in the crystal. The feature of the present invention consists in a method for the heat treatment of ZnSe comprising subjecting ZnSe crystal grown by a chemical vapor transport method using iodine as a transport agent to a heat treatment in a Zn vapor atmosphere and controlling a cooling rate after the heat treatment in 10 to 200.degree. C./min.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: October 17, 2000
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryu Hirota, Shinsuke Fujiwara
  • Patent number: 6045614
    Abstract: A method is provided for depositing a (111)-oriented heteroepitaxial II-VI alloy film on Si substrates. The (111)-oriented heteroepitaxial II-VI alloy film may comprise II-VI semiconductor and/or II-VI semimetal. As such, the method of the present invention provides a means for growing a (111)-oriented heteroepitaxial II-VI semiconductor film or a (111)-oriented heteroepitaxial II-VI semimetal film. The method of the present invention overcomes the inherent difficulties associated with forming (111)-oriented heteroepitaxial II-VI alloy films on Si(001). These difficulties include twin formation and poor crystalline quality. The novelty of the method of the present invention consists principally in choosing a Si substrate having a surface which has a specific Si crystallographic orientation. In particular, the present invention utilizes a Si surface having a crystallographic orientation near Si(111) rather than Si(001). The Si surface is vicinal Si(111).
    Type: Grant
    Filed: March 14, 1996
    Date of Patent: April 4, 2000
    Assignee: Raytheon Company
    Inventors: Terence J. de Lyon, Scott M. Johnson
  • Patent number: 5944891
    Abstract: An object of the present invention is to provide a method for the heat treatment of a ZnSe crystal whereby the crystal can be prevented from crystallinity deterioration and caused to have low resistivity without occurrence of precipitates in the crystal.The feature of the present invention consists in a method for the heat treatment of ZnSe comprising subjecting ZnSe crystal grown by a chemical vapor transport method using iodine as a transport agent to a heat treatment in a Zn vapor atmosphere and controlling a cooling rate after the heat treatment in 10 to 200.degree. C./min.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: August 31, 1999
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryu Hirota, Shinsuke Fujiwara
  • Patent number: 5746827
    Abstract: A method for producing crystals of silicon carbide in a furnace. The furnace has a crucible with a cavity in which the cavity has first and second spaced-apart regions. The crucible cavity of the furnace is capable of being heated, preferably by induction or resistance heating, with insulation placed around the crucible and crucible cavity. A source material of silicon carbide is provided at the first region of the crucible cavity, and a monocrystalline seed is placed at the second region of the crucible cavity. A first growth stage is then conducted in which the first region and the second region of the crucible cavity are heated to at least the sublimation temperature of silicon carbide under substantially isothermal conditions. Then, a second growth stage is conducted in which a temperature gradient is provided between the first and the second region of the crucible cavity, such that the seed in the second crucible region is kept at a temperature lower than a temperature of the first crucible region.
    Type: Grant
    Filed: December 27, 1995
    Date of Patent: May 5, 1998
    Assignee: Northrop Grumman Corporation
    Inventors: Donovan L. Barrett, Richard N. Thomas, Raymond G. Seidensticker, deceased, Richard H. Hopkins
  • Patent number: 5690736
    Abstract: A crystal is formed by applying crystal forming treatment to a substrate, the surface of the substrate being divided into nonnucleation surface exhibiting a small nucleation density and nucleation surface having a sufficeintly small area to allow crystal growth from a single nucleus and exhibiting a larger nucleation density than the nonnucleation surface and the nonnucleation surface being constituted of the surface of a buffer layer to alleviate generation of stress in the crystal formed.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: November 25, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroyuki Tokunaga