Abstract: The present invention relates to technology for fabricating a gallium nitride substrate using an ion implantation process to which a self-separation technique is applied. According to the present invention, a method of fabricating a gallium nitride substrate may include a step of forming a first gallium nitride layer on a substrate, a step of implanting hydrogen ions into the first gallium nitride layer to form a separation layer, a step of grinding the edges of the substrate, the first gallium nitride layer, and the separation layer, a step of forming a second gallium nitride layer on the first gallium nitride layer having a ground edge, and a step of self-separating the second gallium nitride layer from the first gallium nitride layer having a ground edge.

Abstract: Described herein are methods for forming a conformal Group 4, 5, 6, 13 metal or metalloid doped silicon nitride film. In one aspect, there is provided a method of forming an aluminum silicon nitride film comprising the steps of: providing a substrate in a reactor; introducing into the reactor an at least one aluminum precursor which reacts on at least a portion of the surface of the substrate to provide a chemisorbed layer; purging the reactor with a purge gas; introducing into the reactor an organoaminosilane precursors to react on at least a portion of the surface of the substrate to provide a chemisorbed layer; introducing a nitrogen source and an inert gas into the reactor to react with at least a portion of the chemisorbed layer; and optionally purge the reactor with an inert gas; and wherein the steps are repeated until a desired thickness of the aluminum nitride film is obtained.

Abstract: An object is to provide a nonpolar or semipolar GaN substrate having improved size and crystal quality. A self-standing GaN substrate has an angle between the normal of the principal surface and an m-axis of 0 degrees or more and 20 degrees or less, wherein: the size of the projected image in a c-axis direction when the principal surface is vertically projected on an M-plane is 10 mm or more; and when an a-axis length is measured on an intersection line between the principal surface and an A-plane, a low distortion section with a section length of 6 mm or more and with an a-axis length variation within the section of 10.0×10?5 ? or less is observed.

Abstract: A manufacturing method of a silicon carbide wafer includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A nitrogen content in the reactor is reduced, which includes the following. An argon gas is passed into the reactor, where a flow rate of passing the argon gas into the reactor is 1,000 sccm to 5,000 sccm, and a time of passing the argon gas into the reactor is 2 hours to 48 hours. The reactor and the raw material are heated to form a silicon carbide material on the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. The silicon carbide ingot is cut to obtain a plurality of silicon carbide wafers. A semiconductor structure is also provided.

Abstract: Methods and systems for depositing a layer comprising silicon oxide on the substrate are disclosed. Exemplary methods include cyclical deposition methods that include providing a first silicon precursor to the reaction chamber, providing a second silicon precursor, and using a reactant or a non-reactant gas forming silicon oxide on a surface of the substrate. Exemplary methods can further include a treatment step.

Abstract: A semiconductor manufacturing apparatus according to the present embodiment includes a first gas feeder, a first gas processor and a second gas feeder. The first gas feeder is provided above a stage on which a substrate is to be placed and feeds a first gas to the substrate. The first gas processor supplies high frequency power to the stage and renders the first gas fed from the first gas feeder into plasma. The second gas feeder is provided above the stage and feeds a second gas more difficult to render into plasma than the first gas to an outer periphery of the first gas having been rendered into plasma.

Abstract: Systems and methods are disclosed that provide for a silicon-carbon composite material that includes nanoparticulate (e.g., nanocrystalline) silicon derived from a reaction between a zintl salt and metal halide. The nanoparticulate silicon-carbon composite material can be used to provide electrode materials (e.g., anode) and cells.

Abstract: A coating system for coating, with a surface coating process, an interior surface of a housing defining an interior volume, having: a first closure and a second closure to sealingly engage with the housing; one or more first flow lines and second flow lines fluidically coupled to the first and second closure, respectively; a pressurized cell comprising a pressurized gas comprising at least one reactant and at a pressure of greater than a pressure within the housing, wherein the pressurized cell is fluidically coupled to a pressurized cell line comprising one of the first flow lines or second flow lines; and a controller in electronic communication with the pressurized cell and configured to control injection of a pulse of the pressurized gas into a flow of inert gas in the pressurized cell line, whereby the pulse is introduced into the interior volume, coating the interior surface with a coating layer.

Abstract: A coating system for coating an interior surface of a housing comprising: first and second closures engaging first and second ends, respectively, of the housing to provide an enclosed volume; first and second flow lines coupled to the first and second closures, respectively, the first flow line and/or the second flow line connected to an inert gas source; a reactant gas source(s) comprising a reactant gas and coupled to the first and/or second flow line; and a controller in electronic communication with the reactant gas and inert gas sources, and configured to control flow of inert gas into the enclosed volume, and counter current injection of reactant gas from the reactant gas source(s) into the enclosed volume whereby introduction of pulse(s) of the reactant gas into the enclosed volume are separated by introduction of inert gas into the enclosed volume, and coating layer(s) are deposited on the interior surface.

Abstract: A method of manufacturing a group-III nitride crystal includes: preparing a seed substrate; and supplying a group-III element oxide gas and a nitrogen element-containing gas at a supersaturation ratio (Po/Pe) greater than 1 and equal to or less than 5, then, growing a group-III nitride crystal on the seed substrate, wherein the Po is a supply partial pressure of the group-III element oxide gas, and the Pe is an equilibrium partial pressure of the group-III element oxide gas.

Abstract: A wafer has a layer containing silicon, a layer of polycrystalline diamond deposited on the silicon-containing layer, and a bow-compensation layer on the other side of the silicon-containing layer for reducing wafer-bow. A method of making a bonded structure includes an activation process for creating dangling bonds on the surface of one substrate, followed by contact-bonding the surface to a second substrate at low temperature. A bonded structure may include two substrates contact bonded to each other, one substrate including a layer containing silicon, a layer of polycrystalline diamond, a bow-compensation layer for reducing wafer-bow of the first substrate, and the other substrate including gallium nitride, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, indium phosphide, or another suitable material other than diamond.

Abstract: A SiC epitaxial wafer according to an embodiment includes: a SiC substrate; and a SiC epitaxial layer formed on a first surface of the SiC substrate. The in-plane uniformity of a density of Z1/2 centers of the SiC epitaxial layer is 5% or less.

Abstract: Chip technology for fabricating ultra-low-noise, high-stability optical devices for use in an optical atomic clock system. The proposed chip technology uses diamond material to form stabilized lasers, frequency references, and passive laser cavity structures. By utilizing the exceptional thermal conductivity of diamond and other optical and dielectric properties, a specific temperature range of operation is proposed that allows significant reduction of the total energy required to generate and maintain an ultra-stable laser. In each configuration, the diamond-based chip is cooled by a cryogenic cooler containing liquid nitrogen.

Abstract: A vertical batch furnace assembly for processing wafers comprising a cassette handling space, a wafer handling space, and an internal wall separating the cassette handling space and the wafer handling space. The cassette handling space is provided with a cassette storage configured to store a plurality of wafer cassettes provided with a plurality of wafers. The cassette handling space is also provided with a cassette handler configured to transfer wafer cassettes between the cassette storage and a wafer transfer position. The wafer handling space is provided with a wafer handler configured to transfer wafers between a wafer cassette in the wafer transfer position and a wafer boat in a wafer boat transfer position. The internal wall is provided with a wafer transfer opening adjacent the wafer transfer position for a wafer cassette from or to which wafers are to be transferred. The cassette storage comprises two cassette storage carousels.

Abstract: In various embodiments, single-crystal aluminum nitride boules and substrates have low Urbach energies and/or absorption coefficients at deep-ultraviolet wavelengths. The single-crystal aluminum nitride may function as a platform for the fabrication of light-emitting devices such as light-emitting diodes and lasers.

Abstract: A method for producing a p-type 4H—SiC single crystal includes sublimating a nitrided aluminum raw material and a SiC raw material. Further, there is a stacking of a SiC single crystal, which is co-doped with aluminum and nitrogen, on one surface of a seed crystal.

Abstract: A SiC ingot includes a core portion; and a surface layer that is formed on a plane of the core portion in a growing direction, and a coefficient of linear thermal expansion of the surface layer is smaller than a coefficient of linear thermal expansion of the core portion.

Abstract: A thermal conductivity measuring device includes a sample container that has a plurality of storage sections; a drive unit that is configured to move the plurality of storage sections of the sample container; and a radiation thermometer that is configured to measure the temperature of a predetermined position of the sample container.

Abstract: A thermal conductivity measuring device includes a sample container that has a plurality of storage sections; a drive unit that is configured to move the plurality of storage sections of the sample container; and a radiation thermometer that is configured to measure the temperature of a predetermined position of the sample container.

Abstract: A physical vapor transport growth system includes a growth chamber charged with SiC source material and a SiC seed crystal in spaced relation and an envelope that is at least partially gas-permeable disposed in the growth chamber. The envelope separates the growth chamber into a source compartment that includes the SiC source material and a crystallization compartment that includes the SiC seed crystal. The envelope is formed of a material that is reactive to vapor generated during sublimation growth of a SiC single crystal on the SiC seed crystal in the crystallization compartment to produce C-bearing vapor that acts as an additional source of C during the growth of the SiC single crystal on the SiC seed crystal.

Abstract: A method of processing silicon carbide containing crystalline substrate is provided. The method includes pyrolyzing a surface of the silicon carbide containing crystalline substrate to produce a silicon and carbon containing debris layer over the silicon carbide containing crystalline substrate, and removing the silicon and carbon containing debris layer, wherein the pyrolyzing and the removing is repeated at least once.

Abstract: A preparation apparatus for uniform silicon carbide crystals comprises a circular cylinder, a doping tablet, and a plate to stabilize and control the supply of dopants. The accessory does not participate in the reaction in the growth chamber but maintains its efficacy during growth. Finally, a single semi-insulating silicon carbide crystal with uniform electrical characteristics can be obtained.

Abstract: A method for fabricating an ultra-thin graphite film on a silicon carbide substrate includes the steps of: (A) providing a polyamic acid solution and a siloxane-containing coupling agent for polymerizing under an inert gas atmosphere to form a siloxane-coupling-group-containing polyamic acid solution; (B) performing a curing process after applying the siloxane-coupling-group-containing polyamic acid solution to a silicon carbide substrate; (C) placing the silicon carbide substrate in a graphite crucible before placing the graphite crucible in a reaction furnace to perform a carbonization process under an inert gas atmosphere; (D) subjecting the silicon carbide substrate to a graphitization process to obtain a graphite film, thereby make it possible to fabricate an ultra-thin graphite film of high-quality on the surface of silicon carbide in a lower graphitization temperature range.

Abstract: A method of purifying silicon carbide powder includes: providing a container with a surface coated by a nitrogen-removal metal layer, wherein the nitrogen-removal metal layer is tantalum, niobium, tungsten, or a combination thereof; putting a silicon carbide powder into the container to contact the nitrogen-removal metal layer; and heating the silicon carbide powder under an inert gas at a pressure of 400 torr to 760 torr at 1700° C. to 2300° C. for 2 to 10 hours, thereby reducing the nitrogen content of the silicon carbide powder.

Abstract: The present invention discloses a semiconductor structure with an epitaxial layer and method of manufacturing the same. The semiconductor structure with the epitaxial layer includes a substrate, a blocking layer on the substrate, multiple recesses formed in the substrate, wherein the recess extends along <111> crystal faces of the substrate, and an epitaxial layer on the blocking layer, wherein the epitaxial layer is provided with a buried portion in each recess and an above-surface portion formed on the blocking layer.

Abstract: Methods and apparatus for processing a substrate. The method, for example, includes directing a stream of material from a PVD source at a first non-perpendicular angle to selectively deposit the material on a top portion of one or more features on the substrate and form a first overhang and a second overhang extending beyond a third sidewall and a fourth sidewall that are arranged parallel and opposite to each other and at non-zero angles to a first sidewall and a second sidewall, the first sidewall and the second sidewall defining a length of the one or more features, and the third sidewall and fourth sidewall defining a width of the one or more features; performing an etch process to selectively remove some of the first sidewall and the second sidewall while keeping the third sidewall and fourth sidewall in intact and maintaining the width of the one or more features.

Abstract: A substrate cleaning method includes supplying, onto a substrate, a film-forming processing liquid including a volatile component and a polar organic material that forms a processing film on the substrate, volatilizing the volatile component such that the film-forming processing liquid solidifies or cures and forms the processing film on the substrate, supplying, to the processing film formed on the substrate, a peeling processing liquid that peels off the processing film from the substrate and includes a non-polar solvent, and supplying, to the processing film, a dissolution processing liquid that dissolves the processing film and includes a polar solvent after the supplying of the peeling processing liquid. The non-polar solvent does not contain water, and the polar solvent does not contain water.

Abstract: The method includes the steps of: preparing a single crystal SiC including an upper surface 10a and a lower surface 10b and provided with a micropipe 11 penetrating from the upper surface 10a to the lower surface 10b; forming a first seed layer 21 made of a metal material on the upper surface 10a of the single crystal SiC; and forming a first plated layer 31 on the first seed layer 21 so as to close an upper end of the micropipe 11, using an electroplating method.

Abstract: A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate of a first conductivity type, a first silicon carbide semiconductor deposition layer of the first conductivity type, deposited on a front surface of the silicon carbide semiconductor substrate and having an impurity concentration that is lower than that of the silicon carbide semiconductor substrate, a base region of a second conductivity type, selectively provided in the first silicon carbide semiconductor deposition layer at a front surface thereof, and a second silicon carbide semiconductor deposition layer of the second conductivity type, deposited on the front surface of the first silicon carbide semiconductor deposition layer. The base region has an impurity concentration of 1×1018 to 1×1020/cm3 and a thickness of 0.3 to 1.0 ?m. The second silicon carbide semiconductor deposition layer has a surface defect density of 3 defects/cm2.

Abstract: Methods of in situ fabrication and formation of horizontal nanowires for a semiconductor device employ non-catalytic selective area epitaxial growth to selectively grow a semiconductor material in a selective area opening of predefined asymmetrical geometry. The selective area opening is defined in a dielectric layer to expose a semiconductor layer underlying the dielectric layer. The non-catalytic selective area epitaxial growth is performed at a growth temperature sufficient to also in situ form a linear stress crack of nanoscale width that is nucleated from a location in a vicinity of the selective area opening and that propagates in a uniform direction along a crystal plane of the semiconductor layer in both the semiconductor layer and the dielectric layer as a linear nanogap template. The semiconductor material is further selectively grown to fill the linear nanogap template to in situ form the nanowire that is uniformly linear.

Abstract: A crystal growth apparatus includes: a chamber including a gas inlet, a gas outlet, a welded portion, and a water-cooling portion configured to water-cool a portion at least including the welded portion; an exhaust pump connected to the gas outlet; a dew point instrument disposed between the gas outlet and the exhaust pump, the dew point instrument being configured to measure a dew point of gas passing through the gas outlet.

Abstract: A carrier ring configured to support a substrate during transport to or from a pedestal of a process tool and surrounding the substrate during processing is defined by, an inner annular portion having a first thickness, the inner annular portion defined to be adjacent a substrate support region of the pedestal; a middle annular portion surrounding the inner annular portion, the middle annular portion having a second thickness greater than the first thickness, such that a transition from a top surface of the inner annular portion to a top surface of the middle annular portion defines a first step; an outer annular portion surrounding the middle annular portion, the outer annular portion having a third thickness greater than the second thickness, such that a transition from the top surface of the middle annular portion to a top surface of the outer annular portion defines a second step.

Abstract: A method is described for providing a hydrophilic effect to a fluoropolymer, e.g. polytetrafluoroethylene (PTFE) material. The method comprises obtaining an at least partly hydrophobic fluoropolymer material, applying a plasma and/or ozone activation step and depositing an inorganic coating using an atomic layer deposition process. Plasma activation step and/or said atomic layer deposition process thereby comprises using process parameters determining a high interaction probability between one or more precursors for the atomic layer deposition process and the fluoropolymer material so as to obtain a coated fluoropolymer material having a contact angle with water below 30°.

Abstract: A physical vapor transport growth system includes a growth chamber charged with SiC source material and a SiC seed crystal in spaced relation and an envelope that is at least partially gas-permeable disposed in the growth chamber. The envelope separates the growth chamber into a source compartment that includes the SiC source material and a crystallization compartment that includes the SiC seed crystal. The envelope is formed of a material that is reactive to vapor generated during sublimation growth of a SiC single crystal on the SiC seed crystal in the crystallization compartment to produce C-bearing vapor that acts as an additional source of C during the growth of the SiC single crystal on the SiC seed crystal.

Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.

Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

Abstract: Disclosed are a transition metal dichalcogenide alloy and a method of manufacturing the same. A method of manufacturing a transition metal dichalcogenide alloy according to an embodiment of the present disclosure includes a step of depositing transition metal dichalcogenide on a substrate using atomic layer deposition (ALD); and a step of forming a transition metal dichalcogenide alloy by thermally treating the transition metal dichalcogenide with a sulfur compound.

Abstract: Single crystal silicon carbide epitaxial layer on an off-axis substrate are manufactured by placing the substrate in an epitaxial growth reactor, growing a first layer of epitaxial silicon carbide on the substrate, interrupting the growth of the first layer of epitaxial silicon carbide, etching the first layer of epitaxial silicon carbide to reduce the thickness of the first layer, and regrowing a second layer of epitaxial silicon carbide on the first layer of epitaxial silicon carbide. Carrot defects may be terminated by the process of interrupting the epitaxial growth process, etching the grown layer and regrowing a second layer of epitaxial silicon carbide. The growth interruption/etching/regrowth may be repeated multiple times. A silicon carbide epitaxial layer has at least one carrot defect that is terminated within the epitaxial layer.

Abstract: A semi-insulating silicon carbide monocrystal and a method of growing the same are disclosed. The semi-insulating silicon carbide monocrystal comprises intrinsic impurities, deep energy level dopants and intrinsic point defects. The intrinsic impurities are introduced unintentionally during manufacture of the silicon carbide monocrystal, and the deep energy level dopants and the intrinsic point defects are doped or introduced intentionally to compensate for the intrinsic impurities. The intrinsic impurities include shallow energy level donor impurities and shallow energy level acceptor impurities. A sum of a concentration of the deep energy level dopants and a concentration of the intrinsic point defects is greater than a difference between a concentration of the shallow energy level donor impurities and a concentration of the shallow energy level acceptor impurities, and the concentration of the intrinsic point defects is less than the concentration of the deep energy level dopants.

Abstract: A single-crystal diamond growth base material on which single-crystal diamond is grown having at least a base substrate of a material having a linear expansion coefficient smaller than that of MgO and not smaller than 0.5×10?6/K; a single-crystal MgO layer formed on a face of the base substrate where the single-crystal diamond is grown by a bonding method; and a film constituted of any one of an iridium film, a rhodium film, and a platinum film heteroepitaxially grown on the single-crystal MgO layer.

Abstract: An array of nanowires and method thereof. The array of nanowires includes a plurality of nanowires. The plurality of nanowires includes a plurality of first ends and a plurality of second ends respectively. For each of the plurality of nanowires, a corresponding first end selected from the plurality of first ends and a corresponding second end selected from the plurality of second ends are separated by a distance of at least 200 ?m. All nanowires of the plurality of nanowires are substantially parallel to each other.

Abstract: At least two types of dielectric materials such as oxide nanosheets having a layered perovskite structure that differ from each other are laminated, and the nanosheets are bonded to each other via an ionic material, thereby producing a superlattice structure-having ferroelectric thin film. Having the layered structure, the film can exhibit ferroelectricity as a whole, though not using a ferroelectric material therein. Accordingly, there is provided a ferroelectric film based on a novel principle, which is favorable for ferroelectric memories and others and which is free from a size effect even though extremely thinned.

Abstract: Methods and apparatus for deposition of materials on substrates are provided herein. In some embodiments, an apparatus may include a process chamber having a substrate support; a heating system to provide heat energy to the substrate support; a gas inlet port disposed to a first side of the substrate support to provide at least one of a first process gas or a second process gas across a processing surface of the substrate; a first gas distribution conduit disposed above the substrate support and having one or more first outlets disposed along the length of the first gas distribution conduit to provide a third process gas to the processing surface of the substrate, wherein the one or more first outlets are substantially linearly arranged; and an exhaust manifold disposed to a second side of the substrate support opposite the gas inlet port to exhaust the process gases from the process chamber.

Abstract: Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (PbxLay)(ZrzTi(1-z))O3 [wherein 0.9<x<1.3, 0?y<0.1, and 0?z<0.9 are satisfied] with a composite oxide (B) or a carboxylic acid (B) represented by general formula (2): CnH2n+1COOH [wherein 3?n?7 is satisfied]. The composite oxide (B) contains one or at least two elements selected from the group consisting of P (phosphorus), Si, Ce, and Bi and one or at least two elements selected from the group consisting of Sn, Sm, Nd, and Y (yttrium).

Abstract: A process for preparing a vitreous carbon including the steps of: (I) providing a curable low viscosity liquid carbon precursor formulation comprising (a) at least one aromatic epoxy resin; and (b)(i) at least one aromatic co-reactive curing agent, (b) (ii) at least one catalytic curing agent, or (b)(iii) a mixture thereof; wherein the liquid precursor composition has a neat viscosity of less than 10,000 mPa·s at 25° C.

Abstract: This method for evaluating an oxide semiconductor thin film includes evaluating the stress stability of an oxide semiconductor thin film on the basis of the light emission intensity of luminescent light excited when radiating an electron beam or excitation light at a sample at which the oxide semiconductor thin film is formed. The stress stability of the oxide semiconductor thin film is evaluated on the basis of the light emission intensity (L1) observed in the range of 1.6-1.9 eV of the luminescent light excited from the oxide semiconductor thin film.

Abstract: Provided is a shield member and an apparatus for growing a single crystal equipped with the shield member. Such a shield member includes: a vessel for growing the single crystal; a raw material storage part positioned at a lower portion of the vessel for growing the single crystal; a substrate supporting part, positioned above the raw material storage part to support the substrate; and a heating apparatus positioned at a an outer periphery of the vessel for growing the single crystal, thereby sublimating the raw material from the raw material storage part to grow the single crystal of the raw material onto the substrate, in which a plurality of permeation holes through which the raw material gas passes is formed. The shield member is configured such that the heat capacity thereof increases from the center to the outer periphery.

Abstract: A method for producing a compound semiconductor crystal, includes; a sacrificial layer formation step of forming a sacrificial layer containing Cx1Siy1Gez1Sn1-x1-y1-z1 (0?x1<1, 0?y1?1, 0?z1?1, and 0<x1+y1+z1?1), on a base wafer whose surface is made of a silicon crystal; a crystal formation step of forming, on the sacrificial layer, a compound semiconductor crystal lattice-matching or pseudo lattice-matching the sacrificial layer; and a crystal removal step of removing the compound semiconductor crystal from the base wafer, by etching the sacrificial layer.

Abstract: A method of operating a film deposition apparatus including a turntable provided in a vacuum chamber and configured to rotate a substrate mounted thereon, a first reaction gas supplying portion, a second reaction gas supplying portion, a separation area, a first vacuum evacuation port for mainly evacuating the first reaction gas, a second vacuum evacuation port for mainly evacuating the second reaction gas, and a cleaning gas supplying portion for supplying a cleaning gas to clean the turntable, the method includes a cleaning step of supplying the cleaning gas from the cleaning gas supplying portion into the vacuum chamber while terminating the evacuation from the first vacuum evacuation port and performing the evacuation from the second vacuum evacuation port.

Abstract: Methods of making Si-containing films that contain relatively high levels of Group III or Group V dopants involve chemical vapor deposition using trisilane and a dopant precursor. Extremely high levels of substitutional incorporation may be obtained, including crystalline silicon films that contain at least about 3×1020 atoms cm?3 of an electrically active dopant. Substitutionally doped Si-containing films may be selectively deposited onto the crystalline surfaces of mixed substrates by introducing an etchant gas during deposition.