With Decomposition Of A Precursor (except Impurity Or Dopant Precursor) Composed Of Diverse Atoms (e.g., Cvd) Patents (Class 117/88)
  • Patent number: 10294584
    Abstract: A physical vapor transport growth system includes a growth chamber charged with SiC source material and a SiC seed crystal in spaced relation and an envelope that is at least partially gas-permeable disposed in the growth chamber. The envelope separates the growth chamber into a source compartment that includes the SiC source material and a crystallization compartment that includes the SiC seed crystal. The envelope is formed of a material that is reactive to vapor generated during sublimation growth of a SiC single crystal on the SiC seed crystal in the crystallization compartment to produce C-bearing vapor that acts as an additional source of C during the growth of the SiC single crystal on the SiC seed crystal.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: May 21, 2019
    Assignee: II-VI INCORPORATED
    Inventors: Avinash K. Gupta, Ilya Zwieback, Edward Semenas, Marcus L. Getkin, Patrick D. Flynn
  • Patent number: 10153207
    Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: December 11, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ferruccio Frisina, Giuseppe Abbondanza
  • Patent number: 9991411
    Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: June 5, 2018
    Assignee: Artilux Corporation
    Inventors: Szu-Lin Cheng, Han-Din Liu, Shu-Lu Chen, Yun-Chung Na, Hui-Wen Chen
  • Patent number: 9963343
    Abstract: Disclosed are a transition metal dichalcogenide alloy and a method of manufacturing the same. A method of manufacturing a transition metal dichalcogenide alloy according to an embodiment of the present disclosure includes a step of depositing transition metal dichalcogenide on a substrate using atomic layer deposition (ALD); and a step of forming a transition metal dichalcogenide alloy by thermally treating the transition metal dichalcogenide with a sulfur compound.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: May 8, 2018
    Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hyungjun Kim, Kyung Yong Ko, Kyunam Park
  • Patent number: 9903046
    Abstract: Single crystal silicon carbide epitaxial layer on an off-axis substrate are manufactured by placing the substrate in an epitaxial growth reactor, growing a first layer of epitaxial silicon carbide on the substrate, interrupting the growth of the first layer of epitaxial silicon carbide, etching the first layer of epitaxial silicon carbide to reduce the thickness of the first layer, and regrowing a second layer of epitaxial silicon carbide on the first layer of epitaxial silicon carbide. Carrot defects may be terminated by the process of interrupting the epitaxial growth process, etching the grown layer and regrowing a second layer of epitaxial silicon carbide. The growth interruption/etching/regrowth may be repeated multiple times. A silicon carbide epitaxial layer has at least one carrot defect that is terminated within the epitaxial layer.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: February 27, 2018
    Assignee: Cree, Inc.
    Inventors: Michael John O'Loughlin, Joseph John Sumakeris
  • Patent number: 9893152
    Abstract: A semi-insulating silicon carbide monocrystal and a method of growing the same are disclosed. The semi-insulating silicon carbide monocrystal comprises intrinsic impurities, deep energy level dopants and intrinsic point defects. The intrinsic impurities are introduced unintentionally during manufacture of the silicon carbide monocrystal, and the deep energy level dopants and the intrinsic point defects are doped or introduced intentionally to compensate for the intrinsic impurities. The intrinsic impurities include shallow energy level donor impurities and shallow energy level acceptor impurities. A sum of a concentration of the deep energy level dopants and a concentration of the intrinsic point defects is greater than a difference between a concentration of the shallow energy level donor impurities and a concentration of the shallow energy level acceptor impurities, and the concentration of the intrinsic point defects is less than the concentration of the deep energy level dopants.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: February 13, 2018
    Assignee: Institute of Physics, Chinese Academy of Sciences
    Inventors: Xiaolong Chen, Chunjun Liu, Tonghua Peng, Longyuan Li, Bo Wang, Gang Wang, Wenjun Wang, Yu Liu
  • Patent number: 9752255
    Abstract: A single-crystal diamond growth base material on which single-crystal diamond is grown having at least a base substrate of a material having a linear expansion coefficient smaller than that of MgO and not smaller than 0.5×10?6/K; a single-crystal MgO layer formed on a face of the base substrate where the single-crystal diamond is grown by a bonding method; and a film constituted of any one of an iridium film, a rhodium film, and a platinum film heteroepitaxially grown on the single-crystal MgO layer.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: September 5, 2017
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hitoshi Noguchi, Shozo Shirai
  • Patent number: 9735022
    Abstract: An array of nanowires and method thereof. The array of nanowires includes a plurality of nanowires. The plurality of nanowires includes a plurality of first ends and a plurality of second ends respectively. For each of the plurality of nanowires, a corresponding first end selected from the plurality of first ends and a corresponding second end selected from the plurality of second ends are separated by a distance of at least 200 ?m. All nanowires of the plurality of nanowires are substantially parallel to each other.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: August 15, 2017
    Assignee: ALPHABET ENERGY, INC.
    Inventors: Mingqiang Yi, Matthew L. Scullin, Gabriel Matus, Dawn L. Hilken, Chii Guang Lee, Sylvain Muckenhirn
  • Patent number: 9543500
    Abstract: At least two types of dielectric materials such as oxide nanosheets having a layered perovskite structure that differ from each other are laminated, and the nanosheets are bonded to each other via an ionic material, thereby producing a superlattice structure-having ferroelectric thin film. Having the layered structure, the film can exhibit ferroelectricity as a whole, though not using a ferroelectric material therein. Accordingly, there is provided a ferroelectric film based on a novel principle, which is favorable for ferroelectric memories and others and which is free from a size effect even though extremely thinned.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: January 10, 2017
    Assignee: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Minoru Osada, Takayoshi Sasaki
  • Patent number: 9499905
    Abstract: Methods and apparatus for deposition of materials on substrates are provided herein. In some embodiments, an apparatus may include a process chamber having a substrate support; a heating system to provide heat energy to the substrate support; a gas inlet port disposed to a first side of the substrate support to provide at least one of a first process gas or a second process gas across a processing surface of the substrate; a first gas distribution conduit disposed above the substrate support and having one or more first outlets disposed along the length of the first gas distribution conduit to provide a third process gas to the processing surface of the substrate, wherein the one or more first outlets are substantially linearly arranged; and an exhaust manifold disposed to a second side of the substrate support opposite the gas inlet port to exhaust the process gases from the process chamber.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: November 22, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mehmet Tugrul Samir, Nyi Oo Myo
  • Patent number: 9502636
    Abstract: Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (PbxLay)(ZrzTi(1-z))O3 [wherein 0.9<x<1.3, 0?y<0.1, and 0?z<0.9 are satisfied] with a composite oxide (B) or a carboxylic acid (B) represented by general formula (2): CnH2n+1COOH [wherein 3?n?7 is satisfied]. The composite oxide (B) contains one or at least two elements selected from the group consisting of P (phosphorus), Si, Ce, and Bi and one or at least two elements selected from the group consisting of Sn, Sm, Nd, and Y (yttrium).
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: November 22, 2016
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventors: Jun Fujii, Hideaki Sakurai, Takashi Noguchi, Nobuyuki Soyama
  • Patent number: 9428389
    Abstract: A process for preparing a vitreous carbon including the steps of: (I) providing a curable low viscosity liquid carbon precursor formulation comprising (a) at least one aromatic epoxy resin; and (b)(i) at least one aromatic co-reactive curing agent, (b) (ii) at least one catalytic curing agent, or (b)(iii) a mixture thereof; wherein the liquid precursor composition has a neat viscosity of less than 10,000 mPa·s at 25° C.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: August 30, 2016
    Assignee: BLUE CUBE IP LLC
    Inventors: Hamed Lakrout, Maurice J. Marks, Ludovic Valette
  • Patent number: 9316589
    Abstract: This method for evaluating an oxide semiconductor thin film includes evaluating the stress stability of an oxide semiconductor thin film on the basis of the light emission intensity of luminescent light excited when radiating an electron beam or excitation light at a sample at which the oxide semiconductor thin film is formed. The stress stability of the oxide semiconductor thin film is evaluated on the basis of the light emission intensity (L1) observed in the range of 1.6-1.9 eV of the luminescent light excited from the oxide semiconductor thin film.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: April 19, 2016
    Assignee: Kobe Steel, Ltd.
    Inventors: Kazushi Hayashi, Toshihiro Kugimiya, Tomoya Kishi, Aya Miki
  • Patent number: 9222197
    Abstract: Provided is a shield member and an apparatus for growing a single crystal equipped with the shield member. Such a shield member includes: a vessel for growing the single crystal; a raw material storage part positioned at a lower portion of the vessel for growing the single crystal; a substrate supporting part, positioned above the raw material storage part to support the substrate; and a heating apparatus positioned at a an outer periphery of the vessel for growing the single crystal, thereby sublimating the raw material from the raw material storage part to grow the single crystal of the raw material onto the substrate, in which a plurality of permeation holes through which the raw material gas passes is formed. The shield member is configured such that the heat capacity thereof increases from the center to the outer periphery.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: December 29, 2015
    Assignee: SHOWA DENKO K.K.
    Inventor: Akihiro Matsuse
  • Patent number: 9214342
    Abstract: A method for producing a compound semiconductor crystal, includes; a sacrificial layer formation step of forming a sacrificial layer containing Cx1Siy1Gez1Sn1-x1-y1-z1 (0?x1<1, 0?y1?1, 0?z1?1, and 0<x1+y1+z1?1), on a base wafer whose surface is made of a silicon crystal; a crystal formation step of forming, on the sacrificial layer, a compound semiconductor crystal lattice-matching or pseudo lattice-matching the sacrificial layer; and a crystal removal step of removing the compound semiconductor crystal from the base wafer, by etching the sacrificial layer.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: December 15, 2015
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventor: Hiroyuki Sazawa
  • Patent number: 9209011
    Abstract: A method of operating a film deposition apparatus including a turntable provided in a vacuum chamber and configured to rotate a substrate mounted thereon, a first reaction gas supplying portion, a second reaction gas supplying portion, a separation area, a first vacuum evacuation port for mainly evacuating the first reaction gas, a second vacuum evacuation port for mainly evacuating the second reaction gas, and a cleaning gas supplying portion for supplying a cleaning gas to clean the turntable, the method includes a cleaning step of supplying the cleaning gas from the cleaning gas supplying portion into the vacuum chamber while terminating the evacuation from the first vacuum evacuation port and performing the evacuation from the second vacuum evacuation port.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: December 8, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Hitoshi Kato, Shigehiro Miura
  • Patent number: 9190515
    Abstract: Methods of making Si-containing films that contain relatively high levels of Group III or Group V dopants involve chemical vapor deposition using trisilane and a dopant precursor. Extremely high levels of substitutional incorporation may be obtained, including crystalline silicon films that contain at least about 3×1020 atoms cm?3 of an electrically active dopant. Substitutionally doped Si-containing films may be selectively deposited onto the crystalline surfaces of mixed substrates by introducing an etchant gas during deposition.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 17, 2015
    Assignee: ASM America, Inc.
    Inventor: Matthias Bauer
  • Patent number: 9039834
    Abstract: Non-polar (11 20) a-plane gallium nitride (GaN) films with planar surfaces are grown on (1 102) r-plane sapphire substrates by employing a low temperature nucleation layer as a buffer layer prior to a high temperature growth of the non-polar (11 20) a-plane GaN thin films.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 26, 2015
    Assignee: The Regents of the University of California
    Inventors: Michael D. Craven, James Stephen Speck
  • Patent number: 9034104
    Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A single-component oxide semiconductor layer is formed over a substrate; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a single-component oxide semiconductor layer including single crystal regions is formed; and a multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takuya Hirohashi, Masahiro Takahashi, Takashi Shimazu
  • Patent number: 9034103
    Abstract: In various embodiments, methods of forming single-crystal AlN include providing a substantially undoped polycrystalline AlN ceramic having an oxygen concentration less than approximately 100 ppm, forming a single-crystal bulk AlN crystal by a sublimation-recondensation process at a temperature greater than approximately 2000° C., and cooling the bulk AlN crystal to a first temperature between approximately 1500° C. and approximately 1800° C. at a first rate less than approximately 250° C./hour.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: May 19, 2015
    Assignee: CRYSTAL IS, INC.
    Inventors: Sandra B. Schujman, Shailaja P. Rao, Robert T. Bondokov, Kenneth E. Morgan, Glen A. Slack, Leo J. Schowalter
  • Patent number: 9028612
    Abstract: In various embodiments, non-zero thermal gradients are formed within a growth chamber both substantially parallel and substantially perpendicular to the growth direction during formation of semiconductor crystals, where the ratio of the two thermal gradients (parallel to perpendicular) is less than 10, by, e.g., arrangement of thermal shields outside of the growth chamber.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: May 12, 2015
    Assignee: Crystal IS, Inc.
    Inventors: Robert T. Bondokov, Shailaja P. Rao, Shawn Robert Gibb, Leo J. Schowalter
  • Patent number: 9023427
    Abstract: Atomic layer deposition of multi-component, preferably multi-component oxide, thin films. Provide herein is a method for depositing a multi-component oxide film by, for example, an ALD or PEALD process, wherein the process comprises at least two individual metal oxide deposition cycles. The method provided herein has particular advantages in producing multi-component oxide films having superior uniformity. A method is presented, for example, including depositing multi-component oxide films comprising components A?B?O by ALD comprising mixing two individual metal oxides deposition cycles A+O and B+O, wherein the subcycle order is selected in such way that as few as possible consecutive deposition subcycles for A+O or B+O are performed.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: May 5, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Raija Matero, Tom Blomberg
  • Patent number: 9023306
    Abstract: The invention relates to a single crystal boron doped CVD diamond that has a toughness of at least about 22 MPa m1/2. The invention further relates to a method of manufacturing single crystal boron doped CVD diamond. The growth rate of the diamond can be from about 20-100 ?m/h.
    Type: Grant
    Filed: May 5, 2009
    Date of Patent: May 5, 2015
    Assignee: Carnegie Institution of Washington
    Inventors: Russell J. Hemley, Ho-Kwang Mao, Chih-Shiue Yan, Qi Liang
  • Patent number: 9017633
    Abstract: Single crystal diamond material produced using chemical vapour deposition (CVD), and particularly diamond material having properties suitable for use in optical applications such as lasers, is disclosed. In particular, a CVD single crystal diamond material having preferred characteristics of longest linear internal dimension, birefringence and absorption coefficient, when measured at room temperature, is disclosed. Uses of the diamond material, including in a Raman laser, and methods of producing the diamond are also disclosed.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: April 28, 2015
    Assignee: Element Six Technologies Limited
    Inventors: Ian Friel, Sarah Louise Geoghegan, Daniel James Twitchen, Joseph Michael Dodson
  • Patent number: 9011599
    Abstract: A method of determining a temperature in a deposition reactor includes the steps of depositing a first epitaxial layer of silicon germanium on a substrate, depositing a second epitaxial layer of silicon above the first epitaxial layer, measuring the thickness of the second epitaxial layer and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer. The method may also include heating the deposition reactor to approximately a predetermined temperature using a heating device and a temperature measuring device and generating a signal indicative of a temperature within the deposition reactor. The method may also contain the steps of comparing the measured thickness with a predetermined thickness of the second epitaxial layer corresponding to the predetermined temperature and determining the temperature in the deposition reactor using the measured thickness of the second epitaxial layer and the predetermined thickness of the second epitaxial layer.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: April 21, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jhi-Cherng Lu, Jr-Hung Li, Chii-Horng Li, Pang-Yen Tsai, Bing-Hung Chen, Tze-Liang Lee
  • Patent number: 9005363
    Abstract: Methods of depositing thin film materials having crystalline content are provided. The methods use plasma enhanced chemical vapor deposition. According to one embodiment of the present invention, microcrystalline silicon films are obtained. According to a second embodiment of the present invention, crystalline films of zinc oxide are obtained. According to a third embodiment of the present invention, crystalline films of iron oxide are obtained.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: April 14, 2015
    Assignee: Sencera Energy, Inc.
    Inventors: Russell F Jewett, Steven F Pugh, Paul Wickboldt
  • Publication number: 20150096488
    Abstract: The present disclosure generally relates to systems and methods for growing and preferentially volumetrically enhancing group III-V nitride crystals. In particular the systems and methods include diffusing constituent species of the crystals through a porous body composed of the constituent species, where the species freely nucleate to grow large nitride crystals. The systems and methods further include using thermal gradients and/or chemical driving agents to enhance or limit crystal growth in one or more planes.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Inventors: Peng Lu, Jason Schmitt
  • Publication number: 20150079329
    Abstract: Bulk single crystals of AlN having a diameter greater than about 25 mm and dislocation densities of about 10,000 cm?2 or less and high-quality AlN substrates having surfaces of any desired crystallographic orientation fabricated from these bulk crystals.
    Type: Application
    Filed: October 22, 2014
    Publication date: March 19, 2015
    Inventors: Leo Schowalter, Glen A. Slack, Juan Carlos Rojo, Robert T. Bondokov, Kenneth E. Morgan, Joseph A. Smart
  • Publication number: 20150075421
    Abstract: The present invention in one preferred embodiment discloses a new design of HVPE reactor, which can grow gallium nitride for more than one day without interruption. To avoid clogging in the exhaust system, a second reactor chamber is added after a main reactor where GaN is produced. The second reactor chamber may be configured to enhance ammonium chloride formation, and the powder may be collected efficiently in it. To avoid ammonium chloride formation in the main reactor, the connection between the main reactor and the second reaction chamber can be maintained at elevated temperature. In addition, the second reactor chamber may have two or more exhaust lines. If one exhaust line becomes clogged with powder, the valve for an alternative exhaust line may open and the valve for the clogged line may be closed to avoid overpressuring the system. The quartz-made main reactor may have e.g. a pyrolytic boron nitride liner to collect polycrystalline gallium nitride efficiently.
    Type: Application
    Filed: May 22, 2014
    Publication date: March 19, 2015
    Applicant: SIXPOINT MATERIALS, INC.
    Inventors: Tadao HASHIMOTO, Edward LETTS
  • Patent number: 8980001
    Abstract: A susceptor having a recessed portion and a ring-like step portion is arranged in a reaction chamber, and a plurality of through bores are formed in a bottom wall in the recessed portion excluding the step portion. A lift pin inserted in each of the through bores temporarily holds a wafer, then a lower surface of an outer peripheral portion of the wafer is mounted on the step portion to accommodate the wafer in the recessed portion, and a raw material gas is circulated in the reaction chamber to form an epitaxial layer on a wafer surface in the recessed portion. When forming the epitaxial layer on the wafer surface, the lift pin protrudes upwards from an upper surface of the bottom wall, and a height h of a top portion of the lift pin based on the upper surface of the bottom wall as a reference is set to the range from a position where the height h exceeds 0 mm to a position immediately before the lift pin comes into contact with the wafer.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: March 17, 2015
    Assignee: Sumco Corporation
    Inventors: Masaya Sakurai, Masayuki Ishibashi
  • Patent number: 8980002
    Abstract: Methods are disclosed for growing group III-nitride semiconductor compounds with advanced buffer layer technique. In an embodiment, a method includes providing a suitable substrate in a processing chamber of a hydride vapor phase epitaxy processing system. The method includes forming an AlN buffer layer by flowing an ammonia gas into a growth zone of the processing chamber, flowing an aluminum halide containing precursor to the growth zone and at the same time flowing additional hydrogen halide or halogen gas into the growth zone of the processing chamber. The additional hydrogen halide or halogen gas that is flowed into the growth zone during buffer layer deposition suppresses homogeneous AlN particle formation. The hydrogen halide or halogen gas may continue flowing for a time period while the flow of the aluminum halide containing precursor is turned off.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Yuriy Melnik, Lu Chen, Hidehiro Kojiri
  • Patent number: 8980003
    Abstract: In a method of manufacturing a silicon carbide single crystal, a silicon carbide substrate having a surface of one of a (11-2n) plane and a (1-10n) plane, where n is any integer number greater than or equal to 0, is prepared. An epitaxial layer having a predetermined impurity concentration is grown on the one of the (11-2n) plane and the (1-10n) plane of the silicon carbide substrate by a chemical vapor deposition method so that a threading dislocation is discharged from a side surface of the epitaxial layer. A silicon carbide single crystal is grown into a bulk shape by a sublimation method on the one of the (11-2n) plane and the (1-10n) plane of the epitaxial layer from which the threading dislocation is discharged.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: March 17, 2015
    Assignee: DENSO CORPORATION
    Inventors: Hiroki Watanabe, Yasuo Kitou, Masami Naito
  • Patent number: 8980000
    Abstract: In a rotating disk reactor for growing epitaxial layers on substrate or other CVD reactor system, gas directed toward the substrates at gas inlets at different radial distances from the axis of rotation of the disk has both substantially the same gas flow rate/velocity and substantially the same gas density at each inlet. The gas directed toward portions of the disk remote from the axis may include a higher concentration of a reactant gas than the gas directed toward portions of the disk close to the axis, so that portions of the substrate surfaces at different distances from the axis receive substantially the same amount of reactant gas per unit area, and a combination of carrier gases with different relative molecular weights at different radial distances from the axis of rotation are employed to substantially make equal the gas density in each region of the reactor.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: March 17, 2015
    Assignee: Veeco Instruments Inc.
    Inventors: Bojan Mitrovic, Alex Gurary, William Quinn, Eric A. Armour
  • Publication number: 20150068447
    Abstract: A method of producing silicon carbide is disclosed. The method comprises the steps of providing a sublimation furnace comprising a furnace shell, at least one heating element positioned outside the furnace shell, and a hot zone positioned inside the furnace shell surrounded by insulation. The hot zone comprises a crucible with a silicon carbide precursor positioned in the lower region and a silicon carbide seed positioned in the upper region. The hot zone is heated to sublimate the silicon carbide precursor, forming silicon carbide on the bottom surface of the silicon carbide seed. Also disclosed is the sublimation furnace to produce the silicon carbide as well as the resulting silicon carbide material.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 12, 2015
    Inventors: Roman V. Drachev, Parthasarathy Santhanaraghavan, Andriy M. Andrukhiv, David S. Lyttle
  • Publication number: 20150072100
    Abstract: A silicon carbide epitaxial substrate having a main surface (second main surface) includes: a base substrate; and a silicon carbide epitaxial layer formed on the base substrate and including the main surface (second main surface), the second main surface having a surface roughness of 0.6 nm or less, a ratio of standard deviation of a nitrogen concentration in the silicon carbide epitaxial layer at a surface layer including the main surface (second main surface) within a plane of the silicon carbide epitaxial substrate to an average value of the nitrogen concentration in the silicon carbide epitaxial layer at the surface layer within the plane of the silicon carbide epitaxial substrate being 15% or less.
    Type: Application
    Filed: April 11, 2014
    Publication date: March 12, 2015
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Jun Genba, Taro Nishiguchi, Hideyuki Doi, Akira Matsushima
  • Patent number: 8975166
    Abstract: Methods and apparatus for generating and delivering atomic hydrogen to the growth front during the deposition of a III-V film are provided. The apparatus adapts HWCVD technology to a system wherein the Group III precursor and the Group V precursor are delivered to the surface in isolated processing environments within the system. Multiple HWCVD units may be incorporated so that the atomic hydrogen parameters may be varied in a combinatorial manner for the development of III-V films.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: March 10, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Thai Cheng Chua, Timothy Joseph Franklin, Philip A. Kraus
  • Patent number: 8961689
    Abstract: Systems and methods for the production of polysilicon or another material via chemical vapor deposition in a reactor are provided in which gas is distributed using a silicon standpipe. The silicon standpipe can be attached to the reactor system using a nozzle coupler such that precursor gases may be injected to various portions of the reaction chamber. As a result, gas flow can be improved throughout the reactor chamber, which can increase the yield of polysilicon, improve the quality of polysilicon, and reduce the consumption of energy.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: February 24, 2015
    Assignee: GTAT Corporation
    Inventor: Wenjun Qin
  • Patent number: 8961920
    Abstract: Embodiments of methods of altering the color of diamonds are disclosed. In an embodiment, a method for altering the color of diamonds includes identifying and selecting a diamond having a suitable nitrogen content, HPHT processing the selected diamond under diamond-stable conditions to alter the color of the selected diamond from a first color to a second color, irradiating the HPHT-processed diamond with an electron source having an energy between about 1 MeV and about 20 MeV so as to alter the color of the selected diamond from the second color to a third color, and annealing the irradiated diamond either under partial vacuum conditions, or under HPHT diamond-stable conditions so as to alter the color from the third color to a fourth color (e.g., pink, red, or purple, depending on the nitrogen content of the selected diamond).
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: February 24, 2015
    Assignee: US Synthetic Corporation
    Inventor: Louis McConkie Pope, II
  • Publication number: 20150048485
    Abstract: Methods of forming germanium-tin films using germane as a precursor are disclosed. Exemplary methods include growing films including germanium and tin in an epitaxial chemical vapor deposition reactor, wherein a ratio of a tin precursor to germane is less than 0.1. Also disclosed are structures and devices including germanium-tin films formed using the methods described herein.
    Type: Application
    Filed: August 14, 2013
    Publication date: February 19, 2015
    Applicant: ASM IP Holding B.V.
    Inventor: John Tolle
  • Patent number: 8945305
    Abstract: Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 3, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 8945302
    Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Mosaic Crystals Ltd.
    Inventor: Moshe Einav
  • Patent number: 8945304
    Abstract: A system and method A method of growing an elongate nanoelement from a growth surface includes: a) cleaning a growth surface on a base element; b) providing an ultrahigh vacuum reaction environment over the cleaned growth surface; c) generating a reactive gas of an atomic material to be used in forming the nanoelement; d) projecting a stream of the reactive gas at the growth surface within the reactive environment while maintaining a vacuum of at most 1×10?4 Pascal; e) growing the elongate nanoelement from the growth surface within the environment while maintaining the pressure of step c); f) after a desired length of nanoelement is attained within the environment, stopping direction of reactive gas into the environment; and g) returning the environment to an ultrahigh vacuum condition.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: February 3, 2015
    Assignee: The Board of Regents of the Nevada System of Higher Education on behalf of the University of Nevada, Las Vegas University of Nevada
    Inventors: Biswajit Das, Myung B. Lee
  • Patent number: 8936681
    Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 20, 2015
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8936682
    Abstract: A manufacturing method of a SiC single crystal includes growing a SiC single crystal on a surface of a SiC seed crystal, which satisfies following conditions: (i) the SiC seed crystal includes a main growth surface composed of a plurality of sub-growth surfaces; (ii) among directions from an uppermost portion of a {0001} plane on the main growth surface to portions on a periphery of the main growth surface, the SiC seed crystal has a main direction in which a plurality of sub-growth surfaces is arranged; and (iii) an offset angle ?k of a k-th sub-growth surface and an offset angle ?k+1 of a (k+1)-th sub-growth surface satisfy a relationship of ?k<?k+1.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: January 20, 2015
    Assignee: DENSO CORPORATION
    Inventors: Yasushi Urakami, Itaru Gunjishima, Ayumu Adachi
  • Publication number: 20150013593
    Abstract: A method of forming a graphene film on a surface (20) of a substrate comprises the steps of: (i) locating a carbon source (22) at, or in a vicinity of the surface (20) of the substrate; (ii) controlling ambient conditions at the surface (20) of the substrate to inhibit graphene nucleation on the surface (20); (iii) applying a temporary change of one or more of the ambient conditions at a localised site (30) on the surface (20) of the substrate to initiate graphene nucleation at the localised site (30); (iv) controlling the ambient conditions at the surface (20) of the substrate, following initiation of graphene nucleation at the localised site, to simultaneously inhibit graphene nucleation and enable graphene growth on the surface (20).
    Type: Application
    Filed: February 4, 2013
    Publication date: January 15, 2015
    Applicant: Universiteit Leiden
    Inventor: Guocai Dong
  • Patent number: 8921980
    Abstract: An aluminum nitride single crystal in the form of polygonal columns, the polygonal columns having the following properties [a] to [c]: [a] the content of a metal impurity is below a detection limit, [b] the average bottom area is from 5×103 to 2×105 ?m2, and [c] the average height is 50 ?m to 5 mm. The above aluminum nitride single crystal is preferably obtainable in a method including the steps of sublimating an aluminum nitride starting material (A) containing 0.1 to 30% by mass of a rare earth oxide by heating the starting material at a temperature of not lower than 2000° C., depositing aluminum nitride on a hexagonal single crystal substrate and thereby growing aluminum nitride single crystal in the shape of polygonal columns.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: December 30, 2014
    Assignees: Meijo University, Tokuyama Corporation
    Inventors: Hiroshi Amano, Yukihiro Kanechika, Masanobu Azuma
  • Patent number: 8920560
    Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: December 30, 2014
    Assignee: Sumco Corporation
    Inventors: Yasuo Koike, Toshiaki Ono, Naoki Ikeda, Tomokazu Katano
  • Publication number: 20140363675
    Abstract: Disclosed are silicon carbide powders and a method of preparing the same. The method includes forming a mixture by mixing a silicon (Si) source, a carbon (C) source, and a silicon carbide (SiC) seed, and reacting the mixture. The silicon carbide (SiC) powders include silicon carbide (SiC) grains having a ?-type crystal phase and a grain size in a range of about 5 ?m to about 100 ?m.
    Type: Application
    Filed: January 18, 2013
    Publication date: December 11, 2014
    Inventors: Byung Sook Kim, Dong Geun Shin, Bum Sup Kim, Jung Eun Han
  • Publication number: 20140353684
    Abstract: A method for fabricating a silicon carbide epitaxial wafer according to the embodiment includes introducing a carbon source and a silicon source into a reactor in which a silicon carbide wafer is provided; heating the reactor; and adjusting an amount of the silicon source or the carbon source introduced into the reactor. A silicon carbide epitaxial wafer according to the embodiment includes a silicon carbide epitaxial layer having a surface roughness of 0.3 nm or less.
    Type: Application
    Filed: December 13, 2012
    Publication date: December 4, 2014
    Applicant: LG INNOTEK CO., LD.
    Inventor: Moo Seong Kim
  • Publication number: 20140338589
    Abstract: Dislocation pile-ups in compositionally graded semiconductor layers are reduced or eliminated, thereby leading to increased semiconductor device yield and manufacturability. This is accomplished by introducing a semiconductor layer having a plurality of threading dislocations distributed substantially uniformly across its surface as a starting layer and/or at least one intermediate layer during growth and relaxation of the compositionally graded layer. The semiconductor layer may include a seed layer disposed proximal to the surface of the semiconductor layer and having the threading dislocations uniformly distributed therein.
    Type: Application
    Filed: July 30, 2014
    Publication date: November 20, 2014
    Inventors: Christopher Leitz, Christopher J. Vineis, Richard Westhoff, Vicky Yang, Matthew T. Currie