Abstract: A silicon-based molten composition according to an exemplary embodiment is used in a solution growing method for forming a silicon carbide single crystal, includes silicon (Si), yttrium (Y), and iron (Fe), and is expressed in Formula 1. SiaYbFec??[Formula 1] In Formula 1, the a is equal to or greater than 0.4 and equal to or less than 0.8, the b is equal to or greater than 0.2 and equal to or less than 0.3, and the c is equal to or greater than 0.1 and equal to or less than 0.2.

Abstract: A manufacturing method of a silicon carbide ingot includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A first surface of the seed faces the raw material. The reactor and the raw material are heated, where part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material. The growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. A diameter of the silicon carbide ingot is greater than a diameter of the seed.

Abstract: There is provided a sample ejection system for ejecting a sample from a flow of fluid, the system comprises: a fluid flow channel for receiving, in use, the flow of fluid; a fluid inlet channel connected to the flow channel and arranged to receive, in use, pressurised fluid; a fluid outlet channel connected to the flow channel at a location downstream in the flow direction of the flow of fluid and comprises an outlet. The system is arranged such that, in use, pressurised fluid is applied to the fluid flow channel via the fluid inlet channel to drive fluid from the region of the fluid flow channel between the fluid inlet and outlet channels through the fluid outlet channel and out of the outlet.

Abstract: An optical waveguide device including an optical waveguide substrate that has an electro-optic effect, is a crystal having anisotropy in thermal expansion rate, has a thickness set to 10 ?m or lower, and includes an optical waveguide and a holding substrate that holds the optical waveguide substrate, the optical waveguide substrate and the holding substrate being joined to each other, in which the holding substrate is formed of a crystal having a lower dielectric constant than the optical waveguide substrate and having anisotropy in thermal expansion rate, and the optical waveguide substrate and the holding substrate are joined to each other such that differences in thermal expansion rate between the optical waveguide substrate and the holding substrate become small in different axial directions on a joint surface.

Abstract: In some embodiments, a semiconductor structure includes: a first region comprising a first epitaxial oxide material; a second region comprising a second epitaxial oxide material; and a chirp layer located between the first and the second regions. The chirp layer can include alternating layers of a plurality of wide bandgap epitaxial oxide material layers (WBG layers) and a plurality of narrow bandgap epitaxial oxide material layers (NBG layers), wherein thicknesses of the NBG layers and the WBG layers change throughout the chirp layer. The WBG layer can comprise (Alx1Ga1?x1)y1Oz1, wherein x1 is from 0 to 1, wherein y1 is from 1 to 3, and wherein z1 is from 2 to 4. The NBG layer can comprise (Alx2Ga1x?2)y2Oz2, wherein x2 is from 0 to 1, wherein y2 is from 1 to 3, and wherein z2 is from 2 to 4, and wherein x1 and x2 are different from one another.

Abstract: The invention relates to a method for fabricating a semiconductor structure. The method comprises fabricating a photonic crystal structure of a first material, in particular a first semiconductor material and selectively removing the first material within a predefined part of the photonic crystal structure. The method further comprises replacing the first material within the predefined part of the photonic crystal structure with one or more second materials by selective epitaxy. The one or more second materials may be in particular semiconductor materials. The invention further relates to devices obtainable by such a method.

Abstract: A method for making a transition metal dichalcogenide crystal having a chemical formula represented as MX2 is provided, wherein M represents a central transition metal element, and X represents a chalcogen element. The method includes providing a MX2 polycrystalline powder, a MX2 seed crystal, and a transport medium. The MX2 polycrystalline powder and the transport medium are placed in a first reaction chamber. The first reaction chamber and the MX2 seed crystal are placed in a second reaction chamber having a source end and a deposition end opposite to the source end. The first reaction chamber is placed at the source end, and the MX2 seed crystal is placed at the deposition end.

Abstract: Methods and wafers for low etch pit density, low slip line density, and low strain indium phosphide are disclosed and may include an indium phosphide single crystal wafer having a diameter of 4 inches or greater, having a measured etch pit density of less than 500 cm?2, and having fewer than 5 dislocations or slip lines as measured by x-ray diffraction imaging. The wafer may have a measured etch pit density of 200 cm?2 or less, or 100 cm?2 or less, or 10 cm?2 or less. The wafer may have a diameter of 6 inches or greater. An area of the wafer with a measured etch pit density of zero may at least 80% of the total area of the surface. An area of the wafer with a measured etch pit density of zero may be at least 90% of the total area of the surface.

Abstract: The invention relates to a method for growing a bulk single crystal, wherein the method comprises the steps of inserting a starting material into a crucible, melting the starting material in the crucible by heating the starting material, arranging a thermal insulation lid at a distance above a melt surface of said melt such that at least a central part of the melt surface is covered by the lid, and growing the bulk single crystal from the melt by controllably cooling the melt with the thermal insulation lid arranged above the melt surface.

Abstract: The invention provides a process for producing a printed article wherein a deposit liquid is provided to a substrate together with a carrier liquid. Also provided is a printed article obtained or obtainable by the process of the invention, such as a printed article. The invention further provides an apparatus suitable for carrying out the process of the invention, comprising devices configured to provide a flow of each of the deposit liquid and carrier liquid to a substrate, a flow channel for carrying each of the said liquids and an aperture through which at least the deposit liquid must pass. In some embodiments, the process of the invention is performed using the apparatus of the invention. The invention therefore also provides the use of the apparatus of the invention to perform the process of the invention.

Abstract: Provided is a method of decomposing a quartz sample, which includes contacting a liquid in which at least a part of a quartz sample to be analyzed is immersed with a gas generated from a mixed acid to decompose at least a part of the quartz sample, wherein the liquid is a liquid containing at least water; and the mixed acid is a mixed acid of hydrogen fluoride and sulfuric acid, and a mole fraction of sulfuric acid in the mixed acid ranges from 0.07 to 0.40.

Abstract: A method for processing a lithium tantalate crystal substrate includes providing a lithium tantalate crystal substrate, roughening the lithium tantalate crystal substrate, providing a catalytic agent, bringing the lithium tantalate crystal substrate and the catalytic agent into contact with each other after the lithium tantalate crystal substrate is roughened, and subjecting the lithium tantalate crystal substrate to a reduction treatment. The reduction treatment is conducted at a temperature not higher than a Curie temperature of the lithium tantalate crystal substrate. The catalytic agent is selected from the group consisting of metal powder, metal gas, and metal carbonate powder.

Abstract: A method for heat-treating a silicon single crystal wafer to control a BMD density thereof to achieve a predetermined BMD density by performing an RTA heat treatment on a silicon single crystal wafer composed of an Nv region in a nitriding atmosphere, and then performing a second heat treatment, the method including: formulating a relational equation for a relation between BMD density and RTA temperature in advance; and determining an RTA temperature for achieving the predetermined BMD density according to the relational equation. Consequently, a method for heat-treating a silicon single crystal wafer for manufacturing an annealed wafer or an epitaxial wafer each having defect-free surface and a predetermined BMD density in a bulk portion thereof.

Abstract: An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. Also disclosed is an optoelectronic semiconductor device for generating light of a predetermined wavelength comprising a substrate and an optical emission region. The optical emission region has an optical emission region band structure configured for generating light of the predetermined wavelength and comprises one or more epitaxial metal oxide layers supported by the substrate.

Abstract: The present invention suppresses anomalous growth of a Group III nitride semiconductor at the periphery of a seed substrate. The invention is directed to a method for producing a Group III nitride semiconductor including feeding a nitrogen-containing gas into a molten mixture of a Group III metal and a flux placed in a furnace, to thereby grow a Group III nitride semiconductor on a seed substrate. The oxygen concentration of the furnace internal atmosphere is elevated after the growth initiation temperature of the Group III nitride semiconductor has been achieved. In a period from the initiation of the growth to a certain timing, the oxygen concentration of the furnace internal atmosphere is controlled to 0.02 ppm or less, and thereafter, to greater than 0.02 ppm and 0.1 ppm or less.

Abstract: Embodiments described herein provide a layered structure that comprises a substrate that includes a first porous multilayer of a first porosity, an active quantum well capping layer epitaxially grown over the first porous multilayer, and a second porous multilayer of the first porosity over the active quantum well capping layer, where the second porous multilayer aligns with the first porous multilayer.

Abstract: Disclosures of the present invention mainly describe a method for manufacturing perovskite solar cell module. At first, a laser scribing is adopted for forming multi transparent conductive films (TCFs) on a transparent substrate. Subsequently, by using a first mask, multi HTLs, active layers, and ETLs are sequentially formed on the TCFs. Consequently, by the use of a second make, each of the ETLs is formed with an electrically connecting layer thereon, such that a perovskite solar cell module comprising a plurality of solar cell units is hence completed on the transparent substrate. It is worth explaining that, during the whole manufacturing process, each of the solar cell units is prevented from receiving bad influences that are provided by laser scribing or manufacture environment, such that each of the solar cell units is able to exhibit outstanding photoelectric conversion efficiency.

Abstract: A method for processing a lithium tantalate crystal substrate includes providing a lithium tantalate crystal substrate and a metallic sheet, roughening at least one of the lithium tantalate crystal substrate and the metallic sheet, bringing the lithium tantalate crystal substrate and the metallic sheet into contact with each other after the at least one thereof is roughened, and subjecting the lithium tantalate crystal substrate to a reduction treatment. The reduction treatment is conducted at a temperature not higher than a Curie temperature of the lithium tantalate crystal substrate.

Abstract: A semiconductor element includes a high-resistivity substrate that includes a ?-Ga2O3-based single crystal including an acceptor impurity, a buffer layer on the high-resistivity substrate, the buffer layer including a ?-Ga2O3-based single crystal, and a channel layer on the buffer layer, the channel layer including a ?-Ga2O3-based single crystal including a donor impurity. A crystalline laminate structure includes a high-resistivity substrate that includes a ?-Ga2O3-based single crystal including an acceptor impurity, a buffer layer on the high-resistivity substrate, the buffer layer including a ?-Ga2O3-based single crystal, and a donor impurity-containing layer on the buffer layer, the donor impurity-containing layer including a ?-Ga2O3-based single crystal including a donor impurity.

Abstract: A GaAs-based compound semiconductor crystal includes a straight body portion having a cylindrical shape, wherein the straight body portion has a diameter of more than or equal to 110 mm and has a length of more than or equal to 100 mm and less than or equal to 400 mm, and the straight body portion has a first end surface and a second end surface having a higher specific resistance than a specific resistance of the first end surface, and a ratio R20/R10 of a specific resistance R20 at the second end surface side to a specific resistance R10 at the first end surface side is more than or equal to 1 and less than or equal to 2.

Abstract: A process separates a main body of a semiconductor substrate from a functional layer. The method includes the steps of implanting ions into a semiconductor substrate through a top surface of the semiconductor substrate to form an ion damage layer underneath the top surface of the semiconductor substrate. After the ions are implanted into the semiconductor substrate, a functional layer is formed on the top surface of the semiconductor substrate. The main body of the semiconductor substrate is then separated from the functional layer. The method also includes forming the functional layer on the semiconductor substrate after ion implanting and then separating the functional layer from the main body of the substrate at the ion damage layer. This method avoids bonding in SOI and can thus reduce process steps and cost.

Abstract: Gas sensors are described herein that are useful for selectively detecting a second gas (e.g. isoprene) in the presence of a first gas (e.g. acetone). The gas sensors include a sensor element which includes a semiconductor sensing material and a porous material. The sensor element is configured so that the porous material absorbs more of the first gas than the second gas. Thus, when the gas being analyzed, such as a mammalian (including human) breath, a greater proportion of the second gas comes into contact with the semiconductor sensing material.

Abstract: A method for producing a solar cell, which produces a single-crystal silicon solar cell by using a single-crystal silicon substrate, including: a high-temperature heat treatment process in which the single-crystal silicon substrate is subjected to heat treatment at 800° C. or higher and 1200° C. or lower, wherein the high-temperature heat treatment process includes a conveying step of loading the single-crystal silicon substrate into a heat treatment apparatus, a heating step of heating the single-crystal silicon substrate, a temperature keeping step of keeping the single-crystal silicon substrate at a predetermined temperature of 800° C. or higher and 1200° C. or lower, and a cooling step of cooling the single-crystal silicon substrate, and, in the high-temperature heat treatment process, the length of time during which the temperature of the single-crystal silicon substrate is 400° C. or higher and 650° C. or lower is set at 5 minutes or less throughout the conveying step and the heating step.

Abstract: In a gallium nitride crystal, a nanovoid density in the crystal is less than 1×105 [cm?2]. A crystal growth apparatus is an apparatus for manufacturing a gallium nitride crystal, wherein a member having a B concentration of less than 1 ppm at least at a surface part is used as a member used at a part where a temperature is 500° C. or higher (high-temperature member) among members exposed to a crystal growth space. When such a crystal growth apparatus is used, a gallium nitride crystal wherein a nanovoid density in the crystal is less than 1×105 [cm?2] is obtained.

Abstract: A coaxial nanocomposite including a core, which includes fibers of a first organic polymer, and a shell, which includes fibers of a second organic polymer, the first polymer and the second polymer forming a heterojunction.

Abstract: A p-type transparent conductive oxide (TCO) mixed metal oxide material layer formed upon a substrate has a formula M1xM2yOz generally, CaxCoyOz more specifically, and Ca3Co4O9 most specifically. Embodiments provide that the p-type TCO mixed metal oxide material may be formed absent an epitaxial crystalline relationship with respect to the substrate while using a sol-gel synthesis method that uses a chelating polymer material and not a block copolymer material.

Abstract: Provided in one embodiment is a method of identifying a stable phase of an ordering binary alloy system comprising a solute element and a solvent element, the method comprising: determining at least three thermodynamic parameters associated with grain boundary segregation, phase separation, and intermetallic compound formation of the ordering binary alloy system; and identifying the stable phase of the ordering binary alloy system based on the first thermodynamic parameter, the second thermodynamic parameter and the third thermodynamic parameter by comparing the first thermodynamic parameter, the second thermodynamic parameter and the third thermodynamic parameter with a predetermined set of respective thermodynamic parameters to identify the stable phase; wherein the stable phase is one of a stable nanocrystalline phase, a metastable nanocrystalline phase, and a non-nanocrystalline phase.

Abstract: A method of calibrating a topography metrology instrument using a calibration reference, which includes a substrate and a plurality of bi-layer stacks. Each bi-layer stack includes a plurality of bi-layer steps. At least one bi-layer step of the plurality of bi-layer steps includes two materials. The at least one bi-layer step of the plurality of bi-layer steps includes an etch stop layer and a bulk layer. The calibration reference includes a calibration reference step profile includes a plurality of predetermined bi-layer stack heights. The calibration reference step profile and the predetermined bi-layer stack heights are measured using a topography metrology instrument. The topography metrology instrument is calibrated based on the measured calibration reference step profile and the measured bi-layer stack heights.

Abstract: An infrared image sensor component includes a semiconductor substrate, an active pixel region disposed on the semiconductor substrate for receiving an infrared ray, and a transistor coupled to the active pixel region. The transistor includes a gate and a source/drain stressor disposed adjacent to the gate. The active pixel region includes a III-V compound material.

Abstract: Provided is a SiC single crystal that has a large growth thickness and contains no inclusions. A SiC single crystal grown by a solution process, wherein the total length M of the outer peripheral section formed by the {1-100} faces on the {0001} growth surface of the SiC single crystal, and the length P of the outer periphery of the growth surface of the SiC single crystal, satisfy the relationship M/P?0.70, and the length in the growth direction of the SiC single crystal is 2 mm or greater.

Abstract: A ferroelectric opening switch is enabled by controlled polarization switching via nucleation in a ferroelectric material, such as BaTiO3, Pb(Zr,Ti)O3, LiNbO3, LiTaO3, or variants thereof. For example, nucleation sites can be provided by mechanical seeding, grain boundaries, or optical illumination. The invention can be used as an opening switch in large scale pulsed-power systems. However, the switch can also be used in compact pulsed-power systems (e.g., as drivers for high power microwave systems), as passive fault limiters for high voltage dc (HVDC) systems, and/or in other high power applications.

Abstract: A method for determining the original position of a wafer in an ingot made from semiconductor material comprises the following steps: measuring the interstitial oxygen concentration in an area of the wafer; measuring the concentration of thermal donors formed in said area of the wafer during a previous solidification of the ingot; determining the effective time of a thermal donor formation anneal undergone by the wafer when solidification of the ingot took place, from the thermal donor concentration and the interstitial oxygen concentration; and determining the original position of the wafer in the ingot from the effective time.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include forming a trench and exposing a portion of a first film at a bottom portion of the trench by removing a portion of a second film by performing dry etching using a gas including a first element. The second film is provided on the first film. The first film includes Alx1Ga1-x1N (0?x1<1). The second film includes Alx2Ga1-x2N (0<x2<1 and x1<x2). The method can include performing heat treatment while causing the portion being exposed of the first film to contact an atmosphere including NH3, forming an insulating film on the portion of the first film after the heat treatment, and forming an electrode on the insulating film.

Abstract: A silicon carbide single crystal includes a spiral dislocation. The spiral dislocation includes a L dislocation having a burgers vector defined as b, which satisfies an equation of b><0001>+1/3<11-20>. The L dislocation has a density equal to or lower than 300 dislocations/cm2, preferably, 100 dislocations/cm2, since the L dislocation has large distortion and causes generation of leakage current. Thus, the silicon carbide single crystal with high quality is suitable for a device production which can suppress the leakage current.

Abstract: A SiC single crystal seed of the present invention has a main surface with an offset angle of at least 2° but not more than 20° relative to the {0001} plane, and at least one sub-growth surface, wherein the sub-growth surface includes an initial facet formation surface that is on the offset upstream side of the main surface and has an inclination angle ? relative to the {0001} plane with an absolute value of less than 2° in any direction, and the initial facet formation surface has a screw dislocation starting point.

Abstract: In an embodiment, a method includes treating an edge region of a wafer including a substrate having an upper surface and one or more epitaxial Group III nitride layers arranged on the upper surface of the substrate, so as to remove material including at least one Group III element from the edge region.

Abstract: A process for preparing crystalline particles of an active principal in the presence of ultrasonic irradiation that comprises contacting a solution of a solute in a solvent in a first flowing stream with an anti-solvent in a second flowing stream causing the mixing thereof, wherein the flow rate ratio of the anti-solvent: solvent is higher than 20:1, and collecting crystals that are generated.

Abstract: Fabrication of doped AlN crystals and/or AlGaN epitaxial layers with high conductivity and mobility is accomplished by, for example, forming mixed crystals including a plurality of impurity species and electrically activating at least a portion of the crystal.

Abstract: A capacitive device includes a first electrode comprising a nanosheet stack, and a second electrode comprising a nanosheet stack, the second electrode arranged substantially parallel to the first electrode. A first conductive contact is arranged on a basal end of the first electrode, and a second conductive contact arranged on a basal end of the second electrode.

Abstract: Methods and systems for manipulating drops in microfluidic channels are provided.

Abstract: A semiconductor wafer includes first and second main surfaces opposite to each other along a vertical direction, and a side surface encircling the semiconductor wafer. A lateral distance perpendicular to the vertical direction between the side surface and a center of the semiconductor wafer includes first and second parts. The first part extends from the side surface to the second part and the second part extends from the first part to the center. An average concentration of at least one of nitrogen and oxygen in the first part is greater than 5×1014 cm?3 and exceeds an average concentration of the at least one of nitrogen and oxygen in the second part by more than 20% of the average concentration of the at least one of nitrogen and oxygen in the second part.

Abstract: A semiconductor device includes: a semiconductor substrate having a first side, a second side opposite the first side, and a thickness; at least one semiconductor component integrated in the semiconductor substrate; a first metallization at the first side of the semiconductor substrate; and a second metallization at the second side of the semiconductor substrate. The semiconductor substrate has an oxygen concentration along a thickness line of the semiconductor substrate which has a global maximum at a position of 20% to 80% of the thickness relative to the first side. The global maximum is at least 2-times larger than the oxygen concentrations at each of the first side and the second side of the semiconductor substrate.

Abstract: The present invention relates to a process for the preparation of hulk or thin-film single-crystals of cubic sesquioxides (space group No. 206, Ia-3) of scandium, yttrium or rare earth metals doped or not doped with lanthanide ions having a valency of +III by a high-temperature flux growth technique and to the applications of the nondoped single-crystals obtained according to this process, in particular in the optical field.

Abstract: An object of the present invention is to provide a crystal of a nitride of a Group-13 metal on the Periodic Table which has good crystallinity and has no crystal strain, and to provide a production method for the crystal. The crystal of a nitride of a Group-13 metal on the Periodic Table of the present invention, comprises oxygen atom and hydrogen atom in the crystal and has a ratio of a hydrogen concentration to an oxygen concentration therein of from 0.5 to 4.5.

Abstract: A method of manufacturing p-n junction in semiconductor material such that small dimensions of such junctions are maintained, and associated lattice dislocations of such junctions may be preferentially maintained, and devices with such patterned semiconductor material, is disclosed. Typically, a neutron moderator is used to slow fast neutrons to thermal energies. A mask made from thermal neutron absorbing material, such as cadmium, is placed in close proximity to such neutron moderator. Thermal neutron focusing optics, such as compound refractive lenses, are used to collect and focus thermal neutrons emitted from the mask such that the pattern or portion of the pattern is transferred to the silicon body, with neutrons transmitted from the window areas in the mask and through the neutron optic so as to form the donor dopant concentration for the n-type regions by transmutation of silicon atoms into phosphorus.

Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).

Abstract: Microfluidic devices having superhydrophilic bi-porous interfaces are provided, along with their methods of formation. The device can include a substrate defining a microchannel formed between a pair of side walls and a bottom surface and a plurality of nanowires extending from each of the side walls and the bottom surface. For example, the nanowires can be silicon nanowires (e.g., pure silicon, silicon oxide, silicon carbide, etc., or mixtures thereof).

Abstract: In one instance, the invention provides a group III nitride crystal having a first side exposing nitrogen polar c-plane of single crystalline or highly oriented polycrystalline group III nitride and a second side exposing group III polar surface, polycrystalline phase, or amorphous phase of group III nitride. Such structure is useful as a seed crystal for ammonothermal growth of bulk group III nitride crystals. The invention also discloses the method of fabricating such crystal. The invention also discloses the method of fabricating a bulk crystal of group III nitride by ammonothermal method using such crystal.

Abstract: An epitaxial wafer comprises an epitaxial layer disposed on a substrate. The epitaxial layer comprises first to third semiconductor layers. The third semiconductor layer has a thickness that is thicker than that of the first semiconductor layer. A second doping density of the second semiconductor layer is between a first doping density of the first semiconductor layer and a third doping density of the third semiconductor layer.

Abstract: A apparatus comprising: a vessel component comprising a flow-through interior chamber having an interior sidewall and an exterior sidewall; at least two inlets for introducing chemical components into the flow-through interior chamber; at least one outlet for removing product from the flow-through interior chamber; and an off center rotation component which is operatively connected to the vessel component. During operation of the apparatus, the off center rotation component generates vortical movement of at least two chemical components through the flow-through interior chamber of the vessel, and converts at least a portion of the at least two chemical components to at least one reaction product or product mixture. A method of using the apparatus to produce reaction products or product mixtures. The apparatus and method are useful for producing specialty chemicals such as fragrance and flavor compounds, insect pheromones, petrochemicals, pharmaceutical compounds, agrichemical compounds, and the like.