Processes Of Growth With A Subsequent Step Acting On The Crystal To Adjust The Impurity Amount (e.g., Diffusing, Doping, Gettering, Implanting) Patents (Class 117/2)
  • Patent number: 7374612
    Abstract: A method of producing a lithium-tantalate crystal comprising, at least subjecting a single-polarized lithium-tantalate crystal wherein an optical absorption coefficient at a wave number of 3480 cm?1 is 0.3 cm?1 or less to a heat treatment under a reducing atmosphere at a temperature of not lower than 250° C. and not higher than Curie temperature and a single-polarized lithium-tantalate crystal wherein an optical absorption coefficient at a wave number of 3480 cm?1 is 0.3 cm?1 or less and an electric conductivity is 1×10?12 ??1·cm?1 or more. There can be provided a method of producing a single-polarized lithium-tantalate crystal in a short time efficiently wherein the surface charge generated due to a pyroelectric property can be decayed quickly by improving the electric conductivity and a single-polarized lithium-tantalate crystal.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: May 20, 2008
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Yoshiyuki Shiono
  • Patent number: 7364616
    Abstract: It is an object of the present invention to provide a wafer release method capable of releasing a wafer safely, simply and certainly and improving a wafer releasing rate, a wafer release apparatus and a wafer release transfer machine using the wafer release apparatus. A wafer release method of the present invention comprises the steps of: pressing the uppermost wafer along an axis direction (L-L?) shifted by an angle in the range of from 15 to 75 degrees from a crystal habit line axis (A-A?) or (B-B?) of the uppermost wafer clockwise or counterclockwise; bending upwardly the peripheral portion of the uppermost wafer so as to cause a bending stress in the uppermost wafer in the axis direction (L-L?) shifted by the angle; blowing a fluid into a clearance between the lower surface of the uppermost wafer and the upper surface of the lower wafer adjacent thereto; and raising the uppermost wafer for releasing.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: April 29, 2008
    Assignee: Mimasu Semiconductor Industry Co. Ltd
    Inventors: Masato Tsuchiya, Ikuo Mashimo, Koichi Saito
  • Patent number: 7361217
    Abstract: Method for crystallizing a melamine melt to form melamine particles with a D90 of at most 2 mm by cooling a melamine melt to below the crystallization temperature of the melamine, comprising the formation of a suspension of melamine particles in the cooling medium by spraying the melamine melt with at most 10 wt % of CO2 relative to the sprayed quantity of melamine melt in a space in which a layer of a liquid cooling medium is present that has a temperature below the crystallization temperature of the melamine and under cooling conditions at which at least 50 wt % of the sprayed melamine melt directly turns into suspended melamine particles. Method for the production of melamine from urea in a preferably continuous, high-pressure process, with application of the present method for the crystallization.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: April 22, 2008
    Assignee: DSM IP Assets B.V.
    Inventor: Tjay Tjien M. Tjioe
  • Patent number: 7357835
    Abstract: A crystalline material sufficiently pure for use in pharmaceuticals may be made by forming a saturated solution of the material, changing the temperature of the solution so it becomes supersaturated, and subjecting the solution to irradiation by high intensity ultrasound, the frequency of the ultrasound being scanned over a range of frequencies. For example the ultrasound may be varied between 19.5 and 20.5 kHz, and this variation may be sinusoidal. Preferably the ultrasound is provided only briefly, say for less than 5 s, before allowing the solution to cool gradually without further irradiation. The ultrasound may be applied using a vessel with an array of ultrasonic transducers attached to a wall, so each transducer radiates no more than 3 W/cm2 yet the power dissipation within the vessel is between 25 and 150 W/litre. This method can reduce the metastable zone width to less than 10 K. It is applicable in particular to aspartame.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: April 15, 2008
    Assignee: Accentus PLC
    Inventors: Linda Jane McCausland, John Patrick Perkins
  • Patent number: 7341628
    Abstract: Gallium Nitride layers grown as single crystals by epitaxy such as Hydride Vapor Phase Epitaxy (HVPE) contain large numbers of crystal defects such as hexagonal pits, which limit the yield and performance of opto- and electronic devices. In this method, the Gallium Nitride layer is first coated with an Aluminum layer of approximate thickness of 0.1 microns. Next, Nitrogen is ion implanted through the Aluminum layer so as to occupy mostly the top 0.1 to 0.5 microns of the Gallium Nitride layer. Finally, through a pulsed directed energy beam such as electron or photons, with a fluence of approximately 1 Joule/cm2 the top approximately 0.5 microns are converted to a single crystal with reduced defect density.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: March 11, 2008
    Inventor: Andreas A. Melas
  • Patent number: 7335258
    Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include attaching at least one functional group to a chondroitin sulfate molecule, and then attaching the at least one functional group to a carbon nanotube, wherein the carbon nanotube is made soluble in a solution.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: February 26, 2008
    Assignee: Intel Corporation
    Inventors: Yuegang Zhang, Robert J. Chen
  • Patent number: 7332028
    Abstract: The invention relates to the handling of a composition comprising a rare-earth halide, especially within the context of the growth of crystals from said composition, said crystals generally being of formula AeLnfX(3f+e) in which Ln represents one or more rare earths, X represents one or more halogen atoms chosen from Cl, Br or I, and A represents one or more alkaline metals such as K, Li, Na, Rb or Cs, e and f representing values such that e, which may be zero, is less than or equal to 2f and f is greater than or equal to 1. It is possible in this way to grow single crystals exhibiting remarkable scintillation properties.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: February 19, 2008
    Assignee: Saint-Gobain Cristaux et Detecteurs
    Inventors: Alain Iltis, Vladimir Ouspenski
  • Patent number: 7332030
    Abstract: Process for the treatment of a component, at least one zone to be treated of which located in the depth of this component at a certain distance from the surface thereof, has at least one property that can be modified when this zone is subjected to a thermal energy density above a specified treatment level, comprises: placing the component to be treated at a thermal energy level below the specified level; and subjecting, through its aforementioned surface, for a specified time and in the form of at least one pulse, the component to a power flux generated by a particle emission unit, this emission unit being regulated so as to produce a thermal energy density that is concentrated on or has a localized maximum in the zone to be treated and reaching, in at least part of this zone, a level above the specified treatment level.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: February 19, 2008
    Inventor: Michel Bruel
  • Patent number: 7329316
    Abstract: A manufacturing method for quasi phase matching (QPM) wavelength converter elements using crystal quartz as a base material in which twins are periodically induced, comprises a step of periodically inducing the twins by applying a stress onto a crystal quartz substrate as the base material so that an angle ? of a direction in which the stress is applied relative to a Z axis of the crystal quartz is 60°<?<90°.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: February 12, 2008
    Assignees: National Institute for Materials Science, Nidek Co., Ltd.
    Inventors: Sunao Kurimura, Tsuyoshi Yamada
  • Patent number: 7329318
    Abstract: Crystals of paroxetine hydrochloride ½-hydrate are allowed to separate out by adding water to a solution or suspension comprising paroxetine hydrochloride and a polar organic solvent which contains no water or at most 60% by weight of water to adjust the water content to at least 70% by weight when crystals of paroxetine hydrochloride ½-hydrate are allowed to separate out in a water-containing polar organic solvent. Crystals of paroxetine hydrochloride ½-hydrate being not colored in pink can be allowed to separate out in the presence of hydrogen chloride when crystals of paroxetine hydrochloride ½-hydrate are allowed to separate out in water or a water-containing polar organic solvent.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: February 12, 2008
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Shigeya Yamazaki, Taichi Yoshikawa
  • Patent number: 7316747
    Abstract: A method is disclosed for producing a high quality bulk single crystal of silicon carbide in a seeded growth system and in the absence of a solid silicon carbide source, by reducing the separation between a silicon carbide seed crystal and a seed holder until the conductive heat transfer between the seed crystal and the seed holder dominates the radiative heat transfer between the seed crystal and the seed holder over substantially the entire seed crystal surface that is adjacent the seed holder.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: January 8, 2008
    Assignee: Cree, Inc.
    Inventors: Jason Ronald Jenny, David Phillip Malta, Hudson McDonald Hobgood, Stephan Georg Mueller, Mark Brady, Robert Tyler Leonard, Adrian Powell, Valeri F. Tsvetkov, George J. Fechko, Jr., Calvin H. Carter, Jr.
  • Patent number: 7316745
    Abstract: A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 ?cm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: January 8, 2008
    Assignee: Sumco Corporation
    Inventors: Shinsuke Sadamitsu, Nobumitsu Takase, Hiroyuki Takao, Koji Sueoka, Masataka Horai
  • Patent number: 7314515
    Abstract: An apparatus for fabricating a GaN single crystal and a fabrication method for producing GaN single crystal ingot are provided. The apparatus includes: a reactor including a ceiling, a floor and a wall with a predetermined height encompassing an internal space between the ceiling and the floor, wherein the ceiling is opposite to the floor; a quartz vessel on the floor containing Ga metal; a mount installed on the ceiling on which a GaN substrate is mounted, the GaN substrate being opposite to the quartz vessel; a first gas supplying unit supplying the quartz vessel with hydrogen chloride (HCl) gas; a second gas supplying unit supplying the internal space of the reactor with ammonia (NH3) gas; and a heating unit installed in conjunction with the wall of the reactor for heating the internal space, wherein the lower portion of the internal space is heated to a higher temperature than the upper portion.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: January 1, 2008
    Assignee: Samsung Corning Co., Ltd.
    Inventor: Jai-yong Han
  • Patent number: 7309392
    Abstract: In a method of producing a lithium niobate substrate by the use of a lithium niobate crystal grown by the Czochralski process, the lithium niobate crystal is heat-treated at a temperature of from 300° C. or more to less than 500° C. in the state the lithium niobate crystal is buried in a powder constituted of at least one element selected from the group consisting of Al, Ti, Si, Ca, Mg and C, or in the state the lithium niobate crystal is held in a container constituted of at least one element selected from the group consisting of Al, Ti, Si, Ca, Mg and C.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: December 18, 2007
    Assignee: Sumitomo Metal Mining Co., Ltd.
    Inventors: Tomio Kajigaya, Takashi Kakuta
  • Patent number: 7303627
    Abstract: A method is described for making an especially not-(111)-oriented low-stress large-volume crystal having a glide plane with reduced stress birefringence and more uniform refractive index. The method includes growing and tempering the crystal while heating and/or cooling to form a temperature gradient in order to relax stresses arising along the glide plane. During the tempering the heating and/or cooling occurs by heat transfer in a heat transfer direction and the heat transfer direction or temperature gradient is oriented at an angle of from 5° to 90° to the glide plane. Crystals with a uniform refractive index with variations of less than 0.025×10?6 (RMS value) are produced by the method.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: December 4, 2007
    Assignee: Schott AG
    Inventors: Lutz Parthier, Joerg Staeblein, Gunther Wehrhan, Christian Kusch
  • Patent number: 7288208
    Abstract: Li impurities are removed from a substrate of ZnO formed by a hydrothermal synthesis method. The surface layer of the substrate with Li impurities removed, is etched to planarize the substrate.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: October 30, 2007
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Michihiro Sano, Hiroyuki Kato
  • Patent number: 7282094
    Abstract: To precisely predict the distribution of densities and sizes of void defects comprising voids and inner wall oxide membranes in a single crystal. The computer-based simulation determines, at steps 1 to 7, the distribution of temperatures within a single crystal 14 growing from a melt 12 from the time of its pulling-up to the time of its completing cooling with due consideration paid to convection currents in the melt 12. The computer-based simulation, at steps 8 to 15, determines the density of voids considering the cooling process of the single crystal separated from the melt, that is, the pulling-up speed of the single crystal after the separation from the melt, and reflecting the effect of slow and rapid cooling of the single crystal in the result, and relates the radius of voids with the thickness of inner wall oxide membrane developed around the voids.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: October 16, 2007
    Assignee: Sumco Corporation
    Inventors: Kounosuke Kitamura, Jun Furukawa, Naoki Ono
  • Patent number: 7229493
    Abstract: Provided is an excellent p-type nitride type 3-5 group compound semiconductor having escellent electrical properties such as a low contact resistance to an electrode metal, a low ohmic property, etc., by heat-treating a nitride type 3-5 group compound semiconductor doped with p-type dopant in an hydrogen-containing gas atmosphere of a specific concentration.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: June 12, 2007
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshihiko Tsuchida, Yoshinobu Ono
  • Patent number: 7214266
    Abstract: The present invention provides an automated method of optimising crystallisation conditions for macromolecules comprising forming a trial comprising a sample comprising a gel forming component and the macromelecule to be crystallized, wherein at least one component of the trial is dispensed using an automatic liquid dispensing system.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: May 8, 2007
    Assignee: Imperial Innovations Limited
    Inventor: Naomi E. Chayen
  • Patent number: 7208094
    Abstract: A semiconductor nanowire is grown laterally. A method of growing the nanowire forms a vertical surface on a substrate, and activates the vertical surface with a nanoparticle catalyst. A method of laterally bridging the nanowire grows the nanowire from the activated vertical surface to connect to an opposite vertical surface on the substrate. A method of connecting electrodes of a semiconductor device grows the nanowire from an activated device electrode to an opposing device electrode. A method of bridging semiconductor nanowires grows nanowires between an electrode pair in opposing lateral directions. A method of self-assembling the nanowire bridges the nanowire between an activated electrode pair. A method of controlling nanowire growth forms a surface irregularity in the vertical surface. An electronic device includes a laterally grown nano-scale interconnection.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: April 24, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: M. Saif Islam, Theodore I. Kamins, Shashank Sharma
  • Patent number: 7208041
    Abstract: An effective, simple and low-cost a method for growing single crystals of perovskite oxideshaving primary and secondary abnormal grain growths according to temperature condition higher than a determined temperature or an atmosphere of heat treatment, involves a perovskite seed single crystal being adjoined to a polycrystal of perovskite oxides and heating the adjoined combination whereby the seed single crystal grows into the polycrystal at the interface therebetween repressing secondary abnormal grain growths inside the polycrystal. 1) The composition ratio of the polycrystal is controlled and/or the specific component(s) of the polycrystal is(are) added in an excess amount compared to the amount of the component(s) of the original composition of the polycrystal, 2) the heating is performed in the temperature range which is over primary abnormal grain growths completion temperature and below secondary abnormal grain growths activation temperature, whereby the seed single crystal grows continuously.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: April 24, 2007
    Assignee: Ceracomp Co., Ltd.
    Inventors: Ho-Yong Lee, Jong-Bong Lee, Tae-Moo Hur
  • Patent number: 7208043
    Abstract: A silicon semiconductor substrate has a structure possessing oxygen precipitate defects fated to form gettering sites in a high density directly below the defect-free region of void type crystals. The silicon semiconductor substrate is formed by heat-treating a silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method and characterized by satisfying the relational expression (Oi DZ)?(COP DZ)?10 ?m wherein Oi DZ denotes a defect-free zone of oxygen precipitate crystal defects and COP DZ denotes a region devoid of a void type defect measuring not less than 0.11 ?m in size, and having not less than 5×108 oxygen precipitate crystal defects per cm3.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: April 24, 2007
    Assignee: Siltronic AG
    Inventors: Akiyoshi Tachikawa, Atsushi Ikari
  • Patent number: 7208044
    Abstract: This invention disclosure describes methods for the fabrication metal oxide films on surfaces by topotactic anion exchange, and laminate structures enabled by the method. A precursor metal-nonmetal film is deposited on the surface, and is subsequently oxidized via topotactic anion exchange to yield a topotactic metal-oxide product film. The structures include a metal-oxide layer(s) and/or a metal-nonmetal layer(s).
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: April 24, 2007
    Inventor: Mark A. Zurbuchen
  • Patent number: 7201799
    Abstract: An automated, non-invasive method for classifying, detecting, and counting micropipes contained within silicon wafers, and generally any assortment of transparent wafers. Classifying, detecting, and counting micropipes takes place through the use of a data processing algorithm that incorporates information regarding: defect size; pit signature; area of pit signature when comparing a topography, specular, or scatter images; and detecting a tail within the standard pit signature. The method of the present invention teaches the development of a topography defect map, specular defect map, and scatter defect map for a complete analysis of the surface of a particular transparent wafer. Conventional detection, classification, and counting of micropipes involve characterization of micropipes in a manual fashion and rely upon an extremely invasive form of sample preparation.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: April 10, 2007
    Assignee: KLA-Tencor Technologies Corporation
    Inventor: Vamsi Velidandla
  • Patent number: 7198670
    Abstract: A polarization inverting region is formed by using a board comprising a single crystal of lithium tatalate of a stoichiometric composition or near to the stoichiometric composition and applying a direct current electric field having an electric field intensity equal to or lower than 5 [kV/mm] for 1 [second] or longer. A periodically poled region can be formed without needing a complicated constitution for applying a pulse voltage or a complicated constitution for applying a strong electric field.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: April 3, 2007
    Assignee: Shimadzu Corporation
    Inventors: Katuhiko Tokuda, Kazutomo Kadokura
  • Patent number: 7192479
    Abstract: A mask with sub-resolution aperture features and a method for smoothing an annealed surface using a sub-resolution mask pattern are provided. The method comprises: supplying a laser beam having a first wavelength; supplying a mask with a first mask section having apertures with a first dimension and a second mask section with apertures having a second dimension, less than the first dimension; applying a laser beam having a first energy density to a substrate region; melting a substrate region in response to the first energy density; crystallizing the substrate region; applying a diffracted laser beam to the substrate region; and, in response to the diffracted laser beam, smoothing the substrate region surface. In some aspects of the method, applying a diffracted laser beam to the substrate area includes applying a diffracted laser beam having a second energy density, less than the first energy density, to the substrate region.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: March 20, 2007
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Yasuhiro Mitani, Apostolos T. Voutsas, Mark A. Crowder
  • Patent number: 7192480
    Abstract: A method for fabricating ion exchange waveguides, such as lithium niobate or lithium tantalate waveguides in optical modulators and other optical waveguide devices, utilizes pressurized annealing to further diffuse and limit exchange of the ions and includes ion exchanging the crystalline substrate with a source of ions and annealing the substrate by pressurizing a gas atmosphere containing the lithium niobate or lithium tantalate substrate above normal atmospheric pressure, heating the substrate to a temperature ranging from about 150 degrees Celsius to about 1000 degrees Celsius, maintaining pressure and temperature to effect greater ion diffusion and limit exchange, and cooling the structure to an ambient temperature at an appropriate ramp down rate. In another aspect of the invention a powder of the same chemical composition as the crystalline substrate is introduced into the anneal process chamber to limit the crystalline substrate from outgassing alkaline earth metal oxide during the anneal period.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: March 20, 2007
    Assignee: California Institute of Technology
    Inventor: Lee J. Burrows
  • Patent number: 7179329
    Abstract: Methods are disclosed for producing highly doped semiconductor materials. Using the invention, one can achieve doping densities that exceed traditional, established carrier saturation limits without deleterious side effects. Additionally, highly doped semiconductor materials are disclosed, as well as improved electronic and optoelectronic devices/components using said materials. The innovative materials and processes enabled by the invention yield significant performance improvements and/or cost reductions for a wide variety of semiconductor-based microelectronic and optoelectronic devices/systems. Materials are grown in an anion-rich environment, which, in the preferred embodiment, are produced by moderate substrate temperatures during growth in an oxygen-poor environment.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: February 20, 2007
    Assignee: Yale University
    Inventors: Thomas Boone, Eric S. Harmon, Robert D. Koudelka, David B. Salzman, Jerry M. Woodall
  • Patent number: 7175704
    Abstract: A method for removing defects at high pressure and high temperature (HP/HT) or for relieving strain in a non-diamond crystal commences by providing a crystal, which contains defects, and a pressure medium. The crystal and the pressure medium are disposed in a high pressure cell and placed in a high pressure apparatus, for processing under reaction conditions of sufficiently high pressure and high temperature for a time adequate for one or more of removing defects or relieving strain in the single crystal.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: February 13, 2007
    Assignee: Diamond Innovations, Inc.
    Inventors: Mark Philip D'Evelyn, Thomas Richard Anthony, Stephen Daley Arthur, Lionel Monty Levinson, John William Lucek, Larry Burton Rowland, Suresh Shankarappa Vagarali
  • Patent number: 7172655
    Abstract: A method of producing a single crystal CVD diamond of a desired color which includes the steps of providing single crystal CVD diamond which is colored and heat treating the diamond under conditions suitable to produce the desired color. Colors which may be produced are, for example, in the pink-green range.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: February 6, 2007
    Inventors: Daniel James Twitchen, Philip Maurice Martineau, Geoffrey Alan Scarsbrook
  • Patent number: 7172654
    Abstract: The present invention relates to the use of phase equilibria as shown in the phase diagram of Cu—In—Se for the preparation of solid compositions. Further, a new method for directly obtaining ? CulnSe2 from a liquid phase, preferably as a single phase composition and novel single phase ? CulnSe2 compositions are provided.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: February 6, 2007
    Assignee: Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V.
    Inventors: Tilo Gödecke, Frank Ernst
  • Patent number: 7160385
    Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017–17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016–15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104–5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500–1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.–1380° C. for 1 to 10 hours.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: January 9, 2007
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Yasuo Koike
  • Patent number: 7156916
    Abstract: Monolithic integrated crystalline-structure-processed arrays of mechanical, and combined mechanical and electrical devices, and related systems and processing methods.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: January 2, 2007
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: John W. Hartzell
  • Patent number: 7147709
    Abstract: The present invention provides a method of forming a strained semiconductor layer. The method comprises growing a strained first semiconductor layer, having a graded dopant profile, on a wafer, having a first lattice constant. The dopant imparts a second lattice constant to the first semiconductor layer. The method further comprises growing a strained boxed second semiconductor layer having the second lattice constant on the first semiconductor layer and growing a sacrificial third semiconductor layer having the first lattice constant on the second semiconductor layer. The method further comprises etch annealing the third and second semiconductor layer, wherein the third semiconductor layer is removed and the second semiconductor layer is relaxed.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: December 12, 2006
    Assignee: Silicon Genesis Corporation
    Inventors: Philip Ong, Francois Henley, Igor Malik
  • Patent number: 7145714
    Abstract: The manufacture of optical devices by reversing domains in specific patterns in ferroelectric crystal material is practiced using a segmented electrode rather than a continuous electrode on at least one of the surfaces of the ferroelectric crystal material. Independent poling voltages are selectively applied to the segments to create various electric fields inside the ferroelectric crystal material. In this manner, portions of the desired domain-reversed pattern are individually established in the ferroelectric crystal material in high fidelity with their respective electrode segments so that upon completion of poling, the entire domain-reversed structure is established in the ferroelectric crystal material in high fidelity relative to the entire electrode. Parameters of the electrode segment that may be varied singly or in combination to achieve a desired degree of fidelity include the overall size of the electrode segment, as well as the shape and size of the features included in the electrode segment.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: December 5, 2006
    Assignee: AdvR, Inc.
    Inventors: Anthony D. Roberts, Philip R. Battle
  • Patent number: 7144457
    Abstract: Systems and methods are provided for evaluating a crystallization experiment, where a crystallization experiment of a molecule is to X-rays while housed within a container in which the crystallization experiment is performed; and one or more X-ray diffraction patterns from the X-ray exposure are used to evaluate whether crystalline material is present in the crystallization experiment.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: December 5, 2006
    Assignee: Takeda San Diego, Inc.
    Inventors: Duncan McRee, Leslie Tari
  • Patent number: 7141113
    Abstract: A method for growing a silicon crystal by a Czochralsky method, wherein, let a pulling speed be V (mm/min) and an average value of an in-crystal temperature gradient in a pulling axis direction within a temperature range, a silicon melting point to 1350° C., be G (° C./mm), V/G ranges from 0.16 to 0.18 mm2/° C. min between a crystal center position and a crystal outer periphery position, and a ratio G outer/G center of an average value G of an in-crystal temperature gradient in a pulling axis direction within a temperature range, a silicon melting point to 1350° C., at a crystal outer surface to that at a crystal center is set to up to 1.10 to thereby obtain a high-quality perfect crystal silicon wafer. Such a perfect crystal silicon wafer, wherein an oxygen concentration is controlled to up to 13×1017 atoms/cm3, an initial heat treatment temperature is at least up to 500° C. and a temperature is raised at up to 1° C./min at least within 700 to 900° C.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: November 28, 2006
    Assignee: Komatsu Denshi Kinzoku Kabushiki Kaisha
    Inventors: Kozo Nakamura, Toshiaki Saishoji, Hirotaka Nakajima, Shinya Sadohara, Masashi Nishimura, Toshirou Kotooka, Yoshiyuki Shimanuki
  • Patent number: 7138325
    Abstract: The present invention relates to a method of manufacturing a semiconductor wafer that includes providing a substrate of a single crystalline first material that has an unfinished or rough surface, and epitaxially growing at least one layer of a second material directly on the unfinished or rough surface of the first material. The second material has a lattice that is different from that of the first material and the epitaxial growing of the second material is advantageously performed before a final surface finishing step on the unfinished or rough surface of the substrate to increase bonding between the materials.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: November 21, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Christophe Maleville, Emmanuel Aréne
  • Patent number: 7101431
    Abstract: A thermal treatment process for improving the resistance of a flux grown, periodically poled KTiOPO4 crystal to photorefractive or photochromic damage comprising the steps of: i) heating said crystal from ambient temperature up to an annealing temperature in the range of from about 200° C. to about 400° C.; ii) maintaining said crystal at said annealing temperature in an oxygen containing atmosphere; iii) allowing said crystal to slowly cool down from said annealing temperature to ambient temperature.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: September 5, 2006
    Assignee: Picarro, Inc.
    Inventor: Carla Miner
  • Patent number: 7087111
    Abstract: A method of forming a crystalline phase material includes, a) providing a stress inducing material within or operatively adjacent a crystalline material of a first crystalline phase; and b) annealing the crystalline material of the first crystalline phase under conditions effective to transform it to a second crystalline phase. The stress inducing material preferably induces compressive stress within the first crystalline phase during the anneal to the second crystalline phase to lower the required activation energy to produce a more dense second crystalline phase. Example compressive stress inducing layers include SiO2 and Si3N4, while example stress inducing materials for providing into layers are Ge, W and Co. Where the compressive stress inducing material is provided on the same side of a wafer over which the crystalline phase material is provided, it is provided to have a thermal coefficient of expansion which is less than the first phase crystalline material.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: August 8, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Sujit Sharan
  • Patent number: 7077900
    Abstract: Disclosed is a method of fabricating a photonic crystal fiber preform using an extrusion die, comprising the step of extruding a first optical material into a plurality of dispersed phases to axially orient the dispersed phases.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: July 18, 2006
    Assignee: Samsung Electronics Co. Ltd.
    Inventor: Joon Yong Park
  • Patent number: 7067005
    Abstract: This silicon wafer production process has a step of cutting a silicon wafer from a silicon single crystal ingot in a perfect region which includes a perfect region P free of agglomerates of interstitial-silicon-type point defects and agglomerates of vacancy-type point defects and/or a region R in which there is occurrence of ring-shaped oxidation induced stacking faults, and a step of performing rapid thermal annealing on the silicon wafer in a hydrogen atmosphere, an argon atmosphere or an atmosphere containing a mixed gas thereof.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: June 27, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Takashi Shibayama, Yoshio Murakami, Takayuki Shingyoji
  • Patent number: 7033433
    Abstract: The invention is directed to method of preparing metal fluoride single crystals and particularly to crystals where the metal is calcium, barium, magnesium or strontium, or a mixture thereof. The invention uses a decreasing fast cooling profile and an increasing slow cooling profile for the hot zone and the cold zone, respectively, after crystal formation during cooling from melt temperatures to a first temperature. A substantially constant cooling rate is then applied to the both zones during cooling from the first temperature to a final temperature, usually room temperature. It has been found that the substantially constant cooling rate during the annealing process results in crystals having improved homogeneity and birefringence.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: April 25, 2006
    Assignee: Corning Incorporated
    Inventors: Qiao Li, William R. Rosch, Paul M. Schermerhorn
  • Patent number: 7029528
    Abstract: There are provided a method of superflattening an oxide crystal that is soluble neither with acid nor with alkaline, a method of making a ReCa4O(BO3)3 family oxide single crystal thin film using the superflattening method, a ReCa4O(BO3)3 family oxide single crystal thin film having a SHG property, a superflattening method for light incident/emitting surfaces, and a defect assessing method for oxide crystals. The surface of an oxide crystal that is soluble neither with acid nor with alkaline is reduced with a reducing agent, the reduced oxide crystal surface is dissolved with an aqueous solution of acid or alkaline, the surface dissolved oxide crystal is heat-treated in the atmosphere, whereby the surface of an oxide crystal that is soluble neither with acid nor with alkaline is superflattened to an atomic level.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: April 18, 2006
    Assignee: Japan Science and Technology Corporation
    Inventors: Hideomi Koinuma, Yuji Matsumoto, Takatomo Sasaki, Yusuke Mori, Masashi Yoshimura
  • Patent number: 7025826
    Abstract: Methods for biaxially-texturing a surface-region of an amorphous material are disclosed, comprising depositing an amorphous material onto a substrate, and supplying active oxygen near the substrate during ion beam bombardment of the amorphous material to create an amorphous material having a biaxially textured surface, wherein the ion beam bombardment occurs at a predetermined oblique incident angle. Methods for producing high-temperature coated superconductors are also disclosed, comprising depositing an amorphous buffer film onto a metal alloy substrate, bombarding a surface-region of the amorphous buffer film with an ion beam at an oblique incident angle while supplying active oxygen to the surface-region of the amorphous buffer film in order to create a biaxially textured surface-region thereon, and growing a superconducting film on the biaxially textured surface-region of the amorphous buffer film to create a high-temperature coated superconductor.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: April 11, 2006
    Assignee: Superpower, Inc.
    Inventors: Venkat Selvamanickam, Xuming Xiong
  • Patent number: 7018549
    Abstract: A method is described for fabricating multiple nanowires of uniform length from a single precursor nucleation particle. The method includes growing a first nanowire segment from a nanoparticle and growing a second nanowire segment between the first nanowire segment and the nanoparticle. The first nanowire segment and the second nanowire segment have a different solubility.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: March 28, 2006
    Assignee: Intel Corporation
    Inventors: Matthew V. Metz, Scott A. Hareland, Robert S. Chau
  • Patent number: 7014703
    Abstract: The invention is directed to a method for processing and annealing metal fluoride single crystals. Among other steps, the method includes of removing the as-grown surfaces of the crystals after they emerge from the growth furnace, processing the surfaces in such way that all the crystal surfaces have the same thermal properties, and then placing the crystals in a secondary annealing furnace to further anneal the crystals to release the residual stresses resulting from the primary annealing process. The invention is suitable for metal fluoride crystals of general formula MF2, where M is calcium, magnesium, barium and strontium, and mixtures thereof.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 21, 2006
    Assignee: Corning Incorporated
    Inventor: Liming Wang
  • Patent number: 7014702
    Abstract: A heat treatment chamber (30) is provided comprising a treatment region containing a charge (5) of compound material comprising a plurality of n atomic species, each atomic species being associated with at least one gas species. The chamber (30) is placed in a furnace (7). The chamber has a gas permeable barrier, constituted by a plug (4) and wadding (6), which partially encloses the treatment region. The barrier serves as an effusive hole to inhibit, but not prevent, gas vapour release, thereby to elevate the gas vapour pressure in the treatment region. Application of inert gas through a valve (8) is also used to increase background pressure in the treatment region during heat treatment. The elevated gas pressures present in the treatment region during treatment are measurable in an absorption cell (3) adjacent to the treatment region. It is thus possible to monitor the gas pressures during heat treatment and thereby stop the heat treatment once a desired charge stoichiometry is achieved.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: March 21, 2006
    Assignee: Pirelli Cavi e Sistemi S.p.A.
    Inventors: Andrea Zappettini, Lucio Zanotti, Mingzheng Zha, Francesco Bissoli
  • Patent number: 7001462
    Abstract: A method of making an oriented fluoride crystal blank for transmitting below 250 nm ultraviolet light includes irradiating a fluoride crystal blank with an x-ray beam, detecting the x-ray beams diffracted from the fluoride crystal blank, generating a diffraction pattern from the x-ray beam diffracted from the fluoride crystal blank, determining an angular deviation of an optical axis of the fluoride crystal blank from a specific crystallographic direction, and, if the angular deviation is not within a predefined range, modifying the fluoride crystal blank in a manner such that that the resultant angular deviation between the optical axis of the fluoride crystal blank from the specific crystallographic direction after modifying falls within the predefined range.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: February 21, 2006
    Assignee: Corning Incorporated
    Inventors: Michael L. Genier, Richard S. Priestley, Rebecca S. Retherford
  • Patent number: RE38937
    Abstract: It was an objective of the present invention to provide a susceptor which can prevent a increasing phenomenon of the dopant concentration of the epitaxial layer at the peripheral portion of the wafer. By providing a through-hole 7 passing through to a rear side at the outer peripheral side of the wafer inside the wafer pocket 6, a down flow of a reacting source gas from the upper surface of the susceptor 5 is formed, so that the unwanted flow of the dopant species being exhausted at the rear surface onto the wafer surface can be avoided. As a result, a raise in the dopant concentration at the outer peripheral portion of the epitaxial layer 9 can be controlled.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: January 24, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventor: Osamu Nakamura