Abstract: In one instance, the invention provides a group III nitride crystal having a first side exposing nitrogen polar c-plane of single crystalline or highly oriented polycrystalline group III nitride and a second side exposing group III polar surface, polycrystalline phase, or amorphous phase of group III nitride. Such structure is useful as a seed crystal for ammonothermal growth of bulk group III nitride crystals. The invention also discloses the method of fabricating such crystal. The invention also discloses the method of fabricating a bulk crystal of group III nitride by ammonothermal method using such crystal.

Abstract: A method for producing an electronic component includes providing a piezoelectric main body, which is provided with electrodes. A first electric polarization field having a first polarity direction is applied to the piezoelectric main body between the two electrodes and then a second electric polarization field is applied in a second polarity direction, opposite to the first polarity direction, to the piezoelectric main body between the electrodes. The absolute value of the second electric polarization field differs from that of the first electric polarization field.

Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.

Abstract: A crystal laminate structure, in which crystals can be epitaxially grown on a ?-Ga2O3-based substrate with high efficiency to produce a high-quality ?-Ga2O3-based crystal film on the substrate; and a method for producing the crystal laminate structure are provided. The crystal laminate structure includes: a ?-Ga2O3-based substrate, of which the major face is a face that is rotated by 50 to 90° inclusive with respect to face; and a ?-Ga2O3-based crystal film which is formed by the epitaxial crystal growth on the major face of the ?-Ga2O3-based substrate.

Abstract: The present invention relates to an Electro-Optical (E-O) crystal elements, their applications and the processes for the preparation thereof. More specifically, the present invention relates to the E-O crystal elements (which can be made from doped or un-doped PMN-PT, PIN-PMN-PT or PZN-PT ferroelectric crystals) showing super-high linear E-O coefficient ?c, e.g., transverse effective linear E-O coefficient ?Tc more than 1100 pm/V and longitudinal effective linear E-O coefficient ?lc up to 527 pm/V, which results in a very low half-wavelength voltage Vl? below 200V and VT? below about 87V in a wide number of modulation, communication, laser, and industrial uses.

Abstract: Degenerately doped semiconductor materials are deployed within resonant structures to control the first and higher order temperature coefficients of frequency, thereby enabling temperature dependence to be engineered without need for cumulative material layers which tend to drive up cost and compromise resonator performance.

Abstract: Raised structures comprising overlying silicon layers formed by controlled selective epitaxial growth, and methods for forming such raised-structure on a semiconductor substrate are provided. The structures are formed by selectively growing an initial epitaxial layer of mono crystalline silicon on the surface of a semi conductive substrate, and forming a thin film of insulative material over the epitaxial layer. A second epitaxial layer is selectively, grown on the exposed surface of the initial epitaxially grown crystal layer, and a thin insulative film is deposited over the second epitaxial layer. Additional epitaxial layers are added as desired to provide a vertical structure of a desired height comprising multiple layers of single silicon crystals, each epitaxial layer have insulated sidewalls, with the uppermost epitaxial layer also with an insulated top surface.

Abstract: The application is directed to piezoelectric single crystals having shear piezoelectric coefficients with enhanced temperature and/or electric field stability. These piezoelectric single crystal may be used, among other things, for vibration sensors as well as low frequency, compact sonar transducers with improved and/or enhanced performance.

Abstract: Described herein are modified androgen receptor polypeptides that are resistant to inhibition by an androgen receptor inhibitor. Described herein are compositions, combinations, and kits containing the modified androgen receptor polypeptides and methods of using the modified androgen receptor polypeptides. Also described herein are methods of using the modified androgen receptor polypeptides as screening agents for the identification and design of third-generation androgen receptor modulators. Also described herein are third-generation androgen receptor modulators that inhibit the activity of the modified androgen receptor polypeptides. Also described are pharmaceutical compositions and medicaments that include the compounds described herein, as well as methods of using such androgen receptor modulators, alone and in combination with other compounds, for treating diseases or conditions, including cancers, such as castration resistant prostate cancers, that are mediated or dependent upon androgen receptors.

Abstract: A silicon carbide substrate, a silicon carbide ingot, and methods for manufacturing the silicon carbide substrate and the silicon carbide ingot capable of improving a yield of a semiconductor device having silicon carbide as constituent material are provided. In the silicon carbide substrate, patterns formed by crossing straight lines extending along the <11-20> direction and being observable by means of an X-ray topography are present at a number density of less than or equal to 0.1 patterns/cm2 on one main surface. As described above, in the silicon carbide substrate, the number density of the crossing patterns present on the main surface is reduced to less than or equal to 0.1 patterns/cm2. Therefore, when the semiconductor device is manufactured with use of a silicon carbide substrate, a lowering of a yield caused by the crossing patterns can be suppressed.

Abstract: Fluidic devices and methods associated with mixing of fluids in fluidic devices are provided. In some embodiments, a method may involve the mixing of two or more fluids in a channel segment of a fluidic device. The fluids may be in the form of, for example, at least first, second and third fluid plugs, composed of first, second, and third fluids, respectively. The second fluid may be immiscible with the first and third fluids. In certain embodiments, the fluid plugs may be flowed in series in the channel segment, e.g., in linear order, causing the first and third fluids to mix without the use of active to components such as mixers. The mixing of fluids in a channel segment as described herein may allow for improved performance and simplification in the design and operations of fluidic devices that rely on mixing of fluids.

Abstract: A nanogap device which may include a first insulation layer having a nanopore formed therein, a first channel layer which may be on the first insulation layer, a first source electrode and a first drain electrode which may be respectively in contact with both ends of the first channel layer, a second insulation layer which may cover the first channel layer, the first source electrode, and the first drain electrode, and a first nanogap electrode which may be on the second insulation layer and may be divided into two parts with a nanogap, which faces the nanopore, interposed between the two parts.

Abstract: Embodiments are disclosed herein that relate to recycling and refurbishing battery electrode materials. For example, one disclosed embodiment provides a method comprising obtaining a quantity of spent electrode material, reacting the spent electrode material with an aqueous lithium solution in an autoclave while heating the spent electrode material and the aqueous lithium solution to form a hydrothermally reacted spent electrode material, removing the hydrothermally reacted spent electrode material from the aqueous lithium solution, and sintering the hydrothermally reacted spent material to form a recycled electrode material.

Abstract: A Cu-amine complex of hydrated copper sulfate and ethylene diamine or an oligomer of ethylene diamine is employed in a direct (one-pot) synthesis of a copper-cation containing silicoaluminophosphate (SAPO) zeolite material having the Cu/SAPO-34 structure. The copper-amine complex is included in an aqueous gel of precursors of the SiO2, Al2O3, and P2O5 constituents, which are mixed, aged, and thermally treated to form the desired Cu/SAPO-34 structure. The synthesized Cu/SAPO-34 material is demonstrated to be an effective catalyst material in conversion of nitric oxide to nitrogen (using ammonia as a reductant) in synthetic exhaust streams characteristic of diesel engine and other lean-burn vehicle engine exhaust streams.

Abstract: A method of producing a GaAs single crystal having high carrier concentration and high crystallinity and to provide a GaAs single crystal wafer using such a GaAs single crystal. In the method of producing a GaAs single crystal, a vertical boat method is performed with a crucible receiving a seed crystal, a Si material, a GaAs material serving as an impurity, solid silicon dioxide, and a boron oxide material, thereby growing a GaAs single crystal.

Abstract: A method of producing an n-type group III nitride single crystal includes putting raw materials that include at least a substance including a group III element, an alkali metal, and boron oxide into a reaction vessel; melting the boron oxide by heating the reaction vessel to a melting point of the boron oxide; forming a mixed melt which includes the group III element, the alkali metal, and the boron oxide, in the reaction vessel by heating the reaction vessel to a crystal growth temperature of a group III nitride; dissolving nitrogen into the mixed melt by bringing a nitrogen-containing gas into contact with the mixed melt; and growing an n-type group III nitride single crystal, which is doped with oxygen as a donor, from the group III element, the nitrogen, and oxygen in the boron oxide that are dissolved in the mixed melt.

Abstract: Disclosed are compositions, such as inkjet inks or glazes, for jetting onto a ceramic substrate, and associated methods and systems. The compositions are configured to produce a blister relief effect, wherein the incorporation of inkjet technology provides precise control over the location and degree of blistering. The enhanced compositions are configured to form gas bubbles when exposed to the elevated temperatures of a firing cycle, wherein the formed gas is trapped within the glaze, causing an expansion or blistering of the glaze, which results in a raised relief.

Abstract: The use of the effect of crystallographic axis orientation on the effectiveness in annealing in multiple atmospheres and chemical compositions of lutetium oxyorthosilicate crystals and other scintillator crystals is disclosed. By controlling axis orientation an favorable annealing condition can be selected to repair both internal interstitial and vacancy defects through the crystal lattice. Axis orientation can be further utilized to control the uniformity of surface finish of chemically etched crystal.

Abstract: Crack formation and propagation in a silicon substrate may be reduced by forming a crack reducing portion. The silicon substrate includes a silicon main portion and a silicon edge portion formed around the silicon main portion. The crack reducing portion is formed on the silicon edge portion of the silicon substrate such that the directions of crystal faces in the crack reducing portion are randomly oriented.

Abstract: A method includes: a backside-oxidation-film-formation step in which an oxidation film is formed on a backside of a silicon wafer; a backside-oxidation-film-removal step in which the oxidation film provided at an outer periphery of the silicon wafer is removed; an argon-annealing step in which the silicon wafer after the backside-oxidation-film-removal step is subjected to a heat treatment in an argon gas atmosphere at a temperature in a range from 1200 to 1220 degrees C. for 60 minutes or more and 120 minutes or less; and an epitaxial-film-formation step in which an epitaxial film is formed on a surface of the silicon wafer after the argon-annealing step.

Abstract: A silicon carbide substrate, a silicon carbide ingot, and methods for manufacturing the silicon carbide substrate and the silicon carbide ingot capable of improving a yield of a semiconductor device having silicon carbide as constituent material are provided. In the silicon carbide substrate, patterns formed by crossing straight lines extending along the <11-20> direction and being observable by means of an X-ray topography are present at a number density of less than or equal to 0.1 patterns/cm2 on one main surface. As described above, in the silicon carbide substrate, the number density of the crossing patterns present on the main surface is reduced to less than or equal to 0.1 patterns/cm2. Therefore, when the semiconductor device is manufactured with use of a silicon carbide substrate, a lowering of a yield caused by the crossing patterns can be suppressed.

Abstract: An epitaxial silicon wafer cut from a silicon single crystal grown by the Czochralski method, and having a diameter of 300 mm or more. In this epitaxial silicon wafer, the time required to cool every part of the silicon single crystal during the growth from 800° C. down to 600° C. is set to 450 minutes or less, the interstitial oxygen concentration is from 1.5×1018 to 2.2×1018 atoms/cm3 (old ASTM standard), the entire surface of the cut silicon wafer is composed of a COP region, and the BMD density in the bulk of the epitaxial wafer after a heat treatment at 1000° C. for 16 hours is 1×104/cm2 or less. In this epitaxial silicon wafer, even if the thermal process in a semiconductor device fabrication process is a low temperature thermal process, epitaxial defects do not occur, as well as sufficient gettering capability being obtainable.

Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a Ga2O3-based compound semiconductor with n-type conductivity, and an electrode layer that is in Schottky-contact with the n-type semiconductor layer. A first semiconductor layer in Schottky-contact with the electrode layer and a second semiconductor layer having an electron carrier concentration higher than the first semiconductor layer are formed in the n-type semiconductor layer. The second semiconductor layer includes a ?-Ga2O3 substrate including a main plane rotated by an angle not less than 50° and not more than 90° with respect to a (100) plane thereof.

Abstract: A method of manufacturing a group 13 nitride crystal includes a crystal growth process to form the group 13 nitride crystal by growing the group 13 nitride crystal having a hexagonal crystal structure from a seed crystal which is a gallium nitride crystal having a hexagonal crystal structure in which a length “L” in a c-axis direction is 9.7 mm or more, and a ratio L/d of the length “L” to a crystal diameter “d” in a c-plane is larger than 0.813. The crystal growth process includes a process of forming an outer periphery containing a {10-10} plane and an outer periphery containing a {10-11} plane at side surfaces of the group 13 nitride crystal, and forming an outer periphery containing a {0001} plane at a bottom surface of the group 13 nitride crystal.

Abstract: An ultralow defect gallium-containing nitride crystal and methods of making ultralow defect gallium-containing nitride crystals are disclosed. The crystals are useful as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and photoelectrochemical water splitting for hydrogen generators.

Abstract: A method for manufacturing a group III nitride crystal on a seed crystal in a holding vessel holding therein a melt containing a group III metal, an alkali metal and nitrogen. The manufacturing method comprises the steps of causing the seed crystal to make a contact with the melt, setting an environment of the seed crystal to a first state offset from a crystal growth condition while in a state in which said seed crystal is in contact with the melt, increasing a nitrogen concentration in the melt, and setting the environment of the seed crystal to a second state suitable for crystal growth when the nitrogen concentration of the melt has reached a concentration suitable for growing the seed crystal.

Abstract: A method for integrating wide-gap semiconductors, and specifically, gallium nitride epilayers, with synthetic diamond substrates is disclosed. Diamond substrates are created by depositing synthetic diamond onto a nucleating layer deposited or formed on a layered structure that comprises at least one layer of gallium nitride. Methods for manufacturing GaN-on-diamond wafers with low bow and high crystalline quality are disclosed along with preferred choices for manufacturing GaN-on-diamond wafers and chips tailored to specific applications.

Abstract: A ?-Ga2O3-based single crystal substrate includes a ?-Ga2O3-based single crystal. The ?-Ga2O3-based single crystal includes a full width at half maximum of an x-ray rocking curve of less than 75 seconds.

Abstract: A method for growing epitaxial diamond is provided here. A metallic layer is deposited on a diamond substrate and is followed by an epitaxial diamond film deposited on top of the metallic layer. As a buffer layer, the metallic layer relieves stress accumulated in the thin film of the epitaxial diamond to prevent cracks. In consequence, diamond epitaxial layers with desired thickness and good quality can be obtained.

Abstract: Methods for producing a silicon wafer from a defect-free silicon single crystal grown by a Czochralski (CZ) method are provided. The methods comprise: preparing a silicon wafer obtained by slicing the defect-free silicon single crystal and subjected to mirror-polishing; then performing a heat treatment step of subjecting the mirror-polished silicon wafer to heat treatment at a temperature of 500° C. or higher but 600° C. or lower for 4 hours or more but 6 hours or less; and performing a repolishing step of repolishing the silicon wafer after the heat treatment step such that a polishing amount becomes 1.5 ?m or more. Therefore, it is an object to provide a method by which a silicon wafer can be produced at a high yield, the silicon wafer in which Light Point Defects (LPDs) are reduced to a minimum, the silicon wafer with a low failure-incidence rate in an inspection step and a shipment stage.

Abstract: The present invention relates to an Electro-Optical (E-O) crystal elements, their applications and the processes for the preparation thereof. More specifically, the present invention relates to the E-O crystal elements (which can be made from doped or un-doped PMN-PT, PIN-PMN-PT or PZN-PT ferroelectric crystals) showing super-high linear E-O coefficient yc, e.g., transverse effective linear E-O coefficient yTc more than 1100 pm/V and longitudinal effective linear E-O coefficient ytc up to 527 pm/V, which results in a very low half-wavelength voltage Vtx below 200V and Vtx below about 87V in a wide number of modulation, communication, laser, and industrial uses.

Abstract: A surface of a silicon carbide substrate on which a graphite layer is formed is covered with a metal layer which can form carbide. Then, the silicon carbide substrate is annealed to cause reaction between a metal in the metal layer which can form carbide and carbon in the graphite layer so as to change the graphite layer between the metal layer which can form carbide and the silicon carbide substrate to a metal carbide layer. Thus, the graphite layer is removed. The adhesion between the metal layer which can form carbide and the silicon carbide substrate can be improved so that separation of the metal layer which can form carbide can be suppressed. Graphite deposits can be suppressed due to the removal of the graphite layer so that separation of a wiring metal film formed on a surface of the metal layer which can form carbide can be suppressed.

Abstract: A method is provided for preparing solid or thin-film single-crystals of cubic sesquioxides (space group no. 206, Ia-3) of scandium, yttrium or rare earth elements doped with lanthanide ions with valence +III, using a high-temperature flux growth technique, and to the various uses of the single-crystals obtained according to said method, in particular in the field of optics.

Abstract: The present invention provides a method for cleaning a semiconductor wafer, in which the method includes cleaning steps of HF cleaning, ozonated water cleaning and HF cleaning in this order at least one time, wherein in the HF cleaning carried out last in the method for cleaning the semiconductor wafer, cleaning is so carried out that an oxide film formed on a surface of the semiconductor wafer by the ozonated water is not entirely removed and to remain a part of a thickness thereof on the surface of the semiconductor wafer. As a result, a method for cleaning a semiconductor wafer in which a metal impurity level and a particle level can be reduced simultaneously in the cleaning of the semiconductor wafer is provided.

Abstract: A method is disclosed for producing high quality semi-insulating silicon carbide crystals in the absence of relevant amounts of deep level trapping elements. The invention includes the steps of heating a silicon carbide crystal having a first concentration of point defects to a temperature that thermodynamically increases the number of point defects and resulting states in the crystal, and then cooling the heated crystal at a sufficiently rapid rate to maintain an increased concentration of point defects in the cooled crystal.

Abstract: A method of making fancy pale blue or fancy pale blue/green CVD diamond material is described. The method comprises irradiating single crystal diamond material that has been grown by a CVD process with electrons to introduce isolated vacancies into the diamond material, the irradiated diamond material having (or after a further post-irradiation treatment having) a total vacancy concentration [VT] and a path length L such that [VT]×L is at least 0.072 ppm cm and at most 0.36 ppm cm, and the diamond material becomes fancy pale blue or fancy pale blue/green in color. Fancy pale blue diamonds are also described.

Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).

Abstract: A method for producing a diamond material by contacting a fluorinated precursor with a hydrocarbon in a reactor and forming a combination in the absence of a metal catalyst; increasing the pressure of the reactor to a first pressure; heating the combination under pressure to form a material precursor; cooling the material precursor; and forming a diamond material.

Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.

Abstract: In a crystal growth method, a seed crystal 8 and a source material 4 are provided in spaced relation inside of a growth crucible 6. Starting conditions for the growth of a crystal 14 in the growth crucible 6 are then established therein. The starting conditions include: a suitable gas inside the growth crucible 6, a suitable pressure of the gas inside the growth crucible 6, and a suitable temperature in the growth crucible 6 that causes the source material 4 to sublimate and be transported via a temperature gradient in the growth crucible 6 to the seed crystal 8 where the sublimated source material precipitates. During growth of the crystal 14 inside the growth crucible 6, at least one of the following growth conditions are intermittently changed inside the growth crucible 6 a plurality of times: the gas in the growth crucible 6, the pressure of the gas in the growth crucible 6, and the temperature in the growth crucible 6.

Abstract: A method for manipulating dislocations from a semiconductor device includes directing a light-emitting beam locally onto a surface portion of a semiconductor body that includes active regions of the semiconductor device and manipulating a plurality of dislocations located proximate to the surface portion of the semiconductor body utilizing the light-emitting beam. Manipulating the plurality of dislocations includes directly scanning the plurality of dislocations with the light-emitting beam to manipulate a location of each of the plurality of dislocations on the surface portion of the semiconductor body by adjusting a temperature of the surface portion of the semiconductor body corresponding to the plurality of dislocations and adjusting a scan speed of the a light-emitting beam.

Abstract: A system for manipulating dislocations on semiconductor devices, includes a moveable laser configured to generate a laser beam locally on a surface portion of the semiconductor body having a plurality of dislocations, the moveable laser being characterized as having a scan speed, the moveable laser manipulates the plurality of dislocations on the surface portion of the semiconductor body by adjusting the temperature and the scan speed of the laser beam.

Abstract: A condition of a single crystal manufacturing step subjected to the Czochralski method applying an initial oxygen concentration, a dopant concentration or resistivity, and a heat treatment condition is determined simply and clearly on the basis of the conditions of a wafer manufacturing step and a device step so as to obtain a silicon wafer having a desired gettering capability. A manufacturing method of a silicon substrate which is manufactured from a silicon single crystal grown by the CZ method and provided for manufacturing a solid-state imaging device is provided. The internal state of the silicon substrate, which depends on the initial oxygen concentration, the carbon concentration, the resistivity, and the pulling condition of the silicon substrate, is determined by comparing a white spot condition representing upper and lower limits of the density of white spots as device characteristics with the measured density of white spots.

Abstract: Methods for making a recycled or refurbished electrode material for an energy-storage device are provided. One example method comprises harvesting a lithium-deficient electrode material from a recycling or waste stream, and replenishing at least some lithium in the lithium-deficient electrode material. A second example method comprises breeching an enclosure of a cell of an energy storage device, replenishing at least some lithium in a lithium-deficient electrode material of the cell, and sealing the enclosure of the cell.

Abstract: A method of using a sensor comprising a field effect transistor (FET) embedded in a nanopore includes placing the sensor in an electrolyte comprising at least one of biomolecules and deoxyribonucleic acid (DNA); placing an electrode in the electrolyte; applying a gate voltage in the sub-threshold regime to the electrode; applying a drain voltage to a drain of the FET; applying a source voltage to a source of the FET; detecting a change in a drain current in the sensor in response to the at least one of biomolecules and DNA passing through the nanopore.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: Fabrication of doped AlN crystals and/or AlGaN epitaxial layers with high conductivity and mobility is accomplished by, for example, forming mixed crystals including a plurality of impurity species and electrically activating at least a portion of the crystal.

Abstract: A method for purifying silicon bearing materials for photovoltaic applications includes providing metallurgical silicon into a crucible apparatus. The metallurgical silicon is subjected to at least a thermal process to cause the metallurgical silicon to change in state from a first state to a second state, the second stage being a molten state not exceeding 1500 Degrees Celsius. At least a first portion of impurities is caused to be removed from the metallurgical silicon in the molten state. The molten metallurgical silicon is cooled from a lower region to an upper region to cause the lower region to solidify while a second portion of impurities segregate and accumulate in a liquid state region. The liquid state region is solidified to form a resulting silicon structure having a purified region and an impurity region. The purified region is characterized by a purity of greater than 99.9999%.

Abstract: An optical element or module is designed to be placed in front of an optical sensor of a semiconductor component. At least one optically useful part of the element or module is provided through which the image to be captured is designed to pass. A method for obtaining such an optical element or module includes forming at least one through passage between a front and rear faces of the element or module. The front and rear faces are covered with a mask. Ion doping is introduced through the passage. As a result, the element or module has a refractive index that varies starting from a wall of the through passage and into the optically useful part. An image capture apparatus includes an optical imaging module having at least one such element or module.

Abstract: A silicon wafer in which both occurrences of slip dislocation and warpage are suppressed in device manufacturing processes is a silicon wafer having BMDs having an octahedral shape, wherein BMDs located at a position below the silicon wafer surface to a depth of 20 ?m and having a diagonal length of 200 nm or more are present at a concentration of ?2×109/cm3, and BMDs located at a position below a depth ?50 ?m have a diagonal length of ?10 nm to ?50 nm and a concentration of ?1×1012/cm3.