Abstract: In a physical vapor transport growth technique for silicon carbide a silicon carbide powder and a silicon carbide seed crystal are introduced into a physical vapor transport growth system and halosilane gas is introduced separately into the system. The source powder, the halosilane gas, and the seed crystal are heated in a manner that encourages physical vapor transport growth of silicon carbide on the seed crystal, as well as chemical transformations in the gas phase leading to reactions between halogen and chemical elements present in the growth system.

Abstract: A compositionally graded material having low defect densities and improved electronic properties is disclosed and described. A compositionally graded inorganic crystalline material can be formed by preparing a crystalline substrate by forming crystallographically oriented pits across an exposed surface of the substrate. A transition region can be deposited on the substrate under substantially epitaxial growth conditions. Single crystal substrates of a wide variety of materials such as diamond, aluminum nitride, silicon carbide, etc. can be formed having relatively low defect rates.

Abstract: Targeted temperature compensation for use with a chemical vapor deposition (CVD) apparatus. A localized temperature monitoring system is configured to provide localized temperature information representing surface temperatures of portions of the one or more wafers on a wafer carrier while the wafer carrier is rotating in a CVD process. A temperature profiling system is configured to generate a temperature profile that is indicative of localized cold spots on a surface of the one or more wafers. The temperature profile is based on the localized temperature information. A targeted heating system is configured to selectively apply localized heat to the localized cold spots dynamically based on the temperature profile such that a thermal distribution of the surface of the one or more wafers is made more uniform while a CVD process is carried out on the CVD apparatus.

Abstract: A high-quality, large-area seed crystal for ammonothermal GaN growth and method for fabricating. The seed crystal comprises double-side GaN growth on a large-area substrate. The seed crystal is of relatively low defect density and has flat surfaces free of bowing. The seed crystal is useful for producing large-volume, high-quality bulk GaN crystals by ammonothermal growth methods for eventual wafering into large-area GaN substrates for device fabrication.

Abstract: Hydride vapor-phase deposition (HVPE) systems are disclosed. An HVPE hydride vapor-phase deposition system may include a reactant source chamber and a growth chamber containing a susceptor coupled to the reactant source chamber. The reactant source chamber may be configured to create a reactant gas through a chemical reaction between a solid or liquid precursor and a different precursor gas. The reactant source chamber can be configured to operate at a temperature T(M) significantly above room temperature. The reactant gas can be chemically unstable at or near room temperature. The susceptor is configured to receive a substrate and maintain the substrate at a substrate temperature T(S). The growth chamber includes walls can be configured to operate at a temperature T(C) such that T(M), T(S) are greater than T(C).

Abstract: Disclosed are a method and an apparatus for preparing a polycrystalline silicon rod using a mixed core means, comprising: installing a first core means made of a resistive material together with a second core means made of silicon material in an inner space of a deposition reactor; electrically heating the first core means and pre-heating the second core by the first core means which is electrically heated; electrically heating the preheated second core means; and supplying a reaction gas into the inner space in a state where the first core means and the second core means are electrically heated for silicon deposition.

Abstract: The present invention provides a method and a system for forming wires (1) that enables a large scale process combined with a high structural complexity and material quality comparable to wires formed using substrate-based synthesis. The wires (1) are grown from catalytic seed particles (2) suspended in a gas within a reactor. Due to a modular approach wires (1) of different configuration can be formed in a continuous process. In-situ analysis to monitor and/or to sort particles and/or wires formed enables efficient process control.

Abstract: A stacked semiconductor device and a method for fabricating the stacked semiconductor device are disclosed. The stacked semiconductor device includes a first insulating interlayer having an opening that partially exposes a substrate, wherein the substrate includes single crystalline silicon, and a first seed pattern that fills the opening, wherein the first seed pattern has an upper portion disposed over the opening, and the upper portion is tapered away from the substrate. The stacked semiconductor device further includes a second insulating interlayer formed on the first insulating interlayer, wherein a trench that exposes the upper portion of the first seed pattern penetrates the second insulating interlayer, and a first single crystalline silicon structure that fills the trench.

Abstract: An underlying film 2 of a group III nitride is formed on a substrate 1 by vapor phase deposition. The substrate 1 and the underlying film 2 are subjected to heat treatment in the present of hydrogen to remove the underlying film 2 so that the surface of the substrate 1 is roughened. A seed crystal film 4 of a group III nitride single crystal is formed on a surface of a substrate 1A by vapor phase deposition. A group III nitride single crystal 5 is grown on the seed crystal film 4 by flux method.

Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.

Abstract: A vapor growth apparatus including: a reaction chamber configured to lod a wafer; a gas supply mechanism which supplies process gas into the reaction chamber; a support unit for placing the wafer; a heater for heating the wafer from below; a rotation control unit for rotating the wafer; a gas exhaust mechanism including an exhaust port which exhausts gas from the reaction chamber; a reflector provided below the heater for reflecting heat from the heater onto a rear face of the wafer; and a vertical drive unit for vertically moving the reflector.

Abstract: The present disclosure relates to an apparatus for producing silicon nanocrystals, which can minimize plasma diffusion by finely adjusting a plasma region created by an ICP coil. The apparatus includes a reactor having an ICP coil wound around an outer wall thereof and a tube inserted into the reactor, wherein a primary gas for forming silicon nanocrystals and a secondary gas for surface reaction of the silicon nanocrystals are separately supplied to the reactor through an inner side and an outer side of the tube, respectively.

Abstract: In a manufacturing apparatus for manufacturing an epitaxial wafer with a wafer being mounted substantially concentrically with a susceptor, a center rod is provided to extend in an up-and-down direction on a side of a non-mounting surface of the susceptor so that its upper end is adjacent to the center of the susceptor. With this arrangement, part of radiation light irradiated toward the susceptor is diffusely reflected by the center rod before reaching the central portion of the susceptor, thereby reducing the amount of the radiation light irradiated to the central portion of the susceptor as well as lowering the temperature of the portion. Since the center rod and the susceptor are not in surface contact, the center rod does not take the heat from the susceptor, thereby suppressing the temperature from decreasing locally at the central portion of the susceptor.

Abstract: A control system and method for controlling temperatures while performing a MBE deposition process, wherein the control system comprises a MBE growth structure; a heater adapted to provide heat for the MBE deposition process on the MBE growth structure; and a control computer adapted to receive a plurality of dynamic feedback control signals derived from the MBE growth structure; switch among a plurality of control modes corresponding with the plurality of dynamic feedback control signals; and send an output power signal to the heater to control the heating for the MBE deposition process based on a combination of the plurality of control modes. In one embodiment, the plurality of dynamic feedback control signals comprises thermocouple signals and pyrometer signals.

Abstract: Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth, for example to achieve n-, i-, or p-type conductivity.

Abstract: This III-nitride single-crystal growth method, being a method of growing a AlxGa1-xN single crystal (4) by sublimation, is furnished with a step of placing source material (1) in a crucible (12), and a step of sublimating the source material (1) to grow AlxGa1-xN (0<x?1) single crystal (4) in the crucible (12), with the AlyGa1-yN (0<y?1) source (2) and an impurity element (3), which is at least one selected from the group consisting of IVb elements and IIa elements, being included in the source material (1). This growth method makes it possible to stably grow bulk III-nitride single crystals of low dislocation density and of favorable crystallinity.

Abstract: The disclosure provides a device and method used to produce bulk single crystals. In particular, the disclosure provides a device and method used to produce bulk single crystals of a metal compound by an elemental reaction of a metal vapor and a reactant gas by an elemental reaction of a metal vapor and a reactant gas.

Abstract: A method of vapor phase epitaxy that is one embodiment of the present invention characteristically includes loading a wafer in a reaction chamber and mounting the wafer on a supporting section; heating the wafer by a heater provided under the supporting section; performing deposition on the wafer by supplying a process gas onto the wafer while rotating the wafer; detecting a temperature distribution at least in a circumferential direction at a peripheral edge section of the wafer; and determining a presence/absence of adhesion between the wafer and the supporting section based on the detected temperature distribution.

Abstract: The invention provides a method to enforce face-to-face stacking of organic semiconductors in the solid state that employs semiconductor co-crystal formers (SCCFs), to align semiconductor building blocks (SBBs). Single-crystal X-ray analysis reveals ?-orbital overlap optimal for organic semiconductor device applications.

Abstract: A VPE reactor is improved by providing temperature control to within 0.5° C., and greater process gas uniformity via novel reactor shaping, unique wafer motion structures, improvements in thermal control systems, improvements in gas flow structures, improved methods for application of gas and temperature, and improved control systems for detecting and reducing process variation.

Abstract: A silicon carbide single crystal wafer wherein a substrate is cut out at an OFF angle from a (0001) c plane of an ?-type silicon carbide single crystal of less than 2° and in an OFF direction in which a deviation from a (11-20) direction is less than 10°, the number of substantially triangular lamination defects exposed from a surface of a wafer which is epitaxial grown on the substrate is less than 4/cm2 over the entire surface of the wafer. The invention provides a producing method of a silicon carbide single crystal wafer capable of enhancing the utility ratio of the bulk silicon carbide single crystal, the element characteristics and the cleavage, as well as a silicon carbide single crystal wafer obtained by such a producing method.

Abstract: A method of epitaxially growing a SiC layer on a single crystal SiC substrate is described. The method includes heating a single-crystal SiC substrate to a first temperature of at least 1400° C. in a chamber, introducing a carrier gas, a silicon containing gas and carbon containing gas into the chamber; and epitaxially growing a layer of SiC on a surface of the SiC substrate. The SiC substrate is heated to the first temperature at a rate of at least 30° C./minute. The surface of the SiC substrate is inclined at an angle of from 1° to 3° with respect to a basal plane of the substrate material.

Abstract: Direct resistive heating is used to grow nanotubes out of carbon and other materials. A growth-initiated array of nanotubes is provided using a CVD or ion implantation process. These processes use indirect heating to heat the catalysts to initiate growth. Once growth is initiated, an electrical source is connected between the substrate and a plate above the nanotubes to source electrical current through and resistively heat the nanotubes and their catalysts. A material source supplies the heated catalysts with carbon or another material to continue growth of the array of nanotubes. Once direct heating has commenced, the source of indirect heating can be removed or at least reduced. Because direct resistive heating is more efficient than indirect heating the total power consumption is reduced significantly.

Abstract: A method for minimizing particle generation during deposition of a graded Si1-xGex layer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded Si1-xGex layer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cm2 on the substrate.

Abstract: Apparatus and method for control of epitaxial growth temperatures during manufacture of light emitting diodes (LEDs). Embodiments include measurement of a substrate and/or carrier temperature during a recipe stabilization period; determination of a temperature drift based on the measurement; and modification of a growth temperature based on a temperature offset determined in response to the temperature drift exceeding a threshold criteria. In an embodiment, a statistic derived from a plurality of pyrometric measurements made during the recipe stabilization over several runs is employed to offset each of a set of growth temperatures utilized to form a multiple quantum well (MQW) structure.

Abstract: Apparatus and method for control of epitaxial growth parameters, for example during manufacture of light emitting diodes (LEDs). Embodiments include PL measurement of a group III-V film following growth while a substrate at an elevated temperature is in a transfer chamber of a multi-chamber cluster tool. In other embodiments, a film thickness measurement, a contactless resistivity measurement, and a particle and/or roughness measure is performed while the substrate is disposed in the transfer chamber. One or more of the measurements performed in the transfer chamber are temperature corrected to room temperature by estimating the elevated temperature based on emission from a GaN base layer disposed below the group III-V film. In other embodiments, temperature correction is based on an absorbance band edge of the GaN base layer determined from collected white light reflectance spectra. Temperature corrected metrology is then used to control growth processes.

Abstract: A method of evaluating damage of a compound semiconductor member, comprising: a step of performing measurement of photoluminescence on a surface of the compound semiconductor member; and a step of evaluating damage on the surface of the compound semiconductor member, using a half width of a peak at a wavelength corresponding to a bandgap of the compound semiconductor member, in an emission spectrum obtained by the measurement of photoluminescence.

Abstract: An apparatus for forming a protective layer of magnesium oxide on a front glass substrate (11) in an evaporation chamber (201) includes the following: oxygen outlet openings (222) for introducing oxygen into the evaporation chamber (201); water vapor outlet openings (210) for introducing water vapor into the evaporation chamber (201) from the downstream side in the transfer direction of the front glass substrate (11); a mass analyzer (224) for measuring the ionic strength of hydrogen and the ionic strength of oxygen in the evaporation chamber (201); and mass flow controllers (215) and (221) for controlling the introduction amount of the water vapor and the introduction amount of the oxygen, respectively, by the ionic strengths measured by the mass analyzer (224).

Abstract: InyGa1-yN (0<y<1) layers whose principal surface is a non-polar plane or a semi-polar plane are formed by an MOCVD under different growth conditions. Then, the relationship between the growth temperature and the In supply mole fraction in a case where the pressure and the growth rate are constant is determined based on a growth condition employed for formation of InxGa1-xN (0<x<1) layers whose emission wavelengths are equal among the InyGa1-yN layers. Then, a saturation point is determined on a curve representing the relationship between the growth temperature and the In supply mole fraction, the saturation point being between a region where the growth temperature monotonically increases according to an increase of the In supply mole fraction and a region where the growth temperature saturates. Under a growth condition corresponding to this saturation point, an InxGa1-xN layer is grown.

Abstract: Compound-semiconductor-substrate polishing methods, compound semiconductor substrates, compound-semiconductor-epitaxial-substrate manufacturing methods, and compound semiconductor epitaxial substrates whereby oxygen superficially present on the substrates reduced. A compound semiconductor-substrate polishing method includes a preparation step (S10), a first polishing step (S20), and a second polishing step (S30). In the preparation step (S10), a compound semiconductor substrate is prepared. In the first polishing step (S20), the compound semiconductor substrate is polished with a chloric polishing agent. In the second polishing step (S30), subsequent to the first polishing step (S20), a polishing operation utilizing an alkaline aqueous solution containing an inorganic builder and having pH of 8.5 to 13.0 inclusive is performed.

Abstract: A control system and method for controlling temperatures while performing a MBE deposition process, wherein the control system comprises a MBE growth structure; a heater adapted to provide heat for the MBE deposition process on the MBE growth structure; and a control computer adapted to receive a plurality of dynamic feedback control signals derived from the MBE growth structure; switch among a plurality of control modes corresponding with the plurality of dynamic feedback control signals; and send an output power signal to the heater to control the heating for the MBE deposition process based on a combination of the plurality of control modes. In one embodiment, the plurality of dynamic feedback control signals comprises thermocouple signals and pyrometer signals.

Abstract: A method is used to produce a bulk SiC single crystal. A seed crystal is arranged in a crystal growth region of a growing crucible. An SiC growth gas phase is produced in the crystal growth region. The bulk SiC single crystal having a central longitudinal mid-axis grows by deposition from the SiC growth gas phase, the deposition taking place on a growth interface of the growing bulk SiC single crystal. The SiC growth gas phase is at least partially fed from an SiC source material and contains at least one dopant from the group of nitrogen, aluminum, vanadium and boron. At least in a central main growth region of the growth interface arranged about the longitudinal mid-axis, a lateral temperature gradient of at most 2 K/cm measured perpendicular to the longitudinal mid-axis is adjusted and maintained in this range. The bulk SiC single crystal has a large facet region.

Abstract: Shaped nanocrystal particles and methods for making shaped nanocrystal particles are disclosed. One embodiment includes a method for forming a branched, nanocrystal particle. It includes (a) forming a core having a first crystal structure in a solution, (b) forming a first arm extending from the core having a second crystal structure in the solution, and (c) forming a second arm extending from the core having the second crystal structure in the solution.

Abstract: The present invention generally relates to nanotechnology and, in particular, to branched nanoscale wires. In some cases, the branched nanoscale wires may be produced using vapor-phase and/or solution-phase synthesis. Branched nanoscale wires may be grown by depositing nanoparticles onto a nanoscale wire, and segments or “branches” can then be grown from the nanoparticles. The nanoscale wire may be any nanoscale wire, for example, a semiconductor nanoscale wire, a nanoscale wire having a core and a shell. The segments may be of the same, or of different materials, than the nanoscale wire, for example, semiconductor/metal, semiconductor/semiconductor. The junction between the segment and the nanoscale wire, in some cases, is epitaxial. In one embodiment, the nanoparticles are adsorbed onto the nanoscale wire by immobilizing a positively-charged entity, such as polylysine, to the nanoscale wire, and exposing it to the nanoparticles.

Abstract: A method for locally controlling the stoichiometry of an epitaxially deposited layer on a semiconductor substrate is provided. The method includes directing a first reactant gas and a doping gas across a top surface of a semiconductor substrate and directing a drive gas and a second reactant gas against the substrate separately from the first reactant gas in a manner that rotates the substrate while introducing the second reactant gas at an edge of the substrate to control each reactant separately, thereby compensating and controlling depletion effects and improving doping uniformity in resulting epitaxial layers on the substrate.

Abstract: The present invention includes a high-quality, large-area bulk GaN seed crystal for ammonothermal GaN growth and method for fabricating. The seed crystal is of ultra-low defect density, has flat surfaces free of bowing, and is free of foreign substrate material. The seed crystal is useful for producing large-volume, high-quality bulk GaN crystals by ammonothermal growth methods for eventual wafering into large-area GaN substrates for device fabrication.

Abstract: The invention provides an epitaxial growth method which is a single wafer processing epitaxial growth method by which at least a single crystal substrate is placed in a reaction chamber with an upper wall having a downward convexity and an epitaxial layer is deposited on the single crystal substrate by introducing raw material gas and carrier gas into the reaction chamber through a gas feed port, in which, after any one of the radius of curvature of the upper wall of the reaction chamber and a difference between an upper end of the gas feed port and a lower end of the upper wall of the reaction chamber in the height direction or both are adjusted in accordance with the flow rate of the carrier gas which is introduced into the reaction chamber through the gas feed port, an epitaxial layer is deposited on the single crystal substrate.

Abstract: A seed crystal is immersed in a melt containing a flux and a single crystal material in a growth vessel to produce a nitride single crystal on the seed crystal. A difference (TS-TB) of temperatures at a gas-liquid interface of the melt (TS) and at the lowermost part of the melt (TB) is set to 1° C. or larger and 8° C. or lower. Preferably, the substrate of seed crystal is vertically placed.

Abstract: A high-quality, large-area seed crystal for ammonothermal GaN growth and method for fabricating. The seed crystal comprises double-side GaN growth on a large-area substrate. The seed crystal is of relatively low defect density and has flat surfaces free of bowing. The seed crystal is useful for producing large-volume, high-quality bulk GaN crystals by ammonothermal growth methods for eventual wafering into large-area GaN substrates for device fabrication.

Abstract: A method for minimizing particle generation during deposition of a graded Si.sub.1-xGe.sub.x layer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded Si.sub.1-xGe.sub.x layer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cm.sup.2 on the substrate.

Abstract: A diamond single crystal substrate obtained by a vapor-phase growth method, wherein the diamond intrinsic Raman shift of the diamond single crystal substrate surface measured by microscopic Raman spectroscopy with a focused beam spot diameter of excitation light of 2 ?m is deviated by +0.5 cm?1 or more to +3.0 cm?1 or less from the standard Raman shift quantity of strain-free diamond, in a region (region A) which is more than 0% to not more than 25% of the surface, and is deviated by ?1.0 cm?1 or more to less than +0.5 cm?1 from the standard Raman shift quantity of strain-free diamond, in a region (region B) of the surface other than the region A. The diamond single crystal substrate can be obtained with a large size and high-quality without cracking and is suitable for semiconductor materials, electronic components, and optical components or the like.

Abstract: In the production process of the present invention for high purity polycrystal silicon, using a vertical reactor having a silicon chloride gas-feeding nozzle and a reducing agent gas-feeding nozzle which are disposed at an upper part and a waste gas discharge pipe, a silicon chloride gas and a reducing agent gas are fed into the reactor to form polycrystal silicon at a tip part of the silicon chloride gas-feeding nozzle by the reaction of the silicon chloride gas with the reducing agent gas, and the polycrystal silicon is allowed to grow from the tip part of the silicon chloride gas-feeding nozzle toward a lower part thereof.

Abstract: The present invention provides a method for manufacturing a monocrystalline film and a device formed by the above method, and according to the method mentioned above, lift-off of the monocrystalline silicon film is preferably performed and a high-purity monocrystalline silicon film can be obtained. A monocrystalline silicon substrate (template Si substrate) 201 is prepared, and on this monocrystalline silicon substrate 201, an epitaxial sacrificial layer 202 is formed. Subsequently, on this sacrificial layer 202, a monocrystalline silicon thin film 203 is rapidly epitaxially-grown using a RVD method, followed by etching of the sacrificial layer 202, whereby a monocrystalline silicon thin film 204 used as a photovoltaic layer of solar cells is formed.

Abstract: The present invention relates to a method for increasing the conversion of group III metal to group III nitride in a fused metal containing group III elements, with the introduction of nitrogen into the fused metal containing group III, at temperatures?1100° C. and at pressures of below 1×108 Pa, wherein a solvent adjunct is added to the fused metal containing group III elements, which is at least one element of the following elements C, Si, Ge, Fe, and/or at least one element of the rare earths, or an alloy or a compound of these elements, in particular their nitrides.

Abstract: There is provided a group III nitride crystal growth method capable of obtaining a material which is a GaN substrate of low defect density capable of being used as a power semiconductor substrate and in which characteristics of n-type and p-type requested for formation of transistor or the like. A growth method of group III nitride crystals includes: forming a mixed melt containing at least group III element and a flux formed of at least one selected from the group consisting of-alkaline metal and alkaline earth metal, in a reaction vessel; and growing group III nitride crystals from the mixed melt and a substance containing at least nitrogen, wherein after immersing a plurality of seed crystal substrates placed in an upper part of the reaction vessel in which the mixed melt is formed, into the mixed melt to cause crystal growth, the plurality of seed crystal substrates are pulled up above the mixed melt.

Abstract: A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).

Abstract: A method for configuring J electromagnetic radiation sources (J?2) to simultaneously irradiate a substrate. Each source has a different function of wavelength and angular distribution of emitted radiation. The substrate includes a base layer and I stacks (I?2) thereon. Pj denotes a same source-specific normally incident energy flux on each stack from source j. For simultaneous exposure of the I stacks to radiation from the J sources, Pj is computed such that an error E being a function of |W1?S1|, |W2?S2, . . . , |WI?SI| is about minimized with respect to Pj=1, . . . , J). Wi and Si respectively denote an actual and target energy flux transmitted into the substrate via stack i (i=1, . . . , I). The stacks are exposed to the radiation from the sources characterized by the computed Pj (j=1, . . . , J).

Abstract: A process for manufacturing a wafer of a silicon carbide single crystal having: cutting a wafer from an ? (hexagonal)-silicon carbide single crystal so that the off-angle is totally in the range from 0.4 to 2° to a plane obtained in perpendicular to the [0001]c axis of the silicon carbide single crystal; disposing the wafer in a reaction vessel; feeding a silicon source gas and carbon source gas in the reaction vessel; and epitaxially growing the ? (hexagonal) silicon carbide single crystal on the wafer by allowing the silicon source gas and carbon source gas to react.

Abstract: A nitride semiconductor crystal substrate is produced by forming a network mask repeating a closed loop unit shape upon an undersubstrate, growing a nitride semiconductor crystal in vapor phase, producing convex facet hills covered with facets on exposed parts ?, forming outlining concavities on mask-covered parts , not burying the facets, maintaining the convex facet hills on ? and the network concavities on , excluding dislocations in the facet hills down to the outlining concavities on , forming a defect accumulating region H on , decreasing dislocations in the facet hills and improving the facet hills to low defect density single crystal regions Z, producing a rugged nitride crystal, and slicing and polishing the nitride crystal into mirror nitride crystal wafers. After the fabrication of devices on the nitride wafer, dry-etching or wet etching of hot KOH or NaOH divides the device-carrying wafer into chips by corroding the network defect accumulating region H.

Abstract: It is to provide a substrate for growing a semiconductor, which is effective for suppressing an occurrence of surface defects different in type from hillock defects in case of epitaxially growing a compound semiconductor layer, particularly an Al-based compound semiconductor layer. In a substrate for growing a compound semiconductor, in which a crystal surface inclined at a predetermined off angle with respect to a (100) plane is a principal plane, an angle made by a direction of a vector obtained by projecting a normal vector of the principal plane on the (100) plane and one direction of a [0-11] direction, a [01-1] direction, a [011] direction and a [0-1-1] direction is set to be less than 35°, and the compound semiconductor layer is epitaxially grown on the substrate.