With Responsive Control Patents (Class 117/86)
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Patent number: 12125701Abstract: Silicon carbide (SiC) materials including SiC wafers and SiC boules and related methods are disclosed that provide large dimension SiC wafers with reduced crystallographic stress. Growth conditions for SiC materials include maintaining a generally convex growth surface of SiC crystals, adjusting differences in front-side to back-side thermal profiles of growing SiC crystals, supplying sufficient source flux to allow commercially viable growth rates for SiC crystals, and reducing the inclusion of contaminants or non-SiC particles in SiC source materials and corresponding SiC crystals. By forming larger dimension SiC crystals that exhibit lower crystallographic stress, overall dislocation densities that are associated with missing or additional planes of atoms may be reduced, thereby improving crystal quality and usable SiC crystal growth heights.Type: GrantFiled: December 15, 2020Date of Patent: October 22, 2024Assignee: Wolfspeed, Inc.Inventors: Yuri Khlebnikov, Varad R. Sakhalkar, Caleb A. Kent, Valeri F. Tsvetkov, Michael J. Paisley, Oleksandr Kramarenko, Matthew David Conrad, Eugene Deyneka, Steven Griffiths, Simon Bubel, Adrian R. Powell, Robert Tyler Leonard, Elif Balkas, Curt Progl, Michael Fusco, Alexander Shveyd, Kathy Doverspike, Lukas Nattermann
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Patent number: 12037700Abstract: A method of forming a film comprises growing, using a deposition system, at least a portion of the film and analyzing, using a RHEED instrument, the at least a portion of the film. Using a computer, data is acquired from the RHEED instrument that is indicative of a stoichiometry of the at least a portion of the film. Using the computer, adjustments to one or more process parameters of the deposition system are calculated to control stoichiometry of the film during subsequent deposition. Using the computer, instructions are transmitted to the deposition system to execute the adjustments of the one or more process parameters. Using the deposition system, the one or more process parameters are adjusted.Type: GrantFiled: May 2, 2023Date of Patent: July 16, 2024Assignee: PSIQUANTUM, CORP.Inventors: Yong Liang, John Elliott Ortmann, Jr., John Berg, Ann Melnichuk
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Patent number: 11866825Abstract: An apparatus includes a venting mechanism for venting a treatment vessel, a gas supply path including an upstream flow path to which a gas is supplied from a gas source, and multiple branch paths formed by branching a downstream side of the upstream flow path into multiple paths, each branch path being connected to the treatment vessel. The apparatus further includes first valves respectively provided in the branch paths to divert the gas to the branch paths, each first valve having a variable opening degree without being closed completely, a second valve provided in the upstream flow path to supply the gas or shut off the supply of the gas to a downstream side thereof, a pressure sensor that detects a pressure in the treatment vessel, and an abnormality detector that detects an abnormality in the downstream side of the second valve based on the detected pressure.Type: GrantFiled: November 13, 2019Date of Patent: January 9, 2024Assignee: Tokyo Electron LimitedInventors: Hiroyuki Hayashi, Ryosaku Ota
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Patent number: 11718926Abstract: A method of single crystal growth includes disposing a polycrystalline source material in a chamber of a single crystal growth apparatus, disposing a seed layer in the chamber of the single crystal growth apparatus, wherein the seed layer is fixed below a lid of the single crystal growth apparatus, heating the polycrystalline source material by a heater of the single crystal growth apparatus to deposit a semiconductor material layer on the seed layer, and after depositing the semiconductor material layer, providing a coolant gas at a backside of the lid to cool down the seed layer and the semiconductor material layer.Type: GrantFiled: September 27, 2021Date of Patent: August 8, 2023Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Chung-Yi Chen
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Patent number: 11703361Abstract: A five-degree-of-freedom heterodyne grating interferometry system comprises: a single-frequency laser for emitting single-frequency laser light, the single-frequency laser light can be split into a reference light beam and a measurement light beam; an interferometer lens set and a measurement grating for converting the reference light and the measurement light into a reference interference signal and a measurement interference signal; and multiple optical fiber bundles respectively receiving the measurement interference signal and the reference interference signal, wherein each optical fiber bundle has multiple multi-mode optical fibers respectively receiving interference signals at different positions on the same plane. The system is not over-sensitive to the environment, is small and light, and is easy to arrange.Type: GrantFiled: June 26, 2019Date of Patent: July 18, 2023Assignees: BEIJING U-PRECISION TECH CO., LTD., TSINGHUA UNIVERSITYInventors: Ming Zhang, Yu Zhu, Fuzhong Yang, Leijie Wang, Rong Cheng, Xin Li, Weinan Ye, Jinchun Hu
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Patent number: 11149358Abstract: A vapor phase growth apparatus includes n (n is an integer of 2 or more) reactors; a primary gas supply path supplying a mixed gas to the reactors; n secondary gas supply paths connected to one of the reactors including a main secondary gas supply path and (n?1) auxiliary secondary gas supply paths; a first pressure gauge; a main flow rate controller provided in the main secondary gas supply path; (n?1) auxiliary flow rate controllers provided in the auxiliary secondary gas supply paths; a first control circuit instructing a first flow rate value; and a second control circuit calculating a second flow rate value being 1/n of a sum of a flow rate value measured by the main flow rate controller and flow rate values measured by the auxiliary flow rate controllers, and instructing the second flow rate value to the auxiliary flow rate controllers.Type: GrantFiled: November 1, 2019Date of Patent: October 19, 2021Assignee: NuFlare Technology, Inc.Inventor: Hideki Ito
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Patent number: 11118284Abstract: A vapor phase growth apparatus includes n (n is an integer of 2 or more) reactors; a primary gas supply path supplying a mixed gas to the reactors; n secondary gas supply paths connected to one of the reactors including a main secondary gas supply path and (n?1) auxiliary secondary gas supply paths; a first pressure gauge; a main flow rate controller provided in the main secondary gas supply path; (n?1) auxiliary flow rate controllers provided in the auxiliary secondary gas supply paths; a first control circuit instructing a first flow rate value; and a second control circuit calculating a second flow rate value being 1/n of a sum of a flow rate value measured by the main flow rate controller and flow rate values measured by the auxiliary flow rate controllers, and instructing the second flow rate value to the auxiliary flow rate controllers.Type: GrantFiled: November 1, 2019Date of Patent: September 14, 2021Assignee: NuFlare Technology, Inc.Inventor: Hideki Ito
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Patent number: 11098955Abstract: A micro-scale wireless heater includes: a support layer having first and second sides and a cavity formed on the second side; a first electrode plate and a first conduction line disposed on the second side; a second electrode plate and a coil both embedded into a slot on the first side, wherein the support layer is disposed between the first and second electrode plates forming a capacitor, the coil forms an inductor, and the slot communicates with the cavity; and a second conduction line disposed in the cavity. The first and second electrode plates are electrically connected together through the first and second conduction lines and the coil in order. Three exposed surfaces of the second electrode plate, the coil and the first side are flush with one another. The inductor and the capacitor convert an electromagnetic wave into heat. A fabrication method and applications thereof are also provided.Type: GrantFiled: January 24, 2019Date of Patent: August 24, 2021Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Hung-Yin Tsai, Tung Che Lee, Ping Huan Tsai, Shang Ru Wu, Yi Hung Chen
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Patent number: 10900125Abstract: Apparatus and methods for processing a semiconductor wafer in which a sensor (e.g., a contact thermocouple) is positioned in the gas distribution assembly measures temperature and/or a film parameter before, during and/or after deposition are described.Type: GrantFiled: September 7, 2017Date of Patent: January 26, 2021Assignee: Applied Materials, Inc.Inventors: Joseph Yudovsky, Kevin Griffin
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Patent number: 10535501Abstract: A film forming apparatus includes a first supply unit configured to supply a first reaction gas into the reaction vessel under an environment of a first pressure, a second supply unit configured to supply a second reaction gas into the reaction vessel under an environment of a second pressure lower than the first pressure, a first vacuum exhaust mechanism connected to the reaction vessel through a first exhaust path in order to create the environment of the first pressure within the reaction vessel, a second vacuum exhaust mechanism connected to the reaction vessel through a second exhaust path in order to create the environment of the second pressure, the second vacuum exhaust mechanism being lower in an operation pressure zone than the first vacuum exhaust mechanism, and a switching unit configured to switch exhaust destinations of the reaction vessel between the first path and the second path.Type: GrantFiled: May 29, 2014Date of Patent: January 14, 2020Assignee: TOKYO ELECTRON LIMITEDInventors: Yamato Tonegawa, Katsutoshi Ishii
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Patent number: 10403348Abstract: Disclosed is a non-destructive large current-readout ferroelectric single-crystal thin film memory as well as a method of preparing the ferroelectric memory and a method of operating the ferroelectric memory. The large current-readout ferroelectric single-crystal thin film memory comprises a ferroelectric storage layer, which is a ferroelectric single-crystal storage layer. The non-destructive readout ferroelectric memory has a greatly increased read current in an on-state, and moreover, the data retention performance and data endurance performance are improved.Type: GrantFiled: April 12, 2016Date of Patent: September 3, 2019Assignee: Fudan UniversityInventors: Anquan Jiang, Wenping Geng
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Patent number: 10190913Abstract: Disclosed are a substrate processing apparatus and a substrate processing method. The substrate processing apparatus includes an emissivity setting unit to which emissivity at a liquid chemical which is brought into contact with a substrate or emissivity at an interface at which the substrate and the liquid chemical are in contact with each other is input, a radiant energy input unit to which radiant energy radiating from the liquid chemical or the interface is input, and a calculation unit that calculates a calculation temperature of the liquid chemical or the interface based on the emissivity and the radiant energy.Type: GrantFiled: August 27, 2015Date of Patent: January 29, 2019Assignee: ZEUS CO., LTD.Inventors: Kwang Il Jung, Byeong Su Lee, Joo Hyung Ryu
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Patent number: 9718132Abstract: Provided is a manufacturing method of uniformly spherical gold nanoparticles using a synthesis method for controlling a size and a shape by repeating an etching and growing.Type: GrantFiled: November 14, 2014Date of Patent: August 1, 2017Assignees: Korea Basic Science Institute, Research & Business Foundation SUNGKYUNKWAN UNIVERSITYInventors: Gaehang Lee, Gi-Ra Yi, You-Jin Lee, Dong Kwan Kim
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Patent number: 9670581Abstract: A method for producing an epitaxial silicon wafer by applying a vapor deposition on a silicon wafer is disclosed. A vapor deposition apparatus in which the vapor deposition is conducted at least includes a chamber and a hydrogen-chloride-gas supply apparatus that is in communication and connected with an inside of the chamber to supply hydrogen chloride gas into the chamber. A valve including a diaphragm that allows or blocks a flow of the hydrogen chloride gas from an inlet channel to an outlet channel is disposed in the hydrogen-chloride-gas supply apparatus. A W-free anticorrosion alloy material is used for the diaphragm. When a maintenance work is to be done inside the chamber, the hydrogen chloride gas is supplied from the hydrogen-chloride-gas supply apparatus into the chamber.Type: GrantFiled: September 16, 2015Date of Patent: June 6, 2017Assignee: SUMCO CORPORATIONInventors: Motoki Goto, Yusuke Kurozumi, Kan Yoshitake, Hitoshi Takamiya
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Patent number: 9650726Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support comprising a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.Type: GrantFiled: February 16, 2011Date of Patent: May 16, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Nyi O. Myo, Kevin Bautista, Zhiyuan Ye, Schubert S. Chu, Yihwan Kim
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Patent number: 9065012Abstract: Protrusions 2 each having a shape of a pyramid or a truncated pyramid are regularly arranged on a growing face 1a of a seed crystal 1 composed of gallium nitride single crystal. It is formed a gallium nitride crystal layer 4 having a thickness of 100 ?m or smaller by flux method directly on the growing face 1a of the seed crystal.Type: GrantFiled: May 28, 2014Date of Patent: June 23, 2015Assignee: NGK INSULATORS, LTD.Inventors: Shuuhei Higashihara, Makoto Iwai
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Patent number: 9051663Abstract: A manufacturing method of a SiC single crystal includes a first growth process and a re-growth process. In the first growth process, a first seed crystal made of SiC is used to grow a first SiC single crystal. In the re-growth process, a plurality of growth steps is performed for (n?1) times. In a k-th growth step, a k-th seed crystal is cut out from a grown (k?1)-th SiC single crystal, and the k-th seed crystal is used to grow a k-th SiC single crystal (n?2 and 2?k?n). When an offset angle of a growth surface of the k-th seed crystal is defined as ?k, at least in one of the plurality of growth steps, the offset angle ?k is smaller than the offset angle ?k-1.Type: GrantFiled: November 28, 2011Date of Patent: June 9, 2015Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasushi Urakami, Ayumu Adachi, Itaru Gunjishima
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Patent number: 9005362Abstract: The present invention is to provide a method for growing a group III nitride crystal that has a large size and has a small number of pits formed in the main surface of the crystal by using a plurality of tile substrates. A method for growing a group III nitride crystal includes a step of preparing a plurality of tile substrates 10 including main surfaces 10m having a shape of a triangle or a convex quadrangle that allows two-dimensional close packing of the plurality of tile substrates; a step of arranging the plurality of tile substrates 10 so as to be two-dimensionally closely packed such that, at any point across which vertexes of the plurality of tile substrates 10 oppose one another, 3 or less of the vertexes oppose one another; and a step of growing a group III nitride crystal 20 on the main surfaces 10m of the plurality of tile substrates arranged.Type: GrantFiled: May 25, 2011Date of Patent: April 14, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yuki Hiromura, Koji Uematsu, Hiroaki Yoshida, Shinsuke Fujiwara
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Patent number: 8999058Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).Type: GrantFiled: May 5, 2010Date of Patent: April 7, 2015Assignee: Solexel, Inc.Inventors: George D. Kamian, Somnath Nag, Subbu Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara
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Patent number: 8986448Abstract: To provide a method of manufacturing a single crystal 3C-SiC substrate that can dramatically reduce surface defects generated in a processing of epitaxial growth and can secure a quality as a semiconductor device while simplifying a post process. The method of manufacturing a single crystal 3C-SiC substrate where a single crystal 3C-SiC layer is formed on a base substrate by epitaxial growth is provided. A first growing stage of forming the single crystal 3C-SiC layer to have a surface state configured with a surface with high flatness and surface pits scattering in the surface is performed. A second growing stage of further epitaxially growing the single crystal 3C-SiC layer obtained in the first growing stage so as to fill the surface pits is performed.Type: GrantFiled: March 14, 2011Date of Patent: March 24, 2015Assignee: Air Water Inc.Inventors: Hidetoshi Asamura, Keisuke Kawamura, Satoshi Obara
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Publication number: 20150075420Abstract: A method for manufacturing a single crystal diamond in which vapor phase synthetic single crystal diamond is additionally deposited on a single crystal diamond seed substrate obtained by vapor phase synthesis, includes a step of measuring flatness of the seed substrate, a step of determining whether or not to flatten the seed substrate based on the measurement result of the flatness, and any one of the following two steps of a step of additionally depositing the vapor phase synthetic single crystal diamond after flattening the seed substrate for which the flattening is necessary based on the determination and a step of additionally depositing the vapor phase synthetic single crystal diamond without flattening the seed substrate for which the flattening is not necessary based on the determination.Type: ApplicationFiled: September 17, 2014Publication date: March 19, 2015Inventors: Hitoshi NOGUCHI, Daisuke TAKEUCHI, Satoshi YAMASAKI, Masahiko OGURA, Hiromitsu KATO, Toshiharu MAKINO, Hideyo OKUSHI
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Patent number: 8961687Abstract: Disclosed embodiments include methods of fabricating a semiconductor layer or device and devices fabricated thereby. The methods include, but are not limited to, providing a substrate having a cubic crystalline surface with a known lattice parameter and growing a cubic crystalline group III-nitride alloy layer on the cubic crystalline substrate by coincident site lattice matched epitaxy. The cubic crystalline group III-nitride alloy may be prepared to have a lattice parameter (a?) that is related to the lattice parameter of the substrate (a). The group III-nitride alloy may be a cubic crystalline InxGayAl1-x-yN alloy. The lattice parameter of the InxGayAl1-x-yN or other group III-nitride alloy may be related to the substrate lattice parameter by (a?)=?2(a) or (a?)=(a)/?2. The semiconductor alloy may be prepared to have a selected band gap.Type: GrantFiled: August 31, 2009Date of Patent: February 24, 2015Assignee: Alliance for Sustainable Energy, LLCInventors: Andrew G. Norman, Aaron J. Ptak, William E. McMahon
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Patent number: 8940094Abstract: A method of fabricating a semiconductor processing device includes providing a susceptor including a substantially cylindrical body portion having opposing upper and lower surfaces. The body portion has a diameter larger than a wafer diameter. The method also includes providing a set of holes circumferentially disposed at a first susceptor diameter, the set of holes being evenly spaced with respect to adjacent holes and extending through the upper and lower surfaces in an area. The first susceptor diameter is larger than the wafer diameter, and holes are omitted along the first diameter in a set of predetermined orientations.Type: GrantFiled: April 10, 2012Date of Patent: January 27, 2015Assignee: SunEdison Semiconductor LimitedInventors: John Allen Pitney, Manabu Hamano
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Patent number: 8940093Abstract: A method of controlling an epitaxial growth process in an epitaxial reactor. The method includes optimizing the thermocouple offset parameter for a second run by setting up a modeled output parameter value as a linear function of the actual output parameter value, and a second thermocouple offset parameter value.Type: GrantFiled: April 2, 2008Date of Patent: January 27, 2015Assignee: Texas Instruments IncorporatedInventors: Manfred Schiekofer, Pietro Foglietti, Robert Maier
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Patent number: 8906159Abstract: Disclosed are a (Al, Ga, In)N-based compound semiconductor device and a method of fabricating the same. The (Al, Ga, In)N-based compound semiconductor device of the present invention comprises a substrate; a (Al, Ga, In)N-based compound semiconductor layer grown on the substrate; and an electrode formed of at least one material or an alloy thereof selected from the group consisting of Pt, Pd and Au on the (Al, Ga, In)N-based compound semiconductor layer.Type: GrantFiled: June 4, 2008Date of Patent: December 9, 2014Assignee: Seoul Viosys Co., Ltd.Inventor: Chung Hoon Lee
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Patent number: 8894766Abstract: The invention provides a process for producing polycrystalline silicon, including introduction of a reaction gas containing a silicon-containing component and hydrogen by means of one or more nozzles into a reactor including at least one heated filament rod on which silicon is deposited, wherein an Archimedes number Arn which describes flow conditions in the reactor, as a function of the fill level FL which states the ratio of one rod volume to one empty reactor volume in percent, for a fill level FL of up to 5% is within the range limited at the lower end by the function Ar=2000×FL?0.6 and at the upper end by the function Ar=17 000×FL?0.9, and at a fill level of greater than 5% is within a range from at least 750 to at most 4000.Type: GrantFiled: August 22, 2011Date of Patent: November 25, 2014Assignee: Wacker Chemie AGInventors: Marcus Schaefer, Oliver Kraetzschmar
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Patent number: 8888913Abstract: A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.Type: GrantFiled: August 9, 2011Date of Patent: November 18, 2014Assignee: Sumco Techxiv CorporationInventors: Kazuhiro Narahara, Hirotaka Kato, Koichiro Hayashida
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Patent number: 8876971Abstract: Liquid-based precursors for formation of Copper Selenide, Indium Selenide, Copper Indium Diselenide, and/or copper Indium Galium Diselenide include copper-organoselenides, particulate copper selenide suspensions, copper selenide ethylene diamine in liquid solvent, nanoparticulate indium selenide suspensions, and indium selenide ethylene diamine coordination compounds in solvent. These liquid-based precursors can be deposited in liquid form onto substrates and treated by rapid thermal processing to form crystalline copper selenide and indium selenide films.Type: GrantFiled: November 9, 2006Date of Patent: November 4, 2014Assignee: Alliance for Sustainable Energy, LLCInventors: Calvin J. Curtis, Alexander Miedaner, Maikel Van Hest, David S. Ginley
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Patent number: 8876973Abstract: There is provided an n type (100) oriented single crystal diamond semiconductor film into which phosphorous atoms have been doped and a method of producing the same. The n type (100) oriented single crystal diamond semiconductor film, characterized in that (100) oriented diamond is epitaxially grown on a substrate under such conditions that; the diamond substrate is (100) oriented diamond, a means for chemical vapor deposition provides hydrogen, hydrocarbon and a phosphorous compound in the plasma vapor phase, the ratio of phosphorous atoms to carbon atoms in the plasma vapor phase is no less than 0.1%, and the ratio of carbon atoms to hydrogen atoms is no less than 0.05%, and the method of producing the same.Type: GrantFiled: January 5, 2012Date of Patent: November 4, 2014Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Hiromitsu Kato, Satoshi Yamasaki, Hideyo Ookushi, Shinichi Shikata
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Patent number: 8852341Abstract: The present invention discloses methods to produce large quantities of polycrystalline GaN for use in the ammonothermal growth of group III-nitride material. High production rates of GaN can be produced in a hydride vapor phase growth system. One drawback to enhanced polycrystalline growth is the increased incorporation of impurities, such as oxygen. A new reactor design using non-oxide material that reduces impurity concentrations is disclosed. Purification of remaining source material after an ammonothermal growth is also disclosed. The methods described produce sufficient quantities of polycrystalline GaN source material for the ammonothermal growth of group III-nitride material.Type: GrantFiled: November 23, 2009Date of Patent: October 7, 2014Assignee: Sixpoint Materials, Inc.Inventors: Edward Letts, Tadao Hashimoto, Masanori Ikari
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Patent number: 8828138Abstract: A method of using a sensor comprising a field effect transistor (FET) embedded in a nanopore includes placing the sensor in an electrolyte comprising at least one of biomolecules and deoxyribonucleic acid (DNA); placing an electrode in the electrolyte; applying a gate voltage in the sub-threshold regime to the electrode; applying a drain voltage to a drain of the FET; applying a source voltage to a source of the FET; detecting a change in a drain current in the sensor in response to the at least one of biomolecules and DNA passing through the nanopore.Type: GrantFiled: May 17, 2010Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Stephen W. Bedell, Christopher D'Emic, Hongbo Peng, Sufi Zafar
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Patent number: 8828140Abstract: A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d1?d2|/d2 obtained from the plane spacing d1 at the X-ray penetration depth of 0.3 ?m and the plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 2.1×10?3.Type: GrantFiled: July 3, 2013Date of Patent: September 9, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Ishibashi, Tokiko Kaji, Seiji Nakahata, Takayuki Nishiura
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Patent number: 8758510Abstract: A method is used for producing an SiC volume monocrystal by sublimation growth. During growth, by sublimation of a powdery SiC source material and by transport of the sublimated gaseous components into the crystal growth region, an SiC growth gas phase is produced there. The SiC volume monocrystal grows by deposition from the SiC growth gas phase on the SiC seed crystal. The SiC seed crystal is bent during a heating phase before such that an SiC crystal structure with a non-homogeneous course of lattice planes is adjusted, the lattice planes at each point have an angle of inclination relative to the direction of the center longitudinal axis and peripheral angles of inclination at a radial edge of the SiC seed crystal differ in terms of amount by at least 0.05° and at most by 0.2° from a central angle of inclination at the site of the center longitudinal axis.Type: GrantFiled: December 28, 2011Date of Patent: June 24, 2014Assignee: SiCrystal AktiengesellschaftInventors: Thomas Straubinger, Michael Vogel, Andreas Wohlfart
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Patent number: 8758509Abstract: A thin plate of synthetic single crystal diamond material, the thin plate of synthetic single crystal diamond material having: a thickness in a range 100 nm to 50 ???; a concentration of quantum spin defects greater than 0.1 ppb (parts-per-billion); a concentration of point defects other than the quantum spin defects of below 200 ppm (parts-per-million); and wherein at least one major face of the thin plate of synthetic single crystal diamond material comprises surface termination species which have zero nuclear spin and/or zero electron spin.Type: GrantFiled: May 10, 2012Date of Patent: June 24, 2014Assignee: Element Six LimitedInventors: Daniel James Twitchen, Matthew Lee Markham
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Patent number: 8663735Abstract: Apparatus and method for generating ruthenium tetraoxide in situ for use in vapor deposition, e.g., atomic layer deposition (ALD), of ruthenium-containing films on microelectronic device substrates. The ruthenium tetraoxide can be generated on demand by reaction of ruthenium or ruthenium dioxide with an oxic gas such as oxygen or ozone. In one implementation, ruthenium tetraoxide thus generated is utilized with a strontium organometallic precursor for atomic layer deposition of strontium ruthenate films of extremely high smoothness and purity.Type: GrantFiled: February 13, 2010Date of Patent: March 4, 2014Assignee: Advanced Technology Materials, Inc.Inventors: Chongying Xu, Weimin Li, Thomas M. Cameron
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Patent number: 8663389Abstract: A method and apparatus for depositing III-V material is provided. The apparatus includes a reactor partially enclosed by a selectively permeable membrane 12. A means is provided for generating source vapors, such as a vapor-phase halide of a group III element (IUPAC group 13) within the reactor volume 10, and an additional means is also provided for introducing a vapor-phase hydride of a group V element (IUPAC group 15) into the volume 10. The reaction of the group III halide and the group V hydride on a temperature-controlled substrate 18 within the reactor volume 10 produces crystalline III-V material and hydrogen gas. The hydrogen is preferentially removed from the reactor through the selectively permeable membrane 12, thus avoiding pressure buildup and reaction imbalance. Other gases within the reactor are unable to pass through the selectively permeable membrane.Type: GrantFiled: May 21, 2011Date of Patent: March 4, 2014Inventor: Andrew Peter Clarke
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Patent number: 8658118Abstract: An object of the present invention is to provide more inexpensive high purity crystalline silicon which can satisfy not only a quality required to a raw material of silicon for a solar cell but also a part of a quality required to silicon for an up-to-date semiconductor and a production process for the same and provide high purity silicon tetrachloride used for production of high purity crystalline silicon and a production process for the same. The high purity crystalline silicon of the present invention has a boron content of 0.015 ppmw or less and a zinc content of 50 to 1000 ppbw. The production process for high purity crystalline silicon according to the present invention is characterized by that a silicon tetrachloride gas and a zinc gas are supplied to a vertical reactor to react them at 800 to 1200° C.Type: GrantFiled: September 4, 2009Date of Patent: February 25, 2014Assignees: JNC Corporation, JX Nippon Mining & Metals Corporation, Toho Titanium Co., ltd.Inventors: Satoshi Hayashida, Wataru Kato
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Patent number: 8617310Abstract: Methods of evaluating a superabrasive volume or a superabrasive compact are disclosed. One method may comprise exposing a superabrasive volume to beta particles and detecting a quantity of scattered beta particles. Further, a boundary may be perceived between a first region and a second region of the superabrasive volume in response to detecting the quantity of scattered beta particles. In another embodiment, a boundary between a catalyst-containing region and a catalyst-diminished region of a polycrystalline diamond volume may be perceived. In a further embodiment, a boundary may be perceived between a catalyst-containing region and a catalyst-diminished region of a polycrystalline diamond compact. Additionally, a depth to which a catalyst-diminished region extends within a polycrystalline diamond volume of a polycrystalline diamond compact may be measured in response to detecting a quantity of scattered beta particles. A system configured to evaluate a superabrasive volume is disclosed.Type: GrantFiled: May 7, 2010Date of Patent: December 31, 2013Assignee: US Synthetic CorporationInventor: Michael A. Vail
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Patent number: 8608848Abstract: Shaped nanocrystal particles and methods for making shaped nanocrystal particles are disclosed. One embodiment includes a method for forming a branched, nanocrystal particle. It includes (a) forming a core having a first crystal structure in a solution, (b) forming a first arm extending from the core having a second crystal structure in the solution, and (c) forming a second arm extending from the core having the second crystal structure in the solution.Type: GrantFiled: October 6, 2011Date of Patent: December 17, 2013Assignee: The Regents of the University of CaliforniaInventors: A. Paul Alivisatos, Erik C. Scher, Liberato Manna
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Patent number: 8603243Abstract: A method of: supplying sources of carbon and silicon into a chemical vapor deposition chamber; collecting exhaust gases from the chamber; performing mass spectrometry on the exhaust gases; and correlating a partial pressure of a carbon species in the exhaust gases to a carbon:silicon ratio in the chamber.Type: GrantFiled: July 31, 2008Date of Patent: December 10, 2013Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Brenda L VanMil, Kok-Keong Lew, Rachael L Myers-Ward, Charles R. Eddy, Jr., David Kurt Gaskill
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Patent number: 8591651Abstract: A method of epitaxially growing a SiC layer on a single crystal SiC substrate is described. The method includes heating a single-crystal SiC substrate to a first temperature of at least 1400° C. in a chamber, introducing a carrier gas, a silicon containing gas and carbon containing gas into the chamber; and epitaxially growing a layer of SiC on a surface of the SiC substrate. The SiC substrate is heated to the first temperature at a rate of at least 30° C./minute. The surface of the SiC substrate is inclined at an angle of from 1° to 3° with respect to a basal plane of the substrate material.Type: GrantFiled: June 15, 2012Date of Patent: November 26, 2013Assignee: Power Integrations, Inc.Inventor: Jie Zhang
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Patent number: 8586488Abstract: A computer program product and system for configuring J electromagnetic radiation sources (J?2) to simultaneously irradiate a substrate. Each source has a different function of wavelength and angular distribution of emitted radiation. The substrate includes a base layer and I stacks (I?2) thereon. Pj denotes a same source-specific normally incident energy flux on each stack from source j. For simultaneous exposure of the I stacks to radiation from the J sources, Pj is computed such that an error E being a function of |W1?S1|, |W2?S2|, |WI?SI| is about minimized with respect to Pj (j=1, . . . , J). Wi and Si respectively denote an actual and target energy flux transmitted into the substrate via stack i (i=1, . . . , I). The stacks are exposed to the radiation from the sources characterized by the computed Pj (j=1, . . . , J).Type: GrantFiled: August 23, 2010Date of Patent: November 19, 2013Assignee: International Business Machines CorporationInventors: Brent Alan Anderson, Edward Joseph Nowak
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Publication number: 20130298823Abstract: A method for integrating wide-gap semiconductors, and specifically, gallium nitride epilayers, with synthetic diamond substrates is disclosed. Diamond substrates are created by depositing synthetic diamond onto a nucleating layer deposited or formed on a layered structure that comprises at least one layer of gallium nitride. Methods for manufacturing GaN-on-diamond wafers with low bow and high crystalline quality are disclosed along with preferred choices for manufacturing GaN-on-diamond wafers and chips tailored to specific applications.Type: ApplicationFiled: February 28, 2013Publication date: November 14, 2013Inventors: Daniel Francis, Firooz Faili, Kristopher Matthews, Frank Yantis Lowe, Quentin Diduck, Sergey Zaytsev, Felix Ejeckam
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Patent number: 8574528Abstract: A method of growing an epitaxial layer on a substrate is generally provided. According to the method, the substrate is heated in a chemical vapor deposition chamber to a growth temperature in the presence of a carbon source gas, then the epitaxial layer is grown on the substrate at the growth temperature, and finally the substrate is cooled in a chemical vapor deposition chamber to at least about 80% of the growth temperature in the presence of a carbon source gas. Substrates formed from this method can have a carrier lifetime between about 0.25 ?s and about 9.9 ?s.Type: GrantFiled: September 7, 2010Date of Patent: November 5, 2013Assignee: University of South CarolinaInventors: Tangali S. Sudarshan, Amitesh Srivastava
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Patent number: 8568529Abstract: Embodiments disclosed herein generally relate to an HVPE chamber. The chamber may have two separate precursor sources coupled thereto to permit two separate layers to be deposited. For example, a gallium source and a separate aluminum source may be coupled to the processing chamber to permit gallium nitride and aluminum nitride to be separately deposited onto a substrate in the same processing chamber. The nitrogen may be introduced to the processing chamber at a separate location from the gallium and the aluminum and at a lower temperature. The different temperatures causes the gases to mix together, react and deposit on the substrate with little or no deposition on the chamber walls.Type: GrantFiled: December 14, 2009Date of Patent: October 29, 2013Assignee: Applied Materials, Inc.Inventors: Tetsuya Ishikawa, David H. Quach, Anzhong Chang, Olga Kryliouk, Yuriy Melnik, Harsukhdeep S. Ratia, Son T. Nguyen, Lily Pang
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Publication number: 20130276695Abstract: Apparatus and methods for wafer processes such as etching and chemical vapor deposition processes are disclosed. In some embodiments, the apparatus includes a susceptor and a ring disposed beneath the susceptor to influence a thickness of the deposited epitaxial layer.Type: ApplicationFiled: March 15, 2013Publication date: October 24, 2013Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: John Allen Pitney, Manabu Hamano
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Patent number: 8562738Abstract: A nitride-based light-emitting device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a nitride-based buffer layer formed by nitrogen, a first group III element, and optionally, a second group III element, a first nitride-based semiconductor layer, a light-emitting layer, and a second nitride-based semiconductor layer.Type: GrantFiled: February 25, 2013Date of Patent: October 22, 2013Assignee: Epistar CorporationInventors: Chen Ou, Wen-Hsiang Lin, Shih-Kuo Lai
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Publication number: 20130269598Abstract: A technology for growing silicon carbide single crystals by PVT (Physical Vapor Transport) and a technology for in-situ annealing the crystals after growth is finished is provided. The technology can achieve real-time dynamic control of the temperature distribution of growth chamber by regulating the position of the insulation layer on the upper part of the graphite crucible, thus controlling the temperature distribution of growth chamber in real-time during the growth process according to the needs of the technology, which helps to significantly improve the crystal quality and production yield.Type: ApplicationFiled: November 11, 2011Publication date: October 17, 2013Applicants: Institute of Physics Chinese Academy of Sciences, Tankeblue Semiconductor Co. Ltd.Inventors: Xiaolong Chen, Bo Wang, Longyuan Li, Tonghua Peng, Chunjun Liu, Wenjun Wang, Gang Wang
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Patent number: 8551246Abstract: A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.Type: GrantFiled: May 7, 2009Date of Patent: October 8, 2013Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Fumio Tahara, Tsuyoshi Ohtsuki, Takatoshi Nagoya, Kiyoshi Mitani
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Patent number: RE49620Abstract: Disclosed is a non-destructive large current-readout ferroelectric single-crystal thin film memory as well as a method of preparing the ferroelectric memory and a method of operating the ferroelectric memory. The large current-readout ferroelectric single-crystal thin film memory comprises a ferroelectric storage layer, which is a ferroelectric single-crystal storage layer. The non-destructive readout ferroelectric memory has a greatly increased read current in an on-state, and moreover, the data retention performance and data endurance performance are improved.Type: GrantFiled: June 15, 2020Date of Patent: August 22, 2023Assignee: Fudan UniversityInventors: Anquan Jiang, Wenping Geng