{b,al,ga,in,tl}{p,as,sb,bi} Compound Containing, Except Intermetallics Thereof (i.e., Except {al,ga,in,tl}{sb,bi}) {c30b 29/40} Patents (Class 117/953)
  • Patent number: 5738722
    Abstract: The invention relates to a method for manufacturing a III-V system compound semiconductor device, provides such a new C dopant as alkyl halide (CH.sub.2 I.sub.2 for example) containing carbon (C), iodine (I), and hydrogen (H) for giving a highly p-type conductivity to a GaAs crystal layer, an InGaAs crystal layer or the like as an object of it, and includes a process of forming a p-type III-V system compound semiconductor layer as using a compound containing carbon (C) as a dopant material for giving a p-type conductivity and further containing iodine (I) and hydrogen (H) as impurity.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: April 14, 1998
    Assignee: Fujitsu Limited
    Inventors: Takeshi Tomioka, Hideyasu Ando, Naoya Okamoto, Shinji Yamaura
  • Patent number: 5735950
    Abstract: A process for manufacturing precise alloy compositions in nonlinear alloy systems. The invention implements a new quadratic fitting function that relates alloy composition c.sub.A for a variable A to input fluxes f.sub.A and f.sub.B, as c.sub.A =f.sub.A.sup.2 /(f.sub.A.sup.2 +/.beta.f.sub.B.sup.2). .beta. is a parameter that is used to modify the incorporation of the Group V input variable B. This modification is necessary because of different surface populations of Group V dimer species. This new fitting function precisely predicts alloy compositions in nonlinear systems, such as the GaAs.sub.l-y P.sub.y system, where y is set equal to the composition c.sub.A.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: April 7, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen
  • Patent number: 5733796
    Abstract: A light-emitting semiconductor device using a gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) having an i.sub.L -layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) containing a low concentration of p-type impurities. An i.sub.H -layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) containing a high concentration of p-type impurities is adjacent to the i.sub.L -layer. An n-layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) of low carrier concentration is adjacent to the i.sub.L -layer. An n.sup.+ -layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) of high carrier concentration doped with n-type impurities is adjacent to the n-layer.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: March 31, 1998
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho, Nagoya University, Research Development Corporation of Japan
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 5714006
    Abstract: A method of growing a compound semiconductor layer includes epitaxially growing a III-V compound semiconductor layer including nitrogen (N) for as the Group V element on a front surface of a semiconductor substrate of cadmium telluride (CdTe). Therefore, the atoms of the crystal lattice of the III-V compound semiconductor layer are periodically lattice-matched with the atoms of the crystal lattice of the CdTe semiconductor substrate, whereby the III-V compound semiconductor layer is epitaxially grown with high crystalline quality.
    Type: Grant
    Filed: December 18, 1995
    Date of Patent: February 3, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirotaka Kizuki, Yasutomo Kajikawa
  • Patent number: 5693139
    Abstract: A cycle of alternately or cyclically introducing external gases containing molecules of component elements of a compound semiconductor to be formed on a substrate is repeated while appropriately controlling the pressure, substrate temperature and gas introduction rate in a crystal growth vessel, so that a monocrystal which is dimensionally as precise as a single monolayer can grow on the substrate by making use of chemical reactions on the heated substrate surface.Doped molecular layer epitaxy of a compound semiconductor comprising individual steps of introducing and evacuating a first source gas, introducing and evacuating a second source gas, and introducing and evacuating an impurity gas which contains an impurity element. The doped impurity concentration varies almost linearly with the pressure during doping in a wide range.
    Type: Grant
    Filed: June 15, 1993
    Date of Patent: December 2, 1997
    Assignees: Research Development Corporation of Japan, Jun-Ichi Nishizawa, Oki Electric Company, Soubei Suzuki
    Inventors: Junichi Nishizawa, Hitoshi Abe, Soubei Suzuki
  • Patent number: 5656538
    Abstract: A process for growing semi-insulating layers of indium phosphide and other group III-V materials through the use of halide dopant or etchant introduction during growth. Gas phase epitaxial growth techniques are utilized at low temperatures to produce indium phosphide layers having a resistivity greater than approximately 10.sup.7 ohm-cm. According to the preferred embodiment carbon tetrachloride is used as a dopant at flow rates above 5 sccm to grow the layers with substrate growth temperatures ranging from approximately 460.degree. C. to 525.degree. C. This temperature range provides an advantage over the transition metal techniques for doping indium phosphide since the high temperatures generally required for those techniques limit the ability to control growth. Good surface morphology is also obtained through the growth according to the present invention. The process may be used to form many types of group III-V semiconductor devices.
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: August 12, 1997
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Nathan F. Gardner, Stephen A. Stockman, Quesnell J. Hartmann, Gregory E. Stillman
  • Patent number: 5633193
    Abstract: Heteroepitaxial growth of phosphorus-containing III/V semiconductor material (e.g., InGaAsP) on a non-planar surface of a different phosphorus-containing III/V semiconductor material (e.g., InP) is facilitated by heating the non-planar surface in a substantially evacuated chamber to a mass-transport temperature, and exposing the surface to a flux of at least phosphorus form a solid phosphorus source. This mass-transport step is followed by in situ growth of the desired semiconductor material, with at least an initial portion of the growth being done at a first growth temperature that is not greater than the mass transport temperature. Growth typically is completed at a second growth temperature higher than the first growth temperature. A significant aspect of the method is provision of the required fluxes (e.g., phosphorus, arsenic, indium, gallium) from solid sources, resulting in hydrogen-free mass transport and growth, which can be carried out at lower temperatures than is customary in the prior art.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: May 27, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: James N. Baillargeon, Alfred Y. Cho, Sung-Nee G. Chu, Wen-Yen Hwang
  • Patent number: 5603765
    Abstract: High breakdown voltages for AlInAs layers in InP-based devices, such as a gate layer in an InP HEMT or a collector layer in a heterojunction bipolar transistor, are achieved by growing the AlInAs layer by MBE at a substrate temperature about 70.degree.-125.degree. C. below the temperature at which a 2.times.4 reflective high energy diffraction pattern is observed. This corresponds to a growth temperature range of about 415.degree.-470.degree. C. for a 540.degree. 2.times.4 reconstruction temperature. Preferred growth temperatures within these ranges are 80.degree. C. below the 2.times.4 reconstruction temperature, or about 460.degree. C. Higher breakdown voltages are obtained than when the AlInAs layer is grown at either higher or lower temperatures.
    Type: Grant
    Filed: April 21, 1995
    Date of Patent: February 18, 1997
    Assignee: Hughes Aircraft Company
    Inventors: Mehran Matloubian, Linda M. Jelloian, Mark Lui, Takyiu Liu
  • Patent number: 5505159
    Abstract: In an epitaxial growth of a group III-V compound semiconductor crystal, there is provided a substrate on which group III element halide molecules are adsorbed. A beam of group V element hydride molecules is supplied toward the substrate for reaction of the group V element hydride and the group III element halide. The vibration energy of each of group V element hydride molecules is excited in the beam and the orientation of the group V element hydride molecules is aligned. As a result, the supplied group V atom directly combines with the group III atom.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: April 9, 1996
    Assignee: NEC Corporation
    Inventors: Yuji Mochizuki, Akira Usui, Toshikazu Takada
  • Patent number: 5496767
    Abstract: A semiconductor laser comprises an optical wave guide layer including an AlGaInP active layer and AlGaInP optical confinement layers holding the active layer therebetween. A well structure of an energy band is formed and a compressive stress is applied to the activation layer by the difference between the compositions of the activation layer and the optical confinement layers. Since the compressive stress is applied to the activation layer, the oscillation threshold is lower than that of an un-strained device. Accordingly, the rise of the oscillation threshold due to the addition of Al is compensated and continuous oscillation at room temperature is attained and visible light having a wavelength of 0.67 .mu.m or lower, which has been difficult to attain in the past, is produce.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: March 5, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Ichiro Yoshida
  • Patent number: 5493985
    Abstract: The present invention is a process and apparatus for the synthesis and growth of single crystals of phosphorus compounds starting with the elemental materials in a single furnace without external exposure. The apparatus of the present invention is a crystal growth furnace heated by RF coils. Inside the furnace is a susceptor for holding a crucible. Above the crucible is selectively positioned a phosphorus improved injector. The non-phosphorus materials are placed in the crucible and melted to a desired temperature. The phosphorus material previously placed within the injector is heated by the radiant heat from the crucible to drive the phosphorus vapor into the melt through a tube. This is closely controlled by noting the temperature within the injector and adjusting the height of the injector above the melt to control the temperature within the phosphorus material. After the formation of the stoichiometric melt, the seed is inserted into the melt for crystal growth if so desired.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: February 27, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: David Bliss, Robert M. Hilton, Joseph A. Adamski
  • Patent number: 5462008
    Abstract: Semiconductor films of the formula (InP).sub.1-x (TlP.sub.3).sub.x on InP substrates which cover the bandgap of 2-12 .mu.m for use with long wavelength infrared detector and laser applications are disclosed.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: October 31, 1995
    Assignee: Northwestern University
    Inventor: Manijeh Razeghi
  • Patent number: 5458084
    Abstract: X-ray wave diffraction devices are constructed using atomic layer epetaxy. A crystalline substrate is prepared with one or more surface areas on which multiple pairs of layers of material are to be deposited. These layers are then formed by atomic layer epetaxy on the surface areas of the substrate, one on top of another, with the material of each layer of each pair being selected to have a different index of refraction from that of the material of the other layer of each pair. The layers are formed so that the thickness of each layer of a pair is substantially the same as that of the corresponding layer of every other pair and so that x-ray waves impinging on the layers may be reflected therefrom. Layer pairs having a thickness of about 20 angstroms or less are formed on the substrate.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: October 17, 1995
    Assignee: Moxtek, Inc.
    Inventors: James M. Thorne, James K. Shurtleff, David D. Allred, Raymond T. Perkins
  • Patent number: 5456207
    Abstract: Triisopropylindium diisopropyltelluride adduct, ((CH.sub.3).sub.2 CH).sub.3 In:Te(CH(CH.sub.3).sub.2).sub.2 is synthesized and is used as a universal n-type dopant for both II/VI semiconductor materials as well as III/V semiconductor materials is disclosed. This dopant precursor is particularly suited for indium doping of II/V semiconductor materials at low carrier concentrations down to 10.sup.14 cm.sup.-3 and does not exhibit an appreciable memory effect.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: October 10, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Robert W. Gedridge, Jr., Ralph Korenstein, Stuart J. C. Irvine
  • Patent number: 5379720
    Abstract: A process for growing a semiconductor crystal, comprising growing a group III-V compound semiconductor containing P as a group V element by an organometal vapor phase epitaxy by using tertiary butyl phosphine (TBP) as a source of P constituting a grown layer and doping the semiconductor with a dopant gas during a growth of the semiconductor. In this process, the source gas and dopant gas are fed under a condition satisfying a requirement represented by the following formula, to conduct a growth of the crystal: ##EQU1## wherein n is a carrier concentration of the growing semiconductor crystal, T is a temperature of the substrate and an atmosphere in the vicinity of the substrate, P.sub.TBP.sup.0 is an equilibrium vapor pressure of TBP or a decomposition product thereof, P.sub.D.sup.0 is an equilibrium vapor pressure of a dopant or a decomposition product thereof, P.sub.0 is a total pressure, f.sub.0 is a total flow rate, and f.sub.TBP is a flow rate of TBP.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: January 10, 1995
    Assignee: Fujitsu Limited
    Inventor: Akito Kuramata
  • Patent number: 5360760
    Abstract: A vapor phase epitaxial growth method of a compound semiconductor is provided. On a semiconductor substrate held by a holder, a first epitaxial layer is grown using a first growth gas and then, a separator gas is emitted to the vicinity of the substrate to separate the substrate from the first growth gas. After the separator gas is removed from the vicinity, a second growth gas is supplied to the vicinity to form a second epitaxial layer on the first epitaxial layer. Since the substrate is separated by the separator gas from the first growth gas, transition regions of crystal composition and carrier concentration are difficult to be generated.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: November 1, 1994
    Assignee: NEC Corporation
    Inventor: Jun Hayashi
  • Patent number: 5356509
    Abstract: A method for growing a compound semiconductor, such as GaAs or InP, on a non-lattice matched substrate, such as Si, utilizes close-spaced vapor transport to deposit nucleation enhancing interlayer and liquid phase epitaxy to form the compound semiconductor. When used in conjunction with a growth mask, the method is also adapted to selective area epitaxy.
    Type: Grant
    Filed: October 16, 1992
    Date of Patent: October 18, 1994
    Assignee: AstroPower, Inc.
    Inventors: Nancy Terranova, Allen M. Barnett
  • Patent number: 5342475
    Abstract: Disclosed is a method of growing a single crystal of a compound semiconductor, in which a compound semiconductor material is loaded in a vertical crucible and the compound semiconductor material is converted into a single crystal by utilizing a seed disposed in the center of the bottom portion of the vertical crucible.
    Type: Grant
    Filed: June 3, 1992
    Date of Patent: August 30, 1994
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Seikoh Yoshida, Toshio Kikuta
  • Patent number: 5338389
    Abstract: In a method of epitaxially growing a compound crystal, a plurality of crystal component gasses of a compound and reaction gas chemically reacting with the crystal component gasses are individually directed, in the predetermined order, onto a substrate crystal heated under vacuum. The crystal compound gasses and the reaction gas may be overlapped with each other. In a doping method in the above-described epitaxial growth method, the crystal component gasses and the compound gas of dopant are directed onto the substrate crystal and, subsequently, reaction gas, which chemically reacts with the compound gasses, is directed onto the substrate crystal. Also in this case, the reaction gas may be in overlapped relation to the component gas of dopant.
    Type: Grant
    Filed: April 21, 1993
    Date of Patent: August 16, 1994
    Assignee: Research Development Corporation of Japan
    Inventors: Jun-ichi Nishizawa, Toru Kurabayashi
  • Patent number: 5326425
    Abstract: The new compound tertiarybutyldimethylantimony is prepared by reacting an timony trihalide SbX.sub.3 with the tertiarybutyl Grignard reagent ((CH.sub.3).sub.3 C)MgX, treating the resulting product with the methyl Grignard reagent (CH.sub.3)MgX. where X is a halide, and recovering tertiarybutyldimethylantimony from the reaction mixture. The reaction is preferably carried out by a one pot synthesis in a suitable solvent such as diethyl either using approximately one equivalent of ((CH.sub.3).sub.3 C)MgX in relation to the SbX.sub.3 at about -50.degree. C., followed by treatment with approximately two equivalents of (CH.sub.3)MgX in relation to the SbX.sub.3 at about 0.degree. C. The tertiarybutyldimethylantimony is used as a precursor in forming antimony-containing semiconductor material by chemical vapor deposition.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: July 5, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Robert W. Gedridge, Jr.