Monolithic Semiconductor Patents (Class 136/249)
  • Patent number: 11133778
    Abstract: A method of high reverse current burn-in of solar cells and a solar cell with a burned-in bypass diode are described herein. In one embodiment, high reverse current burn-in of a solar cell with a tunnel oxide layer induces low breakdown voltage in the solar cell. Soaking a solar cell at high current can also reduce the difference in voltage of defective and non-defective areas of the cell.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: September 28, 2021
    Assignee: SunPower Corporation
    Inventors: Michael J. Defensor, Xiuwen Tu, Junbo Wu, David D. Smith
  • Patent number: 11107940
    Abstract: A multijunction solar cells that include one or more graded-index structures disposed directly above the growth substrate beneath a base layer of a solar subcells. In some embodiments, the graded-index reflector structure is constructed such that (i) at least a portion of light of a first spectral wavelength range that enters and passes through a solar cell above the graded-index reflector structure is reflected back into the solar subcell by the graded-index reflector structure; and (ii) at least a portion of light of a second spectral wavelength range that enters and passes through the solar cell above the graded-index reflector structure is transmitted through the graded-index reflector structure to layers disposed beneath the graded-index reflector structure. The second spectral wavelength range is composed of greater wavelengths than the wavelengths of the first spectral wavelength range.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: August 31, 2021
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 11094842
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: August 17, 2021
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 11082005
    Abstract: One embodiment can provide a photovoltaic roof tile module. The photovoltaic roof tile module can include a front glass cover, a back glass cover, a plurality of photovoltaic structures positioned between the front and back glass covers, and an internal circuit component electrically coupled to the plurality of photovoltaic structures. The internal circuit component is positioned between the front and back glass covers. The back glass cover can include at least one through hole and a metallic plug inserted inside the through hole. A first surface of the metallic plug can electrically couple to the internal circuit component, and a second opposite surface of the metallic plug can be exposed to surroundings external to the photovoltaic roof tile module, thereby facilitating electrical coupling between the photovoltaic roof tile module and another photovoltaic roof tile module.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: August 3, 2021
    Assignee: Tesla, Inc.
    Inventors: Peter P. Nguyen, Kaleb A. Klauber
  • Patent number: 10991840
    Abstract: A stacked multi-junction solar cell having a first subcell and second subcell, the second subcell having a larger band gap than the first subcell. A third subcell has a larger band gap than the second subcell, and each of the subcells include an emitter and a base. The second subcell has a layer which includes a compound formed at least the elements GaInAsP, and a thickness of the layer is greater than 100 nm, and the layer is formed as part of the emitter and/or as part of the base and/or as part of the space-charge zone situated between the emitter and the base. The third subcell has a layer including a compound formed of at least the elements GaInP, and the thickness of the layer is greater than 100 nm.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: April 27, 2021
    Assignee: AZUR SPACE Solar Power GmbH
    Inventors: Lars Ebel, Wolfgang Guter, Matthias Meusel
  • Patent number: 10991847
    Abstract: The present disclosure relates to a device that includes, in order, an emitter layer, a quantum well, and a base layer, where the emitter layer has a first bandgap, the base layer has a second bandgap, and the first bandgap is different than the second bandgap by an absolute difference greater than or equal to 25 meV.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: April 27, 2021
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Myles Aaron Steiner, Ryan Matthew France
  • Patent number: 10989818
    Abstract: A radiation detector includes: a sensor substrate including a flexible base material and a layer which is provided on a first surface of the base material and in which plural pixels, which accumulate electrical charges generated in accordance with light converted from radiation, are formed; a conversion layer that is provided on the first surface side of the sensor substrate to convert radiation into the light; and a protective film that covers a portion ranging from an opposite surface of the conversion layer opposite to a side where the sensor substrate is provided, to a corresponding position, corresponding to a position of an end part of the conversion layer, on a second surface opposite to the first surface of the base material.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 27, 2021
    Assignee: FUJIFILM Corporation
    Inventors: Shinichi Ushikura, Keiichi Akamatsu, Haruyasu Nakatsugawa, Shunsuke Kodaira
  • Patent number: 10985287
    Abstract: The invention concerns a method of manufacturing a photovoltaic module comprising at least two electrically connected photovoltaic cells, each photovoltaic cell (4i) being multi-layered structure disposed on a substrate (6) having down-web direction (X) and a cross-web direction (Y). The method comprises providing a plurality of spaced-apart first electrode strips (8i) over the substrate (6), each first electrode strip extending along the cross-web direction (Y), and providing, over the first electrode strips layer, at least one insulating strip (14a, 14b) of an insulator material extending along the down-web direction (X), each insulating strip defining a connecting area and an active area. A functional stack (20) comprising a full web coated layer of photoactive semiconductor material is formed over the first layer and within the active area.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: April 20, 2021
    Assignee: Armor
    Inventor: Jeremiah Mwaura
  • Patent number: 10985282
    Abstract: To provide a liquid crystal display device suitable for a thin film transistor which uses an oxide semiconductor. In a liquid crystal display device which includes a thin film transistor including an oxide semiconductor layer, a film having a function of attenuating the intensity of transmitting visible light is used as an interlayer film which covers at least the oxide semiconductor layer. As the film having a function of attenuating the intensity of transmitting visible light, a coloring layer can be used and a light-transmitting chromatic color resin layer is preferably used. An interlayer film which includes a light-transmitting chromatic color resin layer and a light-blocking layer may be formed in order that the light-blocking layer is used as a film having a function of attenuating the intensity of transmitting visible light.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: April 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuji Ishitani, Daisuke Kubota
  • Patent number: 10978604
    Abstract: A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: April 13, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Talia S. Gershon, Marinus J. P. Hopstaken, Jeehwan Kim, Yun Seog Lee
  • Patent number: 10930808
    Abstract: Semiconductor devices and methods of fabricating semiconductor devices having a dilute nitride layer and at least one semiconductor material overlying the dilute nitride layer are disclosed. Hybrid epitaxial growth and the use of aluminum barrier layers to minimize hydrogen diffusion into the dilute nitride layer are used to fabricate high-efficiency multijunction solar cells.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 23, 2021
    Assignee: ARRAY PHOTONICS, INC.
    Inventors: Ferran Suarez, Ting Liu, Arsen Sukiasyan, Ivan Hernandez, Jordan Lang, Radek Roucka, Sabeur Siala, Aymeric Maros
  • Patent number: 10910512
    Abstract: The present invention relates to a nano-scale light-emitting diode (LED) element for a horizontal array assembly, a manufacturing method thereof, and a horizontal array assembly including the same, and more particularly, to a nano-scale LED element for a horizontal array assembly that can significantly increase the number of nano-scale LED elements connected to an electrode line, facilitate an arrangement of the elements, and implement a horizontal array assembly having a very good electric connection between an electrode and an element and a significant high quantity of light when a horizontal array assembly having the nano-scale LED elements laid in a length direction thereof and connected to the electrode line is manufactured, a manufacturing method thereof, and a horizontal array assembly including the same.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: February 2, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventor: Yeon Goog Sung
  • Patent number: 10903786
    Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: January 26, 2021
    Assignee: SunPower Corporation
    Inventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
  • Patent number: 10903375
    Abstract: A solar cell can include a front passivation region including a plurality of layers formed of different materials from each other and including a first aluminum oxide layer and a first silicon nitride layer, and a back passivation region including a plurality of layers formed of different materials from each other and including a second aluminum oxide layer and a second silicon nitride layer, wherein a thickness of a first silicon nitride layer is greater than a thickness of the first aluminum oxide layer, and a thickness of a second silicon nitride layer is greater than a thickness of the second aluminum oxide layer.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: January 26, 2021
    Assignee: LG ELECTRONICS INC.
    Inventors: Juhwa Cheong, Yiyin Yu, Youngsung Yang, Yongduk Jin, Manhyo Ha, Seongeun Lee
  • Patent number: 10896982
    Abstract: A multijunction solar cell assembly and its method of manufacture including interconnected first and second discrete semiconductor body subassemblies disposed adjacent and parallel to each other, each semiconductor body subassembly including first top subcell, second (and possibly third) lattice matched middle subcells; a graded interlayer adjacent to the last middle solar subcell; and a bottom solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the last middle solar subcell; wherein the interconnected subassemblies form at least a four junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor body and the bottom solar subcell in the second semiconductor body.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: January 19, 2021
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 10886484
    Abstract: An organic thin film photovoltaic device module includes: a substrate; a first and second transparent electrode layers disposed on the substrate; an organic layer disposed on the substrate and the first and second transparent electrode layers; a plurality of dot-shaped contact holes formed so as to pass through up to the second transparent electrode layer in a perpendicular-to-plane direction with respect to the organic layer; a metal electrode layer disposed on the organic layer and on the second transparent electrode layer via the dot-shaped contact hole; and a passivation layer disposed on the metal electrode layer. There are provided: the organic thin film photovoltaic device module having satisfactory appearance without deteriorating appearance thereof and having the improved structure of the portion jointed in series; and the electronic apparatus.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: January 5, 2021
    Assignee: ROHM CO., LTD.
    Inventor: Yoichi Aoki
  • Patent number: 10873044
    Abstract: Embodiments of the invention pertain to the use of alloyed semiconductor nanocrystals for use in solar cells. The use of alloyed semiconductor nanocrystals offers materials that have a flexible stoichiometry. The alloyed semiconductor may be a ternary semiconductor alloy, such as AxB1-xC or AB1-yCy, or a quaternary semiconductor alloy, such as AxByC1-x-yD, AxB1-xCyD1-y or ABxCyD1-x-y (where A, B, C, and D are different elements). In general, alloys with more than four elements can be used as well, although it can be much harder to control the synthesis and quality of such materials. Embodiments of the invention pertain to solar cells having a layer incorporating two or more organic materials such that percolated paths for one or both molecular species are created. Specific embodiments of the invention pertain to a method for fabricating nanostructured bulk heterojunction that facilitates both efficient exciton diffusion and charge transport.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: December 22, 2020
    Assignee: University of Florida Research Foundation Inc.
    Inventor: Jiangeng Xue
  • Patent number: 10872887
    Abstract: A scalable voltage source having a number N of mutually series-connected partial voltage sources designed as semiconductor diodes, wherein each of the partial voltage sources comprises a p-n junction of a semiconductor diode, and each semiconductor diode has a p-doped absorption layer, wherein the p-absorption layer is passivated by a p-doped passivation layer with a wider band gap than the band gap of the p-absorption layer and the semiconductor diode has an n-absorption layer, wherein the n-absorption layer is passivated by an n-doped passivation layer with a wider band gap than the band gap of the n-absorption layer, and the partial source voltages of the individual partial voltage sources deviate by less than 20%, and between in each case two successive partial voltage sources, a tunnel diode is arranged.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: December 22, 2020
    Assignee: AZUR SPACE Solar Power GmbH
    Inventors: Daniel Fuhrmann, Wolfgang Guter, Victor Khorenko
  • Patent number: 10861992
    Abstract: Provided is a multijunction photovoltaic device, including: a first subcell and a second subcell. The first cell includes a base semiconductor layer and a second semiconductor layer. The base semiconductor layer includes a Group III-V semiconductor material. The second subcell includes an absorber layer. The absorber layer includes an organometallic halide ionic solid perovskite semiconductor material.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: December 8, 2020
    Assignee: THE BOEING COMPANY
    Inventor: Christopher M. Fetzer
  • Patent number: 10855378
    Abstract: Methods and systems for a silicon-based optical phase modulator with high modal overlap may include, in an optical modulator having a rib waveguide in which a cross-shaped depletion region separates four alternately doped sections: receiving an optical signal at one end of the optical modulator, modulating the received optical signal by applying a modulating voltage, and communicating a modulated optical signal out of an opposite end of the modulator. The modulator may be in a silicon photonically-enabled integrated circuit which may be in a complementary-metal oxide semiconductor (CMOS) die. An optical mode may be centered on the cross-shaped depletion region. The four alternately doped sections may include: a shallow depth p-region, a shallow depth n-region, a deep p-region, and a deep n-region. The shallow depth p-region may be electrically coupled to the deep p-region periodically along the length of the modulator.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: December 1, 2020
    Assignee: Luxtera LLC
    Inventors: Subal Sahni, Kam-Yan Hon, Attila Mekis, Gianlorenzo Masini, Lieven Verslegers
  • Patent number: 10840400
    Abstract: A device and method of improving efficiency of a thin film solar cell by providing a back reflector between a back electrode layer and an absorber layer. Back reflector reflects sunlight photons back into the absorber layer to generate additional electrical energy. The device is a photovoltaic device comprising a substrate, a back electrode layer, a back reflector, an absorber layer, a buffer layer, and a front contact layer. The back reflector is formed as a plurality of parallel lines.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: November 17, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jyh-Lih Wu, Li Xu, Wen-Tsai Yen, Chung-Hsien Wu
  • Patent number: 10804505
    Abstract: A battery pack includes a cell group, a bus bar and a terminal member. The cell group includes a plurality of unit cells stacked in a thickness direction. Each of the unit cells includes a battery main body having a power generation element and a flat shape, and an electrode tab protruding out from the battery main body and arranged along a stacking direction. The bus bar is joined to the electrode tabs and electrically connects the electrode tabs. The terminal member is joined to the bus bar to transfer input and output of electric power in the cell group. The terminal member is joined to the bus bar at a terminal joining position that is spaced away from a joining position between the bus bar and the electrode tabs when viewing a surface on which the electrode tabs are arranged from a direction that is orthogonal to the surface.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: October 13, 2020
    Assignee: Envision AESC Japan Ltd.
    Inventors: Masayuki Nakai, Yasuhiro Yanagihara
  • Patent number: 10797190
    Abstract: An optoelectronic device comprising a substrate comprising a groove having a first and a second face. The first face of the groove is coated with a semiconductor material and the second face of the groove is coated with a conductor material. The conductor material and the semiconductor material are in contact with another semiconductor material in the groove. The first face of the groove is longer than the second face of the groove or the second face of the groove is longer than the first face of the groove.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: October 6, 2020
    Assignee: POWER ROLL LIMITED
    Inventor: Alexander John Topping
  • Patent number: 10749052
    Abstract: Methods for forming interdigitated back contact solar cells from III-V materials are provided. According to an aspect of the invention, a method includes depositing a patterned Zn layer to cover first areas of an n-type emitter region, wherein the emitter region comprises a III-V material, and forming a passivated back contact region by counter-doping the first areas of the emitter region by diffusing Zn from the patterned Zn layer into the first areas of the emitter region, such that the first areas of the emitter region become p-type.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: August 18, 2020
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David Levi Young, Myles Aaron Steiner, John David Simon
  • Patent number: 10741598
    Abstract: An optical apparatus including a semiconductor substrate; a first light absorption region supported by the semiconductor substrate, the first light absorption region configured to absorb photons and to generate photo-carriers from the absorbed photons; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal; and a counter-doped region formed in a first portion of the first light absorption region, the counter-doped region including a first dopant and having a first net carrier concentration lower than a second net carrier concentration of a second portion of the first light absorption region.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: August 11, 2020
    Assignee: Atrilux, Inc.
    Inventors: Yun-Chung Na, Che-Fu Liang, Szu-Lin Cheng, Shu-Lu Chen, Kuan-Chen Chu, Chung-Chih Lin, Han-Din Liu
  • Patent number: 10714644
    Abstract: A voltage matched multijunction solar cell having first and second solar cell stacks that are electrically connected parallel to each other. The first solar cell stack is optimized for absorption of incoming solar light in a first wavelength range and the second solar cell stack is optimized for absorption of incoming solar light in a second wavelength range, wherein the first and the second wavelength range do not or at most only partially overlap each other.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: July 14, 2020
    Assignee: Saint-Augustin Canada Electric Inc.
    Inventors: Andreas Gombert, Sascha Van Riesen
  • Patent number: 10707366
    Abstract: A solar cell comprising a bulk germanium silicon growth substrate; a diffused photoactive junction in the germanium silicon substrate; and a sequence of subcells grown over the substrate, with the first grown subcell either being lattice matched or lattice mis-matched to the growth substrate.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: July 7, 2020
    Assignee: SolAero Technologies Corp.
    Inventors: John Hart, Zachary Bittner, Samantha Whipple, Nathaniel Miller, Daniel Derkacs, Paul Sharps
  • Patent number: 10700231
    Abstract: A multijunction solar cell assembly and its method of manufacture including first and second discrete semiconductor body subassemblies, each semiconductor body subassembly including first, second and third lattice matched subcells; a graded interlayer adjacent to the third solar subcell and functioning as a lateral conduction layer; and a fourth solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the third solar subcell; wherein the average band gap of all four cells is greater than 1.44 eV.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: June 30, 2020
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 10672929
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10672930
    Abstract: A tandem-type photoelectric conversion device includes, arranged in the following order from a light-incident side: a first photoelectric conversion unit; an anti-reflection layer; a transparent conductive layer; and a second photoelectric conversion unit. The first photoelectric conversion unit includes a light absorbing layer including a photosensitive material of perovskite-type crystal structure represented by general formula R1NH3M1X3 or HC(NH2)2M1X3, wherein R1 is an alkyl group, M1 is a divalent metal ion, and X is a halogen. The second photoelectric conversion unit includes a light absorbing layer having a bandgap narrower than a bandgap of the light absorbing layer in the first photoelectric conversion unit. The anti-reflection layer and the transparent conductive layer are in contact with each other, and a refractive index of the anti-reflection layer is lower than a refractive index of the transparent conductive layer.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: June 2, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Ryota Mishima, Masashi Hino, Hisashi Uzu, Tomomi Meguro
  • Patent number: 10644174
    Abstract: This invention relates to a novel structure of photovoltaic devices (e.g. photovoltaic cells also called as solar cells) are provided. The cells are based on the micro or nano scaled structures which could not only increase the surface area but also have the capability of self-concentrating the light incident onto the photonics devices. More specifically, the structures are based on 3D structure including quintic or quintic-like shaped micor-nanostructures. By using such structures reflection loss of the light from the cell is significantly reduced, increasing the absorption, which results in increasing the conversion efficiency of the solar cell, and reducing the usage of material while increasing the flexibility of the solar cell. The structures can be also used in other optical devices wherein the reflection loss and absorption are required to enhanced to significantly improve the device performances.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 5, 2020
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 10636933
    Abstract: A photodetector cell includes a substrate having a semiconductor surface layer, and a trench in the semiconductor surface layer. The trench has tilted sidewalls including a first tilted sidewall and a second tilted sidewall. A pn junction, a PIN structure, or a phototransistor includes an active p-region and an active n-region that forms a junction including a first junction along the first tilted sidewall to provide a first photodetector element and a second junction spaced apart from the first junction along the second tilted sidewall to provide a second photodetector element. At least a p-type anode contact and at least an n-type cathode contact contacts the active p-region and active n-region of the first photodetector element and second photodetector element. The tilted sidewalls provide an outer exposed or optically transparent surface for passing incident light to the first and second photodetector elements for detection of incident light.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: April 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hideaki Kawahara, Henry Litzmann Edwards
  • Patent number: 10636927
    Abstract: A solar cell stack having a first semiconductor solar cell that has a p-n junction of a first material with a first lattice constant and a second semiconductor solar cell that has a p-n junction of a second material with a second lattice constant. The solar cell stack has a metamorphic buffer that includes a sequence of a first, lower layer and a second, center layer, and a third, upper layer, and includes an InGaAs or an AlInGaAs or an InGaP or an AlInGaP compound. The metamorphic buffer is formed between the first and second semiconductor solar cells and the lattice constant in the metamorphic buffer changes along the buffer's thickness dimension. The lattice constant of the third layer is greater than the lattice constant of the second layer, and the lattice constant of the second layer is greater than the lattice constant of the first layer.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: April 28, 2020
    Assignee: Azur Space Solar Power GmbH
    Inventors: Wolfgang Guter, Matthias Meusel
  • Patent number: 10600929
    Abstract: An optical voltage source and decoupling device is provided, wherein the optical voltage source has a number N of series-connected semiconductor diodes, each having a p-n junction, the semiconductor diodes are monolithically integrated and together form a first stack with an upper side and an underside, and the number N of the semiconductor diodes of the first stack is greater than or equal to two, the decoupling device has a further semiconductor diode. The further semiconductor diode has a pin junction and, the further semiconductor diode is anti-serially connected with the semiconductor diodes of the first stack. An underside of the further semiconductor diode is materially connected with the upper side of the first stack and the further semiconductor diode forms a total stack together with the first stack.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: March 24, 2020
    Assignee: Azur Space Solar Power GmbH
    Inventors: Gregor Keller, Daniel Fuhrmann
  • Patent number: 10593815
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: March 17, 2020
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTD
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Patent number: 10585326
    Abstract: The present disclosure relates to the field of display technology, and provides an electronic paper, a manufacturing method thereof, and a handwriting electronic paper device. The electronic paper includes: a first electrode; a second transparent electrode arranged opposite to the first electrode and at a display side of the electronic paper; and an electronic ink layer arranged between the first electrode and the second transparent electrode. Microcapsules are distributed in the electronic ink layer, and each microcapsule is provided therein with charged magnetic particles which are capable of being used to display at least one color.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: March 10, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Detao Zhao, Pengju Zhang, Bin Li
  • Patent number: 10566486
    Abstract: A solar cell stack having a first semiconductor solar cell that has a p-n junction of a first material with a first lattice constant, and having a second semiconductor solar cell that has a p-n junction of a second material with a second lattice constant. The first lattice constant is smaller than the second lattice constant. The solar cell stack has a metamorphic buffer that includes a sequence of a first, lower AlInGaAs or AlInGaP layer and a second, center AlInGaAs or AlInGaP layer, and a third, upper AlInGaAs or AlInGaP layer, and the metamorphic buffer is formed between the first semiconductor solar cell and the second semiconductor solar cell. The lattice constant in the metamorphic buffer changes along the thickness dimension of the metamorphic buffer, and the lattice constant and the In content increase and the Al content decreases between at least two layers of the metamorphic buffer.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: February 18, 2020
    Assignee: Azur Space Solar Power GmbH
    Inventor: Wolfgang Guter
  • Patent number: 10566484
    Abstract: Discussed is a solar cell including a semiconductor substrate including a base area and a doping area, a doping layer formed on the semiconductor substrate, the doping layer having a conductive type different from the doping area, a tunneling layer interposed between the doping layer and the semiconductor substrate, a first electrode connected to the doping area, and a second electrode connected to the doping layer.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: February 18, 2020
    Assignee: LG ELECTRONICS INC.
    Inventors: Minho Choi, Hyunjung Park, Junghoon Choi, Youngho Choe
  • Patent number: 10510919
    Abstract: The present invention provides a method for enhancing the efficiency of a photovoltaic module by subjecting it to extremely-low-frequency (ELF) electromagnetic radiation (EMR). The ELF EMR can be provided by a plurality of identical Jacob's ladders and the traveling arcs generated thereby. Alternatively, the ELF EMR can be provided by passing the photovoltaic module over an array of quartz discharge tubes in which arcs are generated between pairs of tungsten electrodes. The photovoltaic module is subjected to multiple passes in order to provide an optimum level of enhancement to the module.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: December 17, 2019
    Inventor: Ronald Clark Davison
  • Patent number: 10505068
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: December 10, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10483410
    Abstract: System and method of providing a photovoltaic (PV) cell having a cushion layer to alleviate stress impact between a front metal contact and a thin film PV layer. A cushion layer is disposed between an extraction electrode and a photovoltaic (PV) surface. The cushion layer is made of a nonconductive material and has a plurality of vias filled with a conductive material to provide electrical continuity between the bus bar and the PV layer. The cushion layer may be made of a flexible material preferably with rigidity that matches the substrate. Thus, the cushion layer can effectively protect the PV layer from physical damage due to tactile contact with the front metal contact.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: November 19, 2019
    Assignee: ALTA DEVICES, INC.
    Inventors: Linlin Yang, Liguang Lan, Chris France, Gang He, Erhong Li, Jose Corbacho
  • Patent number: 10446704
    Abstract: Techniques for forming an ohmic back contact for Ag2ZnSn(S,Se)4 photovoltaic devices. In one aspect, a method for forming a photovoltaic device includes the steps of: depositing a refractory electrode material onto a substrate; depositing a contact material onto the refractory electrode material, wherein the contact material includes a transition metal oxide; forming an absorber layer on the contact material, wherein the absorber layer includes Ag, Zn, Sn, and at least one of S and Se; annealing the absorber layer; forming a buffer layer on the absorber layer; and forming a top electrode on the buffer layer. The refractory electrode material may be Mo, W, Pt, Ti, TiN, FTO, and combinations thereof. The transition metal oxide may be TiO2, ZnO, SnO, ZnSnO, Ga2O3, and combinations thereof. A photovoltaic device is also provided.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: October 15, 2019
    Assignee: International Business Machines Corporation
    Inventors: Talia S. Gershon, Oki Gunawan, Richard A. Haight, Ravin Mankad
  • Patent number: 10439091
    Abstract: In one aspect, optoelectronic devices are described herein. In some implementations, an optoelectronic device comprises a photovoltaic cell. The photovoltaic cell comprises a space-charge region, a quasi-neutral region, and a low bandgap absorber region (LBAR) layer or an improved transport (IT) layer at least partially positioned in the quasi-neutral region of the cell.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: October 8, 2019
    Assignee: THE BOEING COMPANY
    Inventors: Richard R. King, Christopher M. Fetzer, Daniel C. Law, Xing-Quan Liu, William D. Hong, Kenneth M. Edmondson, Dimitri D. Krut, Joseph C. Boisvert, Nasser H. Karam
  • Patent number: 10432317
    Abstract: A device including a combination photovoltaic device and optical receiver comprising a p-n junction of type III-V semiconductor material layers, wherein the p-n junction produces power in response to the application of a wavelength of light for powering an optical receiver provided by the p-n junction for receiving data. The device may further include a light emitting diode for transmitting data. The device can further include a processor coupled to a memory, the processor being configured to control the electrical communication with the light emitting diode and the combination photovoltaic device and optical receiver.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Devendra K. Sadana
  • Patent number: 10431741
    Abstract: Method of making an array of interconnected solar cells, including a) providing a continuous layer stack (1) of a prescribed thickness on a substrate (8), the layer stack (1) including an upper (2) and a lower (3) conductive layer having a photoactive layer (4) and a semiconducting electron transport layer (6) interposed there between; b) selectively removing the upper conductive layer (2) and the photoactive layer (4) for obtaining a contact hole (10) exposing the semiconducting electron transport layer (6); c) selectively heating the layer stack (1) to a first depth (d1) for obtaining a first heat affected zone (12) at a first center-to-center distance (s1) from the contact hole (10), the first heat affected zone (12) being transformed into a substantially insulating region with substantially the first depth (d1) in the layer stack, thereby locally providing an increased electrical resistivity to the layer stack (1).
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: October 1, 2019
    Assignee: Stichting Energieonderzoek Centrum Nederland
    Inventors: Johan Bosman, Tristram Budel
  • Patent number: 10424514
    Abstract: A method for manufacturing a semiconductor substrate according to the present invention includes a hydrogen layer forming step of forming a hydrogen layer on a first substrate formed of single crystal of a first semiconductor material, a bonding step of bonding the first substrate and a temporary substrate, a first separation step of separating the first substrate with the hydrogen layer as a boundary and leaving a separated surface side of the first substrate as a first thin film layer on the temporary substrate, a support layer forming step of forming a support layer formed of a second semiconductor material on the temporary substrate on which the first thin film layer is left, a second separation step of removing the temporary substrate, and a cutting step of cutting a peripheral edge portion of the substrate.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: September 24, 2019
    Assignee: MTEC CORPORATION
    Inventors: Mitsuharu Kato, Tamotsu Usami, Tadashi Shimada
  • Patent number: 10416610
    Abstract: A decorative element for watches, comprising: a framework comprising arms (12) delimiting a plurality of decorative areas (Zi) and forming support elements, and a plurality of decorative components (20) fixed to the arms of the skeleton, each decorative component occupying a decorative area.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: September 17, 2019
    Assignee: HUBLOT S.A., GENEVE
    Inventor: Mathias Buttet
  • Patent number: 10418502
    Abstract: The present invention relates to multi-cell devices fabricated on a common substrate that are more desirable than single cell devices, particularly in photovoltaic applications. Multi-cell devices operate with lower currents, higher output voltages, and lower internal power losses. Prior art multi-cell devices use physical isolation to achieve electrical isolation between cells. In order to fabricate a multicell device on a common substrate, the individual cells must be electrically isolated from one another. In the prior art, isolation generally required creating a physical dielectric barrier between the cells, which adds complexity and cost to the fabrication process. The disclosed invention achieves electrical isolation without physical isolation by proper orientation of interdigitated junctions such that the diffusion fields present in the interdigitated region essentially prevent the formation of a significant parasitic current which would be in opposition to the output of the device.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: September 17, 2019
    Assignee: MTPV Power Corporation
    Inventors: Eric Brown, Andrew Walsh, Jose Borrego, Paul Greiff
  • Patent number: 10403779
    Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: September 3, 2019
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 10388817
    Abstract: An optical transducer system that has a light source and a transducer. The light source generates light that has a predetermined photon energy. The transducer has a bandgap energy that is smaller than the photon energy. An increased optical to electrical conversion efficiency is obtained by illuminating the transducer at increased optical power densities. A method of converting optical energy to electrical energy is also provided.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: August 20, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Simon Fafard, Denis Paul Masson