Monolithic Semiconductor Patents (Class 136/249)
  • Patent number: 10749052
    Abstract: Methods for forming interdigitated back contact solar cells from III-V materials are provided. According to an aspect of the invention, a method includes depositing a patterned Zn layer to cover first areas of an n-type emitter region, wherein the emitter region comprises a III-V material, and forming a passivated back contact region by counter-doping the first areas of the emitter region by diffusing Zn from the patterned Zn layer into the first areas of the emitter region, such that the first areas of the emitter region become p-type.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: August 18, 2020
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David Levi Young, Myles Aaron Steiner, John David Simon
  • Patent number: 10741598
    Abstract: An optical apparatus including a semiconductor substrate; a first light absorption region supported by the semiconductor substrate, the first light absorption region configured to absorb photons and to generate photo-carriers from the absorbed photons; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal; and a counter-doped region formed in a first portion of the first light absorption region, the counter-doped region including a first dopant and having a first net carrier concentration lower than a second net carrier concentration of a second portion of the first light absorption region.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: August 11, 2020
    Assignee: Atrilux, Inc.
    Inventors: Yun-Chung Na, Che-Fu Liang, Szu-Lin Cheng, Shu-Lu Chen, Kuan-Chen Chu, Chung-Chih Lin, Han-Din Liu
  • Patent number: 10714644
    Abstract: A voltage matched multijunction solar cell having first and second solar cell stacks that are electrically connected parallel to each other. The first solar cell stack is optimized for absorption of incoming solar light in a first wavelength range and the second solar cell stack is optimized for absorption of incoming solar light in a second wavelength range, wherein the first and the second wavelength range do not or at most only partially overlap each other.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: July 14, 2020
    Assignee: Saint-Augustin Canada Electric Inc.
    Inventors: Andreas Gombert, Sascha Van Riesen
  • Patent number: 10707366
    Abstract: A solar cell comprising a bulk germanium silicon growth substrate; a diffused photoactive junction in the germanium silicon substrate; and a sequence of subcells grown over the substrate, with the first grown subcell either being lattice matched or lattice mis-matched to the growth substrate.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: July 7, 2020
    Assignee: SolAero Technologies Corp.
    Inventors: John Hart, Zachary Bittner, Samantha Whipple, Nathaniel Miller, Daniel Derkacs, Paul Sharps
  • Patent number: 10700231
    Abstract: A multijunction solar cell assembly and its method of manufacture including first and second discrete semiconductor body subassemblies, each semiconductor body subassembly including first, second and third lattice matched subcells; a graded interlayer adjacent to the third solar subcell and functioning as a lateral conduction layer; and a fourth solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the third solar subcell; wherein the average band gap of all four cells is greater than 1.44 eV.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: June 30, 2020
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 10672930
    Abstract: A tandem-type photoelectric conversion device includes, arranged in the following order from a light-incident side: a first photoelectric conversion unit; an anti-reflection layer; a transparent conductive layer; and a second photoelectric conversion unit. The first photoelectric conversion unit includes a light absorbing layer including a photosensitive material of perovskite-type crystal structure represented by general formula R1NH3M1X3 or HC(NH2)2M1X3, wherein R1 is an alkyl group, M1 is a divalent metal ion, and X is a halogen. The second photoelectric conversion unit includes a light absorbing layer having a bandgap narrower than a bandgap of the light absorbing layer in the first photoelectric conversion unit. The anti-reflection layer and the transparent conductive layer are in contact with each other, and a refractive index of the anti-reflection layer is lower than a refractive index of the transparent conductive layer.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: June 2, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Ryota Mishima, Masashi Hino, Hisashi Uzu, Tomomi Meguro
  • Patent number: 10672929
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10644174
    Abstract: This invention relates to a novel structure of photovoltaic devices (e.g. photovoltaic cells also called as solar cells) are provided. The cells are based on the micro or nano scaled structures which could not only increase the surface area but also have the capability of self-concentrating the light incident onto the photonics devices. More specifically, the structures are based on 3D structure including quintic or quintic-like shaped micor-nanostructures. By using such structures reflection loss of the light from the cell is significantly reduced, increasing the absorption, which results in increasing the conversion efficiency of the solar cell, and reducing the usage of material while increasing the flexibility of the solar cell. The structures can be also used in other optical devices wherein the reflection loss and absorption are required to enhanced to significantly improve the device performances.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 5, 2020
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 10636933
    Abstract: A photodetector cell includes a substrate having a semiconductor surface layer, and a trench in the semiconductor surface layer. The trench has tilted sidewalls including a first tilted sidewall and a second tilted sidewall. A pn junction, a PIN structure, or a phototransistor includes an active p-region and an active n-region that forms a junction including a first junction along the first tilted sidewall to provide a first photodetector element and a second junction spaced apart from the first junction along the second tilted sidewall to provide a second photodetector element. At least a p-type anode contact and at least an n-type cathode contact contacts the active p-region and active n-region of the first photodetector element and second photodetector element. The tilted sidewalls provide an outer exposed or optically transparent surface for passing incident light to the first and second photodetector elements for detection of incident light.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: April 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hideaki Kawahara, Henry Litzmann Edwards
  • Patent number: 10636927
    Abstract: A solar cell stack having a first semiconductor solar cell that has a p-n junction of a first material with a first lattice constant and a second semiconductor solar cell that has a p-n junction of a second material with a second lattice constant. The solar cell stack has a metamorphic buffer that includes a sequence of a first, lower layer and a second, center layer, and a third, upper layer, and includes an InGaAs or an AlInGaAs or an InGaP or an AlInGaP compound. The metamorphic buffer is formed between the first and second semiconductor solar cells and the lattice constant in the metamorphic buffer changes along the buffer's thickness dimension. The lattice constant of the third layer is greater than the lattice constant of the second layer, and the lattice constant of the second layer is greater than the lattice constant of the first layer.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: April 28, 2020
    Assignee: Azur Space Solar Power GmbH
    Inventors: Wolfgang Guter, Matthias Meusel
  • Patent number: 10600929
    Abstract: An optical voltage source and decoupling device is provided, wherein the optical voltage source has a number N of series-connected semiconductor diodes, each having a p-n junction, the semiconductor diodes are monolithically integrated and together form a first stack with an upper side and an underside, and the number N of the semiconductor diodes of the first stack is greater than or equal to two, the decoupling device has a further semiconductor diode. The further semiconductor diode has a pin junction and, the further semiconductor diode is anti-serially connected with the semiconductor diodes of the first stack. An underside of the further semiconductor diode is materially connected with the upper side of the first stack and the further semiconductor diode forms a total stack together with the first stack.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: March 24, 2020
    Assignee: Azur Space Solar Power GmbH
    Inventors: Gregor Keller, Daniel Fuhrmann
  • Patent number: 10593815
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: March 17, 2020
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTD
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Patent number: 10585326
    Abstract: The present disclosure relates to the field of display technology, and provides an electronic paper, a manufacturing method thereof, and a handwriting electronic paper device. The electronic paper includes: a first electrode; a second transparent electrode arranged opposite to the first electrode and at a display side of the electronic paper; and an electronic ink layer arranged between the first electrode and the second transparent electrode. Microcapsules are distributed in the electronic ink layer, and each microcapsule is provided therein with charged magnetic particles which are capable of being used to display at least one color.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: March 10, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Detao Zhao, Pengju Zhang, Bin Li
  • Patent number: 10566484
    Abstract: Discussed is a solar cell including a semiconductor substrate including a base area and a doping area, a doping layer formed on the semiconductor substrate, the doping layer having a conductive type different from the doping area, a tunneling layer interposed between the doping layer and the semiconductor substrate, a first electrode connected to the doping area, and a second electrode connected to the doping layer.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: February 18, 2020
    Assignee: LG ELECTRONICS INC.
    Inventors: Minho Choi, Hyunjung Park, Junghoon Choi, Youngho Choe
  • Patent number: 10566486
    Abstract: A solar cell stack having a first semiconductor solar cell that has a p-n junction of a first material with a first lattice constant, and having a second semiconductor solar cell that has a p-n junction of a second material with a second lattice constant. The first lattice constant is smaller than the second lattice constant. The solar cell stack has a metamorphic buffer that includes a sequence of a first, lower AlInGaAs or AlInGaP layer and a second, center AlInGaAs or AlInGaP layer, and a third, upper AlInGaAs or AlInGaP layer, and the metamorphic buffer is formed between the first semiconductor solar cell and the second semiconductor solar cell. The lattice constant in the metamorphic buffer changes along the thickness dimension of the metamorphic buffer, and the lattice constant and the In content increase and the Al content decreases between at least two layers of the metamorphic buffer.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: February 18, 2020
    Assignee: Azur Space Solar Power GmbH
    Inventor: Wolfgang Guter
  • Patent number: 10510919
    Abstract: The present invention provides a method for enhancing the efficiency of a photovoltaic module by subjecting it to extremely-low-frequency (ELF) electromagnetic radiation (EMR). The ELF EMR can be provided by a plurality of identical Jacob's ladders and the traveling arcs generated thereby. Alternatively, the ELF EMR can be provided by passing the photovoltaic module over an array of quartz discharge tubes in which arcs are generated between pairs of tungsten electrodes. The photovoltaic module is subjected to multiple passes in order to provide an optimum level of enhancement to the module.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: December 17, 2019
    Inventor: Ronald Clark Davison
  • Patent number: 10505068
    Abstract: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: December 10, 2019
    Assignee: SunPower Corporation
    Inventors: Kieran Mark Tracy, David D. Smith, Venkatasubramani Balu, Asnat Masad, Ann Waldhauer
  • Patent number: 10483410
    Abstract: System and method of providing a photovoltaic (PV) cell having a cushion layer to alleviate stress impact between a front metal contact and a thin film PV layer. A cushion layer is disposed between an extraction electrode and a photovoltaic (PV) surface. The cushion layer is made of a nonconductive material and has a plurality of vias filled with a conductive material to provide electrical continuity between the bus bar and the PV layer. The cushion layer may be made of a flexible material preferably with rigidity that matches the substrate. Thus, the cushion layer can effectively protect the PV layer from physical damage due to tactile contact with the front metal contact.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: November 19, 2019
    Assignee: ALTA DEVICES, INC.
    Inventors: Linlin Yang, Liguang Lan, Chris France, Gang He, Erhong Li, Jose Corbacho
  • Patent number: 10446704
    Abstract: Techniques for forming an ohmic back contact for Ag2ZnSn(S,Se)4 photovoltaic devices. In one aspect, a method for forming a photovoltaic device includes the steps of: depositing a refractory electrode material onto a substrate; depositing a contact material onto the refractory electrode material, wherein the contact material includes a transition metal oxide; forming an absorber layer on the contact material, wherein the absorber layer includes Ag, Zn, Sn, and at least one of S and Se; annealing the absorber layer; forming a buffer layer on the absorber layer; and forming a top electrode on the buffer layer. The refractory electrode material may be Mo, W, Pt, Ti, TiN, FTO, and combinations thereof. The transition metal oxide may be TiO2, ZnO, SnO, ZnSnO, Ga2O3, and combinations thereof. A photovoltaic device is also provided.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: October 15, 2019
    Assignee: International Business Machines Corporation
    Inventors: Talia S. Gershon, Oki Gunawan, Richard A. Haight, Ravin Mankad
  • Patent number: 10439091
    Abstract: In one aspect, optoelectronic devices are described herein. In some implementations, an optoelectronic device comprises a photovoltaic cell. The photovoltaic cell comprises a space-charge region, a quasi-neutral region, and a low bandgap absorber region (LBAR) layer or an improved transport (IT) layer at least partially positioned in the quasi-neutral region of the cell.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: October 8, 2019
    Assignee: THE BOEING COMPANY
    Inventors: Richard R. King, Christopher M. Fetzer, Daniel C. Law, Xing-Quan Liu, William D. Hong, Kenneth M. Edmondson, Dimitri D. Krut, Joseph C. Boisvert, Nasser H. Karam
  • Patent number: 10432317
    Abstract: A device including a combination photovoltaic device and optical receiver comprising a p-n junction of type III-V semiconductor material layers, wherein the p-n junction produces power in response to the application of a wavelength of light for powering an optical receiver provided by the p-n junction for receiving data. The device may further include a light emitting diode for transmitting data. The device can further include a processor coupled to a memory, the processor being configured to control the electrical communication with the light emitting diode and the combination photovoltaic device and optical receiver.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Devendra K. Sadana
  • Patent number: 10431741
    Abstract: Method of making an array of interconnected solar cells, including a) providing a continuous layer stack (1) of a prescribed thickness on a substrate (8), the layer stack (1) including an upper (2) and a lower (3) conductive layer having a photoactive layer (4) and a semiconducting electron transport layer (6) interposed there between; b) selectively removing the upper conductive layer (2) and the photoactive layer (4) for obtaining a contact hole (10) exposing the semiconducting electron transport layer (6); c) selectively heating the layer stack (1) to a first depth (d1) for obtaining a first heat affected zone (12) at a first center-to-center distance (s1) from the contact hole (10), the first heat affected zone (12) being transformed into a substantially insulating region with substantially the first depth (d1) in the layer stack, thereby locally providing an increased electrical resistivity to the layer stack (1).
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: October 1, 2019
    Assignee: Stichting Energieonderzoek Centrum Nederland
    Inventors: Johan Bosman, Tristram Budel
  • Patent number: 10424514
    Abstract: A method for manufacturing a semiconductor substrate according to the present invention includes a hydrogen layer forming step of forming a hydrogen layer on a first substrate formed of single crystal of a first semiconductor material, a bonding step of bonding the first substrate and a temporary substrate, a first separation step of separating the first substrate with the hydrogen layer as a boundary and leaving a separated surface side of the first substrate as a first thin film layer on the temporary substrate, a support layer forming step of forming a support layer formed of a second semiconductor material on the temporary substrate on which the first thin film layer is left, a second separation step of removing the temporary substrate, and a cutting step of cutting a peripheral edge portion of the substrate.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: September 24, 2019
    Assignee: MTEC CORPORATION
    Inventors: Mitsuharu Kato, Tamotsu Usami, Tadashi Shimada
  • Patent number: 10418502
    Abstract: The present invention relates to multi-cell devices fabricated on a common substrate that are more desirable than single cell devices, particularly in photovoltaic applications. Multi-cell devices operate with lower currents, higher output voltages, and lower internal power losses. Prior art multi-cell devices use physical isolation to achieve electrical isolation between cells. In order to fabricate a multicell device on a common substrate, the individual cells must be electrically isolated from one another. In the prior art, isolation generally required creating a physical dielectric barrier between the cells, which adds complexity and cost to the fabrication process. The disclosed invention achieves electrical isolation without physical isolation by proper orientation of interdigitated junctions such that the diffusion fields present in the interdigitated region essentially prevent the formation of a significant parasitic current which would be in opposition to the output of the device.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: September 17, 2019
    Assignee: MTPV Power Corporation
    Inventors: Eric Brown, Andrew Walsh, Jose Borrego, Paul Greiff
  • Patent number: 10416610
    Abstract: A decorative element for watches, comprising: a framework comprising arms (12) delimiting a plurality of decorative areas (Zi) and forming support elements, and a plurality of decorative components (20) fixed to the arms of the skeleton, each decorative component occupying a decorative area.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: September 17, 2019
    Assignee: HUBLOT S.A., GENEVE
    Inventor: Mathias Buttet
  • Patent number: 10403779
    Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: September 3, 2019
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana
  • Patent number: 10388376
    Abstract: A method for managing the endurance of a non-volatile rewritable memory including memory cells each including an ordered stack of a lower electrode, a layer of dielectric material and an upper electrode, the dielectric material switching between a high resistance state and a low resistance state, or vice versa, to enable a writing in the memory cell or an erasure of the memory cell. The method includes at the end of each writing and erasure cycle, reading the erasure conditions of the memory cell in the course of the final erasure operation of the cycle, and comparing the read erasure conditions with a predetermined median erasure value corresponding to a median resistance value which follows a predetermined dependency law linking the condition of erasure of a cycle with the condition of writing of a following cycle; and determining the writing conditions from the results of the comparison.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: August 20, 2019
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Gabriel Molas, Michel Harrand, Elisa Vianello, C├ęcile Nail
  • Patent number: 10388817
    Abstract: An optical transducer system that has a light source and a transducer. The light source generates light that has a predetermined photon energy. The transducer has a bandgap energy that is smaller than the photon energy. An increased optical to electrical conversion efficiency is obtained by illuminating the transducer at increased optical power densities. A method of converting optical energy to electrical energy is also provided.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: August 20, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Simon Fafard, Denis Paul Masson
  • Patent number: 10381505
    Abstract: A multijunction solar cell includes an upper first solar subcell having a first band gap, a second solar subcell having a second band gap smaller than the first band gap, and a first graded interlayer composed of (InxGa1-x)yAl1-yAs adjacent to the second solar subcell. The first graded interlayer has a third band gap greater than the second band gap subject to the constraints of having the in-plane lattice parameter greater or equal to that of the second subcell and less than or equal to that of the third subcell, wherein 0<x<1 and 0<y<1, and x and y are selected such that the band gap of the first graded interlayer remains constant throughout its thickness at 1.5 eV. A third solar subcell is adjacent to the first graded interlayer and has a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: August 13, 2019
    Assignee: SolAero Technologies Corp.
    Inventors: Pravin Patel, Arthur Cornfeld, John Spann, Mark A. Stan, Benjamin Cho, Paul R. Sharps, Daniel J. Aiken
  • Patent number: 10370766
    Abstract: This disclosure provides systems, methods, and apparatus related to a hybrid photo-electrochemical and photo-voltaic cell. In one aspect, device includes a substrate comprising a semiconductor, a transparent conductor disposed on the second surface of the substrate, a photoanode disposed on the transparent conductor, an electrolyte in electrical communication with the photoanode, and an electrode in contact with the electrolyte. The substrate is doped with a first n-type dopant. A first area of a first surface of the substrate is heavily doped with a first p-type dopant. A second area of the first surface of the substrate is heavily doped with a second n-type dopant. The second surface of the substrate is heavily doped with a second p-type dopant. The electrode is in electrical contact with the second area. The first area is in electrical contact with the second area through an electrical load.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: August 6, 2019
    Assignee: The Regents of the University of California
    Inventors: Gideon Segev, Ian D. Sharp, Hen Dotan, Avner Rothschild
  • Patent number: 10367105
    Abstract: A solar cell includes a photoelectric converter having n-type regions and p-type regions alternately arranged in a first direction on a back surface and an electrode layer provided on the back surface. The photoelectric converter includes a plurality of sub-cells arranged in a second direction intersecting with the first direction and an isolation region provided on a boundary between adjacent sub-cells. The electrode layer includes an n-side electrode provided on the n-type region in the sub-cell at the end of the sub-cells, a p-side electrode provided on the p-type region in the sub-cell at the other end, and a sub-electrode provided over two adjacent sub-cells. The sub-electrode connects the n-type region provided in one sub-cell of the two adjacent sub-cells to the p-type region provided in the other sub-cell.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: July 30, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Tsuyoshi Takahama
  • Patent number: 10361790
    Abstract: Methods and systems for a silicon-based optical phase modulator with high modal overlap are disclosed and may include, in an optical modulator having a rib waveguide in which a cross-shaped depletion region separates four alternately doped sections: receiving an optical signal at one end of the optical modulator, modulating the received optical signal by applying a modulating voltage, and communicating a modulated optical signal out of an opposite end of the modulator. The modulator may be in a silicon photonically-enabled integrated circuit which may be in a complementary-metal oxide semiconductor (CMOS) die. An optical mode may be centered on the cross-shaped depletion region. The four alternately doped sections may include: a shallow depth p-region, a shallow depth n-region, a deep p-region, and a deep n-region. The shallow depth p-region may be electrically coupled to the deep p-region periodically along the length of the modulator.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: July 23, 2019
    Assignee: LUXTERA, INC.
    Inventors: Subal Sahni, Kam-Yan Hon, Attila Mekis, Gianlorenzo Masini, Lieven Verslegers
  • Patent number: 10347682
    Abstract: Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with electromagnetic radiation. The textured region can be formed from a series of shallow trench isolation features.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: July 9, 2019
    Assignee: Sionyx, LLC
    Inventors: Homayoon Haddad, Jutao Jiang
  • Patent number: 10304986
    Abstract: A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: May 28, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10304985
    Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: May 28, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10297709
    Abstract: A Schottky-barrier-reducing layer is provided between a p-doped semiconductor layer and a transparent conductive material layer of a photovoltaic device. The Schottky-barrier-reducing layer can be a conductive material layer having a work function that is greater than the work function of the transparent conductive material layer. The conductive material layer can be a carbon-material layer such as a carbon nanotube layer or a graphene layer. Alternately, the conductive material layer can be another transparent conductive material layer having a greater work function than the transparent conductive material layer. The reduction of the Schottky barrier reduces the contact resistance across the transparent material layer and the p-doped semiconductor layer, thereby reducing the series resistance and increasing the efficiency of the photovoltaic device.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: May 21, 2019
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, EGYPT NANOTECHNOLOGY CENTER
    Inventors: Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana, George S. Tulevski, Ahmed Abou-Kandil, Hisham S. Mohamed, Mohamed Saad, Osama Tobail
  • Patent number: 10290753
    Abstract: Nanoparticles, methods of manufacture, devices comprising the nanoparticles, methods of their manufacture, and methods of their use are provided herein. The nanoparticles and devices having photoabsorptions in the range of 1.7 ?m to 12 ?m and can be used as photoconductors, photodiodes, phototransistors, charge-coupled devices (CCD), luminescent probes, lasers, thermal imagers, night-vision systems, and/or photodetectors.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: May 14, 2019
    Assignee: The University of Chicago
    Inventors: Philippe Guyot-Sionnest, Sean E. Keuleyan, Emmanuel Lhuillier
  • Patent number: 10256357
    Abstract: A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the semiconductor substrate to form doped alternating regions with opposite conductivity. A doped layer is formed over a first side the semiconductor substrate. A conductive material is patterned over the doped layer to form conductive islands such that the conductive islands are aligned with the alternating regions to define a plurality of photovoltaic cells connected in series on a monolithic structure.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: April 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10243094
    Abstract: A method for producing a multiple-substrate stack from an, in particular wavelength-sensitive, semiconductor substrate and at least one further, in particular wavelength-sensitive, semiconductor substrate with the following steps: applying a dielectric layer, which is electrically conductive at least in certain sections, onto at least one substrate surface of at least one of the semiconductor substrates, and contacting the semiconductor substrate with the further semiconductor substrate and forming an electrically conductive connection between the semiconductor substrates.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: March 26, 2019
    Assignee: EV GROUP E. THALLNER GMBH
    Inventor: Thorsten Matthias
  • Patent number: 10230015
    Abstract: A photovoltaic device includes a p-type layer. An intrinsic layer is formed directly on the p-type layer and includes an interface region extending into the intrinsic layer that includes a gradually decreasing band gap energy going from the p-type layer into the intrinsic layer formed by a graded deposition temperature. An n-type layer is formed directly on the intrinsic layer.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Mohamed Saad, Devendra K. Sadana
  • Patent number: 10224351
    Abstract: Exemplary embodiments provide a solar cell device, and method for forming the solar cell device by integrating a switch component into a solar cell element. The solar cell element can include a solar cell, a solar cell array and/or a solar cell panel. The integrated solar cell element can be used for a solar sensor, while the solar sensor can also use discrete switches for each solar cell area of the sensor. Exemplary embodiments also provide a connection system for the solar cell elements and a method for super-connecting the solar cell elements to provide a desired connection path or a desired power output through switch settings. The disclosed connection systems and methods can allow for by-passing underperforming solar cell elements from a plurality of solar cell elements. In embodiments, the solar cell element can be extended to include a battery or a capacitor.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: March 5, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventor: Stephen Joseph Gaul
  • Patent number: 10211354
    Abstract: A monolithically integrated system of silicon solar cells. A system having a silicon substrate and a plurality of solar cells formed on the silicon substrate. Each solar cell can have an emitter portion and a base portion. The system can also have a plurality of intermediate regions, each intermediate region having a polarity and electrically separating at least two portions of adjacent solar cells from one another such that the polarity of the intermediate region is opposite to a polarity of at least one of the separated portions of the adjacent solar cells.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: February 19, 2019
    Assignee: NEWSOUTH INNOVATIONS PTY LIMITED
    Inventors: Catherine Emily Chan, Stuart Ross Wenham, Brett Jason Hallam, Alison Maree Wenham
  • Patent number: 10177266
    Abstract: A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: January 8, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10171030
    Abstract: The present invention relates to power supplies and in particular to an electronic power supply that is mounted to a printed circuit board and can be used to power electronic circuits and devices. Disclosed is a power supply which includes a photoluminescent light source. The photoluminescent light source generates light in response to receiving input power. One or more than one photovoltaic device is in optical communication with the photoluminescent light source, and generates output power in response to receiving light from the photoluminescent light source. The amount of output power generated by the one or more than one photovoltaic device is greater than the amount of input power received by the photoluminescent light source. In some embodiments the photoluminescent light source includes a light-emitting device and a photoluminescent material, each of which is embedded in an optical coupling material.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: January 1, 2019
    Assignee: IsoLine Component Company, LLC
    Inventor: Michael Jon Hodges
  • Patent number: 10170659
    Abstract: An integrated thin-film lateral multi junction solar device and fabrication method are provided. The device includes, for instance, a substrate, and a plurality of stacks extending vertically from the substrate. Each stack may include layers, and be electrically isolated against another stack. Each stack may also include an energy storage device above the substrate, a solar cell above the energy storage device, a transparent medium above the solar cell, and a micro-optic layer of spectrally dispersive and concentrating optical devices above the transparent medium. Furthermore, the device may include a first power converter connected between the energy storage device and a power bus, and a second power converter connected between the solar cell and the power bus. Further, different solar cells of different stacks may have different absorption characteristics.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Hans-Juergen Eickelmann, Ruediger Kellmann, Hartmut Kuehl, Markus Schmidt
  • Patent number: 10164567
    Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: December 25, 2018
    Assignee: SunPower Corporation
    Inventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
  • Patent number: 10158037
    Abstract: An optical transducer, optoelectronic device, and semiconductor are disclosed. An illustrative optical transducer is disclosed to include a plurality of p-n stacks, where each p-n stack comprises at least a p-layer and an n-layer, and formed therein a built-in photovoltage between the p-layer and the n-layer. The p-layers and n-layers are disclosed to have substantially the same n-type material in substantially the same composition such that each p-n stack in the plurality of p-n stacks has a substantially similar built-in photovoltage. The optical transducer is further disclosed to include a plurality of connecting layers, each connecting layer in the plurality of connecting layers being sandwiched between two adjacent p-n stacks for electrically connecting the two adjacent p-n stacks. The p-n stacks in the plurality of p-n stacks may be arranged such that the built-in photovoltage of each p-n stack additively contributes to an overall electric potential of the transducer.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: December 18, 2018
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Simon Fafard, Denis Masson
  • Patent number: 10158034
    Abstract: An embodiment includes an apparatus comprising: a first photovoltaic cell; a first through silicon via (TSV) included in the first photovoltaic cell and passing through at least a portion of a doped silicon substrate, the first TSV comprising (a)(i) a first sidewall, which is doped oppositely to the doped silicon substrate, and (a)(ii) a first contact substantially filling the first TSV; and a second TSV included in the first photovoltaic cell and passing through at least another portion of the doped silicon substrate, the second TSV comprising (b)(i) a second sidewall, which comprises the doped silicon substrate, and (b)(ii) a second contact substantially filling the second TSV; wherein the first and second contacts each include a conductive material that is substantially transparent. Other embodiments are described herein.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: December 18, 2018
    Assignee: Intel Corporation
    Inventors: Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan, Walid M. Hafez, Yi Wei Chen
  • Patent number: 10141461
    Abstract: A method for forming a multi-junction photovoltaic device includes providing a germanium layer and etching pyramidal shapes in the germanium layer such that (111) facets are exposed to form a textured surface. A first p-n junction is formed on or over the textured surface from III-V semiconductor materials. Another p-n junction is formed over the first p-n junction from III-V semiconductor materials and follows the textured surface.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: November 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoartabari, Ali Khakifirooz, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10103281
    Abstract: A thin film amorphous silicon solar cell may have front contact between a hydrogenated amorphous silicon layer and a transparent conductive oxide layer. The cell may include a layer of a refractory metal, chosen among the group composed of molybdenum, tungsten, tantalum and titanium, of thickness adapted to ensure a light transmittance of at least 80%, interposed therebetween, before growing by PECVD a hydrogenated amorphous silicon p-i-n light absorption layer over it. A refractory metal layer of just about 1 nm thickness may effectively shield the oxide from the reactive plasma, thereby preventing a diffused defect when forming the p.i.n. layer that would favor recombination of light-generated charge carriers.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: October 16, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Salvatore Lombardo, Cosimo Gerardi, Sebastiano Ravesi, Marina Foti, Cristina Tringali, Stella Loverso, Nicola Costa