Schottky, Graded Doping, Plural Junction Or Special Junction Geometry Patents (Class 136/255)
  • Patent number: 10312400
    Abstract: A multi-junction solar cell comprising a high-crystalline silicon solar cell and a high-crystalline germanium solar cell. The high-crystalline silicon solar including a first p-doped layer and a n+ layer and the high-crystalline germanium solar cell including a second p layer and a heavily doped layer. The multi-junction solar cell can also be comprised of a heavily doped silicon layer on a non-light receiving back surface of the high-crystalline germanium solar cell and a tunnel junction between the high-crystalline silicon solar cell and the high-crystalline germanium solar cell.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: June 4, 2019
    Assignee: International Business Machines Corporation
    Inventors: Anirban Basu, Bahman Hekmatshoartabari, Davood Shahrjerdi
  • Patent number: 10312082
    Abstract: Semiconductor light emitting diodes (LEDs) formed as (Al)GaN-based nanowire structures have a first semiconductor layer, a second semiconductor layer, and a thin metallic layer fabricated therebetween. The structures, operating in the deep ultraviolet (UV) spectral range, exhibit high photoluminescence efficiency at room temperature. The structures may be formed of an epitaxial metal tunnel junction operating as a reflector that enhances carrier transport to and from the semiconductor alloy layers, capable of producing external quantum efficiencies at least one order of magnitude higher than convention devices.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: June 4, 2019
    Assignee: The Regents of the University of Michigan
    Inventors: Zetian Mi, Sharif Sadaf, Yong-Ho Ra, Thomas Szkopek
  • Patent number: 10304972
    Abstract: Solar cells with silicon oxynitride dielectric layers and methods of forming silicon oxynitride dielectric layers for solar cell fabrication are described. For example, an emitter region of a solar cell includes a portion of a substrate having a back surface opposite a light receiving surface. A silicon oxynitride (SiOxNy, 0<x, y) dielectric layer is disposed on the back surface of the portion of the substrate. A semiconductor layer is disposed on the silicon oxynitride dielectric layer.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: May 28, 2019
    Assignee: SunPower Corporation
    Inventors: Michael Shepherd, David D. Smith
  • Patent number: 10304981
    Abstract: A semiconductor device that includes an array of imaging cells is provided. Each imaging cell of the array of imaging cells includes an imaging region and first and second charge storage regions. Further, each imaging cell includes first and second quantum dot-in-quantum well (QD-in-QW) structures. The first QD-in-QW structure absorbs an incident electromagnetic radiation having a wavelength within a predetermined first wavelength band and generates a hole photocurrent. The second QD-in-QW structure absorbs an incident electromagnetic radiation having a wavelength within a predetermined second wavelength band and generates an electron photocurrent. Each imaging cell further includes p-type and n-type modulation doped QW structures that defines first and second buried QW channels. The first and second buried QW channels provide for lateral transfer of the hole and electron photocurrents for charge accumulation in the first and second charge storage regions, respectively.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: May 28, 2019
    Assignees: THE UNIVERSITY OF CONNECTICUT, Opel Solar, Inc.
    Inventor: Geoff W. Taylor
  • Patent number: 10304989
    Abstract: Methods for growing and using large-grain templates are provided. According to an aspect of the invention, a method includes depositing a small-grain layer of a semiconductor material; treating the small-grain layer such that the small-grain layer becomes a large-grain layer; and growing an epitaxial layer of the semiconductor material on the large-grain layer. A ratio of an average grain size of the small-grain layer to a thickness of the small-grain layer is less than 1.0, and a ratio of an average grain size of the large-grain layer to a thickness of the large-grain layer is greater than 1.5.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: May 28, 2019
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David Scott Albin, Wyatt Keith Metzger, James Michael Burst, Eric Michael Colegrove, Joel Nathan Duenow
  • Patent number: 10302612
    Abstract: Provided is a hydrogen concentration measuring device capable of measuring with high accuracy a hydrogen concentration over an extensive range by a simple configuration. The device includes: a sensor chip which detects the electric resistance of a sensing film; an optical measurement unit which detects the transmitted light intensity of the film; and a controller. The controller performs measurement processing such that a hydrogen concentration in the gas atmosphere is measured based on the detected electric resistance in a first measurement range and based on the detected transmitted light intensity in a second measurement range and is determined so as to reduce a difference between the hydrogen concentration based on the detected electric resistance and the hydrogen concentration based on the detected transmitted light intensity in the overlap of the first measurement range and the second measurement range.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: May 28, 2019
    Assignees: STANLEY ELECTRIC CO., LTD., TOKYO UNIVERSITY OF SCIENCE FOUNDATION
    Inventors: Koji Matsumoto, Masakazu Satsu, Takanori Aimono, Keiichi Ikegami, Shinichi Uozumi, Keishi Nishio, Yuki Yamaguchi
  • Patent number: 10290823
    Abstract: Provided is a photodetector including: an organic semiconductor (20) having protrusions; a metal layer (30) added onto the organic semiconductor (20), for promoting at least one of localized plasmon resonance and surface plasmon resonance in which electrons are excited through irradiation of detection light; and a semiconductor (40) forming a junction with the metal layer (30), for allowing electrons excited through the plasmon resonance to pass through the junction (40a) with the metal layer (30).
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: May 14, 2019
    Assignees: Olympus Corporation, The University of Tokyo, Kyushu University, National University Corporation
    Inventors: Yoshiharu Ajiki, Isao Shimoyama, Kiyoshi Matsumoto, Tetsuo Kan, Koichi Karaki, Yasuo Sasaki, Masayuki Yahiro, Akiko Hamada, Chihaya Adachi
  • Patent number: 10284005
    Abstract: A power supply assembly and an electronic device are disclosed. The power supply assembly includes a photoelectric converting element, a storage capacitor, an energy storage battery and an energy management module. The energy management module is configured to control the photoelectric converting element to charge the storage capacitor and the energy storage battery and control the storage capacitor to charge the energy storage battery. The power supply assembly can provide power stably in a longer term.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: May 7, 2019
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Feng Jiang, Long Wang, Li Zhou, Xingdong Liu, Ke Liu, Xuan He
  • Patent number: 10269994
    Abstract: A method for forming a back contact on an absorber layer in a photovoltaic device includes forming a two dimensional material on a first substrate. An absorber layer including Cu—Zn—Sn—S(Se)(CZTSSe) is grown over the first substrate on the two dimensional material. A buffer layer is grown on the absorber layer on a side opposite the two dimensional material. The absorber layer is exfoliated from the two dimensional material to remove the first substrate from a backside of the absorber layer opposite the buffer layer. A back contact is deposited on the absorber layer.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: April 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Richard A. Haight, James B. Hannon, Satoshi Oida
  • Patent number: 10263241
    Abstract: The invention provides an inexpensive, scalable process for coating materials with a film of a refractory metal. As an example, the immersion process can comprise the deposition of a sacrificial zinc coating which is galvanically displaced by the ether-mediated reduction of oxophilic WCl6 to form a complex WOxCly film, and subsequently annealed to crystalline, metallic tungsten. The efficacy of this process was demonstrated on a carbon foam electrode, showing a 50% decrease in electrode resistance and significant gains in electrochemical performance. This process enables voltage efficiency gains for electrodes in batteries, redox flow batteries, and industrial processes where high conductivity and chemical stability are paramount.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: April 16, 2019
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Leo J. Small, Paul G. Clem, Erik David Spoerke
  • Patent number: 10263134
    Abstract: The present disclosure provides a multijunction solar cell comprising: an upper solar subcell having an indirect band gap semiconductor emitter layer composed of greater than 0.8 but less than 1.0 mole fraction aluminum and a base layer, the emitter layer and the base layer forming a heterojunction solar subcell; and a lower solar subcell disposed beneath the upper solar subcell, wherein the lower solar subcell has an emitter layer and a base layer forming a photoelectric junction. In some embodiments, the emitter layer of the upper solar subcell is an n-type AlxGa1-xAs layer with 0.8<x<1.0 and having a band gap of greater than 2.0 eV.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: April 16, 2019
    Assignee: SolAero Technologies Corp.
    Inventors: Daniel Derkacs, Daniel Aiken, Samantha Cruz, Nathaniel Miller, Bed Pantha, Mark Stan
  • Patent number: 10263129
    Abstract: A multijunction tandem photovoltaic device is disclosed having a bottom subcell of silicon germanium or silicon germanium tin material and above that a subcell of gallium nitride arsenide bismide, or indium gallium nitride arsenide bismide, material. The materials are lattice matched to gallium arsenide, which preferably forms the substrate. Preferably, further lattice matched subcells of gallium arsenide, indium gallium phosphide and aluminum gallium arsenide or aluminum indium gallium phosphide are provided.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: April 16, 2019
    Assignee: IQE PLC
    Inventor: Andrew Johnson
  • Patent number: 10256364
    Abstract: A method of manufacturing a solar cell, the method includes forming a protective film over a semiconductor substrate, the semiconductor substrate including a base area of a first conductive type and formed of crystalline silicon, wherein the forming of the protective film includes a heat treatment process performed at a heat treatment temperature of approximately 600 degrees Celsius or more under a gas atmosphere including nitrogen, and wherein the heat treatment process includes: a main section, during which the heat treatment temperature is maintained, a temperature increase section before the main section, during which an increase in temperature occurs from an introduction temperature to the heat treatment temperature, and a temperature reduction section after the main section, during which a decrease in temperature occurs from the heat treatment temperature to a discharge temperature.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: April 9, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Youngsung Yang, Hyungjin Kwon, Chungyi Kim, Junghoon Choi
  • Patent number: 10256363
    Abstract: The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a photovoltaic cell using a surface treatment to improve device performance. Embodiments of the present invention may improve open circuit voltage, fill factor, and energy conversion efficiency by performing a surface treatment on an upper surface of an absorber layer. The surface treatment may improve device performance by permitting a more cohesive interface between the upper surface of the absorber layer and a lower surface of a passivation layer. The more cohesive interface may allow carriers to move from one layer to another with less resistance, and thus, increase device performance.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: April 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 10243092
    Abstract: A photovoltaic device includes a substrate structure and a p-type semiconductor absorber layer, the substrate structure including a CdSSe layer. A photovoltaic device may alternatively include a CdSeTe layer. A process for manufacturing a photovoltaic device includes forming a CdSSe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process includes forming a p-type absorber layer above the CdSSe layer.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: March 26, 2019
    Assignee: First Solar, Inc.
    Inventors: Dan Damjanovic, Feng Liao, Rick Powell, Rui Shao, Jigish Trivedi, Zhibo Zhao
  • Patent number: 10241391
    Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: March 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Jens Schneider, Henning Feick, Marcel Heller, Dieter Kaiser
  • Patent number: 10242874
    Abstract: A diffusing agent composition and a method of manufacturing a semiconductor substrate using the diffusing agent composition. The diffusing agent composition contains an impurity diffusion component (A) including a first type of boron-containing compound and a second type of boron-containing compound.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: March 26, 2019
    Assignee: TOKYO OHKA KOGYO CO., LTD.
    Inventor: Yoshihiro Sawada
  • Patent number: 10230014
    Abstract: A hybrid vapor phase-solution phase CZT(S,Se) growth technique is provided. In one aspect, a method of forming a kesterite absorber material on a substrate includes the steps of: depositing a layer of a first kesterite material on the substrate using a vapor phase deposition process, wherein the first kesterite material includes Cu, Zn, Sn, and at least one of S and Se; annealing the first kesterite material to crystallize the first kesterite material; and depositing a layer of a second kesterite material on a side of the first kesterite material opposite the substrate using a solution phase deposition process, wherein the second kesterite material includes Cu, Zn, Sn, and at least one of S and Se, wherein the first kesterite material and the second kesterite material form a multi-layer stack of the absorber material on the substrate. A photovoltaic device and method of formation thereof are also provided.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Liang-Yi Chang, Talia S. Gershon, Richard A. Haight, Yun Seog Lee
  • Patent number: 10224442
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: March 5, 2019
    Assignee: SunPower Corporation
    Inventors: David D. Smith, Timothy Weidman, Scott Harrington, Venkatasubramani Balu
  • Patent number: 10205044
    Abstract: An adjustment-tolerant photovoltaic cell in which the front face has at least three sub-segments which can be directly struck by electromagnetic radiation is provided. At least two sub-segments are in the form of a first segment type, and at least one sub-segment is in the form of a second segment type. The sub-segments can be arranged such that at least two separate segment regions, which can be directly struck by the electromagnetic radiation, are formed for each of the first and the second segment types. At least two sub-segments of the first segment type can be connected to each other in parallel and/or are connected to each other via a transition region which ensures the lateral flow of current. Furthermore, the sub-segments of the first segment type can be connected in series to the at least one sub-segment of the second segment type.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: February 12, 2019
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Andreas Bett, Simon Philipps, Kasimir Reichmuth, Henning Helmers
  • Patent number: 10199516
    Abstract: Photovoltaic devices are formed by laser drilling vias through silicon substrates and, following surface preparation of the via sidewalls, plating a continuous, electrically conductive layer on the via sidewalls to electrically connect the emitter side of the cell with the back side of the cell. The electrically conductive layer can be formed on portions of a base emitter within the vias and on the back side of the substrate. Alternatively, the electrically conductive layer can be formed on a passivation layer on the via sidewalls and back side of the cell.
    Type: Grant
    Filed: July 8, 2017
    Date of Patent: February 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Brett Caroline Baker-O'Neal, Shu-Yun Chong, John Michael Cotte, Ronald Dean Goldblatt, Jeffrey Hedrick, Qiang Huang, Susan Huang, Laura Louise Kosbar, Rob Steeman, Roland Yudadibrata Utama
  • Patent number: 10199521
    Abstract: Approaches for the foil-based metallization of solar cells and the resulting solar cells are described. A method involves patterning a first surface of a metal foil to provide a plurality of alternating grooves and ridges in the metal foil. Non-conductive material regions are formed in the grooves in the metal foil. The metal foil is located above a plurality of alternating N-type and P-type semiconductor regions disposed in or above a substrate to provide the non-conductive material regions in alignment with locations between the alternating N-type and P-type semiconductor regions and to provide the ridges in alignment with the alternating N-type and P-type semiconductor regions. The ridges of the metal foil are adhered to the alternating N-type and P-type semiconductor regions. The metal foil is patterned through the metal foil from a second surface of the metal foil at regions in alignment with the non-conductive material regions.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 5, 2019
    Assignee: SunPower Corporation
    Inventors: David Fredric Joel Kavulak, Gabriel Harley, Thomas P. Pass
  • Patent number: 10191308
    Abstract: Provided is an optical modulator having high resolution and being capable of controlling a wavelength range of reflected/transmitted light. The optical modulator may include a plurality of nanostructures capable of changing refractive index and a first insulation layer surrounding the plurality of nanostructures. The refractive index of each of the nanostructures may be greater than that of the first insulation layer. The nanostructures may modulate light depending on a change in the refractive index thereof. A change in a resonance wavelength, intensity, phase, polarization, etc. of reflected/transmitted light may be generated.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: January 29, 2019
    Assignees: SAMSUNG ELECTRONICS CO., LTD., THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Seunghoon Han, Yanping Liu, Jie Yao, Kyle Tom
  • Patent number: 10170652
    Abstract: A semiconductor device structure having increased photogenerated current density, and increased current output is disclosed. The device includes low bandgap absorber regions that increase the range of wavelengths at which photogeneration of charge carriers takes place, and for which useful current can be collected. The low bandgap absorber regions may be strain balanced by strain-compensation regions, and the low bandgap absorber regions and strain-compensation regions may be formed from the same ternary semiconductor family. The device may be a solar cell, subcell, or other optoelectronic device with a metamorphic or lattice-mismatched base layer, for which the low bandgap absorber region improves the effective bandgap combination of subcells and current balance within the multijunction cell, for higher efficiency conversion of the solar spectrum.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: January 1, 2019
    Assignee: THE BOEING COMPANY
    Inventors: Richard R. King, Christopher M. Fetzer, Dimitri D. Krut, Nasser H. Karam
  • Patent number: 10155872
    Abstract: A nanocomposite optical device comprising a cured optically transparent nanocomposite ink and a treated conductive nanocomposite-ink. The treated conductive nanocomposite-ink integrated within the nanocomposite structure. The treated nanocomposite-ink having electrical, thermal or both electric and thermal communication to the exterior of the optical device and the same communication with at least a portion of the optically transparent nanocomposite within the optical-device.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: December 18, 2018
    Assignee: Vadient Optics, LLC
    Inventor: George Williams
  • Patent number: 10153390
    Abstract: A bifacial solar cell includes a substrate; a first conductive type region having a conductive type different from a conductive type of the substrate; a first insulating layer formed on the first conductive type region; a plurality of first electrodes contacting the first conductive type region through the first insulating layer and extended in a first direction; a plurality of first current collectors extended in a second direction crossing the first direction, wherein the plurality of first current collectors are electrically and physically connected to the plurality of first electrodes; a second conductive type region having a conductive type the same as the conductive type of the substrate, and having an impurity concentration that is higher than an impurity concentration of the substrate; a second insulating layer formed on the second conductive type region; a plurality of second electrodes contacting the second conductive type region through the second insulating layer and extended in the first directio
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: December 11, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Jaewon Chang, Youngho Choe
  • Patent number: 10147907
    Abstract: A light-emitting device includes a carrier, an organic layer sequence arranged on the carrier and having at least one emitter layer containing a light-emitting material configured to emit light of a first wavelength range, a first electrode and a second electrode, and a multiplicity of nanostructures, wherein the nanostructures have a refractive index smaller than a refractive index of the light-emitting material of the emitter layer and at least some of the nanostructures project into the emitter layer or pierce through the emitter layer.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: December 4, 2018
    Assignee: OSRAM OLED GmbH
    Inventors: Thomas Wehlus, Arne Fleiβner
  • Patent number: 10147807
    Abstract: A method of manufacturing a pixel structure is provided. A gate and a gate insulating layer are formed on a substrate. A channel layer is formed on the gate insulating layer, and the material of the channel layer includes a first metal oxide semiconductor material. A source and a drain are formed on opposite sides of the channel layer. An insulating layer has an opening exposing the drain. First and second transparent electrode material layers are formed on the substrate sequentially, the material of the first transparent electrode material layer includes a second metal oxide semiconductor material, and the material of the second transparent electrode material layer includes a metal oxide conductive material. The first and second transparent electrode material layers are patterned using the same mask to form first and second transparent electrode layers, wherein the first transparent electrode layer is in contact with the drain through the opening.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: December 4, 2018
    Assignee: Chunghwa Picture Tubes, LTD.
    Inventors: Hsi-Ming Chang, Yen-Yu Huang
  • Patent number: 10147828
    Abstract: A solar cell includes a semiconductor substrate having a first conductivity type, an emitter layer on a surface of the semiconductor substrate, the emitter layer having a second conductivity type different from the first conductivity type, and electrodes including a first electrode electrically connected to the emitter layer, and a second electrode electrically connected to the semiconductor substrate. The emitter layer includes a high-concentration doping portion adjacent to the first electrode, and a low-concentration doping portion in a region that does not include the high-concentration doping portion. The low-concentration doping portion has a higher resistance than the high-concentration doping portion. The high-concentration doping portion includes a first region having a first resistance, and a second region having a second resistance higher than the first resistance.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: December 4, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Indo Chung, Taehee Shin, Ilhyoung Jung, Jinah Kim
  • Patent number: 10147838
    Abstract: An improved feeder system and method for continuous vapor transport deposition that includes at least two vaporizers coupled to a common distributor through an improved seal for separately vaporizing and collecting at least any two vaporizable materials for deposition as a material layer on a substrate. Multiple vaporizers provide redundancy and allow for continuous deposition during vaporizer maintenance and repair.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: December 4, 2018
    Assignee: First Solar, Inc.
    Inventors: John Barden, Rick C. Powell
  • Patent number: 10141469
    Abstract: A solar cell for collecting solar radiation can include a barrier layer such as a dielectric barrier layer and a heterostructure including a first light absorbing layer and at least a second light absorbing layer. A method for forming the solar cell can include forming a sacrificial layer on a support substrate and forming the barrier layer on the sacrificial layer. The barrier layer is formed to have a strain gradient through its thickness. The heterostructure is attached to the barrier layer and the sacrificial layer is removed, thereby separating the barrier layer and the heterostructure from the support substrate. During the removal of the sacrificial layer, the strain gradient causes the barrier layer and heterostructure, to roll, curl, or spiral, thereby resulting in a radially stacked heterostructure that provides a light concentrating optical cavity having multiple light absorbing layers with different band gaps.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: November 27, 2018
    Assignee: STC.UNM
    Inventors: Francesca Cavallo, Vijay Saradhi Mangu
  • Patent number: 10128409
    Abstract: Provided herein are all-inorganic perovskite-based films, devices including all-inorganic perovskite-based films, and methods of forming all-inorganic perovskite-based films. The methods may include casting a precursor formulation that includes an all-inorganic perovskite, a liquid, and a polymer. The amount of polymer in the precursor formulation may be less than the amount of all-inorganic perovskite in the precursor formulation.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: November 13, 2018
    Assignee: Florida State University Research Foundation, Inc.
    Inventors: Hanwei Gao, Biwu Ma, Yichuan Ling
  • Patent number: 10128395
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: November 13, 2018
    Assignee: SunPower Corporation
    Inventor: David D. Smith
  • Patent number: 10115838
    Abstract: One embodiment can provide a current-collecting mechanism of a photovoltaic structure. The current-collecting mechanism can include a top metallic grid positioned on a top surface of the photovoltaic structure and a bottom metallic grid positioned on the bottom surface of the photovoltaic structure. The top metallic grid can include a top busbar positioned near an edge of the photovoltaic structure, and the bottom metallic grid can include a bottom busbar positioned near an opposite edge. The top busbar and the bottom busbar can have complementary topology profiles such that, when the edge of the photovoltaic structure overlaps with an opposite edge of an adjacent photovoltaic structure, the top busbar of the photovoltaic structure and the bottom busbar of the adjacent photovoltaic structure interlock with each other.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: October 30, 2018
    Assignee: Tesla, Inc.
    Inventor: Peter P. Nguyen
  • Patent number: 10096469
    Abstract: According to exemplary embodiments, a method of synthesizing tin (Sn)-doped Zinc Sulfide (ZnS) nanostructures for electroluminescent white light source includes coating a substrate, including a silicon oxide layer, with Sn by vacuuming depositing Sn as catalyst nanostructures on the substrate, placing the substrate coated with Sn in a furnace, introducing a carrier flow gas into the furnace, adding a ZnS power to the furnace, growing ZnS nanostructures, and dissolving Sn in the growing ZnS nanostructures. The S vacancies are on a surface of the ZnS nanostructures. The ZnS nanostructures are grown on the substrate having a temperature in a range of 750° C. to 850° C.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: October 9, 2018
    Assignee: COMSATS Institute of Information Technology (CIIT)
    Inventors: Arshad Saleem Bhatti, Uzma Nosheen, Liaquat Aziz, Nashmia Sabih
  • Patent number: 10090432
    Abstract: Photoactive devices include an active region disposed between first and second electrodes and configured to absorb radiation and generate a voltage between the electrodes. The active region includes an active layer comprising a semiconductor material exhibiting a relatively low bandgap. The active layer has a front surface through which radiation enters the active layer and a relatively rougher back surface on an opposing side of the active layer. Methods of fabricating photoactive devices include the formation of such an active region and electrodes.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: October 2, 2018
    Assignee: SOITEC
    Inventor: Fred Newman
  • Patent number: 10084111
    Abstract: A nitride semiconductor light-emitting element includes at least an n-type nitride semiconductor layer, a light-emitting layer, and a p-type nitride semiconductor layer. A multilayer body is provided between the n-type nitride semiconductor layer and the light-emitting layer, having at least one stack of first and second semiconductor layers. The second semiconductor layer has a greater band-gap energy than the first semiconductor layer. The first and second semiconductor layers each have a thickness of more than 10 nm and 30 nm or less. In applications in which luminous efficiency at room temperature is a high priority, the first semiconductor layer has a thickness of more than 10 nm and 30 nm or less, the second semiconductor layer has a thickness of more than 10 nm and 40 nm or less, and the light-emitting layer has V-shaped recesses in cross-sectional view.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: September 25, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiko Tani, Tetsuya Hanamoto, Masanori Watanabe, Akihiro Kurisu, Katsuji Iguchi, Hiroyuki Kashihara, Tomoya Inoue, Toshiaki Asai, Hirotaka Watanabe
  • Patent number: 10078064
    Abstract: An apparatus to measure the pollution level of the surface of a photovoltaic module. A resistance change on the surface of a photovoltaic module is sensed to effectively measure the pollution level on the surface of the photovoltaic module and secure a proper cleaning cycle of the module during solar light power generation. The apparatus includes a glass substrate attachably mounted on the surface of a photovoltaic module. A reactive coating layer is coated on one side of the glass substrate, has a structure that pollutants are accumulated on one side surface, and causes a resistance change by contact with the pollutants. A signal processor connected to the reactive coating layer to receive a signal of the resistance change, operationally process the signal to measure a change in the resistance value caused by accumulation of the pollutants, and output a discrimination signal on pollution.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: September 18, 2018
    Assignee: MAIN-ENERGIA INC.
    Inventors: Taik Nam Kim, Suk Ho Sinn
  • Patent number: 10043935
    Abstract: A photovoltaic device includes a crystalline substrate having a first dopant conductivity, an interdigitated back contact and a front surface field structure. The front surface field structure includes a crystalline layer formed on the substrate and a noncrystalline layer formed on the crystalline layer. The crystalline layer and the noncrystalline layer are doped with dopants having a same dopant conductivity as the substrate. Methods are also disclosed.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 10026899
    Abstract: Tandem electro-optic devices and active materials for electro-optic devices are disclosed. Tandem devices include p-type and n-type layers between the active layers, which are doped to achieve carrier tunneling. Low bandgap conjugated polymers are also disclosed.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: July 17, 2018
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Yang Yang, Letian Dou, Jing-Bi You
  • Patent number: 10026860
    Abstract: A method of forming a multijunction solar cell comprising an upper subcell, a middle subcell, and a lower subcell comprising providing first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on said substrate having a first band gap; forming a second solar subcell over said first subcell having a second band gap smaller than said first band gap; and forming a grading interlayer over said second sub cell having a third band gap larger than said second band gap forming a third solar subcell having a fourth band gap smaller than said second band gap such that said third subcell is lattice mis-matched with respect to said second subcell.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: July 17, 2018
    Assignee: SolAero Technologies Corp.
    Inventors: Arthur Cornfeld, Mark A. Stan
  • Patent number: 10014421
    Abstract: Novel structures of photonics devices (e.g. photovoltaic cells also called as solar cells) are provided. The Cells are based on the micro (or nano) structures which could not only increase the surface area but also have the capability of self-concentrating the light incident onto the photonics devices. Using of such structures, it is possible to achieve significant performance improvement. For example, if such structures are used in the photovoltaic cells, large power generation capability per unit physical area is possible over the conventional cells, and have enormous applications such as in space, in commercial, residential and industrial applications. Such structures are also beneficial to other photonics devices such as photodetector to enhance the performance.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: July 3, 2018
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 10014425
    Abstract: A solar cell is disclosed. The solar cell has a front side facing the sun during normal operation, and a back side facing away from the sun. The solar cell comprises a silicon substrate, a first polysilicon layer with a region of doped polysilicon on the back side of the substrate. The solar cell also comprises a second polysilicon layer with a second region of doped polysilicon on the back side of the silicon substrate. The second polysilicon layer at least partially covers the region of doped polysilicon. The solar cell also comprises a resistive region disposed in the first polysilicon layer. The resistive region extends from an edge of the second region of doped polysilicon. The resistive region can be formed by ion implantation of oxygen into the first polysilicon layer.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: July 3, 2018
    Assignee: SunPower Corporation
    Inventors: Seung Rim, David D. Smith
  • Patent number: 10008625
    Abstract: A photovoltaic device and method include a substrate, a conductive layer formed on the substrate and an absorber layer formed on the conductive layer from a Cu—Zn—Sn containing chalcogenide material. An emitter layer is formed on the absorber layer and a buffer layer is formed on the emitter layer including an atomic layer deposition (ALD) layer. A transparent conductor layer is formed on the buffer layer.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jeehwan Kim, David B. Mitzi, Byungha Shin, Teodor K. Todorov, Mark T. Winkler
  • Patent number: 9997653
    Abstract: A method for manufacturing a back-contact solar cell, comprising the steps of: (i) preparing a semiconductor substrate comprising an n-layer and a p-layer at the back side of the semiconductor substrate; (ii) applying a conductive paste on both the n-layer and the p-layer, wherein the conductive paste comprises a silver (Ag) powder, a palladium (Pd) powder, an additional metal powder selected from the group consisting of molybdenum (Mo), boron (B) and a mixture thereof, a glass frit, and an organic medium; and (iii) firing the applied conductive paste.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: June 12, 2018
    Assignee: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: Isao Hayashi
  • Patent number: 9991407
    Abstract: A novel method to fabricate the high-efficiency solar cells are provided by this application. The cells are based on micro (or nano) structures that not only increase the surface area but also have the capability of self-concentrating the solar spectrum incident onto the cell. These photovoltaic cells have a larger power generation capability per unit physical area than conventional cells. These cells will have enormous applications in space, commercial, residential and industrial sectors.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: June 5, 2018
    Assignee: Banpil Photonics Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 9985167
    Abstract: A photovoltaic device includes a crystalline substrate having a first dopant conductivity, an interdigitated back contact and a front surface field structure. The front surface field structure includes a crystalline layer formed on the substrate and a noncrystalline layer formed on the crystalline layer. The crystalline layer and the noncrystalline layer are doped with dopants having an opposite dopant conductivity from that of the substrate. Methods are also disclosed.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: May 29, 2018
    Assignee: International Business Machines Corporation
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 9978793
    Abstract: A method comprises implanting ions in a substrate to form a plurality of photo diodes, forming an interconnect layer over a first side of the substrate and applying a first halogen treatment process to a second side of the substrate and forming a first silicon-halogen compound layer over the second side of the substrate as a result of applying the first halogen treatment process.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Chin-Nan Wu, Chun Che Lin
  • Patent number: 9972743
    Abstract: A photovoltaic device includes an intrinsic layer having two or more sublayers. The sublayers are intentionally deposited to include complementary concave and convex shapes. The sum of these layers resulting in a relatively flat surface for deposition of n- or p-doped layers. The photovoltaic device is optionally bifacial.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: May 15, 2018
    Assignee: Aptos Energy, LLC
    Inventors: Thanh Ngoc Pham, Joe Feng
  • Patent number: 9972732
    Abstract: One embodiment of the present invention relates to a method for manufacturing solar cells having a nano-micro composite structure on a silicon substrate and solar cells manufactured thereby. The technical problem to be solved is to provide a method for manufacturing solar cells and solar cells manufactured thereby, the method being capable of forming micro wires in various sizes according to the lithographic design of a photoresist and forming nano wires, which have various sizes and aspect ratios, by adjusting the concentration of a wet etching solution and immersion time.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: May 15, 2018
    Assignee: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY
    Inventors: Chae Hwan Jeong, Jong Hwan Lee, Chang Heon Kim, Ho Sung Kim