Contact, Coating, Or Surface Geometry Patents (Class 136/256)
  • Patent number: 10249847
    Abstract: An organic light-emitting diode provides a substrate having a top side and one or a plurality of substrate side surfaces running transversely to the top side and connected thereto via a substrate edge; and an organic layer sequence applied to the top side with an emitter layer, which generates electromagnetic radiation coupled out from the diode via a luminous surface during intended operation of the diode. In a plan view of the luminous surface, the sequence adjoins at least a partial region of substrate edge(s), and in the region the luminous surface extends at least as far as the corresponding edge. An encapsulation formed in an uninterrupted and continuous fashion is applied to the sequence. The encapsulation, at least in the region of the edge adjoining the sequence, is led onto the associated substrate side surface, at least partly covers the latter and is in direct contact with the surface.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: April 2, 2019
    Assignee: OSRAM OLED GMBH
    Inventors: Erwin Lang, Arne Fleissner
  • Patent number: 10243018
    Abstract: A device includes a three-dimensionally curved substrate, a patterned metal layer disposed on the curved substrate, and an array of optoelectronic devices, each optoelectronic device including an optoelectronic structure supported by the curved substrate. Each optoelectronic structure includes an inorganic semiconductor stack. The device further includes a set of contact stripes extending across the curved substrate, each optoelectronic structure being coupled to a respective contact stripe of the set of contact stripes. The array of optoelectronic devices is secured to the curved substrate via a bond between the patterned metal layer and the set of contact stripes.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: March 26, 2019
    Assignees: The Regents of the University of Michigan, Universal Display Corporation
    Inventors: Stephen Forrest, Jeramy D. Zimmerman, Xin Xu, Christopher Kyle Renshaw
  • Patent number: 10239990
    Abstract: A copolymer including a repeating unit represented by Formula I: wherein: L is a divalent hydrocarbon group comprising from 1 to 12 carbon atoms; and L? is optional and when present is represented by Formula II: wherein: Y, Y? and Y? if present, are independently selected from: a carboxylic acid, sulfonic acid, phosphorous acid and phosphoric acid and their corresponding salt or ester; imino, amide, nitrile, hydrogen, hydroxyl and alkyl comprising from 1 to 6 carbon atoms; and A, A? and A? if present, are independently selected from an arylene moiety, with the proviso one or both Y? and A? may not be present.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: March 26, 2019
    Inventors: Robert E. Hefner, Jr., Brian L. Cramm
  • Patent number: 10236455
    Abstract: An organic light-emitting device is provided to have high efficiency and long lifespan. The organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; an emission layer disposed between the first electrode and the second electrode and including a host and a dopant; an electron blocking layer disposed between the first electrode and the emission layer; and an electron transport region disposed between the emission layer and the second electrode, in which the electron blocking layer includes a metal halide, a metal oxide, or a combination thereof, and the actually measured lowest unoccupied molecular orbital (LUMO) value of the electron blocking layer is greater than the actually measured LUMO value of the host in the emission layer.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: March 19, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wonsuk Han, Dongchan Kim, Wonjong Kim, Eungdo Kim, Dongkyu Seo, Jihye Lee, Dahea Im, Sanghoon Yim, Yoonhyeung Cho
  • Patent number: 10237975
    Abstract: Transparent conductive electrodes comprising merged metal nanowires and the method of making the same are disclosed. The merged nanowire junctions have junction depth (J12) less than the combination of the diameters (d1, d2) of the individual metal nanowires.
    Type: Grant
    Filed: February 16, 2018
    Date of Patent: March 19, 2019
    Assignee: NUOVO FILM INC.
    Inventor: Hakfei Poon
  • Patent number: 10236401
    Abstract: A solar cell module includes a substrate, and first and second cells connected in series. The first and second cells each include a first electrode, a first semiconductor layer, a second semiconductor layer and a second electrode stacked in this order on the substrate. The first semiconductor layer contains an oxide of a first metal and includes first and second portions. A groove separates the second semiconductor layers of the first and second cells. The groove and the first portion entirely overlap each other in a plan view. The first portion contains a second metal different from the first metal. A ratio of a number of atoms of the second metal to a number of atoms of all metals in the first portion is grater than a ratio of a number of atoms of the second metal to a number of atoms of all metals in the second portion.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: March 19, 2019
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Higuchi, Takayuki Negami
  • Patent number: 10230011
    Abstract: A solar cell is provided including a substrate having a front and back side, a metallization pattern deposited on the front side, the metallization pattern including a plurality of front side bus bars each including fingers extending therefrom, and a plurality of back side bus bars deposited on the back side. On the front side, one front side bus bar is formed along an edge of the front side of the substrate, and a remainder of the front side bus bars are unequally spaced across the substrate. On the back side of the substrate, only one back side bus bar is formed along an edge of the back side of the substrate, and a remainder of the back side bus bars are unequally spaced across the substrate.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: March 12, 2019
    Assignee: Flex Ltd
    Inventors: Lisong Zhou, Huaming Zhou
  • Patent number: 10229791
    Abstract: A method for preparing a perovskite solar cell by a non-deposition method is provided. Particularly, the method includes preparing a first substrate by forming a hole transport layer on a light absorbing layer in a semi-dried state and pressurizing and drying a second substrate including an opposing electrode to the first substrate.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: March 12, 2019
    Assignees: Hyundai Motor Company, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Sol Kim, Mi Yeon Song, Sang Hak Kim, Eun Yeong Lee, Moon Jung Eo, Sang Hyuk Im, Hye Ji Han
  • Patent number: 10224152
    Abstract: An electrolyte for a dye-sensitized solar cell is disclosed. The electrolyte includes a solvent being one selected from a group consisting of gamma-butyrolactone (gBL), propylene carbonate (PC) and 3-methoxypropionitrile (MPN), and a polymer mixed with the solvent to form an electrolyte solution, wherein when the solvent is one of gBL and PC, the polymer is one selected from a group consisting of polyacrylonitrile (PAN), polyvinyl acetate (PVA), poly(acrylonitrile-co-vinyl acetate) (PAN-VA) and a combination thereof; and when the solvent is MPN, the polymer includes one of a mixture of poly(ethylene oxide (PEO) and polyvinylidene fluoride (PVDF), and a mixture of PEO and polymethylmethacrylate (PMMA).
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: March 5, 2019
    Assignee: National Cheng Kung University
    Inventors: Yuh-Lang Lee, Sung-Chuan Su, Wei-Ning Hung, Jian-Ci Lin
  • Patent number: 10217876
    Abstract: The invention relates to a passivated emitter rear solar cell, comprising a silicon substrate having a front and back surface, a rear passivation layer on the back surface of the silicon substrate having a plurality of open holes formed therein, an aluminum back contact layer formed in the open holes of the rear passivation layer, and at least one backside soldering tab on the back surface of the silicon substrate. The backside soldering tab is formed from an electroconductive paste composition comprising conductive metallic particles, at least one lead-free glass frit, and an organic vehicle comprising at least one silicone oil.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: February 26, 2019
    Assignee: HERAEUS PRECIOUS METALS NORTH AMERICA CONSHOHOCKEN LLC
    Inventors: Devidas Raskar, Yi Yang, Lixin Song, Guang Zhai
  • Patent number: 10217885
    Abstract: An interconnector includes a first electrode configured to be connected to a first photovoltaic cell, a second electrode configured to be connected to a second photovoltaic cell, and a connection body that connects the first electrode and the second electrode. The connection body includes a first detour, a second detour, and a joint. The first detour includes a first curved part that is curved toward a first side in a first direction and connected to the first electrode.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: February 26, 2019
    Assignees: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hirotaka Inaba, Shoichi Iwamoto, Hiroyuki Ohba
  • Patent number: 10211385
    Abstract: The present invention provides thermoelectric device comprising a first electrode, a second electrode, a first electrolyte composition capable of transporting cations, a second electrolyte composition capable of transporting anions and a connector comprising mobile cations and mobile anions, wherein the first electrolyte composition is connected to said first electrode by being in ionic contact and the second electrolyte composition is connected to said second electrode by being in ionic contact and said connector is in ionic contact with said first and said second electrolyte composition, such that an applied temperature difference over said electrolyte compositions or an applied voltage over said electrodes facilitate transport of ions to and/or from said electrodes via said electrolyte compositions. There is also provided a method for generating electric current and a method for generating a temperature difference.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: February 19, 2019
    Assignee: Rise Acreo AB
    Inventors: Xavier Crispin, Magnus Berggren, Hui Wang
  • Patent number: 10211351
    Abstract: A solar cell containing a plurality of CIGS absorber sublayers has a conversion efficiency of at least 13.4 percent and a minority carrier lifetime below 2 nanoseconds. The sublayers may have a different composition from each other.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: February 19, 2019
    Assignee: BEIJING APOLLO DING RONG SOLAR TECHNOLOGY CO., LTD.
    Inventors: John Corson, Alex Austin, Robert Tas, Neil Mackie, Mats Larsson, Korhan Demirkan, Weijie Zhang, Jochen Titus, Swati Sevanna, Robert Zubeck, Randy Dorn, Asit Rairkar, Ron Rulkens, Ajay Saproo, Dan Vitkavage
  • Patent number: 10210999
    Abstract: A semiconducting nanocomposite and a dye-sensitized solar cell including the same, wherein the semiconducting nanocomposite comprises nanocomposite particles selected from the group consisting of TiO2/ZnO/CdS, TiO2/ZnO/CdSe, TiO2/ZnO/PbS, TiO2/ZnO/PbSe, TiO2/ZnS/CdSe, TiO2/ZnS/PbS, TiO2/ZnS/PbSe, WO3/ZnO/CdSe, Nb2O5/ZnO/CdSe, and combinations thereof. Various embodiments of each component of the dye-sensitized solar cell, including electrodes, conductive layers, dyes, and electrolytes are also provided.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: February 19, 2019
    Assignees: Imam Abdulrahman Bin Faisal University, KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
    Inventors: Jwaher Mohammed Alghamdi, Mohammed Ashraf Gondal
  • Patent number: 10205098
    Abstract: A semiconductor structure includes a semiconductor layer, a carbon nanotube and a conductive film. The semiconductor layer includes a first surface and a second surface. A thickness of the semiconductor layer ranges from 1 nanometer to 100 nanometers. The carbon nanotube is located on the first surface of the semiconductor. The conductive film is located on the second surface of the semiconductor. The conductive film is formed on the second surface by a depositing method. The carbon nanotube, the semiconductor layer and the conductive film are stacked with each other to form a three-layered stereoscopic structure.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: February 12, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jin Zhang, Yang Wei, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 10199522
    Abstract: A high electrical conductive, high temperature stable foil material, a process for the preparation of such a high electrical conductive, high temperature stable foil material, a solar cell interconnector including the high electrical conductive, high temperature stable foil material as well as the use of the high electrical conductive, high temperature stable foil material and/or the solar cell interconnector in solar power, aircraft or space applications. The high electrical conductive, high temperature stable foil material includes an aluminum alloy that has at least two elements selected from the group of scandium (Sc), magnesium (Mg), zirconium (Zr), ytterbium (Yb) and manganese (Mn).
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: February 5, 2019
    Assignee: AIRBUS DS GMBH
    Inventors: Frank Palm, Wiebke Steins, Claus Zimmermann
  • Patent number: 10199682
    Abstract: Described are solid-state electrochemical energy storage devices and methods of making solid-state electrochemical energy storage devices in which components of the batteries are truly solid-state and do not comprise a gel. Nor do they rely on lithium-containing electrolytes. Electrolytes useful with the solid-state electrochemical energy storage described herein include, for example, ceramic electrolytes exhibiting a crystal structure including voids or crystallographic defects that permit conduction or migration of oxygen ions across a layer of the ceramic electrolyte. Disclosed methods of making solid-state electrochemical energy storage devices include multi-stage deposition processes, in which an electrode is deposited in a first stage and an electrolyte is deposited in a second stage.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: February 5, 2019
    Assignee: SPACE CHARGE, LLC
    Inventors: John B. Read, Daniel C. Sweeney
  • Patent number: 10189948
    Abstract: A copolymer including a repeating unit represented by (I) wherein: Y is selected from: a carboxylic acid, sulfonic, phosphorous acid and phosphoric acid and their corresponding salt or ester; imino, amide, nitrile, hydrogen, hydroxyl and alkyl comprising from 1 to 6 carbon atoms; and R1, R2, R3, and R4 are independently selected from: hydrogen, alkyl groups comprising from 1 to 6 carbon atoms, and R1 and R2 may collectively form a ketone group or a 9, 9?-fluorene group, and R3 and R4 may collectively form a ketone group or a 9, 9?-fluorene group; R5 and R6 are independently selected from: a bond and an alkylene group comprising from 1 to 6 carbon atoms; R7 is selected from: hydrogen, alkyl, aryl, aralkyl and heteroaryl groups comprising from 1 to 8 carbon atoms which may be unsubstituted or substituted with carboxylic acid, sulfonic acid and phosphoric acid and their corresponding salt or ester, imino and amide; and X and X? are independently selected from: a carboxylic acid, sulfonic acid and phosphoric acid
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 29, 2019
    Assignee: Dow Global Technologies LLC
    Inventors: Xiaolian Hu, Zhe Du, Robert E. Hefner, Jr.
  • Patent number: 10181543
    Abstract: A solar cell module includes a plurality of solar cells including a first solar cell and a second solar cell adjacent to each other, wherein each of the plurality of solar cells including at least one first current collector and at least one second current collector, wherein the at least one first current collector and the at least one second current collector being positioned on a non-light incident surface of each of the plurality of solar cells, which is opposite to a light incident surface of each of the plurality of solar cells, an insulating film having a conductive pattern part positioned on the insulating film, wherein the conductive pattern part including a first pattern which is connected to the at least one first current connector 161 of the plurality of solar cells and a second pattern which is connected to the at least one second current connector of the plurality of solar cells, wherein the first pattern being spaced apart from the second pattern; and an insulating sheet between the an insulatin
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: January 15, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Daehee Jang, Jihoon Ko, Juwan Kang, Jonghwan Kim
  • Patent number: 10180607
    Abstract: A display panel and a display device comprising the same are disclosed, in which a contact area between a connection electrode and a signal line is increased to reduce the contact resistance thereof and to improve picture quality.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: January 15, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Younghyun Kong, SungLim Nam, WonJun Choi, Misun Park, Jaewoong Choi
  • Patent number: 10181534
    Abstract: Discussed is a solar cell includes a semiconductor substrate, a conductive type region including a first conductive type region and a second conductive type region formed on one surface of the semiconductor substrate, an electrode including a first electrode and a second electrode, wherein the first electrode is connected to the first conductive type region and the second electrode is connected to the second conductive type region, and a passivation layer formed on the conductive type region. The passivation layer includes at least one of silicon nitride and silicon carbide.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: January 15, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Indo Chung, Seunghwan Shim, Ilhyoung Jung, Jeongbeom Nam
  • Patent number: 10181540
    Abstract: An aspect of the invention provides a solar cell that comprises a semiconductor substrate having a light-receiving surface and a rear surface; a first semiconductor layer having a first conductivity type; a second semiconductor layer having a second conductivity type, the first semiconductor layer and the second semiconductor layer being formed on the rear surface, and a trench formed in the rear surface, wherein the first semiconductor layer is formed on the rear surface in which the trench is not formed, and the second semiconductor layer is formed on a side surface of the trench in an arrangement direction in which the first semiconductor layer and the second semiconductor layer are alternately arranged and on a bottom surface of the trench.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: January 15, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Daisuke Ide, Takahiro Mishima, Masato Shigematsu, Toshiaki Baba, Hiroyuki Mori, Mitsuaki Morigami, Yuji Hishida, Hitoshi Sakata, Ryo Goto
  • Patent number: 10177259
    Abstract: Provided is a solar cell module which has a high anti-glare property and is capable of maintaining power output at a high level. In a solar cell module with a light-incident surface formed by laminating an antireflection film on a plate body made of glass, and a surface of the plate body is roughened. A substance for forming the antireflection film is introduced into a space formed in a crack situated slightly inside from the roughened surface. Formation of a layer of air in the crack is prevented to suppress reflection of light at a portion in which the crack is formed.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: January 8, 2019
    Assignee: KANEKA CORPORATION
    Inventors: Toshiaki Sasaki, Toshinobu Nakata
  • Patent number: 10174210
    Abstract: The present invention provides an aluminum (Al) paste. The Al paste has low cost and high conductivity. An Al powder having a wide range of particle size distribution and an increased solid content are used to solve the problem of multiple pores. A rupture mechanism of alumina is fully used for sintering to improve contacting internal liquid Al with each other for forming conductive paths. With coordination of sufficient liquid glass powder, all ruptured surface of the Al powder is coated to inhibit exposed liquid Al from oxidation on contacting air. The problem of low conductivity of Al paste is thus radically solved.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: January 8, 2019
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventor: Wen-Hsi Lee
  • Patent number: 10175799
    Abstract: The present disclosure discloses a substrate, a method for manufacturing a substrate, a touch screen and a display device. The substrate includes a base substrate and an anti-reflection film provided on the base substrate. The anti-reflection film includes a first dense homogeneous layer, a nano-porous layer and a second dense homogeneous layer. All the layers of the anti-reflection film include SiO2 material.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: January 8, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Jiandong Guo
  • Patent number: 10173919
    Abstract: A compositional range of fusion-formable, high strain point sodium free, silicate, aluminosilicate and boroaluminosilicate glasses are described herein. The glasses can be used as substrates for photovoltaic devices, for example, thin film photovoltaic devices such as CIGS photovoltaic devices. These glasses can be characterized as having strain points ?540° C., thermal expansion coefficient of from 6.5 to 10.5 ppm/° C., as well as liquidus viscosities in excess of 50,000 poise. As such they are ideally suited for being formed into sheet by the fusion process.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: January 8, 2019
    Assignee: Corsam Technologies LLC
    Inventors: Bruce Gardiner Aitken, James Edward Dickinson, Jr., Timothy J. Kiczenski, Michelle Diane Pierson-Stull
  • Patent number: 10168587
    Abstract: A display device comprises a first light-transmissive substrate, a second light-transmissive substrate and a solar cell disposed between the first and second light-transmissive substrates. The solar cell includes a conductive wire grid pattern layer, which is disposed between the first and second light-transmissive substrates, a transparent electrode, which is disposed between the second light-transmissive substrate and the conductive wire grid pattern layer, and at least one photoactive layer, which is disposed between the transparent electrode and the conductive wire grid pattern layer. The second light-transmissive substrate is configured to output an image therethrough.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: January 1, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae Hyun Kim, Jae Woong Kang, Jong Hyuk Kang, Jae Byung Park, Joo Yeol Lee, Hyun Deok Im, Hyun Min Cho, Sung Jin Hong
  • Patent number: 10170656
    Abstract: The present disclosure provides a multijunction solar cell that includes: a first sequence of layers of semiconductor material forming a first set of one or more solar subcells; a graded interlayer adjacent to said first sequence of layers; a second sequence of layers of semiconductor material forming a second set of one or more solar subcells; and a high band gap contact layer adjacent said second sequence of layers, wherein the high band gap contact layer is composed of p++ type InGaAlAs or InGaAs.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: January 1, 2019
    Assignee: SolAero Technologies Corp.
    Inventors: Fred Newman, Benjamin Cho, Mark A. Stan, Paul Sharps
  • Patent number: 10166723
    Abstract: A method of edge sealing for a secondary lithium battery, including: (1) drawing a 3D model of a battery edge of a secondary lithium battery, and inputting it into a 3D printer; (2) positioning the secondary lithium battery in a 3D printing area, and fixing a relative position of the secondary lithium battery in the 3D printing area; (3) stimulating, by the 3D printer, the battery edge according to the 3D model and setting a printing path; (4) adding edge sealing glue in a printing head of the 3D printer, the printing head moves according to the set printing path and meantime performs at least one time of printing, so that printed edge sealing glue covers the battery edge; (5) solidifying the edge sealing glue. The method of edge sealing of this application has broader application, which can be applied to batteries of any shape.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: January 1, 2019
    Assignee: NINGDE AMPEREX TECHNOLOGY LIMITED
    Inventors: Yajie Zhang, Ping He, Liqing Lin, Jiali Dong
  • Patent number: 10170244
    Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low-purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: January 1, 2019
    Assignee: INTEL CORPORATION
    Inventors: Donald S. Gardner, Cary L. Pint, Charles W. Holzwarth, Wei Jin, Zhaohui Chen, Yang Liu, Eric C. Hannah, John L. Gustafson
  • Patent number: 10170719
    Abstract: A method for inorganic surface passivation in a photovoltaic device includes etching a native oxide over an inorganic substrate, the inorganic substrate having a surface; and forming an organic monolayer on the surface of the inorganic substrate to form a heterojunction, the organic monolayer having the following formula: ˜X—Y, wherein X is an oxygen or a sulfur; Y is an alkyl chain, an alkenyl chain, or an alkynyl chain; and X covalently bonds to the surface of the inorganic substrate by a covalent bond.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPROATION
    Inventors: Ali Afzali-Ardakani, Bahman Hekmatshoartabari, Davood Shahrjerdi
  • Patent number: 10170644
    Abstract: A photovoltaic device is provided that includes a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one lying on top of the other, wherein an upper exposed surface of the semiconductor substrate represents a front side surface of the semiconductor substrate. A plurality of patterned antireflective coatings is located on the front side surface to provide a grid pattern including a busbar region and finger regions. The busbar region includes at least a real line interposed between at least two dummy lines. A material stack including at least one metal layer located on the semiconductor substrate in the busbar region and the finger regions.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kathryn C. Fisher, Qiang Huang, Satyavolu S. Papa Rao, David L. Rath
  • Patent number: 10170720
    Abstract: A method for inorganic surface passivation in a photovoltaic device includes etching a native oxide over an inorganic substrate, the inorganic substrate having a surface; and forming an organic monolayer on the surface of the inorganic substrate to form a heterojunction, the organic monolayer having the following formula: ˜X—Y, wherein X is an oxygen or a sulfur; Y is an alkyl chain, an alkenyl chain, or an alkynyl chain; and X covalently bonds to the surface of the inorganic substrate by a covalent bond.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Afzali-Ardakani, Bahman Hekmatshoartabari, Davood Shahrjerdi
  • Patent number: 10164131
    Abstract: Multi-layer sputtered metal seed for solar cell conductive contacts and methods of forming solar cell conductive contacts are described. In an example, a solar cell includes a substrate. A semiconductor region is disposed in or above the substrate. A conductive contact is disposed on the semiconductor region and includes a seed material stack in contact with the semiconductor region. The seed material stack includes a first aluminum layer having a first crystallinity and disposed on the semiconductor layer, and a second aluminum layer having a second crystallinity and disposed on and having an interface with the first aluminum layer. The first crystallinity is different from the second crystallinity.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: December 25, 2018
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Michael Cudzinovic, Amjad Deyine, Robert Woehl
  • Patent number: 10164129
    Abstract: Discussed is a solar cell including a substrate having a first conductivity type; an emitter layer including a plurality of finger lines connected with an emitter layer; a plurality of rear finger lines connected with a back surface field, wherein the emitter layer includes first areas in contact with the plurality of front finger lines and second areas positioned between the plurality of front finger lines and having a lower doping concentration than that of the first areas, the back surface field includes areas in contact with the plurality of rear finger lines, and the number of the plurality of rear finger lines positioned on a rear surface of the substrate and the number of the plurality of front finger lines positioned on a front surface of the substrate are different.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: December 25, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Yoonsil Jin, Youngho Choe
  • Patent number: 10164299
    Abstract: A flexible sensor module, includes: a sensing unit formed on a first substrate so as to be exposed to the outside, and configured to measure external environment information; a solar cell disposed on the first substrate together with the sensing unit, and configured to generate a power by receiving light; a wireless communication unit disposed at one side on the first substrate, and configured to transmit the information measured by the sensing unit to an external server; and a chemical cell disposed at another side on the first substrate, charged by receiving the power from the solar cell, and configured to supply the power to the sensing unit and the wireless communication unit, wherein the solar cell includes: a compound layer disposed on the second substrate, and configured to generate the power to be supplied to the sensing unit by receiving light; and a metallic electrode formed on the compound layer.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: December 25, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Soohyun Kim, Wonki Yoon, Chaedeok Lee, Heonmin Lee
  • Patent number: 10157846
    Abstract: Structures and formation methods of a chip package are provided. The method includes disposing a semiconductor die over a carrier substrate and forming a protection layer over the carrier substrate to surround the semiconductor die. The method also includes forming a dielectric layer over the protection layer and the semiconductor die. The method further includes cutting an upper portion of the dielectric layer to improve flatness of the dielectric layer. In addition, the method includes forming a conductive layer over the dielectric layer after cutting the upper portion of the dielectric layer.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shing-Chao Chen, Chih-Wei Lin, Tsung-Hsien Chiang, Ming-Da Cheng, Ching-Hua Hsieh
  • Patent number: 10158032
    Abstract: In general, the present invention relates to electro-conductive pastes with halogen containing compounds as additives and solar cells with high Ohmic sheet resistance, preferably photovoltaic solar cells. More specifically, the present invention relates to solar cell precursors, processes for preparation of solar cells, solar cells and solar modules. The present invention relates to a solar cell precursor at least comprising as precursor parts: i) a wafer with sheet resistance of at least 80 Ohm/sq.; ii) an electro-conductive paste at least comprising: a) metallic particles; b) a glass frit; c) an organic vehicle; and d) a halogen containing compound applied to the wafer.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: December 18, 2018
    Assignee: HERAEUS DEUTSCHLAND GMBH & CO. KG
    Inventors: Gerd Schulz, Daniel Winfried Holzmann, Sebastian Unkelbach, Matthias Hörteis
  • Patent number: 10150873
    Abstract: Metals across all industries demand anti-corrosion surface treatments and drive a continual need for high-performing and low-cost coatings. Ordered thin films comprising aligned inorganic platelets dispersed in a polyelectrolyte polymer matrix provide a new class of transparent conformal barrier coatings for protection in corrosive atmospheres. For example, films assembled via layer-by-layer deposition, as thin as 90 nm, are shown to reduce copper corrosion rates by >1000× in an aggressive H2S atmosphere. These coatings can provide high-performing anti-corrosion treatment alternatives to costlier, more toxic, and less scalable thin films, such as graphene, hexavalent chromium, or atomic layer deposited metal oxides.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: December 11, 2018
    Assignees: National Technology & Engineering Solutions of Sandia, LLC, The Texas A&M University System
    Inventors: Eric John Schindelholz, Erik David Spoerke, Neil R. Sorensen, Jaime C. Grunlan
  • Patent number: 10147837
    Abstract: A monocrystal and polycrystal texturing method, includes: 1: placing a silicon wafer in an acid liquid, where the acid liquid reacts with the surface of the silicon wafer to conduct acid corrosion; 2: washing the silicon wafer after acid corrosion by water and then drying the silicon wafer; 3: uniformly spreading an alkali liquid on the silicon wafer, where the alkali liquid reacts with the surface of the silicon wafer to conduct alkali corrosion; 4: washing the silicon wafer after alkali corrosion by water; 5: placing the silicon wafer in alkali solution for alkali washing; 6: washing the silicon wafer by water; 7: washing the silicon wafer by acid solution; and 8: washing the silicon after acid washing by water and then drying the silicon wafer. Steps 1 to 8 are conducted during monocrystal texturing, and steps 1 to 2 and steps 5 to 8 are conducted during polycrystal texturing.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: December 4, 2018
    Assignee: CHANGZHOU S.C EXACT EQUIPMENT CO., LTD.
    Inventor: Guojun Zuo
  • Patent number: 10144523
    Abstract: An ice resistant structure is provided which includes a self-supporting, structural platform, a retaining, protective layer and a subsurface anti-icing (AI) and/or de-icing (DI) layer. The retaining, protective layer is disposed over the self-supporting, structural platform. The subsurface anti-icing (AI) and/or de-icing (DI) layer is located between the self-supporting, structural platform and the retaining, protective layer. The subsurface Al and/or DI layer is a functional layer such that an Al and/or DI agent is released to a surface of the retaining protective layer by an activation mechanism responsive to a change in an environmental condition.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: December 4, 2018
    Assignee: Sunlight Products Inc.
    Inventors: Allan James Bruce, Michael Cyrus, Sergey Frolov
  • Patent number: 10141418
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: November 27, 2018
    Assignee: STC.UNM
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 10141532
    Abstract: The present invention relates to curable barrier encapsulants or sealants for electronic devices that have pressure sensitive adhesive properties. The encapsulants are especially suitable for organic electronic devices that require lower laminating temperature profiles. The encapsulant protects active organic/polymeric components within an organic electronic device from environmental elements, such as moisture and oxygen.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: November 27, 2018
    Assignees: HENKEL IP & HOLDING GMBH, HENKEL AG & CO. KGAA
    Inventors: Yuxia Liu, Mark Konarski, Charles W. Paul, Peter D. Palasz
  • Patent number: 10141463
    Abstract: A photovoltaic device includes a support layer; a first layer comprising cadmium, tellurium and copper and being of n-type; a second layer comprising cadmium, tellurium and copper and being of p-type; and a transparent conductive oxide layer. A method for making a photovoltaic device includes providing a stack comprising a cadmium and tellurium comprising layer and a copper comprising layer on the cadmium and tellurium comprising layer; and thermally annealing the stack to form a first layer and a second layer each comprising cadmium, tellurium and copper, the first layer being of n-type, the second layer being of p-type.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: November 27, 2018
    Assignee: First Solar Malaysia SDN. BHD.
    Inventors: Bastiaan Arie Korevaar, Qunjian Huang, Yiteng Jin, Qianqian Xin
  • Patent number: 10141462
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: November 27, 2018
    Assignee: SunPower Corporation
    Inventors: David D. Smith, Ann Waldhauer, Venkatasubramani Balu, Kieran Mark Tracy
  • Patent number: 10134928
    Abstract: There is provided a photoelectric conversion element which includes an n-type single crystal silicon substrate (1). The n-type single crystal silicon substrate (1) includes a central region (11) and an end-portion region (12). The central region (11) is a region which has the same central point as the central point of the n-type single crystal silicon substrate (1) and is surrounded by a circle. The diameter of the circle is set to be a length which is 40% of a length of the shortest side among four sides of the n-type single crystal silicon substrate (1). The central region (11) has a thickness t1. The end-portion region (12) is a region of being within 5 mm from an edge of the n-type single crystal silicon substrate (1). The end-portion region (12) is disposed on an outside of the central region (11) in an in-plane direction of the n-type single crystal silicon substrate (1), and has a thickness t2 which is thinner than the thickness t1.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: November 20, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masatomi Harada, Takeshi Kamikawa, Kazuya Tsujino, Naoki Koide, Naoki Asano, Yuta Matsumoto
  • Patent number: 10134925
    Abstract: The present invention provides a thick-film paste composition for printing the front side of a solar cell device having one or more insulating layers. The thick-film paste comprises an electrically conductive metal and a dual-frit oxide composition dispersed in an organic medium.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: November 20, 2018
    Assignee: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: Kenneth Warren Hang, Kathryn Lynn Goetschius, Yusuke Tachibana, Paul Douglas Vernooy
  • Patent number: 10126587
    Abstract: A display device includes a light source which provide a first light, a color filter including a plurality of quantum dots which absorbs the first light and emits at least one of second light and third light that are different from the first light, a first optical filter layer disposed on the color filter, and a second optical filter layer disposed between the light source and the color filter. The first optical filter blocks at least a part of the first light, and the second optical filter transmits at least a part of the first light and reflects at least a part of the second light and the third light.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Deukseok Chung
  • Patent number: 10121917
    Abstract: A solar cell includes: a base substrate that has a principle surface; a first semiconductor layer provided in a first region on the principle surface; a second semiconductor layer provided in a second region on the principle surface; an n-side electrode provided on the first semiconductor layer; a p-side electrode provided on the second semiconductor layer; and grooves that separate the n-side electrode and the p-side electrode from each other. The respective widths of the grooves in a direction in which the n-side electrode and the p-side electrode are spaced apart are set to be wider in the outer peripheral region than in the inner region.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: November 6, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Naofumi Hayashi, Takahiro Mishima, Tsuyoshi Takahama, Tsutomu Yamaguchi
  • Patent number: 10115839
    Abstract: One embodiment of the present invention provides a solar module. The solar module includes a front-side cover, a back-side cover, and a plurality of solar cells situated between the front- and back-side covers. A respective solar cell includes a multi-layer semiconductor structure, a front-side electrode situated above the multi-layer semiconductor structure, and a back-side electrode situated below the multi-layer semiconductor structure. Each of the front-side and the back-side electrodes comprises a metal grid. A respective metal grid comprises a plurality of finger lines and a single busbar coupled to the finger lines. The single busbar is configured to collect current from the finger lines.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: October 30, 2018
    Assignee: Tesla, Inc.
    Inventors: Jiunn Benjamin Heng, Jianming Fu, Zheng Xu, Bobby Yang