Polycrystalline Or Amorphous Semiconductor Patents (Class 136/258)
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Patent number: 11795575Abstract: A method of performing HVPE heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and ternary-forming gasses (V/VI group precursor), to form a heteroepitaxial growth of a binary, ternary, and/or quaternary compound on the substrate; wherein the carrier gas is Hz, wherein the first precursor gas is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the ternary-forming gasses comprise at least two or more of AsH3 (arsine), PH3 (phosphine), H2Se (hydrogen selenide), HzTe (hydrogen telluride), SbH3 (hydrogen antimonide, or antimony tri-hydride, or stibine), H2S (hydrogen sulfide), NH3 (ammonia), and HF (hydrogen fluoride); flowing the carrier gas over the Group II/III element; exposing the substrate to the ternary-forming gasses in a predetermined ratio of first ternary-forming gas to second ternary-forming gas (1tf:2tf ratio); and changing the 1tf:2tf ratio over time.Type: GrantFiled: October 17, 2022Date of Patent: October 24, 2023Assignee: United States of America as represented by the Secretary of the Air ForceInventor: Vladimir Tassev
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Patent number: 11784263Abstract: The invention relates to a method for improving the ohmic-contact behaviour between a contact grid and an emitter layer of a silicon solar cell. The object of the invention is to propose a method for improving the ohmic-contact behaviour between a contact grid and an emitter layer of a silicon solar cell, in which the effects on materials caused by irradiation of the sun-facing side are further minimized. In addition, the method should also be applicable to silicon solar cells in which the emitter layer has a high sheet resistance.Type: GrantFiled: September 20, 2022Date of Patent: October 10, 2023Assignee: CE CELL ENGINEERING GMBHInventor: Hongming Zhao
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Patent number: 11777045Abstract: A back contact structure includes: a silicon substrate including a back surface including a plurality of recesses disposed at intervals; a first dielectric layer disposed on the back surface of the silicon substrate; a plurality of first doped regions disposed on the first dielectric layer and disposed inside the plurality of recesses; a plurality of second doped regions disposed on the first dielectric layer and disposed outside the plurality of recesses; a second dielectric layer disposed between the first doped regions and the second doped regions; and a conductive layer disposed on the first plurality of doped regions and the plurality of second doped regions.Type: GrantFiled: December 3, 2021Date of Patent: October 3, 2023Assignee: SOLARLAB AIKO EUROPE GMBHInventors: Kaifu Qiu, Yongqian Wang, Xinqiang Yang, Gang Chen
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Patent number: 11770940Abstract: In an imaging element 28, a first light detecting layer 12 includes an organic photoelectric conversion film 38 that detects light of a predetermined wavelength band and carries out photoelectric conversion, and photoelectrically converts incident light on the imaging element and light reflected from a wire grid polarizer layer 14. The wire grid polarizer layer 14 includes polarizers 48 in which linear materials that do not allow transmission of light therethrough are arranged at intervals shorter than the wavelength of the incident light. A second light detecting layer 16 includes photoelectric conversion elements 54 that photoelectrically convert light transmitted through the polarizers 48.Type: GrantFiled: June 24, 2016Date of Patent: September 26, 2023Assignee: SONY INTERACTIVE ENTERTAINMENT INC.Inventors: Hiroyuki Segawa, Hidehiko Ogasawara
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Patent number: 11764316Abstract: A back contact structure includes: a silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately on the back surface of the silicon substrate; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions. One of the plurality of first conductive regions and the plurality of second conductive regions is disposed inside the plurality of recesses, respectively, and the other one is disposed outside the plurality of recesses; each first conductive region includes a first dielectric layer and a first doped region which are disposed successively, and each second conductive region includes a second doped region.Type: GrantFiled: December 2, 2021Date of Patent: September 19, 2023Assignee: SOLARLAB AIKO EUROPE GMBHInventors: Kaifu Qiu, Yongqian Wang, Xinqiang Yang, Gang Chen
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Patent number: 11749768Abstract: A solar cell, a method for producing a solar cell, and a solar module are provided. The solar cell includes: an N-type substrate and a P-type emitter formed on a front surface of the substrate; a first passivation layer, a second passivation layer and a third passivation layer sequentially formed over the front surface of the substrate and in a direction away from the P-type emitter, and a passivated contact structure disposed on a rear surface of the substrate. The first passivation layer includes a first Silicon oxynitride (SiOxNy) material, where x>y. The second passivation layer includes a first silicon nitride (SimNn) material, where m>n. The third passivation layer includes a second silicon oxynitride (SiOiNj) material, where a ratio of i/j?[0.97, 7.58].Type: GrantFiled: November 10, 2022Date of Patent: September 5, 2023Assignees: ZHEJIANG JINKO SOLAR CO., LTD., JINKO SOLAR CO., LTD.Inventors: Wenqi Li, Jie Yang, Xinyu Zhang, Hao Jin
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Patent number: 11742442Abstract: The present disclosure is directed to a method of processing a solar cell device. The method comprises detecting at least one inconsistency at a surface of a semiconductor substrate having a solar cell active region formed therein. A deposition pattern is determined based on the location of the at least one inconsistency. A material is selectively deposited on the substrate according to the deposition pattern.Type: GrantFiled: January 12, 2022Date of Patent: August 29, 2023Assignee: THE BOEING COMPANYInventor: Eric Rehder
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Patent number: 11728455Abstract: A method of producing photovoltaic cells with the ?-tandem architecture based on crystalline silicon substrates and quantum dots, ensuring both effective and stable operation of the entire tandem system as well as high absorption in the spectral range from UV to MIR and operation in scattered and incident light conditions at different angles, acting as an anti-reflective layer. A further purpose of the invention is to develop a new structure of a ?-tandem photovoltaic cell based on microcrystalline silicon (Si) layers and a layer of nanometric semiconductor structures with a core-shell architecture such that the resulting structures work as a tandem cell with the characteristics of micro-cells, connected together in its lower part.Type: GrantFiled: October 26, 2021Date of Patent: August 15, 2023Assignee: ML System Spolka AkcyjnaInventor: Pawel Kwasnicki
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Patent number: 11728449Abstract: Embodiments of the present disclosure relate to photovoltaic devices, CIGS containing films, and methods of manufacturing CIGS containing films and photovoltaic devices to improve quantum efficiency, reduce interface charges, electron losses, and electron re-combinations. The CIGS layers in the photovoltaic devices described herein may be deposited using physical vapor deposition, followed by in-situ oxygen annealing, and further followed by deposition of a cap layer over the CIGS layer without subjecting the CIGS layer to an air break.Type: GrantFiled: December 3, 2019Date of Patent: August 15, 2023Assignee: Applied Materials, Inc.Inventors: Philip Hsin-hua Li, Seshadri Ramaswami
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Patent number: 11721623Abstract: A semiconductor nanostructure and an epitaxial semiconductor material portion are formed on a front surface of a substrate, and a planarization dielectric layer is formed thereabove. A first recess cavity is formed over a gate electrode, and a second recess cavity is formed over the epitaxial semiconductor material portion. The second recess cavity is vertically recessed to form a connector via cavity. A metallic cap structure is formed on the gate electrode in the first recess cavity, and a connector via structure is formed in the connector via cavity. Front-side metal interconnect structures are formed on the connector via structure and the metallic cap structure, and a backside via structure is formed through the substrate on the connector via structure.Type: GrantFiled: February 21, 2022Date of Patent: August 8, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Li-Zhen Yu, Chia-Hao Chang, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
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Patent number: 11695085Abstract: A photovoltaic cell can include a nitrogen-containing metal layer in contact with a semiconductor layer.Type: GrantFiled: January 11, 2019Date of Patent: July 4, 2023Assignee: First Solar, Inc.Inventors: Upali Jayamaha, Michael T. Steele, Syed Zafar
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Patent number: 11695084Abstract: An antenna electrode including a first electrode that includes a core and a first conductive surface; a second electrode that includes a second conductive surface; and an electrical tunnel junction between the first conductive surface and the second conductive surface, the tunnel junction having a gap width greater than about 0.1 nm and less than about 10 nm.Type: GrantFiled: March 12, 2021Date of Patent: July 4, 2023Assignee: University of ConnecticutInventor: Brian G. Willis
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Patent number: 11670729Abstract: A solar cell apparatus 100 and a method for forming said solar cell apparatus 100, comprising a substrate 101, a n-type transparent conductive oxide (TCO) layer 102 deposited atop said substrate 101, a p-i-n structure 200 that includes a p-type layer 103, an i-type layer 104, a n-type layer 105, a metal back layer 106 deposited atop said n-type layer 105 of the p-i-n structure 200. The n-type layer 105 comprises n-type donors 115 including phosphorus atoms. The n-type donors 115 include oxygen atoms at an atomic concentration comprised between 5% and 25% of the overall atomic composition of the n-type layer 105.Type: GrantFiled: January 17, 2018Date of Patent: June 6, 2023Assignee: Sun S.R.L.Inventors: Anna Battaglia, Cosimo Gerardi, Giuseppe Condorelli, Andrea Canino
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Patent number: 11670726Abstract: A method of generating electricity from light, that uses a photovoltaic array, that includes a junction between an inorganic electron-donating layer and an inorganic electron-accepting layer. The electron-donating layer includes moieties which after photon activation have unpaired electrons, and wherein some of the electrons are freed when light strikes the electron-donating layer, thereby transforming the moieties into free radicals or equivalents but many of the freed electrons recombine. Also, many of the free radicals or equivalents in the triplet state are optimally responsive to a selective magnetic field that has been determined to optimally increase the lifetime of the triplet state of the free radicals and thereby forestall recombination of the freed electrons into the free radicals. A magnetic field of substantially the optimal strength that is substantially unvarying over the electron donating layer is created as the array is being exposed to light.Type: GrantFiled: August 18, 2016Date of Patent: June 6, 2023Inventor: Robert E. Sandstrom
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Patent number: 11652114Abstract: A CMOS sensor includes a silicon material having a surface periodic structure of silicon portions and non-silicon portions, formed by multiple supercells repeated in a 2-dimensional lattice pattern. Each image pixel of the sensor has at least 2×2 supercells. The lattice constants in both lateral directions are within a range defined by a wavelength of the light to be sensed. Within each supercell, the non-silicon portions create an effective refractive index for the light that changes gradually with depth. The non-silicon portions within the supercell have lateral feature sizes smaller the wavelength of the light to be sensed, and vertical feature sizes larger than the wavelength of the light to be sensed. In some examples, each supercell includes at least two inverted pyramids having different base sizes and/or different heights. A dielectric material fills the non-silicon portions of the periodic structure and covers the silicon material.Type: GrantFiled: December 10, 2020Date of Patent: May 16, 2023Assignee: Coherent AI (Hong Kong) LimitedInventor: Xingze Wang
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Patent number: 11631777Abstract: Thin-film solar cell modules and serial cell-to-cell interconnect structures and methods of fabrication are described. In an embodiment, a solar cell interconnect includes a bypass diode between adjacent solar cells to allow the flow of current around a single solar cell.Type: GrantFiled: March 11, 2019Date of Patent: April 18, 2023Assignee: Swift Solar Inc.Inventor: Kevin Alexander Bush
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Patent number: 11605749Abstract: A backside emitter solar cell structure having a heterojunction, and a method and a device for producing the same. A backside intrinsic layer is first formed on the back side of the substrate, then a frontside intrinsic layer and a frontside doping layer are formed on the front side of the substrate, and finally a backside doping layer is formed on the back side of the substrate.Type: GrantFiled: July 31, 2020Date of Patent: March 14, 2023Assignee: Meyer Burger (Germany) GmbHInventors: Jun Zhao, Marcel Koenig
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Patent number: 11605748Abstract: A solar cell, a method for producing a solar cell, and a solar module are provided. The solar cell includes: an N-type substrate and a P-type emitter formed on a front surface of the substrate; a first passivation layer, a second passivation layer and a third passivation layer sequentially formed over the front surface of the substrate and in a direction away from the P-type emitter, and a passivated contact structure disposed on a rear surface of the substrate. The first passivation layer includes a first Silicon oxynitride (SiOxNy) material, where x>y. The second passivation layer includes a first silicon nitride (SimNn) material, where m>n. The third passivation layer includes a second silicon oxynitride (SiOiNj) material, where a ratio of i/j?[0.97, 7.58].Type: GrantFiled: March 16, 2021Date of Patent: March 14, 2023Assignees: ZHEJIANG JINKO SOLAR CO., LTD., JINKO SOLAR CO., LTD.Inventors: Wenqi Li, Jie Yang, Xinyu Zhang, Hao Jin
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Patent number: 11594694Abstract: The invention relates to an optoelectronic and/or photoelectrochemical device including a conductive support layer, n-type semiconductor, a sensitizer or light-absorber layer, a hole transporting layer, a spacer layer and a back contact, wherein the n-type semiconductor is in contact with the sensitizer or light-absorber layer, the sensitizer or light-absorber layer includes a perovskite or metal halide perovskite material, the hole transporting layer is in direct contact with the sensitizer or light-absorber layer and includes an inorganic hole transporting material or inorganic p-type semiconductor, the spacer layer is between the hole transporting layer and the back contact and includes a material being different from the inorganic hole transporting material and the material of the back contact.Type: GrantFiled: May 3, 2018Date of Patent: February 28, 2023Assignee: Ecole Polytechnique Federale de Lausanne (EPFL)Inventors: Neha Arora, Mohammad Ibrahim Dar, Shaik Mohammed Zakeeruddin, Michael Graetzel
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Patent number: 11575058Abstract: In a solar power generator, a plurality of first solar cell strings (51) are formed in a way that, in each first solar cell string (51), two or more first solar cells (41) are connected in series and disposed in descending order of potential, with an end narrower in width facing one end (E1) in a first direction (D1), from another end (E2) in the first direction (D1). A plurality of second solar cell strings (52) are formed in a way that, in each second solar cell string (52), two or more second solar cells (42) are connected in series and disposed in descending order of potential, with an end wider in width facing the one end (E1) in the first direction (D1), from the another end (E2) in the first direction (D1). Each of the plurality of first solar cell strings (51) and each of the plurality of second solar cell strings (52) are aligned alternately along the second direction (D2) that is orthogonal to the first direction (D1).Type: GrantFiled: June 30, 2017Date of Patent: February 7, 2023Assignee: Mitsubishi Electric CorporationInventor: Akira Inoue
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Patent number: 11562902Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by less than or about 3% hydrogen incorporation.Type: GrantFiled: July 19, 2020Date of Patent: January 24, 2023Assignee: Applied Materials, Inc.Inventors: Rui Cheng, Diwakar Kedlaya, Karthik Janakiraman, Gautam K. Hemani, Krishna Nittala, Alicia J. Lustgraaf, Zubin Huang, Brett Spaulding, Shashank Sharma, Kelvin Chan
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Patent number: 11563170Abstract: A laminated seed layer stack with a smooth top surface having a peak to peak roughness of 0.5 nm is formed by sequentially sputter depositing a first seed layer, a first amorphous layer, a second seed layer, and a second amorphous layer where each seed layer may be Mg and has a resputtering rate 2 to 30X that of the amorphous layers that are TaN, SiN, or a CoFeM alloy. A template layer that is NiCr or NiFeCr is formed on the second amorphous layer. As a result, perpendicular magnetic anisotropy in an overlying magnetic layer that is a reference layer, free layer, or dipole layer is substantially maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The laminated seed layer stack may include a bottommost Ta or TaN buffer layer.Type: GrantFiled: December 27, 2019Date of Patent: January 24, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jian Zhu, Guenole Jan, Yuan-Jen Lee, Huanlong Liu, Ru-Ying Tong, Po-Kang Wang
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Patent number: 11563134Abstract: Systems and methods of three-terminal tandem solar cells are described. Three-terminal metal electrodes can be formed to contact subcells of the tandem solar cell. The three-terminal tandem cell can improve the device efficiency to at least 30%.Type: GrantFiled: July 19, 2021Date of Patent: January 24, 2023Assignee: California Institute of TechnologyInventors: Harry A. Atwater, Phillip R. Jahelka
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Patent number: 11557687Abstract: A solar cell device includes a light-transmissive substrate, a solar cell module, an optical composite film assembly, and a light-transmissive top plate. The solar cell module is disposed on the light-transmissive substrate and includes a solar cell unit. The optical composite film assembly is light-transmissive, and includes a light diffusion layer and a fiber layer. The optical composite film assembly and the solar cell module are disposed on each other. The light-transmissive top plate is disposed spaced apart from the light-transmissive substrate and cooperates with the light-transmissive substrate to sandwich the solar cell module and the optical composite film assembly.Type: GrantFiled: July 21, 2020Date of Patent: January 17, 2023Assignee: SOUTHERN TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Ruei-Tang Chen, Fong-Lang Wu
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Patent number: 11545590Abstract: A solar cell, a method for producing a solar cell, and a solar module are provided. The solar cell includes: an N-type substrate and a P-type emitter formed on a front surface of the substrate; a first passivation layer, a second passivation layer and a third passivation layer sequentially formed over the front surface of the substrate and in a direction away from the P-type emitter, and a passivated contact structure disposed on a rear surface of the substrate. The first passivation layer includes a first Silicon oxynitride (SiOxNy) material, where x>y. The second passivation layer includes a first silicon nitride (SimNn) material, where m>n. The third passivation layer includes a second silicon oxynitride (SiOiNj) material, where a ratio of i/j?[0.97, 7.58].Type: GrantFiled: March 16, 2021Date of Patent: January 3, 2023Assignees: ZHEJIANG JINKO SOLAR CO., LTD., JINKO SOLAR CO., LTD.Inventors: Wenqi Li, Jie Yang, Xinyu Zhang, Hao Jin
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Patent number: 11505866Abstract: According to one embodiment, film formation apparatus includes: a carrying unit that includes a rotation table which circulates and carries a workpiece; a film formation process unit which includes a target formed of a silicon material, and a plasma producer that produces plasma of a sputter gas introduced between the target and the rotation table, and which forms a silicon film on the workpiece by sputtering; and a hydrogenation process unit which includes a process gas introducing unit that introduces a process gas containing a hydrogen gas, and a plasma producer that produces plasma of the process gas, and which performs hydrogenation on the silicon film formed on the workpiece. The carrying unit carries the workpiece so as to alternately pass through the film formation process unit and through the hydrogenation process unit.Type: GrantFiled: April 23, 2020Date of Patent: November 22, 2022Inventors: Daisuke Ono, Akihiko Ito
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Patent number: 11495452Abstract: A method for preparing a silicon nitride film with a high deposition rate and a reduced damage to the substrate and/or the underlying layer formed under the silicon nitride film. The method for preparing a silicon nitride film contains the steps of irradiating a nitride with an ultraviolet light, and contacting the nitride irradiated with the ultraviolet light and a hydrogenated cyclic silane represented by a general formula SinH2n, wherein n is 5, 6, or 7.Type: GrantFiled: March 3, 2020Date of Patent: November 8, 2022Assignees: TOHKU UNIVERSITY, NIPPON SHOKUBAI CO., LTD.Inventors: Akinobu Teramoto, Yoshinobu Shiba, Takashi Abe, Akira Nishimura
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Patent number: 11482672Abstract: A solid junction-type photoelectric conversion element (10) including a first conductive layer (2), an electric power generation layer (4), and a second conductive layer (6), which are laminated in this order, wherein the electric power generation layer (4) comprises: a perovskite compound represented by a composition formula ABX3, formed of an organic cation A, a metal cation B and a halide anion X, and a compound Z having no perovskite structure.Type: GrantFiled: August 2, 2017Date of Patent: October 25, 2022Assignee: SEKISUI CHEMICAL CO., LTD.Inventors: Naohiro Fujinuma, Junichiro Anzai, Sachiko Satou
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Patent number: 11482630Abstract: The invention relates to a method for improving the ohmic-contact behaviour between a contact grid and an emitter layer of a silicon solar cell. The object of the invention is to propose a method for improving the ohmic-contact behaviour between a contact grid and an emitter layer of a silicon solar cell, in which the effects on materials caused by irradiation of the sun-facing side are further minimized. In addition, the method should also be applicable to silicon solar cells in which the emitter layer has a high sheet resistance.Type: GrantFiled: February 5, 2019Date of Patent: October 25, 2022Assignee: CE CELL ENGINEERING GMBHInventor: Hongming Zhao
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Patent number: 11450775Abstract: The present disclosure provides a solar cell and a method for producing same. The solar cell includes: a substrate; a first passivation film, an anti-reflection layer and at least one first electrode formed on a front surface of the substrate; and a tunneling layer, a field passivation layer and at least one second electrode formed on a rear surface. The field passivation layer includes a first field passivation sub-layer and a second field passivation sub-layer; a conductivity of the first field passivation sub-layer is greater than a conductivity of the second field passivation sub-layer, and a thickness of the second field passivation sub-layer is smaller than a thickness of the first field passivation sub-layer; either the at least one first electrode or the at least one second electrode includes a silver electrode, a conductive adhesive and an electrode film that are sequentially formed in a direction away from the substrate.Type: GrantFiled: December 23, 2020Date of Patent: September 20, 2022Assignees: Jinko Green Energy (Shanghai) Management Co., LTD., ZHEJIANG JINKO SOLAR CO., LTD.Inventors: Jingsheng Jin, Xinyu Zhang
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Patent number: 11437535Abstract: A voltage-matched solar module for converting incident solar radiation into electricity consisting of a plurality of wafer-sized multi-junction solar devices and wiring circuitry adjacent to a module-sized bottom substrate. Each solar device has at least two photovoltaic (PV) cells separated by electrically insulating transparent layers. The PV cells are aligned so as to overlap and are electrically connected to the wiring circuitry by conducting vias. The wiring circuitry includes a multiplicity of serial strings electrically connected in parallel and having substantially the same voltage. A method of producing the solar module is disclosed which utilizes an ALD/LPCVD tool for van der Waals epitaxy of 2D materials.Type: GrantFiled: January 23, 2019Date of Patent: September 6, 2022Inventor: Moshe Einav
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Patent number: 11431280Abstract: One embodiment can provide a photovoltaic roof tile. The photovoltaic roof tile can include a transparent front cover, a transparent back cover, and a plurality of polycrystalline-Si-based photovoltaic structures positioned between the front cover and the back cover. A respective polycrystalline-Si-based photovoltaic structure has a front surface facing the front cover and a back surface facing the back cover. The photovoltaic roof tile can further include a paint layer positioned on a back surface of the back cover facing away from the front cover. A color of the paint layer substantially matches a color of the front surface of the respective polycrystalline-Si-based photovoltaic structure.Type: GrantFiled: August 6, 2019Date of Patent: August 30, 2022Assignee: Tesla, Inc.Inventors: John Liu, Yangsen Kang, Anh N. Duong, Yongkee Chae, Milan Padilla, Chen Wang, Remy D. Labesque
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Patent number: 11398567Abstract: In a method of manufacturing a negative capacitance structure, a ferroelectric dielectric layer is formed over a first conductive layer disposed over a substrate, and a second conductive layer is formed over the ferroelectric dielectric layer. The ferroelectric dielectric layer includes an amorphous layer and crystals.Type: GrantFiled: September 27, 2019Date of Patent: July 26, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wilman Tsai, Ling-Yen Yeh
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Patent number: 11393996Abstract: The present application relates to an organic electronic device comprising a first electrode; a second electrode provided opposite to the first electrode; a photoactive layer provided between the first electrode and the second electrode; and an electron transfer layer provided between the photoactive layer and the first electrode, wherein the electron transfer layer comprises a zinc oxide (ZnO) nanoparticle having one or more amine groups bonding to a surface thereof, and a method for manufacturing the same.Type: GrantFiled: August 24, 2018Date of Patent: July 19, 2022Assignee: LG CHEM, LTD.Inventors: Younshin Kim, Songrim Jang, Doowhan Choi, Jung Ha Park, Seung Jun Yoo
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Patent number: 11335893Abstract: A manufacturing method of OLED microcavity structure is provided. The manufacturing method includes: forming a reflective anode on a substrate; forming a transparent conductive film layer having a thickness corresponding to a required pixel on the reflective anode; patterning the transparent conductive film layer and the reflective anode with a pixel mask corresponding to the required pixel to form a pattern of the required pixel; and repeating the above steps on a resultant structure surface according to display requirements until a pixel display structure required by a display device is obtained.Type: GrantFiled: December 19, 2019Date of Patent: May 17, 2022Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ying Han, Wei Liu, Jianye Zhang, Fengjuan Liu, Xing Zhang
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Patent number: 11328876Abstract: A light-absorbing material contains a compound represented by the composition formula HC(NH2)2SnI3 and having a perovskite structure. A solid-state 1H-NMR spectrum, which is obtained by 1H-14N HMQC measurement in two-dimensional NMR at 25° C., of the compound includes a first peak at 6.9 ppm and a second peak at 7.0 ppm. A peak intensity of the first peak is equal to 80% or more of a peak intensity of the second peak.Type: GrantFiled: July 14, 2018Date of Patent: May 10, 2022Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Takeyuki Sekimoto, Michio Suzuka, Tomoyasu Yokoyama, Yoshiko Miyamoto, Taisuke Matsui
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Patent number: 11309441Abstract: Discussed is a solar cell including a semiconductor substrate, a first tunneling layer entirely formed over a surface of the semiconductor substrate, a first conductive type area disposed on the surface of the semiconductor substrate, and an electrode including a first electrode connected to the first conductive type area.Type: GrantFiled: April 2, 2014Date of Patent: April 19, 2022Assignee: LG ELECTRONICS INC.Inventors: Jaewon Chang, Kyungjin Shim, Hyunjung Park, Junghoon Choi
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Patent number: 11289327Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).Type: GrantFiled: September 18, 2019Date of Patent: March 29, 2022Assignee: ASM IP Holding B.V.Inventors: Antti J. Niskanen, Shang Chen, Viljami Pore
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Patent number: 11257975Abstract: A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.Type: GrantFiled: October 23, 2018Date of Patent: February 22, 2022Assignee: STMICROELECTRONICS S.R.L.Inventors: Cosimo Gerardi, Cristina Tringali, Sebastiano Ravesi, Marina Foti, NoemiGraziana Sparta', Corrado Accardi, Stella Loverso
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Patent number: 11257758Abstract: A semiconductor nanostructure and an epitaxial semiconductor material portion are formed on a front surface of a substrate, and a planarization dielectric layer is formed thereabove. A first recess cavity is formed over a gate electrode, and a second recess cavity is formed over the epitaxial semiconductor material portion. The second recess cavity is vertically recessed to form a connector via cavity. A metallic cap structure is formed on the gate electrode in the first recess cavity, and a connector via structure is formed in the connector via cavity. Front-side metal interconnect structures are formed on the connector via structure and the metallic cap structure, and a backside via structure is formed through the substrate on the connector via structure.Type: GrantFiled: June 24, 2020Date of Patent: February 22, 2022Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Li-Zhen Yu, Chia-Hao Chang, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
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Patent number: 11257978Abstract: A photovoltaic device and a method of forming a contact stack of the photovoltaic device are disclosed. The photovoltaic device may include a first layer deposited on a semiconductor layer including a compound semiconductor material. The photovoltaic device may also include a dopant layer comprising tin (Sn) deposited on the first layer. The photovoltaic device may further include a conductive layer deposited or provided over the dopant layer to form a contact stack with the first layer and the dopant layer.Type: GrantFiled: March 29, 2019Date of Patent: February 22, 2022Assignee: UTICA LEASECO, LLCInventors: Abraham Saldivar-Valdes, Octavi Santiago Escala Semonin
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Patent number: 11257974Abstract: The present invention relates to a solar cell comprising a heterojunction photoelectric device comprising, a front electrode layer, a back electrode layer comprising a metallic contact layer, a light-absorbing silicon layer arranged between said front electrode and said back electrode layers and a doped silicon-based layer arranged between said light-absorbing silicon layer and said back electrode layer, characterized in that said heterojunction photoelectric device further comprises a wide band gap material layer having an electronic band gap greater than 1.4 eV, said wide band gap material layer being applied on a surface of the light-absorbing silicon layer between said light-absorbing silicon layer and said doped silicon-based layer. The present heterojunction layer or stack of layers is compatible with thermal annealing and firing processes at T above 600° C.Type: GrantFiled: November 13, 2017Date of Patent: February 22, 2022Assignee: ECOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE (EPFL)Inventors: Philipp Löper, Andrea Ingenito, Christophe Ballif, Gizem Nogay
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Patent number: 11233162Abstract: The present disclosure is directed to a method of processing a solar cell device. The method comprises detecting at least one inconsistency at a surface of a semiconductor substrate having a solar cell active region formed therein. A deposition pattern is determined based on the location of the at least one inconsistency. A material is selectively deposited on the substrate according to the deposition pattern.Type: GrantFiled: March 31, 2017Date of Patent: January 25, 2022Assignee: The Boeing CompanyInventor: Eric Rehder
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Patent number: 11232914Abstract: A photovoltaic device, comprises (1) a first conductive layer, (2) an optional blocking layer, on the first conductive layer, (3) a semiconductor layer, on the first conductive layer, (4) n light-harvesting material, on the semiconductor layer, (5) a hole transport material, on the light-harvesting material, and (6) a second conductive layer, on the hole transport material. The light harvesting material comprises, a pervoskite absorber, and the second conductive layer comprises nickel. The semiconductor layer tray comprise TiO2 nanowires. The light-harvesting material may comprise a pervoskite absorber containing a psuedohalogen.Type: GrantFiled: January 31, 2020Date of Patent: January 25, 2022Assignee: Board of Trustees of Northern Illinois UniversityInventor: Tao Xu
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Patent number: 11211537Abstract: Various embodiments of light emitting devices, assemblies, and methods of manufacturing are described herein. In one embodiment, a method for manufacturing a lighting emitting device includes forming a light emitting structure, and depositing a barrier material, a mirror material, and a bonding material on the light emitting structure in series. The bonding material contains nickel (Ni). The method also includes placing the light emitting structure onto a silicon substrate with the bonding material in contact with the silicon substrate and annealing the light emitting structure and the silicon substrate. As a result, a nickel silicide (NiSi) material is formed at an interface between the silicon substrate and the bonding material to mechanically couple the light emitting structure to the silicon substrate.Type: GrantFiled: April 30, 2020Date of Patent: December 28, 2021Assignee: Micron Technology, Inc.Inventor: Michael J. Bernhardt
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Patent number: 11201257Abstract: According to the embodiments provided herein, a method for doping an absorber layer can include contacting the absorber layer with an annealing compound. The annealing compound can include cadmium chloride and a group V salt comprising an anion and a cation. The anion, the cation, or both can include a group V element. The method can include annealing the absorber layer, whereby the absorber layer is doped with at least a portion of the group V element of the annealing compound.Type: GrantFiled: January 14, 2019Date of Patent: December 14, 2021Assignee: First Solar, Inc.Inventors: Sachit Grover, Dingyuan Lu, Roger Malik, Gang Xiong
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Patent number: 11189739Abstract: The present disclosure provide a solar cell, including: a substrate, an interface passivation layer covering a rear surface of the substrate, and an electrode disposed at a side of the interface passivation layer facing away from the substrate, the interface passivation layer including a first interface passivation sub-layer corresponding to a portion of the interface passivation layer between adjacent electrodes, and a second interface passivation sub-layer corresponding to a portion of the interface passivation layer where disposed between the substrate and the electrode; a field passivation layer, at least partially disposed between the interface passivation layer and the electrode; and a conductive enhancement layer, at least partially disposed at a side of the first interface passivation sub-layer away from the substrate to enable carriers in the first interface passivation sub-layer to flow to the electrode, where a resistivity of the conductive enhancement layer is smaller than a resistivity of the fieType: GrantFiled: December 4, 2020Date of Patent: November 30, 2021Assignees: Jinko Green Energy (Shanghai) Management Co., LTD., ZHEJIANG JINKO SOLAR CO., LTD.Inventors: Jingsheng Jin, Bike Zhang, Xinyu Zhang
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Patent number: 11180855Abstract: The present invention relates to a semiconductor manufacturing component for manufacturing a semiconductor device by using a substrate such as a wafer in a dry etching process, and a manufacturing method thereof. The semiconductor manufacturing component comprising a deposition layer covering an interlayer boundary according to the present invention comprises: a base material containing carbon; a first deposition layer formed on the base material; a second deposition layer formed on the first deposition layer; and a third deposition layer formed on the first deposition layer and the second deposition layer, and formed to cover at least one portion of a boundary line between the first deposition layer and the second deposition layer.Type: GrantFiled: December 18, 2017Date of Patent: November 23, 2021Assignee: TOKAI CARBON KOREA CO., LTD.Inventor: Sang Chul Lee
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Patent number: 11180660Abstract: Photovoltaic devices such as solar cells, hybrid solar cell-batteries, and other such devices may include an active layer disposed between two electrodes. The active layer may have perovskite material and other material such as mesoporous material, interfacial layers, thin-coat interfacial layers, and combinations thereof. The perovskite material may be photoactive. The perovskite material may be disposed between two or more other materials in the photovoltaic device. Inclusion of these materials in various arrangements within an active layer of a photovoltaic device may improve device performance. Other materials may be included to further improve device performance, such as, for example: additional perovskites, and additional interfacial layers.Type: GrantFiled: June 10, 2019Date of Patent: November 23, 2021Assignee: CUBIC PEROVSKITE LLCInventors: Michael D. Irwin, Jerred A. Chute, Vivek V. Dhas, Kamil Mielczarek
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Patent number: 11177405Abstract: A thin film solar cell including a substrate, an insulating layer, a first electrode layer, a photovoltaic conversion layer and a second electrode layer is provided. The insulating layer is disposed on the substrate and includes a plurality of microstructures. An orthographic projection of the plurality of microstructures is a regular geometric shape or an irregular geometric shape regarding to a normal direction of the substrate. The first electrode layer is disposed on the insulating layer. A thickness of the first electrode layer is less than 1 ?m or is equal to 1 ?m. The photovoltaic conversion layer is disposed on the first electrode layer. The second electrode layer is disposed on the photovoltaic conversion layer.Type: GrantFiled: December 5, 2019Date of Patent: November 16, 2021Assignee: GIANTPLUS TECHNOLOGY CO., LTDInventor: Che-Yao Wu