Polycrystalline Or Amorphous Semiconductor Patents (Class 136/258)
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Patent number: 9705019Abstract: Disclosed are a solar cell module and a method of fabricating the same. The solar cell module includes a back electrode layer disposed on a support substrate and having a first separation pattern, a light absorbing layer disposed on the back electrode layer and having a second separation pattern, and a plurality of solar cells disposed on the light absorbing layer and formed with a front electrode layer including an insulator.Type: GrantFiled: November 30, 2012Date of Patent: July 11, 2017Assignee: LG INNOTEK CO., LTD.Inventor: Suk Jae Jee
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Patent number: 9680047Abstract: One embodiment of the present invention relates to a method of manufacturing polycrystalline silicon thin-film solar cell by a method of crystallizing a large-area amorphous silicon thin film using a linear electron beam, and the technical problem to be solved is to crystallize an amorphous silicon thin film, which is formed on a low-priced substrate, by means of an electron beam so as for same to easily be of high quality by having high crystallization yield and to be processed at a low temperature.Type: GrantFiled: December 18, 2012Date of Patent: June 13, 2017Assignee: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGYInventors: Chae Hwan Jeong, Sun Hwa Lee, Sang Ryu, Ho Sung Kim, Seong Jae Boo
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Patent number: 9655982Abstract: The present invention provides a method of forming an oxidatively-stable aqueous Eu(II) complex by synthesizing ligands that coordinate to large, soft, electron rich metals like Eu(II). The invention also provides an oxidatively stable aqueous Eu(II) complex. The complex can be used for a variety of purposes some of which include, but are not limited to, in paramagnetic chemical exchange saturation transfer, as a medical diagnostic, as a semiconductor, and for use in forming materials.Type: GrantFiled: January 19, 2011Date of Patent: May 23, 2017Assignee: Wayne State UniversityInventors: Matthew J. Allen, Nipuni Dhanesha H. Gamage, Joel Garcia, Jeremiah Moore
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Patent number: 9647163Abstract: The present invention relates to a solar cell having nanostructures on both surfaces of a transparent substrate, and to a method for manufacturing same. The nano-structures, which face each other with respect to the substrate and which transport electrons, are formed using zinc-oxide nanowires. Also, a hole-transport layer using CIS nanoparticles is formed in order to absorb light having a short wavelength and to transport generated holes. A hole-transport layer including CIGS nanoparticles for absorbing light having a relatively long wavelength is formed on the side facing the hole-transport layer including the CIS nanoparticles.Type: GrantFiled: February 17, 2012Date of Patent: May 9, 2017Assignee: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITYInventors: Tae Whan Kim, Qifeng Han, Jae Hun Jung
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Patent number: 9640439Abstract: A method for manufacturing a semiconductor device may include the following steps: providing a semiconductor substrate structure; providing a substrate-connecting barrier layer on the semiconductor substrate structure; performing one or more iterations of a composite-layer formation process to provide a gate-connecting barrier layer, wherein the composite-layer formation process comprises: applying a silicon-containing compound set to an outmost existing barrier layer to form an amorphous silicon layer, and forming an overlying barrier layer on the amorphous silicon layer, wherein the substrate-connecting barrier layer is the outmost existing barrier layer for a first iteration of the one or more iterations, and wherein the gate-connecting barrier layer is the overlying barrier layer resulted from a last iteration of the one or more iterations; and providing a conductive gate layer on the gate-connecting barrier layer.Type: GrantFiled: April 17, 2015Date of Patent: May 2, 2017Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATIONInventor: Jianhua Xu
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Patent number: 9640699Abstract: A photovoltaic device includes a crystalline substrate having a first dopant conductivity, an interdigitated back contact and a front surface field structure. The front surface field structure includes a crystalline layer formed on the substrate and a noncrystalline layer formed on the crystalline layer. The crystalline layer and the noncrystalline layer are doped with dopants having a same dopant conductivity as the substrate. Methods are also disclosed.Type: GrantFiled: February 8, 2013Date of Patent: May 2, 2017Assignee: International Business Machines CorporationInventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
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Patent number: 9627568Abstract: Disclosed is a photovoltaic device comprising a substrate composed of an oriented polycrystalline zinc oxide sintered body in a plate shape, a photovoltaic layer provided on the substrate, and an electrode provided on the photovoltaic layer. According to the present invention, a photovoltaic device having high photoelectric conversion efficiency can be inexpensively provided.Type: GrantFiled: October 22, 2015Date of Patent: April 18, 2017Assignee: NGK Insulators, Ltd.Inventors: Mikiya Ichimura, Jun Yoshikawa, Katsuhiro Imai
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Patent number: 9608135Abstract: A solar cell according to an embodiment includes a semiconductor substrate; a first dopant layer formed at one surface of the semiconductor substrate; and a first electrode electrically connected to the first dopant layer. At least a part of the first dopant layer includes a pre-amorphization element, and a concentration of the pre-amorphization element in one portion of the first dopant layer is different from a concentration of the pre-amorphization element in another portion of the first dopant layer.Type: GrantFiled: October 4, 2012Date of Patent: March 28, 2017Assignee: LG ELECTRONICS INC.Inventors: Youngsung Yang, Yongduk Jin, Manhyo Ha, Juhwa Cheong
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Patent number: 9570640Abstract: A method of manufacturing a solar cell module includes preparing a solar cell substrate including a support substrate, an electric power generating layer that receives light beams and generates electric power, and a conductive layer that is formed on the electric power generating layer, forming a resist layer on the conductive layer in such a manner that an exposed portion at which the conductive layer is exposed is formed, forming an electric conduction portion at a part of the exposed portion, and etching the conductive layer by using the resist layer and the electric conduction portion as a mask.Type: GrantFiled: November 14, 2014Date of Patent: February 14, 2017Assignee: SEIKO EPSON CORPORATIONInventor: Daisuke Nagano
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Patent number: 9570241Abstract: Disclosed are a dye-sensitized solar cell module and a method of manufacturing the same. The dye-sensitized solar cell module includes a working electrode formed by stacking a collector and a photo-electrode to which a dye is adsorbed on a transparent conductive substrate; a counter electrode formed by stacking a collector and a catalytic electrode on a transparent conductive substrate; and an electrolyte filled in a space between the working electrode and the counter electrode sealed by a sealant. A glass substrate for the working electrode of glass substrates forming the transparent conductive substrates for the electrodes is a thin glass plate substrate thinner than the glass substrate for the working electrode.Type: GrantFiled: January 11, 2016Date of Patent: February 14, 2017Assignee: Hyundai Motor CompanyInventors: Mi Yeon Song, Won Jung Kim, Ki Chun Lee, Sang Hak Kim, Ji Yong Lee, Yong Jun Jang, Yong-gu Kim, In Woo Song
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Patent number: 9564270Abstract: A thin film capacitor is provided with a lower electrode layer, a dielectric layer arranged on the lower electrode layer, and an upper electrode layer formed on the dielectric layer. An insulator patch material, circular when projected from above, is formed at a boundary of the dielectric layer and the upper electrode layer of the thin film capacitor of this invention. The circular insulator patch improves a withstand voltage, by reducing accumulation of charges.Type: GrantFiled: December 19, 2014Date of Patent: February 7, 2017Assignee: TDK CORPORATIONInventors: Junji Aotani, Yoshihiko Yano, Yasunobu Oikawa
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Patent number: 9559231Abstract: Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For some embodiments, a collar material is formed that laterally surrounds and is in contact with the PV nanowires along a portion of one or more of their ends. According to some embodiments, the PV nanowires are formed on a crystalline silicon substrate. According to some other embodiments, the PV nanowires are formed on a roll-sourced continuous substrate.Type: GrantFiled: September 9, 2011Date of Patent: January 31, 2017Inventors: Shih-Ping Wang, Yu-Min Houng, Nobuhiko Kobayashi
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Patent number: 9559245Abstract: Described herein are methods of fabricating solar cells. In an example, a method of fabricating a solar cell includes forming an amorphous dielectric layer on the back surface of a substrate opposite a light-receiving surface of the substrate. The method also includes forming a microcrystalline silicon layer on the amorphous dielectric layer by plasma enhanced chemical vapor deposition (PECVD). The method also includes forming an amorphous silicon layer on the microcrystalline silicon layer by PECVD. The method also includes annealing the microcrystalline silicon layer and the amorphous silicon layer to form a homogeneous polycrystalline silicon layer from the microcrystalline silicon layer and the amorphous silicon layer. The method also includes forming an emitter region from the homogeneous polycrystalline silicon layer.Type: GrantFiled: June 23, 2015Date of Patent: January 31, 2017Assignees: SunPower Corporation, Total Marketing ServicesInventors: Taiqing Qiu, Gilles Olav Tanguy Sylvain Poulain, Périne Jaffrennou, Nada Habka, Sergej Filonovich
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Patent number: 9559246Abstract: Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer.Type: GrantFiled: November 18, 2015Date of Patent: January 31, 2017Assignee: SunPower CorporationInventors: Paul Loscutoff, David D. Smith, Michael Morse, Ann Waldhauer, Taeseok Kim, Steven Edward Molesa
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Patent number: 9543154Abstract: A method for manufacturing a semiconductor device includes the following steps. A semiconductor substrate is prepared which has a first main surface and a second main surface opposite to each other. The semiconductor substrate is fixed on an adhesive tape at the first main surface. The semiconductor substrate fixed on the adhesive tape is placed in an accommodating chamber. While maintaining a temperature of the adhesive tape at 100° C. or more, a gas is exhausted from the accommodating chamber. After the step of exhausting the gas from the accommodating chamber, a temperature of the semiconductor substrate is reduced. After the step of reducing the temperature of the semiconductor substrate, an electrode is formed on a second main surface of the semiconductor substrate. In this way, there can be provided a method for manufacturing a semiconductor device so as to achieve reduced contact resistance between a semiconductor substrate and an electrode.Type: GrantFiled: May 9, 2013Date of Patent: January 10, 2017Assignee: Sumitomo Electric Industries, Ltd.Inventor: Hiroyuki Kitabayashi
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Patent number: 9537038Abstract: A method for forming a photovoltaic device includes depositing a p-type layer on a substrate. A barrier layer is formed on the p-type layer by exposing the p-type layer to an oxidizing agent. An intrinsic layer is formed on the barrier layer, and an n-type layer is formed on the intrinsic layer.Type: GrantFiled: November 13, 2015Date of Patent: January 3, 2017Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTDInventors: Tze-Chiang Chen, Augustin J. Hong, Chien-Chih Huang, Yu-Wei Huang, Jeehwan Kim, Devendra K. Sadana, Chih-Fu Tseng
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Patent number: 9537037Abstract: A wet etching method for an N-type bifacial cell including: (1) providing an N-type silicon wafer, proceeding with surface structuralization on the N-type silicon wafer, and producing a PN junction on a surface of the N-type silicon wafer by using a boron diffusion technique; (2) proceeding with a first mixed acid washing, etching the PN junction on an edge and a back surface of the N-type silicon wafer; (3) proceeding with a first pure water washing and a first alkaline washing, removing residual acid solution from the surface of the N-type silicon wafer; (4) proceeding with a second pure water washing and a second mixed acid washing, removing residual impurities from the surface of the N-type silicon wafer; (5) proceeding with a third pure water washing and air drying; and (6) after air drying, completing etching on the N-type bifacial cell.Type: GrantFiled: May 14, 2015Date of Patent: January 3, 2017Assignee: Shanghai Shenzhou New Energy Development Co., Ltd.Inventors: Fei Zheng, Zhongwei Zhang, Lei Shi, Zhongli Ruan, Chen Zhao, Yuxue Zhao
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Patent number: 9537039Abstract: A photovoltaic cell can include a dopant in contact with a semiconductor layer. The photovoltaic cell can include a transparent conductive layer and a first semiconductor layer in contact with the transparent conductive layer, the first semiconductor layer including magnesium. In certain circumstances, a substrate can be a glass substrate. In other circumstances, a substrate can be a metal layer. The first semiconductor layer can include CdS. The first semiconductor layer can have a thickness of between about 200 or 3000 Angstroms. The first semiconductor layer can include 1-20% magnesium. A method of manufacturing a photovoltaic cell can include providing a transparent conductive layer and depositing a first semiconductor layer in contact with the transparent conductive layer, the first semiconductor layer treated with magnesium.Type: GrantFiled: November 26, 2012Date of Patent: January 3, 2017Assignee: First Solar, Inc.Inventors: Akhlesh Gupta, Ricky C. Powell, David Eaglesham
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Patent number: 9520513Abstract: A photovoltaic cell including a first semiconductor layer that includes a III-V compound semiconductor, the first semiconductor layer positioned over a transparent conductive layer, and a second semiconductor layer that includes a II-VI compound semiconductor, the second semiconductor layer positioned between the first semiconductor layer and a back metal contact. The photovoltaic cell further includes an interfacial layer between the first and second semiconductor layers that enhances a rectifying junction formed between the III-V and II-VI compound semiconductor materials.Type: GrantFiled: August 16, 2013Date of Patent: December 13, 2016Assignee: First Solar, Inc.Inventor: David Eaglesham
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Patent number: 9507112Abstract: A photoelectric conversion module includes: a photoelectric conversion element and an IC chip mounted on a mounting surface of a substrate; and an electrode provided on a side surface of the substrate, electrically connected to the IC chip, and having a concave shape sunk deeper than other portions of the side surface of the substrate.Type: GrantFiled: January 20, 2012Date of Patent: November 29, 2016Assignee: HITACHI METALS, LTD.Inventors: Hiroki Yasuda, Kouki Hirano, Yoshinori Sunaga, Juhyun Yu, Masataka Satou
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Patent number: 9496446Abstract: A photovoltaic device is presented. The photovoltaic device includes a transparent conductive layer; a window layer disposed on the transparent conductive layer; and an absorber layer disposed on the window layer. The window layer includes a low-diffusivity layer disposed adjacent to the transparent conductive layer and a high-diffusivity layer interposed between the low-diffusivity layer and the absorber layer. Method of making a photovoltaic device is also presented.Type: GrantFiled: January 31, 2012Date of Patent: November 15, 2016Assignee: First Solar, Inc.Inventors: Jinbo Cao, Bastiaan Arie Korevaar, Dalong Zhong, Juan Carlos Rojo, Qianqian Xin, Aharon Yakimov, Hongying Peng
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Patent number: 9496448Abstract: Photovoltaic cells and photovoltaic modules, as well as methods of making and using such photovoltaic cells and photovoltaic modules, are disclosed. More particularly, embodiments of the photovoltaic cells selectively reflect visible light to provide the photovoltaic cells with a colorized appearance. Photovoltaic modules combining colorized photovoltaic cells may be used to harvest solar energy while providing a customized appearance, e.g., an image or pattern.Type: GrantFiled: October 30, 2013Date of Patent: November 15, 2016Assignee: Sandia CorporationInventors: Jose Luis Cruz-Campa, Gregory N. Nielson, Murat Okandan, Anthony L. Lentine, Paul J. Resnick, Vipin P. Gupta
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Patent number: 9484476Abstract: It is an object of the present invention to improve photoelectric conversion efficiency in a photoelectric conversion device. The photoelectric conversion device according to the present invention uses a polycrystalline semiconductor layer including a plurality of semiconductor particles coupled together as a light-absorbing layer, each of the semiconductor particles including a group I-III-VI compound, each of the semiconductor particles having a higher composition ratio PI of a group I-B element to a group III-B element in a surface portion thereof than that in a central portion thereof.Type: GrantFiled: March 15, 2012Date of Patent: November 1, 2016Assignee: KYOCERA CORPORATIONInventors: Shintaro Kubo, Michimasa Kikuchi, Hideaki Asao, Shinnosuke Ushio
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Patent number: 9472702Abstract: A photovoltaic solar cell comprises a nano-patterned substrate layer. A plurality of nano-windows are etched into an intermediate substrate layer to form the nano-patterned substrate layer. The nano-patterned substrate layer is positioned between an n-type semiconductor layer composed of an n-type semiconductor material and a p-type semiconductor layer composed of a p-type semiconductor material. Semiconductor material accumulates in the plurality of nano-windows, causing a plurality of heterojunctions to form between the n-type semiconductor layer and the p-type semiconductor layer.Type: GrantFiled: November 19, 2012Date of Patent: October 18, 2016Assignees: Sandia Corporation, The Board of Regents of the University of Texas SystemInventors: Jose Luis Cruz-Campa, Xiaowang Zhou, David Zubia
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Patent number: 9461123Abstract: This invention relates to an electronic semiconductive component comprising at least one layer (2,3) of a p-type or n-type material, wherein the layer of a said p- or n-type material is constituted by a metal hydride having a chosen dopant. The invention also relates to methods for producing the component.Type: GrantFiled: February 9, 2009Date of Patent: October 4, 2016Assignee: INSTITUTT FOR ENERGITEKNIKKInventors: Alexander G. Ulyashin, Smagul Karazhanov
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Patent number: 9461107Abstract: An excimer laser annealing apparatus and the method thereof are disclosed. The apparatus has a substrate holder and an excimer laser unit. The substrate holder has a support surface for supporting a substrate having an amorphous silicon film and a thermoregulating module. The thermoregulating module is used to regulate the temperature on the support surface so as to control crystal orientation of amorphous silicon in the amorphous silicon film. With the thermoregulating module being added, the excimer laser annealing apparatus can control the orientation of recrystallizing of the amorphous silicon.Type: GrantFiled: October 16, 2014Date of Patent: October 4, 2016Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventor: Jiangbo Yao
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Patent number: 9443736Abstract: A silicon precursor composition is described, including a silylene compound selected from among: silylene compounds of the formula: wherein each of R and R1 is independently selected from organo substituents; amidinate silylenes; and bis(amidinate) silylenes. The silylene compounds are usefully employed to form high purity, conformal silicon-containing films of SiO2, Si3N4, SiC and doped silicates in the manufacture of microelectronic device products, by vapor deposition processes such as CVD, pulsed CVD, ALD and pulsed plasma processes. In one implementation, such silicon precursors can be utilized in the presence of oxidant, to seal porosity in a substrate comprising porous silicon oxide by depositing silicon oxide in the porosity at low temperature, e.g., temperature in a range of from 50° C. to 200° C.Type: GrantFiled: May 22, 2013Date of Patent: September 13, 2016Assignee: ENTEGRIS, INC.Inventors: Thomas M. Cameron, Susan V. DiMeo, Bryan C. Hendrix, Weimin Li
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Patent number: 9412886Abstract: A photovoltaic device with a low-resistance stable electrical back contact is disclosed. The photovoltaic device can have a CuTex or CuTexNy layer.Type: GrantFiled: August 22, 2011Date of Patent: August 9, 2016Assignee: First Solar, Inc.Inventors: Pratima V. Addepalli, Sreenivas Jayaraman, Oleh P. Karpenko
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Patent number: 9401432Abstract: A semiconductor device of one embodiment of the present invention includes a semiconductor, an insulator, a first conductor, and a second conductor. In the semiconductor device, a top surface of the semiconductor has a region in contact with the insulator; a side surface of the semiconductor has a region in contact with the insulator; the first conductor has a first region overlapping with the semiconductor with the insulator positioned therebetween; the first region has a region in contact with the top surface of the semiconductor and a region in contact with the side surface of the semiconductor; the second conductor has a second region in contact with the semiconductor; and the first region and the second region do not overlap with each other.Type: GrantFiled: January 9, 2015Date of Patent: July 26, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiyuki Kobayashi, Daisuke Matsubayashi
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Patent number: 9388491Abstract: A method for depositing a film in a substrate processing system includes arranging a substrate on a pedestal in a processing chamber, heating the substrate to a temperature within a predetermined temperature range, and supplying a gas mixture to the processing chamber for a predetermined period to deposit the film on the substrate, wherein the gas mixture includes a first precursor gas, ammonia gas and diborane gas.Type: GrantFiled: July 19, 2013Date of Patent: July 12, 2016Assignee: Novellus Systems, Inc.Inventor: Keith Fox
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Patent number: 9384973Abstract: Provided are semiconductor films, methods of forming the same, transistors including the semiconductor films, and methods of manufacturing the transistors. Provided are a semiconductor film including zinc (Zn), nitrogen (N), oxygen (O), and fluorine (F), and a method of forming the semiconductor film. Provided are a semiconductor film including zinc, nitrogen, and fluorine, and a method of forming the semiconductor film. Sputtering, ion implantation, plasma treatment, chemical vapor deposition (CVD), or a solution process may be used in order to form the semiconductor films. The sputtering may be performed by using a zinc target and a reactive gas including fluorine. The reactive gas may include nitrogen and fluorine, or nitrogen, oxygen, and fluorine.Type: GrantFiled: June 2, 2014Date of Patent: July 5, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Tae-sang Kim, Jong-baek Seon, Myung-kwan Ryu, Chil Hee Chung
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Patent number: 9362426Abstract: This photoelectric conversion device (10) is provided with: an n-type monocrystalline silicon substrate (21); an IN layer (25) and an IP layer (26) formed on the back surface of the n-type monocrystalline silicon substrate (21); an n-side electrode (40) containing an n-side underlayer (43), an n-side primary conductive layer (44), and an n-side protective layer (45); and a p-side electrode (50) containing a p-side underlayer (53), a p-side primary conductive layer (54), and a p-side protective layer (55). The n-side primary conductive layer (44) is formed in a manner so as not to cover the lateral surface of the n-side underlayer (43), and is covered at the lateral surface by the n-side protective layer (45). The p-side electrode (50) is formed in such a manner the lateral surface of the p-side underlayer (53) is not covered, and the lateral surface is covered by the p-side protective layer (55).Type: GrantFiled: September 20, 2013Date of Patent: June 7, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Ryo Goto, Satoru Shimada, Masato Shigematsu, Hitoshi Sakata, Daisuke Ide
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Patent number: 9352969Abstract: A process for manufacturing silicon-based nanoparticles by electrochemical etching of a substrate, wherein the substrate is a metallurgical-grade or upgraded metallurgical-grade silicon, the substrate including an impurity content greater than 0.01%.Type: GrantFiled: March 9, 2012Date of Patent: May 31, 2016Assignees: INSTITUT NATIONAL des SCIENCES APPLIQUEES DE LYON, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, APOLLON SOLARInventors: Volodymyr Lysenko, Jed Kraiem, Mahdi Medjaoui
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Patent number: 9331229Abstract: An InxGa1-xAs interlayer is provided between a III-V base and an intrinsic amorphous semiconductor layer of a heterojunction III-V solar cell structure. Improved surface passivation and open circuit voltage may be obtained through the incorporation of the interlayer within the structure.Type: GrantFiled: January 6, 2014Date of Patent: May 3, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
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Patent number: 9306098Abstract: A method of fabricating a photovoltaic device includes a step of forming an absorber layer above a substrate, and a step of forming a surface layer on the absorber layer. The absorber layer includes an I-III-VI2 compound, which contains a Group I element, a Group III element and a Group VI element. The surface layer includes an I-III-VI2 compound, which contains a Group I element, a Group III element and a Group VI element, and has an atomic ratio of the Group I element to the Group III element in the range of from 0.1 to 0.9.Type: GrantFiled: January 24, 2014Date of Patent: April 5, 2016Assignee: TSMC Solar Ltd.Inventor: Chien-Yao Huang
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Patent number: 9306105Abstract: Thin film photovoltaic devices that include a transparent substrate; a transparent conductive oxide layer on the transparent substrate; a n-type window layer on the transparent conductive oxide layer; a p-type absorber layer on the n-type window layer; and, a back contact on the p-type absorber layer are provided. The p-type absorber layer comprises cadmium telluride, and forms a photovoltaic junction with the n-type window layer. Generally, the p-type absorber layer defines a plurality of finger structures protruding from the p-type absorber layer into the back contact. The finger structures can have an aspect ratio of about 1 or greater and/or can have a height that is about 20% to about 200% of the thickness of the p-type absorber layer. Methods of forming such finger structures protruding from a back surface of the p-type absorber layer are also provided.Type: GrantFiled: July 31, 2013Date of Patent: April 5, 2016Assignee: First Solar Malaysia Sdn. Bhd.Inventors: Scott Daniel Feldman-Peabody, Mark Jeffrey Pavol, Robert Dwayne Gossman, Bogdan Lita, Nathan John Kruse, John Milton Flood, III, Valerie Pflumio Hill
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Patent number: 9297764Abstract: The invention relates to a method for determining the maximum open circuit voltage and the power that can be output by a photoconverter material subject to a measurement light intensity, the method including the following steps: measuring the photoluminescent intensity of the material, measuring the absorption rate of the photoconverter material at a second wavelength substantially equal to the photoluminescent wavelength of the photoconverter material, determining the maximum open circuit voltage of the photoconverter material with the measurement light intensity by means of the absorption rate and the photoluminescent intensity measured at substantially the same wavelength; said invention being characterized in that the light source and the photoconverter material are arranged such that the angular distributions of the rays incident on and emitted by the lit surface of the material and collected by the detector are substantially identical.Type: GrantFiled: February 7, 2011Date of Patent: March 29, 2016Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE—CNRS—, ELECTRICITE DE FRANCE, UNIVERSITE DE VERSAILLES SAINT-QUENTIN-EN-YVELINESInventors: Jean-François Guillemoles, Arnaud Etcheberry, Isabelle Gerard, Pierre Tran-Van
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Patent number: 9299875Abstract: A solar cell module is manufactured by encapsulating a solar cell matrix comprising a plurality of electrically connected solar cell components between a transparent panel and a backsheet with a resin. The method involves (i) embossing opposite surfaces of a green silicone rubber sheet, (ii) arranging a transparent panel (13a), silicone rubber sheet (11), solar cell matrix (14), silicone rubber sheet (11), and backsheet (13b) to form a multilayer assembly, and (iii) heating and compressing the assembly for vacuum lamination for establishing a seal around the solar cell matrix.Type: GrantFiled: August 18, 2014Date of Patent: March 29, 2016Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Tomoyoshi Furihata, Hiroto Ohwada, Junichi Tsukada, Atsuo Ito, Atsushi Yaginuma, Naoki Yamakawa, Minoru Igarashi
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Patent number: 9263608Abstract: A photovoltaic cell can include a dopant in contact with a semiconductor layer.Type: GrantFiled: October 31, 2008Date of Patent: February 16, 2016Assignee: First Solar, Inc.Inventors: Rick C. Powell, Upali Jayamaha, Anke Abken, Markus Gloeckler, Akhlesh Gupta, Roger T. Green, Peter Meyers
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Patent number: 9257593Abstract: There is provided a method of producing a photovoltaic element comprising: a first step in which an i-type amorphous silicon layer (16) and an n-type amorphous silicon layer (14) are formed over a light-receiving surface of an n-type monocrystalline silicon substrate (18); a second step in which an i-type amorphous silicon layer (22a) and an n-type amorphous silicon layer (23a) are formed over a back surface of the n-type monocrystalline silicon substrate (18); and a third step in which, after the first step and the second step are completed, protection layers are formed over the n-type amorphous silicon layer (14) and the n-type amorphous silicon layer (23a).Type: GrantFiled: September 17, 2013Date of Patent: February 9, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Taiki Hashiguchi, Yutaka Kirihata
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Patent number: 9246032Abstract: Solar cell structures that have improved carrier collection efficiencies at a heterointerface are provided by low temperature epitaxial growth of silicon on a III-V base. Additionally, a solar cell structure having improved open circuit voltage includes a shallow junction III-V emitter formed by epitaxy or diffusion followed by the epitaxy of SixGe1?x passivated by amorphous SiyGe1?y:H.Type: GrantFiled: September 29, 2014Date of Patent: January 26, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
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Non-parabolic solar concentration to an area of controlled flux density conversion system and method
Patent number: 9231142Abstract: A solar conversion system with a solar collector that is shaped to focus reflected sunlight along an area with a substantially constant flux density. The area shape can be resemble a rectangular, square, circular, or other shape. Included with the system is a solar conversion module having a photovoltaic cell that is alignable with the area. The cell converts the focused reflected sunlight into electrical energy when aligned with the area.Type: GrantFiled: October 6, 2010Date of Patent: January 5, 2016Assignee: BRIGHTLEAF TECHNOLOGIES INC.Inventors: James E. Vander Mey, Douglas Helff Kiesewetter, Jr., Shane Mark Duckworth -
Patent number: 9222169Abstract: A solar call is provided along with a method for forming a semiconductor nanocrystalline silicon insulating thin-film with a tunable bandgap. The method provides a substrate and introduces a silicon (Si) source gas with at least one of the following source gases: germanium (Ge), oxygen, nitrogen, or carbon into a high density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. A SiOxNyCz thin-film embedded with a nanocrystalline semiconductor material is deposited overlying the substrate, where x, y, z?0, and the semiconductor material is Si, Ge, or a combination of Si and Ge. As a result, a bandgap is formed in the SiOxNyCz thin-film, in the range of about 1.9 to 3.0 electron volts (eV). Typically, the semiconductor nanoparticles have a size in a range of 1 to 20 nm.Type: GrantFiled: May 18, 2009Date of Patent: December 29, 2015Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, Apostolos T. Voutsas
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Patent number: 9202943Abstract: A photovoltaic device includes a thermal stress relieving layer on top of a substrate; a back ohmic contact on the thermal stress relieving layer; and a p-type semiconductor photon absorber layer on the back ohmic contact. The back ohmic contact comprises a metallic compound of the sacrificial back electrode metal layer and the absorber layer, in combination with the thermal stress relieving layer. The thermal stress relieving layer has a substantially similar thermal expansion coefficient with respect to the substrate and the absorber layer and a lower Young's modulus with respect to the sacrificial back electrode metal layer.Type: GrantFiled: August 7, 2014Date of Patent: December 1, 2015Assignee: International Business Machines CorporationInventors: Qing Cao, Zhengwen Li, Fei Liu, Zhen Zhang
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Patent number: 9184320Abstract: A photoelectric conversion device includes a front electrode, a photoelectric conversion layer formed of a semiconductor material, a transparent conductive layer formed of a transparent conductive oxide, a back electrode formed of a metal material, and a conductive layer formed of a semiconductor material primarily of silicon and having a refractive index higher than the transparent conductive layer contactually sandwiched between the transparent conductive layer and the back electrode. The photoelectric conversion device exhibits a high photoelectric conversion efficiency by keeping low the electrical resistance between the semiconductor layer and the back electrode and by increasing reflectance for light having passed though the semiconductor layer.Type: GrantFiled: April 27, 2011Date of Patent: November 10, 2015Assignee: Mitsubishi Electric CorporationInventors: Hirofumi Konishi, Hidetada Tokioka
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Patent number: 9123858Abstract: A method for manufacturing a photoelectric conversion device including a first process where a plurality of pixel electrodes are formed on a dielectric layer; a second process where a light receiving layer that includes an organic material is formed on the plurality of pixel electrodes; and a third process where a counter electrode is formed on the light receiving layer. The first process includes a film forming process of a pixel electrode material on the dielectric layer; a patterning process of the film of the pixel electrode material; and a heating process for heating the substrate at 270° C. after the patterning process. Such process forming a photoelectric conversion device of a solid-state imaging device which also includes a signal reading circuit formed on the substrate, the signal reading circuit capable of reading out the signal according to a quantity of electric charges collected in the first electrode.Type: GrantFiled: March 27, 2013Date of Patent: September 1, 2015Assignee: FUJIFILM CorporationInventors: Tetsuro Mitsui, Yuki Kuramoto
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Patent number: 9112079Abstract: The photovoltaic cell has a block that includes at least one semiconductor substrate in which is formed at least one photovoltaic junction that is connected to a first electrical contact element of a first pole and to a second electrical contact element of a second pole. The cell includes a first transparent cover that is placed on a first surface of the block and defines with the block of the cell a first recess groove of a first electrically conductive wire element.Type: GrantFiled: December 18, 2009Date of Patent: August 18, 2015Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Dominique Vicard, Jean Brun, Pierre Perichon
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Patent number: 9099585Abstract: A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.Type: GrantFiled: September 6, 2012Date of Patent: August 4, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bahman Hekmatshoar-Tabari, Marinus Hopstaken, Dae-Gyu Park, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
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Patent number: 9082925Abstract: A method of fabricating a solar cell is disclosed. The method includes forming a polished surface on a silicon substrate and forming a first flowable matrix in an interdigitated pattern on the polished surface, where the polished surface allows the first flowable matrix to form an interdigitated pattern comprising features of uniform thickness and width. In an embodiment, the method includes forming the silicon substrate using a method such as, but not limited to, of diamond wire or slurry wafering processes. In another embodiment, the method includes forming the polished surface on the silicon substrate using a chemical etchant such as, but not limited to, sulfuric acid (H2SO4), acetic acid (CH3COOH), nitric acid (HNO3), hydrofluoric acid (HF) or phosphoric acid (H3PO4). In still another embodiment, the etchant is an isotropic etchant. In yet another embodiment, the method includes providing a surface of the silicon substrate with at most 500 nanometer peak-to-valley roughness.Type: GrantFiled: March 13, 2013Date of Patent: July 14, 2015Assignee: SunPower CorporationInventors: Genevieve A. Solomon, Scott Harrington, Kahn Wu, Paul Loscutoff, Junbo Wu, Steven Edward Molesa
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Patent number: 9082673Abstract: Described herein is a device comprising: a substrate; one or more of a nanostructure extending essentially perpendicularly from the substrate; wherein the nanostructure comprises a core of a doped semiconductor, an first layer disposed on the core, and a second layer of an opposite type from the core and disposed on the first layer.Type: GrantFiled: May 12, 2011Date of Patent: July 14, 2015Assignee: ZENA TECHNOLOGIES, INC.Inventors: Young-June Yu, Munib Wober