Gallium Containing Patents (Class 136/262)
  • Patent number: 6680432
    Abstract: Apparatus and Method for Optimizing the Efficiency of a Bypass Diode in Solar Cells. In a preferred embodiment, a layer of TiAu is placed in an etch in a solar cell with a contact at a doped layer of GaAs. Electric current is conducted through a diode and away from the main cell by passing through the contact point at the GaAs and traversing a lateral conduction layer. These means of activating, or “turning on” the diode, and passing the current through the circuit results in greater efficiencies than in prior art devices. The diode is created during the manufacture of the other layers of the cell and does not require additional manufacturing.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: January 20, 2004
    Assignee: Emcore Corporation
    Inventors: Paul R. Sharps, Marvin Brad Clevenger, Mark A. Stan
  • Patent number: 6660928
    Abstract: A solar cell comprising a substrate, a buffer layer, a first subcell, a second subcell, and a third subcell, where said first subcell, said second subcell, and said third subcell are lattice matched, and where said substrate is lattice mismatched with said first, second, and third subcells.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: December 9, 2003
    Assignee: Essential Research, Inc.
    Inventors: Martin O. Patton, Samar Sinharoy, Victor G. Weizer
  • Publication number: 20030205270
    Abstract: Systems and methods are described for compositions, apparatus and/or electronic devices. A composition, includes a composition layer defining a first surface and a second surface, the composition layer including a collection layer that is located closer to the first surface than to the second surface. An apparatus, includes a semiconductor absorber layer defining a first surface and a second surface; and an electrode layer coupled to the first surface of the semiconductor absorber layer, wherein the semiconductor absorber layer includes a collection layer that is located closer to the first surface than to the second surface.
    Type: Application
    Filed: April 22, 2003
    Publication date: November 6, 2003
    Inventor: Billy J. Stanbery
  • Patent number: 6600100
    Abstract: The present invention is directed to systems and methods for protecting a solar cell. The solar cell includes first solar cell portion. The first solar cell portion includes at least one junction and at least one solar cell contact on a backside of the first solar cell portion. At least one bypass diode portion is epitaxially grown on the first solar cell portion. The bypass diode has at least one contact. An interconnect couples the solar cell contact to the diode contact.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: July 29, 2003
    Assignee: Emcore Corporation
    Inventors: Frank Ho, Milton Y. Yeh, Chaw-Long Chu, Peter A. Iles
  • Publication number: 20030136442
    Abstract: A group III-V solar cell with GaAs as the main component, superior in radiation resistance, is provided. In a GaAs-based group III-V multijunction type solar cell, the group III-V solar cell is formed of an n type emitter layer and a p type base layer. The optical bandgap of the material forming the p type base layer becomes smaller as a function of approaching the pn junction. The group III-V solar cell has stacked a plurality of solar cells differing in optical bandgap. A group III-V solar cell formed of an n type emitter layer and a p type base layer with GaAs as the main component is stacked. The optical bandgap of the p type base layer becomes smaller as a function of approaching the pn junction.
    Type: Application
    Filed: January 13, 2003
    Publication date: July 24, 2003
    Inventor: Tatsuya Takamoto
  • Patent number: 6590150
    Abstract: A combination photovoltaic cell and RF antenna in a single unit performs the dual functions of transmitting and receiving RF signals to and from a transceiver and converting light waves to electric power to operate the transceiver. The photovaltaic cell is formed of semiconductor material laminated to a thin dielectric backing and electrically connected with the power circuit of the transceiver to supply electrical power thereto. The dielectric backing is bonded to a metallic substrate to provide a ground plane. A tuned shielded cable having a signal conductor is interconnected between the photovoltaic cell and the RF output stage of the transceiver, and the conductive shield of the cable is interconnected between the metallic substrate ground plane and the ground stage of the transceiver such that the photovoltaic cell transmits and receives RF signals to and from the transceiver and also converts light waves to electric power to operate the transceiver.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: July 8, 2003
    Inventor: Karl F. Kiefer
  • Publication number: 20030121545
    Abstract: The invention relates to a method for constructing a layer structure on an especially fragile flat substrate. In order for thin, fragile flat substrates to be able to be subjected to refinement or construction of semiconductor components, a process is proposed with the steps: Applying an inorganic ceramic phase to the fragile substrate and subsequent heat treatment for hardening and sintering the inorganic ceramic material.
    Type: Application
    Filed: December 19, 2002
    Publication date: July 3, 2003
    Inventors: Ingo Schwirtlich, Wilfried Schmidt, Hilmar von Campe
  • Patent number: 6586669
    Abstract: A perfectly or approximately lattice-matched semiconductor layer for use in an electronic or optoelectronic device. Perfectly lattice-matched (“PLM”) semiconductor layers prevent or lessen the formation and propagation of crystal defects in semiconductor devices, defects that can decrease the performance characteristics of the device. For some semiconductors, the ability to optimize composition-dependent properties over the wider range of compositions that approximately lattice-matched (“ALM”) semiconductor layers allows is more advantageous than the lower strain and dislocation density encountered for PLM layers. In addition, PLM cell layers and ALM cell layers are also expected to result in improved radiation resistance characteristics for some semiconductor devices.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: July 1, 2003
    Assignee: The Boeing Company
    Inventors: Richard Roland King, James H. Ermer, Peter Colter, Nasser H. Karam
  • Publication number: 20030102023
    Abstract: Sulfur is used to improve the performance of CIGS devices prepared by the evaporation of a single source ZIS type compound to form a buffer layer on the CIGS. The sulfur may be evaporated, or contained in the ZIS type material, or both. Vacuum evaporation apparatus of many types useful in the practice of the invention are known in the art. Other methods of delivery, such as sputtering, or application of a thiourea solution, may be substituted for evaporation.
    Type: Application
    Filed: September 20, 2002
    Publication date: June 5, 2003
    Inventor: Alan E. Delahoy
  • Patent number: 6566595
    Abstract: A solar cell having a p-type semiconductor layer and an n-type semiconductor layer made of a first compound semiconductor material, and a semiconductor layer sandwiched between the p-type semiconductor layer and the n-type semiconductor layer. The semiconductor layer includes at least a quantum well layer which is made of a second compound semiconductor material and has a plurality of projections of at least two different sizes.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: May 20, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshiyuki Suzuki
  • Patent number: 6559372
    Abstract: Systems and methods are described for compositions, apparatus and/or electronic devices. A composition, includes a composition layer defining a first surface and a second surface, the composition layer including a collection layer that is located closer to the first surface than to the second surface. An apparatus, includes a semiconductor absorber layer defining a first surface and a second surface; and an electrode layer coupled to the first surface of the semiconductor absorber layer, wherein the semiconductor absorber layer includes a collection layer that is located closer to the first surface than to the second surface.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: May 6, 2003
    Assignee: Heliovolt Corporation
    Inventor: Billy J. Stanbery
  • Publication number: 20030075215
    Abstract: Apparatus and Method for Optimizing the Efficiency of a Bypass Diode in Solar Cells. In a preferred embodiment, a layer of TiAu is placed in an etch in a solar cell with a contact at a doped layer of GaAs. Electric current is conducted through a diode and away from the main cell by passing through the contact point at the GaAs and traversing a lateral conduction layer. These means of activating, or “turning on” the diode, and passing the current through the circuit results in greater efficiencies than in prior art devices. The diode is created during the manufacture of the other layers of the cell and does not require additional manufacturing.
    Type: Application
    Filed: October 24, 2001
    Publication date: April 24, 2003
    Inventors: Paul R. Sharps, Marvin Brad Clevenger, Mark A. Stan
  • Patent number: 6552259
    Abstract: In this bypass-function added solar cell, a plurality of island-like p+ regions, which is third regions, are formed at a boundary between a p-type region and an n-type region layer constituting a substrate so that the p+ regions project into the region and the region and are separated away from the surface of the substrate. Therefore, in this solar cell, unlike prior art counterparts, the insulating film for isolating the p+ regions and the n electrodes constituting the np+ diode from one another is no longer necessary, thus allowing a reduction in manufacturing cost. As a result, a bypass-function added solar cell with a bypass-diode function added thereto can be provided with low cost and by simple process.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: April 22, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigeyuki Hosomi, Tadashi Hisamatsu
  • Patent number: 6534704
    Abstract: A solar cell includes a first semiconductor layer that is p-type, and a second semiconductor layer that is n-type formed over the first semiconductor layer. The solar cell includes a layer A made of a semiconductor different from the first semiconductor layer and the second semiconductor layer or an insulator between the first semiconductor layer and the second semiconductor layer. The band gap Eg1 of the first semiconductor layer and the band gap Eg2 of the second semiconductor layer satisfy the relationship Eg1<Eg2. The electron affinity &khgr;1 (eV) of the first semiconductor layer and the electron affinity &khgr;2 (eV) of the second semiconductor layer satisfy the relationship 0≦(&khgr;1−&khgr;2)<0.5, and the average layer thickness of the layer A is 1 nm or more and 20 nm or less.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: March 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Hashimoto, Takayuki Negami, Shigeo Hayashi, Takuya Satoh
  • Publication number: 20030047207
    Abstract: A solar collector (100) is provided having increased efficiency and operating life, and reduced size and cost over conventional collectors. Generally, the collector (100) includes a three-dimensional array (110) of cells (104), including a base-layer (112) and at least one elevated-tier (114) above and separated from the base-layer, so that at least some light passes between cells of the tier to the base-layer. Preferably, the tier (114) includes cells (104) oriented to receive light reflected from the base-layer (112). More preferably, the array (100) is within an enclosure (108) having a bottom-wall (120) and sidewalls (122, 124) that reflect a portion of light incident thereon onto the cells (104). In one embodiment, the cells (104) include types of monolithic cells sensitive to different wavelengths of light, and the collector (100) further includes voltage converters (144) to match voltages from the different types of cells to a common output voltage.
    Type: Application
    Filed: September 10, 2002
    Publication date: March 13, 2003
    Inventor: Eric Aylaian
  • Patent number: 6515217
    Abstract: A solar collector (100) is provide having increased efficiency and operating life, and reduced size and cost over conventional collectors. Generally, the collector (100) includes a three-dimensional array (110) of cells (104), including a base-layer (112) and at least one elevated-tier (114) above and separated from the base-layer, so that at least some light passes between cells of the tier to the base-layer. Preferably, the tier (114) includes cells (104) oriented to receive light reflected from the base-layer (112). More preferably, the array (100) is within an enclosure (108) having a bottom-wall (120) and sidewalls (122, 124) that reflect a portion of light incident thereon onto the cells (104). In one embodiment, the cells (104) include types of monolithic cells sensitive to different wavelengths of light, and the collector (100) further includes voltage converters (144) to match voltages from the different types of cells to a common output voltage.
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: February 4, 2003
    Inventor: Eric Aylaian
  • Patent number: 6504091
    Abstract: A photoelectric converting device is provided with enhanced photoelectric conversion efficiency by optimizing a combination of materials used for top and bottom cells. The photoelectric converting device of the present invention is provided with first and second pn junctions. The first pn junction is formed in a semiconductor substantially represented by (Al1-yGay)1-xInxP, and the second pn junction is formed in a semiconductor substantially represented by Ga1-zInzAs.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: January 7, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tadashi Hisamatsu, Kazuyo Nakamura, Yuji Komatsu, Masafumi Shimizu
  • Publication number: 20020189665
    Abstract: A photovoltaic cell exhibiting an overall conversion efficiency of at least 9.0% is prepared from a copper-indium-gallium-diselenide thin film. The thin film is prepared by simultaneously electroplating copper, indium, gallium, and selenium onto a substrate using a buffered electro-deposition bath. The electrodeposition is followed by adding indium to adjust the final stoichiometry of the thin film.
    Type: Application
    Filed: April 10, 2001
    Publication date: December 19, 2002
    Applicant: DAVIS, JOSEPH & NEGLEY
    Inventor: Raghu Nath Bhattacharya
  • Patent number: 6486391
    Abstract: The invention relates to a diode structure, especially for thin film solar cells. The aim of the invention is to provide a diode structure for thin film solar cells. Said structure allows for an assembly of a thin film solar cell, whereby said assembly is as flexible as possible, efficiency is high, and utilizing materials that are as environmentally friendly as possible. A diode structure comprising a p-conducting layer, which consists of a chalcopyrite compound, and a n-conducting layer, which is adjacent to the p-conducting layer and consists of a compound that contains titanium and oxygen, is provided.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: November 26, 2002
    Assignee: Siemens and Shell Solar GmbH
    Inventor: Franz Karg
  • Publication number: 20020170592
    Abstract: The invention concerns photovolaic converters that work under high intensity light and provide high efficiency. Said converters generate photovoltaic electricity at low costs, which is a very interesting for the photovoltaic industry. They can be used in thermophotovoltaic systems and remote supply systems via optical fiber. The converter is characterized by the following features: a) its semiconductor layers are made of compounds III-V, b) photolithography is used to manufacture it and c) its size ranges from a few tenths to tens of square millimeters. Other optoelectronic techniques may be used for manufacturing such as wire welding, separation of the converters on one same wafer by sawing, point cutting and cleavage. Its design parameters are estimated by means of multivariable optimization. The situation in which the incident light has the shape of a cone and originates from a medium with any given refraction index is taken into account in the operating conditions.
    Type: Application
    Filed: December 21, 2001
    Publication date: November 21, 2002
    Inventor: Carlos Algora
  • Patent number: 6444897
    Abstract: The invention relates to a solar cell containing a semiconductor (1) with an intermediate band (2) that is half filled with electrons, located between two layers of ordinary n type (3) and p type (4) semiconductors. When lighted, electron-hole pairs are formed either by a photon that absorbs the necessary energy (5) or by two photons (6,7) that absorb less energy which pump an electron from the valence band to the intermediate band (8) and from the latter to the conductance band (9). An electrical current is generated that exits on the p side and returns via the n side. The n and p layers also prevent the intermediate band from contacting the outer metal connections, which would have resulted in a short-circuit. Said cell converts solar energy into electricity in a more efficient manner than conventional cells and contributes to improvement of the photovoltaic devices.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: September 3, 2002
    Assignees: Universidad Politecnica de Madrid, Universidad Autonoma de Madrid - Fac. Ciencias, Consejo Superior de Investigaciones Cientificas
    Inventors: Antonio Luque-Lopez, Fernando Flores-Sinta, Antonio Martí-Vega, José Carlos Conesa-Cegarra, Perla Wahnon-Benarroch, José Ortega-Mateo, Cesar Tablero-Crespo, Rubén Pérez-Pérez, Lucas Cuadra-Rodríguez
  • Patent number: 6441301
    Abstract: A solar cell with good characteristics and high reliability is provided that includes a semiconductor comprising at least one element from each of groups Ib, IIIb, and VIb. A method of manufacturing the same also is provided. The solar cell includes a conductive base, a first insulating layer formed on one principal plane of the base, a second insulating layer formed on a second principal plane of the base, and a light-absorption layer disposed above the first insulating layer. The light-absorption layer is formed of a semiconductor comprising at least one element from each of groups Ib, IIIb, and VIb.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: August 27, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takuya Satoh, Takayuki Negami, Shigeo Hayashi, Yasuhiro Hashimoto, Shinichi Shimakawa
  • Patent number: 6437233
    Abstract: A solar cell comprises a superstrate formed from a material that is transparent to light, a first layer formed of delta doped silicon, a plurality of layers formed from semiconductor materials, each characterized by multi-quantum wells and multiple band gaps, a first semiconductor layer having a band gap energy state that is the smallest, the last semiconductor layer having-a band gap that is the largest, and the intermediate semiconductor layers having band gaps transitioning from the smallest to the largest, a second layer overlying the semiconductor layers and formed of delta doped silicon, an n-cap layer formed on the second delta doped layer, and a metal layer formed on the n-cap layer and serving to reflect light into the semiconductor.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: August 20, 2002
    Assignee: TRW Inc.
    Inventors: Dean Tran, George J. Vendura, Jr., William L. Jones, Edward A. Rezek
  • Patent number: 6429369
    Abstract: The invention relates to a thin-film solar cell on the basis of IB-IIIA-VIA compound semiconductors and a method for producing such a solar cell. Between the polycrystalline IB-IIIA-VIA absorber layer of the p-type conductivity and the carrier film serving as a substrate, a back electrode of intermetallic phases of the same IB- and IIIA-metals are located which are deposited for the generation of the absorber layer. The absorber layer and the back electrode are produced in such a way that the precursor consisting of IB-IIIA-metals is vertically only incompletely converted into the photovoltaicly active absorber material from the side opposite to the carrier film by reaction with chalcogen such that intermetallic phases of the IB- and IIIA-metals are directly located on the carrier film, which metals serve as back electrode of the solar cell structure.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: August 6, 2002
    Assignee: IST-Institut fur Solartechnologies GmbH
    Inventors: Olaf Tober, Jürgen Penndorf, Michael Winkler, Klaus Jacobs, Thomas Koschack
  • Patent number: 6384321
    Abstract: The present invention provides an electrolyte composition, comprising an electrolyte containing at least one kind of an imidazolium salt selected from the group consisting of 1-methyl-3-propyl imidazolium iodide, 1-methyl-3-isopropyl imidazolium iodide, 1-methyl-3-butyl imidazolium iodide, 1-methyl-3-isobutyl imidazolium iodide and 1-methyl-3-sec-butyl imidazolium iodide, a halogen-containing compound dissolved in the electrolyte, and a compound dissolved in the electrolyte and containing at least one element selected from the group consisting of N, P and S, the compound being capable of forming an onium salt together with the halogen-containing compound.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: May 7, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Mikoshiba, Hiroyasu Sumino, Maki Yonetsu, Shuji Hayase
  • Publication number: 20020043279
    Abstract: The invention relates to a diode structure, especially for thin film solar cells. The aim of the invention is to provide a diode structure for thin film solar cells. Said structure allows for an assembly of a thin film solar cell, whereby said assembly is as flexible as possible, efficiency is high, and utilizing materials that are as environmentally friendly as possible. A diode structure comprising a p-conducting layer, which consists of a chalcopyrite compound, and a n-conducting layer, which is adjacent to the p-conducting layer and consists of a compound that contains titanium and oxygen, is provided.
    Type: Application
    Filed: July 25, 2001
    Publication date: April 18, 2002
    Inventor: Franz Karg
  • Patent number: 6372980
    Abstract: A two-terminal tandem solar cell is provided. The inclusion of thin (few nm-thick) narrow band-gap InGaAs quantum wells in the intrinsic (i) region of the conventional p-i-n GaAs solar cell extends the photo-absorption of the conventional GaInP/GaAs tandem cell toward the infrared. Beginning-of-Life efficiencies in excess of 30% are predicted. Modeling data indicate end-of-life efficiency of these cells will exceed 25% AM0.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: April 16, 2002
    Assignee: University of Houston
    Inventor: Alexandre Freundlich
  • Patent number: 6372981
    Abstract: A group-IV semiconductor substrate has an inclined front surface, the inclination being toward a direction differing from the <010>crystal lattice direction. The substrate is cleansed by heating in the presence of a gas including a compound of the group-IV substrate element. A source gas of a group-III element is then supplied, forming an atomic film of the group-III element on the substrate surface. Starting at the same time, or shortly afterward, a source gas of a group-V element is supplied, and a III-V compound semiconductor hetero-epitaxial layer is grown. Chemical bonding of the group-III element to the group-IV substrate surface produces a crystal alignment of the hetero-epitaxial layer that leads to improved conversion efficiency when the semiconductor substrate is used in the fabrication of solar cells with compound semiconductor base and emitter layers.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: April 16, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Takashi Ueda, Chouho Yamagishi, Osamu Goto
  • Publication number: 20020040727
    Abstract: Apparatus and Method for Optimizing the Efficiency of Germanium Junctions in Multi-Junction Solar Cells. In a preferred embodiment, an indium gallium phosphide (InGaP) nucleation layer is disposed between the germanium (Ge) substrate and the overlying dual-junction epilayers for controlling the diffusion depth of the n-doping in the germanium junction. Specifically, by acting as a diffusion barrier to arsenic (As) contained in the overlying epilayers and as a source of n-type dopant for forming the germanium junction, the nucleation layer enables the growth time and temperature in the epilayer device process to be minimized without compromising the integrity of the dual-junction epilayer structure. This in turn allows the arsenic diffusion into the germanium substrate to be optimally controlled by varying the thickness of the nucleation layer.
    Type: Application
    Filed: June 19, 2001
    Publication date: April 11, 2002
    Inventors: Mark A. Stan, Nein Y. Li, Frank A. Spadafora, Hong Q. Hou, Paul R. Sharps, Navid S. Fatemi
  • Patent number: 6359210
    Abstract: The present invention is directed to systems and methods for protecting a solar cell. The solar cell includes first solar cell portion. The first solar cell portion includes at least one junction and at least one solar cell contact on a backside of the first solar cell portion. At least one bypass diode portion is epitaxially grown on the first solar cell portion. The bypass diode has at least one contact. An interconnect couples the solar cell contact to the diode contact.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: March 19, 2002
    Assignee: Tecstar Power System, Inc.
    Inventors: Frank Ho, Milton Y. Yeh, Chaw-Long Chu, Peter A. Iles
  • Patent number: 6355874
    Abstract: The present invention provides a semiconductor device and a solar cell, which may be low-cost, highly efficient, safe, and last long. The semiconductor device has a compound semiconductor layer as a window layer including nitride compound semiconductor of at least one element selected from a group of Al, Ga and In and nitrogen, formed on a semiconductor substrate. The solar cell has a compound semiconductor layer containing a nitride compound semiconductor defined by a composition formula AlXGaYNW on a semiconductor substrate, where X, Y, Z and W represent a composition ratio, and satisfy 0.8≦(X+Y+Z)/W≦1.2 and 0.1≦Z/(X+Y+Z)≦1.0.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: March 12, 2002
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Shigeru Yagi, Seiji Suzuki
  • Patent number: 6353175
    Abstract: Two-terminal circuit has top and bottom cells bonded to an insulating substrate with the top cells bonded on top of the bottom cells. Bottom cells are connected in series through ribbon bonds. Top cells are connected in parallel through ribbon bonds. The ribbon bonds connect to the topsides of the top and bottom cells. The substrate contains metal die bonding pads for the base contacts to the bottom cells. Metal traces are provided for ribbon bond connections to emitter contacts for the bottom cells. A metal trace becomes a positive terminal pad for the bottom cells and a negative terminal for a second pad for the bottom cells. Two cell assemblies may be series connected by connecting positive top cell output connectors with negative pads of top cells in adjacent cell assemblies, and by connecting positive bottom cell output connectors with negative pads of bottom cells in adjacent assemblies.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: March 5, 2002
    Assignee: JX Crystals Inc.
    Inventor: Lewis M. Fraas
  • Patent number: 6323417
    Abstract: Provided is a method for making layers of I-III-VI semiconductor materials for use in photovoltaic cells, and particularly for making CIS and variations on CIS, such as CIGS and CIGSS. The method includes formation of a plurality of precursor films of the elemental components and at least one final heat treatment step in which the final semiconductor material is formed, with the precursor film for at least one III component being deposited prior to any precursor film including the I component.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: November 27, 2001
    Assignee: Lockheed Martin Corporation
    Inventors: Timothy J. Gillespie, Craig H. Marshall, Bruce R. Lanning
  • Patent number: 6316715
    Abstract: A multijunction photovoltaic cell comprises a first subcell that initially receives incident light upon the photovoltaic cell, with the first subcell being made of a first material system, having a first thickness, and producing a first photogenerated current output. A second subcell receives the incident light after the first subcell receives the incident light, with the second subcell being disposed immediately adjacent the first subcell. The second subcell is made of the first material system or a similar semiconductor material, has a second thickness that is greater than the first thickness, and produces a second photogenerated current output that is substantially equal in amount to the first photogenerated current output. A tunnel junction is disposed between the first and second subcells. The multijunction cell provides a greater ability to current match to low-current-producing subcells, higher multijunction cell voltage, lower series resistance, and greater radiation resistance.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: November 13, 2001
    Assignee: The Boeing Company
    Inventors: Richard R. King, David E. Joslin, Nasser H. Karam
  • Patent number: 6316716
    Abstract: A solar cell includes a substrate carrier for current generating photoactive layers that include at least one front layer and one layer toward the substrate of different polarities, a front contact, at least one back contact and an integral protective diode which has a polarity opposite the solar cell integrated in and disposed on a front side of the solar cell and including at least one diode semiconductor layer. A tunnel diode extends between the photoactive layers and a region of the substrate toward the front, the tunnel diode being recessed adjacent the protective diode. The region of the substrate toward the front, or a layer toward the front applied to or formed by the front, together with a photoactive layer of corresponding polarity toward the front, make up the at least one diode semiconductor layer of the protective diode.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: November 13, 2001
    Assignee: Angewandte Solarenergie - Ase GmbH
    Inventor: Just Hilgrath
  • Patent number: 6313398
    Abstract: There are disclosed multi-crystalline silicon which is added with Ga (gallium) as a dopant and a method for producing Ga-doped multi-crystalline silicon, which comprises adding Ga to silicon melt in a crucible, which is melted by heating, and cooling the silicon melt to allow growth of multi-crystalline silicon. According to the present invention, there are provided multi-crystalline silicon and a multi-crystalline silicon wafer for producing solar cells showing stable conversion efficiency for light energy without causing photodegradation as well as methods for producing them.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: November 6, 2001
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Toru Yamada, Katsushi Tokunaga, Teruhiko Hirasawa
  • Patent number: 6310281
    Abstract: A new, large-area, thin-film, flexible photovoltaic structure is disclosed, as well as a general fabrication procedure, including a preferably roll-to-roll-type, process-chamber-segregated, “continuous-motion”, method for producing such a structure. A special multi-material vapor-deposition environment is disclosed to implement an important co-evaporation, layer-deposition procedure performed in and as part of the fabrication procedure. A structural system adapted to create a vapor environment generally like that just referred to is disclosed, as is an organization of method steps involved in the generation of such a vapor environment. Also, a unique, vapor-creating, materials-distributing system, which includes specially designed heated crucibles with carefully arranged, spatially distributed, localized and generally point-like, heated-nozzle sources of different metallic vapors, and a special multi-fingered, comb-like, vapor-delivering manifold structure is shown.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: October 30, 2001
    Assignee: Global Solar Energy, Inc.
    Inventors: Robert G. Wendt, Gregory M. Hanket, Robert W. Birkmire, T. W. Fraser Russell, Scott Wiedeman
  • Patent number: 6307148
    Abstract: An indium layer and a copper layer, and whenever necessary, a gallium layer or a gallium-alloy layer, are laminated on an electrode film formed on one of the surfaces of a substrate to form a metallic film. The metallic film is then subjected to sulfurization treatment or selenization treatment to form a p-type semiconductor layer made of “CuInS2 or CuInSe2” or “Cu(In, Ga)S2 or Cu(In, Ga)Se2”. This p-type semiconductor layer is subjected to KCN treatment, for removing impurities such as copper sulfide, copper selenide, etc., by a KCN solution, and an n-type semiconductor layer is formed on this p-type semiconductor layer to form a solar cell. In this instance, the indium layer is formed under heating, or is heat-treated by heat-treatment while the surface of the indium layer is exposed.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: October 23, 2001
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kenji Takeuchi, Yoshio Onuma, Sumihiro Ichikawa
  • Publication number: 20010027805
    Abstract: The present invention is directed to systems and methods for protecting a solar cell. The solar cell includes first solar cell portion. The first solar cell portion includes at least one junction and at least one solar cell contact on a backside of the first solar cell portion. At least one bypass diode portion is epitaxially grown on the first solar cell portion. The bypass diode has at least one contact. An interconnect couples the solar cell contact to the diode contact.
    Type: Application
    Filed: January 2, 2001
    Publication date: October 11, 2001
    Inventors: Frank Ho, Milton Y. Yeh, Chaw-Long Chu, Peter A. Iles
  • Patent number: 6300558
    Abstract: A solar cell comprises at least a germanium (Ge) substrate, buffer layers formed on the germanium substrate, a first InxGa1-xAs layer of first conductivity type formed on the buffer layers, and a second InxGa1-xAs layer of second conductivity type formed on the first InxGa1-xAs layer to form pn junction. Because the composition x of In contained in the first InxGa1-xAs layer and the second InxGa1-xAs layer is in a range of 0.005≦x≦0.015, the inexpensive and high conversion efficiency solar cell can be achieved.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: October 9, 2001
    Assignee: Japan Energy Corporation
    Inventors: Tatsuya Takamoto, Hiroshi Kurita, Takaaki Agui, Eiji Ikeda
  • Patent number: 6300557
    Abstract: A low-bandgap, double-heterostructure PV device is provided, including in optical alignment a first InP1−yAsy n-layer formed with an n-type dopant, an GaxIn1−xAs absorber layer, the absorber layer having an n-region formed with an n-type dopant and an p-region formed with a p-type dopant to form a single pn-junction, and a second InP1−yAsy p-layer formed with a p-type dopant, wherein the first and second layers are used for passivation and minority carrier confinement of the absorber layers.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: October 9, 2001
    Assignee: Midwest Research Institute
    Inventor: Mark W. Wanlass
  • Patent number: 6297442
    Abstract: It is to provide an essentially transparent solar cell of high efficiency that can be used by accumulating with a display device to generate electricity simultaneously with utilization of the display function, a self-power-supply display device comprising the same, and a process for producing the solar cell. The solar cell comprises at least a transparent conductive substrate having thereon a photoconductor layer that is transparent to a visible ray and has an absorbance of 0.8 or less at a wavelength of from 400 to 800 nm, and a transparent conductive electrode in this order. An embodiment, in which the photoconductor layer contains at least one element selected from Group IIIA elements and at least one element selected from Group VA elements in the Periodic Table, and an embodiment, in which the photoconductor layer contains a metallic oxide semiconductor, are preferred.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: October 2, 2001
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Shigeru Yagi, Seiji Suzuki, Nobuyuki Torigoe
  • Publication number: 20010018924
    Abstract: A photoelectric converting device is provided with enhanced photoelectric conversion efficiency by optimizing a combination of materials used for top and bottom cells. The photoelectric converting device of the present invention is provided with first and second pn junctions. The first pn junction is formed in a semiconductor substantially represented by (Al1−yGay)1−xInxP, and the second pn junction is formed in a semiconductor substantially represented by Ga1−zInzAs.
    Type: Application
    Filed: February 9, 2001
    Publication date: September 6, 2001
    Inventors: Tadashi Hisamatsu, Kazuyo Nakamura, Yuji Komatsu, Masafumi Shimizu
  • Patent number: 6281426
    Abstract: A multi-junction, monolithic, photovoltaic solar cell device is provided for converting solar radiation to photocurrent and photovoltage with improved efficiency. The solar cell device comprises a plurality of semiconductor cells, i.e., active p/n junctions, connected in tandem and deposited on a substrate fabricated from GaAs or Ge. To increase efficiency, each semiconductor cell is fabricated from a crystalline material with a lattice constant substantially equivalent to the lattice constant of the substrate material. Additionally, the semiconductor cells are selected with appropriate band gaps to efficiently create photovoltage from a larger portion of the solar spectrum. In this regard, one semiconductor cell in each embodiment of the solar cell device has a band gap between that of Ge and GaAs.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: August 28, 2001
    Assignee: Midwest Research Institute
    Inventors: Jerry M. Olson, Sarah R. Kurtz, Daniel J. Friedman
  • Patent number: 6281036
    Abstract: A method of fabricating Cu&agr;(InxGa1−x)&bgr;(SeyS1−y)&ggr; films for solar cells includes forming an electrode on a substrate and supplying the substrate and electrode with Cu, In, Ga, Se, and S to form a Cu&agr;(InxGa1−x)&bgr;(SeyS1−y)&ggr; film. Simultaneously with the supplying of Cu, In, Ga, Se and S, the substrate is supplied with water vapor or a gas that contains a hydroxyl group.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: August 28, 2001
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Shigeru Niki, Akimasa Yamada, Paul Fons, Hiroyuki Oyanagi
  • Patent number: 6278054
    Abstract: The present invention is directed to systems and methods for protecting a solar cell. The solar cell includes first solar cell portion. The first solar cell portion includes at least one junction and at least one solar cell contact on a backside of the first solar cell portion. At least one bypass diode portion is epitaxially grown on the first solar cell portion. The bypass diode has at least one contact. An interconnect couples the solar cell contact to the diode contact.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: August 21, 2001
    Assignee: Tecstar Power Systems, Inc.
    Inventors: Frank Ho, Milton Y. Yeh, Chaw-Long Chu, Peter A. Iles
  • Patent number: 6271461
    Abstract: Thermophotovoltaic (TPV) electric power generators have emitters with infrared (IR) outputs matched with usable wavelengths for converter cells. The emitters have durable substrates, optional refractory isolating layers, conductive refractory metal or inter-metallic emitter layers, and refractory metal oxide antireflection layers. SiC substrates have tungsten or TaSi2 emitter layers and 0.14 micron HfO2, ZrO2, Al2O3, Ta2O5 and TiO2 antireflection layers used as IR emitters for GaSb converter cells in TPV generators.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: August 7, 2001
    Assignee: JX Crystals Inc.
    Inventors: Lewis M. Fraas, John E. Samaras, James E. Avery
  • Patent number: 6265653
    Abstract: An array of independently connected photovoltaic cells on a semi-insulating substrate contains reflective coatings between the cells to enhance efficiency. A uniform, flat top laser beam profile is illuminated upon the array to produce electrical current having high voltage. An essentially wireless system includes a laser energy source being fed through optic fiber and cast upon the photovoltaic cell array to prevent stray electrical signals prior to use of the current from the array. Direct bandgap, single crystal semiconductor materials, such as GaAs, are commonly used in the array. Useful applications of the system include locations where high voltages are provided to confined spaces such as in explosive detonation, accelerators, photo cathodes and medical appliances.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: July 24, 2001
    Assignee: The Regents of the University of California
    Inventors: Ronald E. Haigh, Steve Wojtczuk, Gerard F. Jacobson, Karla G. Hagans
  • Patent number: 6259016
    Abstract: The present invention includes a substrate, a lower electrode film, a p-type semiconductor layer (a second semiconductor layer), an n-type semiconductor layer (a first semiconductor layer), an upper electrode film and an anti-reflection film, which are stacked sequentially on the substrate in this order, and an interconnection electrode formed on the upper electrode film. The first semiconductor layer is free from Cd, and the second semiconductor layer is a light-absorption layer. The band gap Eg1 of the first semiconductor layer and the band gap Eg2 of the second semiconductor layer satisfy a relationship: Eg1>Eg2. The electron affinity &khgr;1 (eV) of the first semiconductor layer and an electron affinity &khgr;2 (eV) of the second semiconductor layer satisfy a relationship: 0≦(&khgr;2−&khgr;1)<0.5.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: July 10, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takayuki Negami, Yasuhiro Hashimoto, Shigeo Hayashi
  • Patent number: 6255580
    Abstract: An improved photovoltaic cell, according to one embodiment, includes a base layer; a primary window layer having a first type of doping, with the primary window layer being disposed over the base layer; and a secondary window layer having the first type of doping, with the secondary window layer being disposed over the primary window layer. In another embodiment, the improved photovoltaic cell has a multilayer back-surface field structure; a base layer disposed over the back-surface field structure; and a primary window layer disposed over the base layer. In yet another embodiment, the photovoltaic cell includes a base layer; and a primary window layer disposed over the base layer, with the primary window layer having a thickness of at least about 1000 Angstroms.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: July 3, 2001
    Assignee: The Boeing Company
    Inventors: Nasser H. Karam, James H. Ermer, Richard R. King, Moran Haddad, Bruce T. Cavicchi