Copper Containing Patents (Class 156/89.18)
  • Patent number: 11937366
    Abstract: A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 19, 2024
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tzu Hsuan Wang, Yu Cheng Lin
  • Patent number: 11721485
    Abstract: A multilayer ceramic electronic component includes a ceramic body including a dielectric layer and an internal electrode, an electrode layer connected to the internal electrode, and a conductive resin layer disposed on the electrode layer. The conductive resin layer includes a conductive metal, a metal having a lower melting point than the conductive metal, a conductive carbon, and a base resin. The metal having the lower melting point than the conductive metal is tin (Sn). The conductive metal of the conductive resin layer includes at least one of copper (Cu), nickel (Ni), silver (Ag), and silver-palladium (Ag—Pd).
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: August 8, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hye Hun Park, Won Kuen Oh, Tae Gyeom Lee, Ji Hong Jo
  • Patent number: 11364714
    Abstract: A fluororesin base material containing a fluororesin as a main component includes a modified layer on at least a partial region of a surface thereof, the modified layer containing a siloxane bond and a hydrophilic organofunctional group, and a surface of the modified layer having a contact angle of 90° or less with pure water.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: June 21, 2022
    Assignees: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC., Sumitomo Electric Industries, Ltd.
    Inventors: Satoshi Kiya, Sumito Uehara, Kousuke Miura, Makoto Nakabayashi
  • Patent number: 10923621
    Abstract: The present invention uses a photolithography process and an electroplating process to perform. TAV copper filling and patterning of the fabrication of the double side copper-plated layers to plate the double side copper-plated layers in advance at the TAV through holes to serve as a stress buffer layer of the aluminum nitride substrates. Then the subsequent pattern designs of the copper-plated layers are customized. According to the simulation theory calculations, it is proved that the stress which accumulates on the short-side of the copper-plated layer of the aluminum nitride substrate with the asymmetric structure may be effectively reduced to facilitate the improvement of the reliability of the aluminum nitride substrate.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: February 16, 2021
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Chun-Te Wu, Yang-Kuo Kuo, Cheng-Hung Shih, Hong-Ting Huang
  • Patent number: 10070512
    Abstract: A multilayer circuit board includes a first substrate and a second substrate in stack. The first substrate is provided with two first pads, two second pads, and two first sub-circuits. The first pads and the second pads are electrically connected to the first sub-circuits. The second substrate has a top surface, a bottom surface, a lateral edge, and two openings. The bottom surface of the second substrate is attached to the top surface of the first substrate. The openings extend from the top surface to the bottom surface of the second substrate. The first pads of the first substrate are in the opening of the second substrate; the second pads of the first substrate are not covered by the second substrate. The second substrate is further provided with a pad on the top surface and a second sub-circuit electrically connected to the pad of the second substrate.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: September 4, 2018
    Inventors: Wei-Cheng Ku, Jun-Liang Lai, Chih-Hao Ho
  • Patent number: 10039179
    Abstract: A wiring substrate includes: a substrate body made from ceramic, having a front surface and a rear surface, and having a through hole penetrating between the front surface and the rear surface; and a heatsink inserted into the through hole. A step portion protruding in a direction perpendicular to an axial direction of the through hole, is formed over an entire periphery on an inner wall surface of the through hole of the substrate body. A flange opposed to the step portion is provided so as to protrude, over an entire periphery on a side surface of the heatsink. A stress relaxing ring is arranged over an entire periphery between the step portion and a joining surface opposed to the step portion. A brazing material is provided between the ring, and the joining surface and the step portion.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: July 31, 2018
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventor: Kensuke Matsuhashi
  • Patent number: 9765426
    Abstract: The present invention relates to sputter targets for electrochemical device layer deposition comprising a lithium-containing target material with near-metallic electrical conductivity which includes (a) at least one metal and (b) a lithium-containing material, the lithium-containing material being selected from the group consisting of lithium metal and a lithium-containing salt, wherein the at least one metal and the lithium-containing material are formed into the lithium-containing target material and wherein the lithium-containing target material is configured with a composition sufficient for physical vapor deposition of a lithium-containing electrode of the electrochemical device in a single step, the lithium-containing electrode as deposited requiring no further lithium doping. Furthermore, the composition of the metallic lithium-containing target material may be configured to provide a low enough electrical resistance to permit DC sputtering.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: September 19, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Byung-Sung Leo Kwak, Lizhong Sun, Jan Isidorsson, Chong Jiang
  • Patent number: 9462704
    Abstract: An extended landing pad substrate package includes a dielectric layer having an upper surface and an opposite lower surface. A lower circuit pattern is embedded in the lower surface of the dielectric layer. The lower circuit pattern includes traces having a first thickness and extended landing pads having a second thickness greater than the first thickness. Blind via apertures are formed through an upper circuit pattern embedded into the upper surface of the dielectric layer, through the dielectric layer and to the extended landing pads. The length of the blind via apertures is minimized due to the increase second thickness of the extended landing pads as compared to the first thickness of traces. Accordingly, the width of the blind via apertures at the upper surface of the dielectric layer is minimized.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: October 4, 2016
    Inventors: David Jon Hiner, Ronald Patrick Huemoeller
  • Patent number: 9368439
    Abstract: Embodiments of the invention generally relate to package substrates for integrated circuits. The package substrates each include a core having electrically conductive vias therethrough. Build-up layers formed from dielectric materials having different compositions are disposed around the core and include interconnects formed therein for facilitating electrical connections between integrated circuits coupled to the package substrate. The dielectric materials are selected to allow finer interconnect geometries where desired, and to increase the rigidity, and thus planarity, of the package substrate. Exemplary dielectric materials include pre-impregnated composite fibers for increasing the rigidity of a package substrate, and Ajinomoto Build-up Film for allowing the formation finer interconnect geometries.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: June 14, 2016
    Assignee: NVIDIA Corporation
    Inventors: Leilei Zhang, Zuhair Bokharey
  • Patent number: 9312219
    Abstract: An interposer is provided, including a composite body and a plurality of conductive through vias penetrating the composite body. The composite body includes at least a main layer and at least a combining layer stacked on one another. The combining layer prevents the main layer from being cracked. The combining layer is more flexible than the main layer. The combining layer prevents the main layer from being cracked. Therefore, the main layer can be thinned on demands, and the interposer can be thinned accordingly.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: April 12, 2016
    Inventor: Dyi-Chung Hu
  • Patent number: 9156190
    Abstract: The present invention provides a method for sintering, comprising in the following order the steps of: providing a body in the green state or in the pre-sintered state on a support; providing a load on at least one spacer on the support such that the load is located above said body in the green state or in the pre-sintered state without contacting the body; heat treating the body in the green state or in the pre-sintered state at a temperature above the decomposition temperature of organic components contained in the green body and below the softening temperature or decomposition temperature of the spacer; heat treating the body in the green state or in the pre-sintered state at a temperature above the softening point or decomposition temperature of the spacer and below a sintering temperature such that the load contacts the body, and—sintering the body in the green state or pre-sintered state.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: October 13, 2015
    Assignee: Technical University of Denmark
    Inventor: Søren Linderoth
  • Publication number: 20150132589
    Abstract: A multi-layered structural element and a method for producing a multi-layered structural element are disclosed. In an embodiment dielectric green sheets, at least one ply containing an auxiliary material which contains at least one copper oxide and layers containing electrode material are provided and arranged alternately one above another. These materials are debindered and sintered. The copper oxide is reduced to form the copper metal and the at least one ply is degraded during debindering and sintering.
    Type: Application
    Filed: April 22, 2013
    Publication date: May 14, 2015
    Applicant: EPCOS AG
    Inventors: Marlene Fritz, Marion Ottlinger
  • Publication number: 20150116895
    Abstract: There are provided a conductive paste composition for an external electrode, a multilayer ceramic electronic component using the same, and a manufacturing method thereof, and more specifically, a conductive paste composition for an external electrode, allowing for decreased blister and glass beading defects by improving a removal of residual carbon at low temperature before necking between metal particles is generated and the metal particles are densified during a firing process of the external electrode, a multilayer ceramic electronic component using the same, and a manufacturing method thereof.
    Type: Application
    Filed: January 22, 2014
    Publication date: April 30, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Hee YOO, Sim Chung KANG, Byung Jun JEON, Jun Hyeong KIM, Eun Joo CHOI, Kyu Ha LEE
  • Publication number: 20150085422
    Abstract: A multilayer ceramic capacitor includes a ceramic body including dielectric layers; first and second internal electrodes facing each other while having the dielectric layer disposed therebetween, and alternately exposed to end surfaces of the ceramic body; first and second external electrodes electrically connected to the first and second internal electrodes, wherein each of the first and second external electrodes includes a first external electrode layer formed of material containing copper and glass and extending from an end surface of the ceramic body to portions of main and side surfaces of the ceramic body; a second external electrode layer formed of material containing glass, disposed on the first external electrode layer, and being shorter than the first external electrode layer to expose portion of the first external electrode layer; and a third external electrode layer formed of material containing copper and glass and covering the first and second external electrode layers.
    Type: Application
    Filed: December 27, 2013
    Publication date: March 26, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Byong Gyun KIM, Duk Hyun CHUN, Kyoung No LEE, Youn Sik JIN, Eun Sang NA, Doo Young KIM
  • Publication number: 20150022945
    Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body including a plurality of dielectric layers; a plurality of first and second internal electrodes disposed in the ceramic body to be alternately exposed to the third and fourth end surfaces, having the dielectric layers interposed therebetween; and first and second external electrodes electrically connected to the first and second internal electrodes, wherein the first and second external electrodes include: first and second conductive glass layers; first and second conductive resin layers containing copper and an epoxy; and first and second insulating layers.
    Type: Application
    Filed: December 20, 2013
    Publication date: January 22, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Soo PARK, Heung Kil PARK
  • Publication number: 20140340812
    Abstract: Provided is an ESD protection device having high insulation reliability and good discharge characteristics. An ESD protection device includes a first discharge electrode and a second discharge electrode that are disposed so as to face each other, a discharge auxiliary electrode (18) formed so as to span between the first discharge electrode and the second discharge electrode, and an insulator base that holds the first discharge electrode, the second discharge electrode, and the discharge auxiliary electrode (18). The discharge auxiliary electrode (18) includes an aggregate of a plurality of metal particles (24) each having a core-shell structure including a core portion (22) that contains, as a main component, a first metal and a shell portion (23) that contains, as a main component, a metal oxide containing a second metal. A pore (26) is present in at least part of the shell portion (23).
    Type: Application
    Filed: July 28, 2014
    Publication date: November 20, 2014
    Inventors: Takahiro Sumi, Jun Adachi, Takayuki Tsukizawa, Kumiko Ishikawa
  • Patent number: 8876996
    Abstract: The invention relates to a method for the manufacture of double-sided metallized ceramic substrates according to the direct-bonding process. The method enables a ceramic substrate to be bonded to a metal plate or foil on the upper side and the underside in only one process sequence. The composite to be bonded is located on a specially designed carrier structured on the upper side with a plurality of contact points. After the bonding process the composite of metal plates and ceramic substrate can be detached from the carrier free of any residue.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: November 4, 2014
    Assignee: IXYS Semiconductor GmbH
    Inventors: Werner Weidenauer, Thomas Spann, Heiko Knoll
  • Publication number: 20140226254
    Abstract: There are provided a conductive paste composition, a multilayer ceramic capacitor using the same, and a manufacturing method thereof. The conductive paste composition includes a conductive metal powder; a ceramic powder; and a resin, wherein the conductive paste composition has a theoretical density of 6 g/cm3 or higher and a relative density of 95% or more.
    Type: Application
    Filed: April 26, 2013
    Publication date: August 14, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Ho KIM, Kyung Jin CHOI, Young Sik CHOI, Ji Hwan KIM, Dae Yu KIM, Ro Woon LEE
  • Publication number: 20140192453
    Abstract: There is provided a conductive resin composition including 10 to 50 wt % of a gel type silicon rubber such as polydimethylsiloxane (PDMS), and 50 to 90 wt % of conductive metal powder particles.
    Type: Application
    Filed: March 11, 2013
    Publication date: July 10, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyung Pyo HONG, Hyun Hee GU, Byoung Jin CHUN, Jae Hwan HAN
  • Publication number: 20140063684
    Abstract: There is provided conductive paste composition for an external electrode including: a first metal powder particle having a spherical shape and formed of a fine copper; and a second metal powder particle coated on a surface of the first metal powder particle and having a melting point lower than that of the copper.
    Type: Application
    Filed: December 20, 2012
    Publication date: March 6, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyu Ha LEE, Chang Joo LEE, Jae Hwan HAN, Hye Seong KIM, Chang Hoon KIM, Hyun Hee GU, Kyung Pyo HONG, Sung Koo KANG, Byoung Jin CHUN, Byung Jun JEON
  • Publication number: 20140049874
    Abstract: There is provided an electronic component including: a ceramic body; internal electrodes formed within the ceramic body; and external electrodes electrically connected to the internal electrodes, formed on external surfaces of the ceramic body, and including a metal powder having nano protrusions formed of an organic metal on a surface of a metal particle.
    Type: Application
    Filed: December 17, 2012
    Publication date: February 20, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kwi Jong LEE, Sung Il OH
  • Publication number: 20140043720
    Abstract: There is provided a multilayered ceramic electronic component including: a multilayered body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on the dielectric layers so as to be alternately exposed through end surfaces; a minimum margin indicating part formed on an L-direction margin part on which the first or second internal electrode is not formed on the dielectric layer and indicating a minimum size of the L-direction margin part, the L-direction minimum margin indicating part being inserted on the ceramic sheet, whereby a multilayered ceramic electronic component having high capacitance while reducing a defect and having excellent reliability may be implemented.
    Type: Application
    Filed: November 7, 2012
    Publication date: February 13, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS, CO., INC.
    Inventors: Seok Joon HWANG, Je Jung KIM
  • Publication number: 20130258546
    Abstract: There are provided a multilayer ceramic electronic component and a fabrication method thereof. The multilayer ceramic component includes a ceramic main body in which internal electrodes and dielectric layers are alternately laminated; external electrodes formed on outer surfaces of the ceramic main body; intermediate layers formed on the external electrodes and including one or more selected from the group consisting of nickel, copper, and a nickel-copper alloy; and plating layers formed on the intermediate layers, whereby infiltration of a plating solution can be prevented.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 3, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Kong KIM, Jin Yung RYU, Jun AH, Yong Joon KO, Woo Kyung SUNG, Jong Rock LEE
  • Publication number: 20130057378
    Abstract: Disclosed herein are a magnetic substrate, a common mode filter, a method for manufacturing a magnetic substrate, and a method for manufacturing a common mode filter. The common mode filter includes: a coil part including an insulation layer and a conductor pattern formed in the insulation layer; and a magnetic substrate coupled to one surface or both surfaces of the coil part, wherein the magnetic substrate includes: an electrostatic absorbing layer made of an electrostatic absorbing material; a magnetic layer provided on one surface or both surfaces of the electrostatic absorbing layer and made of a magnetic material; and an electrode provided between the magnetic layer and the electrostatic absorbing layer and made of a conductive material. Therefore, common mode filter may maintain high efficiency characteristics while preventing an electrostatic discharge phenomenon.
    Type: Application
    Filed: August 9, 2012
    Publication date: March 7, 2013
    Inventors: Sung Kwon WI, Jeong Bok KWAK, Sang Moon LEE, Young Seuck YOO, Yong Suk KIM
  • Patent number: 8377240
    Abstract: A method is disclosed for producing metal-ceramic substrates that are metallized on both sides by using the direct bonding process. According to the method, at least one DCB stack made from first and a second metal layer and a ceramic layer located between said metal layers is formed on a separating layer of a support by heating to a direct bonding temperature. At least one of the metal layers rests against the separating layer during the bonding process, said separating layer being composed of a porous layer or coating made of a separating layer material from the group comprising mullite, Al2O3, TiO3, ZrO2, MgO, CaO CaCO2 or a mixture of at least two of said materials.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: February 19, 2013
    Assignee: Curamik Electronics GmbH
    Inventors: Jurgen Schulz-Harder, Andreas Karl Frischmann, Alexander Rogg, Karl Exel
  • Publication number: 20120222888
    Abstract: The invention relates to a printed circuit board (PCB) with a heat dissipating structure. The PCB comprises a conducting layer and a PCB carrier layer, wherein the PCB carrier layer is a porous heat conducting layer; heat conducting liquid or a solid-liquid phase change heat conducting material is injected into holes of the porous heat conducting layer; the conducting layer is arranged on a first surface of the porous heat conducting layer; and a second surface of the porous heat conducting layer is a contact interface with external media.
    Type: Application
    Filed: May 9, 2011
    Publication date: September 6, 2012
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONIC tECHNOLOGY CO.,LTD
    Inventor: Tian Zhang
  • Publication number: 20120154977
    Abstract: There are provided a conductive paste composition for a termination electrode, a multilayer ceramic capacitor having the same, and a method thereof. The conductive paste composition for a termination electrode includes a conductive metal powder and a glass frit represented by the following Formula: aSiO2-bB2O3-cAl2O3-dTMxOy-eR12O-fR2O, where TM is a transition metal selected from a group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe) and nickel (Ni); R1 is selected from a group consisting of lithium (Li), sodium (Na) and potassium (K); R2 is selected from a group consisting of magnesium (Mg), calcium (Ca), strontium (Sr) and barium (Ba); each of x and y is larger than 0; and ‘a’ ranges from 15 to 70 mol %, ‘b’ ranges from 15 to 45 mol %, ‘c’ ranges from 1 to 10 mol %, ‘d’ ranges from 1 to 50 mol %, ‘e’ ranges from 2 to 30 mol % and ‘f’ ranges from 5 to 40 mol %.
    Type: Application
    Filed: May 19, 2011
    Publication date: June 21, 2012
    Inventors: Kang Heon HUR, Chang Hoon KIM, Sung Bum SOHN, Ji Sook KIM, Hyun Hee GU, Gun Jung YOON, Kyu Ha LEE, Sang Hoon KWON, Myung Jun PARK
  • Publication number: 20110234045
    Abstract: In a method of forming a plating layer for an external terminal electrode by applying, for example, copper plating to an end surface of a component main body with respective ends of internal electrodes exposed, and then applying a heat treatment at a temperature of about 1000° C. or more in order to improve the adhesion strength and moisture resistance of the external terminal electrode, the plating layer may be partially melted to decrease the bonding strength of the plating layer. In the step of applying a heat treatment at a temperature of about 1000° C. or more to a component main body with plating layers formed thereon, the average rate of temperature increase from room temperature to the temperature of about 1000° C. or more is set to about 100° C./minute or more. This average rate of temperature increase maintains a moderate eutectic state in the plating layer and ensures a sufficient bonding strength of the plating layer.
    Type: Application
    Filed: March 18, 2011
    Publication date: September 29, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro MOTOKI, Syunsuke TAKEUCHI, Makoto OGAWA, Seiichi NISHIHARA, Kenichi KAWASAKI, Shuji MATSUMOTO
  • Publication number: 20110089967
    Abstract: Provided are a micro-electro-mechanical system (MEMS) probe card and a method for manufacturing the same. The method includes preparing first to nth low-temperature co-fired ceramic (LTCC) substrates each having a via hole, filling each via hole with a via filler conductor or a resistor, stacking the first to nth LTCC substrates and firing the stacked substrates at a temperature of 1,000° C. or less to prepare a LTCC multilayer substrate, forming an insulating layer on the surface of the LTCC multilayer substrate, and forming a thin film conductive line on the surfaces of the insulating layer and the via filler conductor.
    Type: Application
    Filed: April 21, 2009
    Publication date: April 21, 2011
    Inventor: Sanghee Kim
  • Publication number: 20100154875
    Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having p-type silicon base and an n-type silicon layer is provided with a silicon nitride layer, an exchange metal in contact with the silicon nitride layer, and a non-exchange metal in contact with the exchange metal. This assembly is fired to form a metal silicide contact on the silicon substrate, and a conductive metal electrode in contact with the metal silicide contact. The exchange metal is from nickel, cobalt, iron, manganese, molybdenum, and combinations thereof, and the non-exchange metal is from silver, copper, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, gold, cadmium, berrylium, and combinations thereof.
    Type: Application
    Filed: November 13, 2009
    Publication date: June 24, 2010
    Applicant: E. I. DU PONT DE NEMOURS AND COMPNAY & NORTH CAROLINA STATE UNIVERSITY
    Inventors: William J. Borland, Howard David Glicksman, Jon-Paul Maria
  • Publication number: 20090067117
    Abstract: A multi-layer ceramic capacitor, which has an internal electrode of good continuity and may be obtained at a relatively low cost, is disclosed. The internal electrode layer comprises metal particles, wherein the arithmetic mean particle diameter of the metal particles, which is determined based on the particle diameter in the direction parallel with the plane direction of the internal electrode layer, is made smaller than the thickness of the internal electrode layer. The multi-layer ceramic capacitor can be obtained by forming the internal electrode layer using a conductive paste containing a conductive power comprising Ni metal particles coated with particles of a base metal selected from Mn, Co, Fe, Cu, Nb, Ba, Ca, Sr, Ti, Zn, V, and rare earth metals, particles of an oxide thereof and applying a heat treatment in a reducing firing atmosphere having an oxygen partial pressure from about 10?14 to 10?18 atm.
    Type: Application
    Filed: July 24, 2008
    Publication date: March 12, 2009
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi Kasuya, Youichi Mizuno
  • Publication number: 20080053592
    Abstract: A method of applying a ceramic coating to a substrate comprises laminating one or more layers of a green ceramic tape to a rigid substrate using a tackifying resin to adhere the tape to the substrate. Upon firing, the tackifying resin ensures near zero shrinkage of the tape in the XY plane without usage of elevated pressures or temperatures during lamination of green tape to the substrate. The thermal degradation completion temperature of the tackifying resin is lower than that of the resin binder used in the green tape.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 6, 2008
    Applicant: Ferro Corporation
    Inventors: Chandrashekhar S. Khadilkar, Srinivasan Sridharan, Aziz S. Shaikh
  • Publication number: 20070218259
    Abstract: A laminate includes a first ceramic green sheet, a second ceramic green sheet, and a conductor layer. The first ceramic green sheet includes ceramic powder and an organic binder and has a firing shrinkage end temperature T3. The second ceramic green sheet includes ceramic powder and an organic binder and has a firing shrinkage start temperature T2 that is higher than the firing shrinkage end temperature T3 of the first ceramic green sheet. The conductor layer includes metal powder and an organic binder and has a firing shrinkage end temperature T4 that is lower than the firing shrinkage start temperature T2 of the second ceramic green sheet.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 20, 2007
    Applicant: KYOCERA Corporation
    Inventors: Sentarou Yamamoto, Kouji Yamamoto, Mitsugi Ogawauchi, Satoru Kajihara
  • Patent number: 7189297
    Abstract: A method of manufacturing an Electro Static Discharge (ESD) protection componentin which slurry including varistor particles and a resin binder is produced, and a varistor green sheet is formed from this slurry. A conductor layer is formed on a surface of the varistor green sheet. A adhesive layer is formed on a baked ceramic substrate, the varistor green sheet is adhered to the adhesive layer and then baked. The method produces a high-performance and uniform ESD protection component.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: March 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hidenori Katsumura, Tatsuya Inoue, Hiroshi Kagata
  • Patent number: 7127812
    Abstract: A board 20 is provided with a Cu film 30 as a conformal mask, in which are formed a register mark 30b and an opening 3a through which a via hole is formed. A camera senses this register mark 30b so that the position of the board 30 is determined. A laser beam is directed to the approximate position of the opening 30a, so that the opening 26a through which the via hole is drilled is formed. The accuracy of the position of the opening of the via hole depends on the accuracy of the position of the opening 30a in the Cu film 30 as the conformal mask. Therefore, the via hole can be formed at an adequate position despite the low accuracy of the position for laser irradiation.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: October 31, 2006
    Assignee: IBIDEN Co., Ltd.
    Inventors: Yasuji Hiramatsu, Motoo Asai, Naohiro Hirose, Takashi Kariya
  • Patent number: 7122131
    Abstract: The present invention is directed to a conductive paste for via conductor, comprising a Cu powder having a glass layer formed on the surface, a Ni powder having a metal oxide layer formed on the surface, and a ceramic component homogeneous as that of a ceramic component contained in a green sheet, a ceramic wiring board such as laminated ceramic capacitor, comprising via conductors formed of the same, and a method of manufacturing the same. According to the present invention, via conductors having excellent electrical conductivity can be formed by preventing the formation of a Cu—Ni alloy due to the reaction of the Cu powder and the Ni powder.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: October 17, 2006
    Assignee: Kyocera Corporation
    Inventor: Hisashi Satou
  • Patent number: 7063813
    Abstract: This invention provides a stacked ceramic body that prevents reaction between components of dielectric layers and components of electrode layers of an unsintered stacked body during sintering and in which both components do not easily form a liquid phase, and a production method of such a stacked ceramic body. A print portion 13 is formed on a green sheet 1, 12 containing lead by use of an electrode paste consisting of copper oxide as its main component. A desired number of print sheets 10 are stacked to give an unsintered stacked body 15. Degreasing is conducted in an atmosphere to degrease organic components. The print portion 13 is subjected to reducing treatment in a reducing atmosphere containing hydrogen and is converted to a print portion 13 containing copper as its main component. The unsintered stacked body 15 is sintered in a reducing atmosphere.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: June 20, 2006
    Assignee: Denso Corporation
    Inventors: Toshiatsu Nagaya, Takashi Yamamoto, Akira Fujii, Atsuhiro Sumiya, Hitoshi Shindo, Eturo Yasuda
  • Patent number: 7011726
    Abstract: A method of fabricating a thin dielectric film, a thin dielectric film formed according to the method, and a system including the thin dielectric film. The method includes: depositing a ceramic precursor material on a metal sheet, the ceramic precursor material including a mixture comprising ceramic particles and an organic carrier medium; heat treating the ceramic precursor material such that the organic carrier medium is substantially burnt off, and further such that a dielectric layer is formed including ceramic grains formed from the ceramic particles, and having grain sizes between about 100 nm and about 500 nm; depositing a CSD precursor material onto the dielectric layer; and heat treating the CSD precursor material such that organics in the CSD precursor material are substantially burnt off, and further such that a CSD medium is formed from the CSD precursor material including CSD grains substantially filling the voids between the ceramic grains.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Patent number: 6972060
    Abstract: This invention provides a method for producing a stacked ceramic body that does not require strict control of an oxygen partial pressure in a sintering gas. To produce a stacked ceramic body by alternately stacking dielectric layer and electrode layers, an unsintered stacked body 2 is prepared by alternately stacking unsintered dielectric layers containing a PZT type dielectric material and unsintered electrode layers containing an electrode material, and is sintered in a sintering gas to which a dielectric layer anti-reducing agent 21 and an electrode layer anti-oxidant 22 are introduced. Alternatively, sintering is conducted in a gas containing only the dielectric layer anti-reducing agent 21 or in a gas containing only the electrode layer anti-oxidant 22.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: December 6, 2005
    Assignee: Nippon Soken, Inc.
    Inventors: Eturo Yasuda, Atsuhiro Sumiya, Hitoshi Shindo, Toshiatsu Nagaya, Takashi Yamamoto
  • Patent number: 6964718
    Abstract: Co-fired multilayer piezoelectric ceramic materials with base metal electrodes based on copper, copper alloy, are found as an effective approach to manufacture low cost multilayer piezoelectrics. The method of the invention is performed at low firing temperature and without the oxidation of base metal or reduction of ceramic components. A variety of ceramic materials may be used and copper is the preferred base metal in the multi-layer piezoelectric devices of the invention. This copper has additional protection against oxidation with a small inorganic coating on the surface. With such protection, the binder and other organics can also be efficiently removed and produce superior performance in the piezoelectric structured devices.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: November 15, 2005
    Assignee: The Penn State Research Foundation
    Inventors: Clive A. Randall, Amanda L. Baker, Yi Fang, Thomas Shrout, Alfons Kelnberger
  • Patent number: 6960271
    Abstract: A laminate type dielectric device is formed by alternately laminating dielectric ceramic layers and electrode layers and integrally baking the laminate product. The electode layers are mainly made of an electrically conductive base metal material having greater standard Gibbs free energy for the formation of a metal oxide at a baking temperature than that of the ceramic material constituting the dielectric ceramic layers. Segregation of the materials including the electrically conductive base metal material does not occur at portions sandwiched between adjacent positive and negative electrode layers among the dielectric ceramic layers.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: November 1, 2005
    Assignees: Denso Corporation, Nippon Soken, Inc.
    Inventors: Hitoshi Shindo, Etsuro Yasuda, Atsuhiro Sumiya, Takashi Yamamoto, Toshiatsu Nagaya
  • Patent number: 6861622
    Abstract: A negative temperature coefficient thermistor includes a thermistor element containing a transition metal oxide as a main component; internal electrodes disposed in the thermistor element; and external electrodes, electrically connected to the internal electrodes. A method for manufacturing such a thermistor includes providing green ceramic sheets for forming the thermistor element; applying a conductive paste for forming the internal electrodes onto some of the green ceramic sheets to form internal electrode layers; stacking the green ceramic sheets and the green ceramic sheets with the paste to form a green compact; firing the green compact to obtain a fired compact; and forming the external electrodes.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: March 1, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Kakihara, Takehiko Ishii, Kenji Nagareda, Masahiko Kawase, Satoshi Fujita
  • Patent number: 6855222
    Abstract: A method for producing a laminated electronic component produces a laminated electronic component having a superior surge-proofing property, a sufficient resistance to a flux, and excellent electrical properties, without experience the occurrence of structural effects such as cracking, delamination, or other structural defects. Conductive paste is prepared to contain conductive particles and resin particles having a thermal decomposition-ability. The resin particles have an average particle size of about 0.25 to about 1.50 times the average particle size of the conductive particles. The volume ratio of the resin particles is in the range of about 0.5 to about 1.0 the volume of the conductive particles. The conductive paste is applied to the surface of a ceramic layer to form a conductor layer. The ceramic layers and the conductor layers are alternately laminated. The laminate is fired to form a ceramic sintered laminate. Thus, a laminated electronic component is produced.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: February 15, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masaharu Konoue, Kimiharu Anao
  • Patent number: 6846375
    Abstract: The present invention provides a method of manufacturing a low-temperature sintering multilayer ceramic wiring board comprising the steps of: forming a wiring layer by printing conductive paste (4) on an unfired green sheet (1); forming a laminate by laminating, on at least one side of a ceramic substrate, the unfired green sheet having the wiring layer; and firing the laminate. The present invention also provides paste for use with this method. In the firing step, after an adhesive layer (8) or binder resin in said green sheet used for lamination burns, glass ceramic in the green sheet starts to sinter, and upon or after the start of sintering of the glass ceramic, conductive particles in the conductive paste starts to sinter. This manufacturing method can provide an precise wiring board without pattern deformation and also provide a low-temperature ceramic multilayer wiring board that has no cracks in the glass ceramic on the periphery of electrodes and has electrodes of a dense film structure.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: January 25, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaaki Hayama, Kazuhiro Miura, Akira Hashimoto, Takeo Yasuho
  • Patent number: 6723192
    Abstract: A composite substrate in which the surface of the insulating layer is not influenced by the electrode layer and which requires neither a grinding process nor a sol-gel process, is easy to produce and can provide a thin-film EL device having a high display quality when used therein; a thin-film EL device using the substrate; and a production process for the device. The thin-film EL device is produced by forming a luminescent layer, other insulating layer and other electrode layer successively on a composite substrate comprising a substrate; an electrode layer embedded in the substrate in such a manner that the electrode layer and the substrate are in one plane; and an insulating layer formed on the surface of a composite comprising the substrate and the electrode layer.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: April 20, 2004
    Assignee: TDK Corporation
    Inventors: Katsuto Nagano, Taku Takeishi, Suguru Takayama, Takeshi Nomura, Yukie Nakano, Daisuke Iwanaga
  • Patent number: 6660116
    Abstract: A capacitive filtered feedthrough assembly is formed in a solid state manner to employ highly miniaturized conductive paths each filtered by a discoid capacitive filter embedded in a capacitive filter array. A non-conductive, co-fired metal-ceramic substrate is formed from multiple layers that supports one or a plurality of substrate conductive paths and it is brazed to a conductive ferrule, adapted to be welded to a case, using a conductive, corrosion resistant braze material. The metal-ceramic substrate is attached to an internally disposed capacitive filter array that encloses one or a plurality of capacitive filter capacitor active electrodes each coupled to a filter array conductive path and at least one capacitor ground electrode. Each capacitive filter array conductive path is joined with a metal-ceramic conductive path to form a feedthrough conductive path.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: December 9, 2003
    Assignee: Medtronic, Inc.
    Inventors: William D. Wolf, James Strom, Craig L. Wiklund, Mary A. Fraley, Lynn M. Seifried, James E. Volmering, Patrick F. Malone, Samuel F. Haq
  • Patent number: 6627020
    Abstract: A method to control the post sinter distortion of free sintered multilayer ceramic substrates by placing a discrete non-densifying structure in the green ceramic laminate prior to sintering. One or several discrete non-densifying structures are placed on one or more ceramic greensheets which are then stacked and laminated to form a green ceramic laminate. The laminate is then sintered and the discrete non-densifying structure will locally control the dimensions of the free sintered multilayer ceramic substrate. The method can be used to control post sinter dimensions in MLC substrates manufactured as either single or multi-up substrates by placing the discrete non-densifying structure in the active area or in the kerf area between the individual product ups prior to sintering.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Raschid Jose Bezama
  • Patent number: 6623663
    Abstract: An electroconductive paste is provided containing from about 5% to 18% by weight of an organic vehicle comprising a solvent and a binder, from about 80% to 93% by weight of an electroconductive metal powder in a spherical or granular shape and with a particle diameter in the range of about 0.1 to 50 &mgr;m, and from about 2% to 10% by weight of a resin powder with a particle diameter in the range of about 0.1 to 50 &mgr;m which is insoluble in the solvent and has a low level of water absorption. When this paste is used for forming via hole conductors to be converted to external electrode terminals, there is no problem of shape deformation of the via hole conductors. Furthermore, it is possible to restrict crack generation on the sintered electroconductive metal and to restrict breakage of the ceramic areas in the vicinity of the via hole conductors.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: September 23, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuhito Oshita, Yoshiki Nakagawa
  • Patent number: 6610241
    Abstract: Certain embodiments relate to a process for forming a multilayer electrical device. The process includes providing a multilayer structure including layers of a dielectric material and an electrode material. The electrode material may include at least one material selected from the group consisting of nickel and copper. A variety of dielectric materials may be used, such as barium titanate. The method also includes sintering the dielectric material by heating the structure using microwaves in an industrial nitrogen atmosphere, which contains an oxygen partial pressure of 10−2 to 10−12 atm.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: August 26, 2003
    Assignee: The Penn State Research Foundation
    Inventors: Thomas R. Shrout, Dinesh Agrawal, Balasubramaniam Vaidhyanathan
  • Patent number: 6488795
    Abstract: A method of producing a multilayered ceramic substrate in which wiring conductors can be provided on both main surfaces and the density of the wiring conductors can be increased by a non-shrinkage process. In the producing method, a green composite laminated product in which metallic foils are arranged to cover both main surfaces of a green laminated structure comprising a plurality of ceramic green sheets on which conductive paste is coated for forming internal wiring conductors is burned. In this burning step, shrinkage of the ceramic green sheets is suppressed by the metallic foils in the direction of the main surfaces thereof. After burning, the metallic foils are patterned by etching based on photolithographic technology to form external conductor films.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: December 3, 2002
    Assignee: Murata Manufacturing Co. Ltd
    Inventor: Norio Sakai