Forming Electrical Article Or Component Thereof Patents (Class 156/89.12)
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Patent number: 12073987Abstract: A multilayer coil component includes an insulator portion, a coil embedded in the insulator portion and including a plurality of coil conductor layers electrically connected together, and an outer electrode disposed on a surface of the insulator portion and electrically connected to the coil. The insulator portion is a multilayer body including first and second insulator layers. The coil conductor layers and the second insulator layers are disposed on the first insulator layers. The multilayer coil component has void layers (e.g., voids) between the first insulator layers and at least a portion of the coil conductor layers. If the thickness of the first insulator layers is a, the thickness of the coil conductor layers is b, and the thickness of the void layers is c, the ratio of c to b (c/b) is 0.10 to 0.70, and the ratio of a to b (a/b) is 0.25 to 1.00.Type: GrantFiled: December 23, 2020Date of Patent: August 27, 2024Assignee: Murata Manufacturing Co., Ltd.Inventors: Shun Takai, Atsuo Hirukawa
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Patent number: 12070736Abstract: The disclosed pre-concentrator comprises: a base substrate having a trench; a metal layer conformally disposed along the inner surface of the trench; and a three-dimensional porous nanostructure disposed on the metal layer in the trench and having aligned pores connected to each other in three dimensions. The pre-concentrator can improve the concentration performance of a sample and the thermal desorption efficiency of a concentrated sample.Type: GrantFiled: February 19, 2019Date of Patent: August 27, 2024Assignee: Korea Advanced Institute of Science and TechnologyInventors: Seokwoo Jeon, Donghwi Cho, Junyong Park
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Patent number: 12066349Abstract: Shaped body, in particular for a pressure sensor, having a membrane and having a supporting section supporting the membrane, the membrane being produced at least in sections from a ceramic material by means of additive manufacturing, in particular 3D screen printing, and the greatest possible distance between two points lying on the outer circumference of the membrane (12) is less than 20 mm.Type: GrantFiled: December 17, 2019Date of Patent: August 20, 2024Assignee: Exentis Knowledge GmbHInventors: Srdan Vasic, Rafael Schmitt
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Patent number: 12062741Abstract: A method for producing a conversion element comprising the following steps is described: providing a conversion layer having a matrix, in which phosphor particles are brought in, the phosphor particles comprising a host lattice having activator ions and being concentrated in a enrichment zone, providing a compensation layer having the matrix, in which compensation particles are brought in, which comprise the host lattice and are concentrated in a enrichment zone, and joining the conversion layer and the compensation layer in such a way that the enrichment zone of the conversion layer and the enrichment zone of the compensation layer are arranged symmetrically to one another with respect to a symmetry plane of the conversion element. A conversion element and a component are also specified.Type: GrantFiled: November 11, 2019Date of Patent: August 13, 2024Assignee: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Ivar Tångring, Nusret Sena Güldal
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Patent number: 12063738Abstract: A multilayer substrate includes a multilayer body in which insulating layers are laminated in a laminating direction, a front electrode that is provided on a front surface side of a first insulating layer which is positioned on a front surface side of the multilayer body among the insulating layers, a first internal electrode that is provided on an opposite side to the front electrode with the first insulating layer interposed therebetween, and a first interlayer connection conductor that electrically connects the front electrode and the first internal electrode with each other. The first interlayer connection conductor includes a front side connection surface that is electrically connected with the front electrode and a back side connection surface that is electrically connected with the first internal electrode.Type: GrantFiled: August 29, 2022Date of Patent: August 13, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Kosuke Nishio, Kazuya Soda
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Patent number: 12051543Abstract: There is provided a multilayer electronic component in which a short circuit between the internal electrodes, a decrease in capacitance, a decrease in breakdown voltage, and the like, may be suppressed by controlling an area fraction occupied by a region in which an intensity of brightness in a capacitance formation portion is 110% or more and 126% or less of an average value of an intensity of brightness of a cover portion.Type: GrantFiled: May 16, 2022Date of Patent: July 30, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seon Jae Mun, Gi Long Kim, Tae Gyeom Lee, Byung Rok Ahn, Kyoung Jin Cha, Jong Ho Lee
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Patent number: 12040495Abstract: An all-solid-state battery including a laminated body in which a positive electrode having a positive electrode current collector layer and a positive electrode active material layer and a negative electrode having a negative electrode current collector layer and a negative electrode active material layer, are laminated with a solid electrolyte layer therebetween; a pair of a positive external electrode and a negative external electrode provided on one of pairs of side surfaces of the laminated body facing each other; wherein the positive electrode current collector layer is bonded to the positive external electrode and the negative electrode current collector layer is bonded to the negative external electrode; the thickness of a portion of at least one of the positive electrode current collector layer and the negative electrode current collector layer which is bonded to the positive external electrode or the negative external electrode is thicker than the other portion.Type: GrantFiled: November 20, 2019Date of Patent: July 16, 2024Assignee: TDK CORPORATIONInventor: Kazumasa Tanaka
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Patent number: 12027316Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers which are stacked and internal electrode layers which are stacked, and external electrodes, each connected to the internal electrode layers. The external electrodes each include a conductive resin layer and a plated layer on the conductive resin layer. The conductive resin layer includes a resin portion, conductive fillers dispersed in the resin portion, and metal particles dispersed unevenly in a distribution differing from that of the conductive fillers in the conductive resin layer. An abundance ratio of the metal particles to the resin portion is higher on a side of the plated layer of the conductive resin layer than on a side of the conductive resin layer close to the multilayer body.Type: GrantFiled: August 8, 2023Date of Patent: July 2, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Yoshiyuki Nomura
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Patent number: 12020847Abstract: A multilayer coil component includes an insulator portion, a coil embedded in the insulator portion and including a plurality of coil conductor layers electrically connected together, and an outer electrode disposed on a surface of the insulator portion and electrically connected to the coil. The coil conductor layers have a thickness of 30 ?m to 60 ?m. The coil conductor layers are rectangular and include a corner portion with a radius of curvature of 0.08 mm to 0.24 mm.Type: GrantFiled: December 22, 2020Date of Patent: June 25, 2024Assignee: Murata Manufacturing Co., Ltd.Inventors: Shun Takai, Makoto Yamamoto
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Patent number: 12020867Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.Type: GrantFiled: February 16, 2023Date of Patent: June 25, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Daiki Fukunaga, Hideaki Tanaka, Masahiro Wakashima, Daisuke Hamada, Hironori Tsutsumi, Satoshi Maeno, Ryota Aso, Koji Moriyama, Akihiro Tsuru
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Patent number: 12004308Abstract: Processes for laminating a graphene-coated printed circuit board (PCB) are disclosed. An example laminated PCB may include a lamination stack that may include an inner core, an adhesive layer, and at least one graphene-metal structure. Pressure and heat—which may be applied under vacuum or controlled gas atmosphere—may be applied to the lamination stack, after all materials have been placed. The graphene of the graphene-metal structure is designed to promote high frequency performance and heat management within the PCB.Type: GrantFiled: July 1, 2021Date of Patent: June 4, 2024Assignees: Mellanox Technologies, Ltd., BAR-ILAN University, PCB Technologies LtdInventors: Boaz Atias, Elad Mentovich, Yaniv Rotem, Doron Naveh, Adi Levi, Yosi Ben-Naim, Yaad Eliya, Shlomo Danino, Eran Lipp
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Patent number: 11958785Abstract: A method of bonding includes applying a glass composition to at least a first material surface. The glass composition includes a glass powder and a solvent. The first material surface is disposed onto a second material surface. An elevated temperature is applied to the first material surface and the second material surface to form a bond between the first material surface and the second material surface. The first material surface and the second material surface are compressed under an isostatic pressure.Type: GrantFiled: November 12, 2019Date of Patent: April 16, 2024Assignee: RAYTHEON COMPANYInventors: Stephanie Silberstein Bell, Thomas M. Hartnett, Richard Gentilman, Derrick J. Rockosi, Jeremy Wagner
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Patent number: 11955354Abstract: Provided is a semiconductor substrate manufacturing device which is capable of uniformly heating the surface of a semiconductor substrate that has a relatively large diameter or major axis. The semiconductor substrate manufacturing device includes a container body for accommodating a semiconductor substrate and a heating furnace that has a heating chamber which accommodates the container body, and the heating furnace has a heating source in a direction intersecting the semiconductor substrate to be disposed inside the heating chamber.Type: GrantFiled: March 25, 2020Date of Patent: April 9, 2024Assignees: KWANSEI GAKUIN EDUCATIONAL FOUNDATION, TOYOTA TSUSHO CORPORATIONInventor: Tadaaki Kaneko
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Patent number: 11929210Abstract: A multi-layer ceramic electronic component includes: a ceramic body including a main surface, an end surface, and a side surface respectively perpendicular to a first axis, a second axis, and a third axis orthogonal to one another, a top portion that connects the main surface, the end surface, and the side surface to one another, and a plurality of internal electrodes laminated in a direction of the first axis; and an end external electrode including a corner portion located on the top portion, a base portion that covers the end surface and extends from the end surface to the main surface and the side surface, and a protrusion that protrudes from the base portion in a thickness direction, the protrusion including an L-shaped main surface protrusion located on the main surface and extending in directions of the second axis and the third axis from the corner portion.Type: GrantFiled: March 16, 2022Date of Patent: March 12, 2024Assignee: TAIYO YUDEN CO., LTD.Inventors: Tomohiko Zaima, Takashi Sasaki, Kunihiro Matsushita
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Patent number: 11862401Abstract: A multilayer capacitor and a board having the same mounted thereon are provided. The multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, and first to sixth surfaces, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; first and second external electrodes; a first step-compensating portion disposed on a margin portion in a width direction on the second dielectric layer on which the second internal electrode is formed on the first internal electrode; and a second step-compensating portion disposed on another margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed on the second internal electrode.Type: GrantFiled: April 11, 2023Date of Patent: January 2, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hoon Kim, Beom Seock Oh, Kyoung Ok Kim, Kwang Sic Kim
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Patent number: 11842852Abstract: A multilayer ceramic capacitor includes first and second main surfaces opposite to each other in a thickness direction, first and second side surfaces opposite to each other in a width direction, first and second end surfaces opposite to each other in a longitudinal direction, an element body including dielectric layers and internal electrode layers stacked in the thickness direction, and a pair of external electrodes on the first and second end surfaces and electrically connected to the internal electrode layers, in which the dielectric layers include, as a main component, a perovskite oxide including barium and titanium, and the dielectric layers include an inner portion that is in contact with the internal electrode layer and includes an interface layer including a non-perovskite oxide including tin, barium, and titanium.Type: GrantFiled: March 14, 2022Date of Patent: December 12, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Daisuke Hamada
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Patent number: 11817358Abstract: A circuit module includes a first wiring substrate having a first main surface and a plurality of first components mounted on the first main surface. The plurality of first components includes a multilayer component formed as a single chip by being sealed using resin members. The multilayer component includes a second wiring substrate having a second main surface and a third main surface that face each other, a second component mounted on the second main surface, and a third component mounted on the third main surface.Type: GrantFiled: January 6, 2021Date of Patent: November 14, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Kiyoshi Aikawa, Takafumi Kusuyama
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Patent number: 11787494Abstract: A component is provided for a human-powered vehicle. The component includes a component body, a strain gauge provided on the component body, a signal processing unit electrically connected to the strain gauge, a signal output that outputs a signal from the signal processing unit, and an electric power input electrically connected to the signal processing unit and supplied with electric power from a power supply provided on at least one of the human-powered vehicle and the component body. The strain gauge includes a substrate and a resistor provided on the substrate. The resistor is formed by a metal layer having a thickness of 0.01 micrometers or greater and 1 micrometer or less.Type: GrantFiled: April 13, 2021Date of Patent: October 17, 2023Assignee: Shimano Inc.Inventor: Shinya Fujimura
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Patent number: 11776745Abstract: A multilayer capacitor includes a body including a dielectric layer and internal electrodes; and an external electrode disposed on the body to be connected to the internal electrode, wherein the dielectric layer includes a plurality of grains having a core-shell structure having a pore in a core, and the dielectric layer includes 20% to 40% of grains having two or less pores, among the plurality of grains.Type: GrantFiled: August 20, 2021Date of Patent: October 3, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ki Myoung Yun, Joon Yeob Cho
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Patent number: 11776746Abstract: A multilayer capacitor includes a capacitor body in which a first capacitor portion and a second capacitor portion are disposed to face each other with a connection region disposed therebetween, the connection portion having a predetermined thickness in which an internal electrode is not formed. The first capacitor portion comprises first and second internal electrodes that are alternately disposed with a dielectric layer interposed therebetween, and the second capacitor portion comprises third and fourth internal electrodes that are alternately disposed with a dielectric layer interposed therebetween. First and second external electrodes connected to the internal electrodes respectively comprise first and second internal layers containing copper (Cu), and first and second external layers containing silver (Ag) or nickel (Ni), and palladium (Pd).Type: GrantFiled: July 15, 2022Date of Patent: October 3, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jeong In Kim, Min Jun Kim, Byung Kil Seo, Mi Ok Park
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Patent number: 11756737Abstract: A multi-layer ceramic capacitor includes: a multi-layer unit including ceramic layers laminated in a first direction and electrodes disposed between the ceramic layers, positions of end portions of the electrodes falling within a range of 0.5 ?m in a second direction; and side margins each containing manganese or magnesium and silicon and facing each other in the second direction. When each margin is equally divided into an inner region and an outer region, a total concentration of manganese and magnesium in the outer region is higher than a total concentration of manganese and magnesium in the inner region and higher than a total concentration of manganese and magnesium in the ceramic layers, and a concentration of silicon in the inner region is not less than a concentration of silicon in the outer region and higher than a concentration of silicon in the ceramic layers.Type: GrantFiled: January 31, 2022Date of Patent: September 12, 2023Assignee: TAIYO YUDEN CO., LTD.Inventor: Kotaro Mizuno
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Patent number: 11742147Abstract: The multilayer ceramic electronic component includes a ceramic body including a dielectric layer; and first and second internal electrodes disposed inside the ceramic body, and disposed to oppose each other with the dielectric layer interposed therebetween. When an average thickness of the dielectric layer is referred to as td and a standard deviation of a thickness of the dielectric layer in each position is referred to as ?td, while an average thickness of the first and second internal electrodes is referred to as te and a standard deviation of a thickness of a pre-determined region of any layer of the internal electrodes in each position is referred to as ?te, a ratio (?te/?td) of the standard deviation of the internal electrodes in each position to the standard deviation of the thickness of the dielectric layer in each position satisfies 1.10??te/?td?1.35.Type: GrantFiled: April 22, 2022Date of Patent: August 29, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Sung Kim, Hyeong Sik Yun, Woo Chul Shin, Joon Woon Lee
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Patent number: 11728093Abstract: A multilayer capacitor includes a capacitor body in which a first capacitor portion and a second capacitor portion are disposed to face each other with a connection region disposed therebetween, the connection portion having a predetermined thickness in which an internal electrode is not formed. The first capacitor portion comprises first and second internal electrodes that are alternately disposed with a dielectric layer interposed therebetween, and the second capacitor portion comprises third and fourth internal electrodes that are alternately disposed with a dielectric layer interposed therebetween. First and second external electrodes connected to the internal electrodes respectively comprise first and second internal layers containing copper (Cu), and first and second external layers containing silver (Ag) or nickel (Ni), and palladium (Pd).Type: GrantFiled: July 15, 2022Date of Patent: August 15, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jeong In Kim, Min Jun Kim, Byung Kil Seo, Mi Ok Park
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Patent number: 11705282Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers provided on opposing end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected with the internal electrode layers, in which the dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and when a dimension in the lamination direction of the multilayer body is defined as T0, a dimension in the length direction of the multilayer body is defined as L0, and a dimension in a width direction orthogonal or substantially orthogonal to the lamination direction and the length direction is defined as W0, a relationship of L0<W0<T0 is satisfied.Type: GrantFiled: July 6, 2021Date of Patent: July 18, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Haruki Kobayashi
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Patent number: 11685077Abstract: A method of manufacturing a wafer mounting table according to an embodiment includes: (a) a step of loading a ceramic slurry containing a ceramic powder and a gelling agent into opening portions of a metal mesh, inducing a chemical reaction of the gelling agent to gelate the ceramic slurry, and then performing degreasing and calcining to prepare a ceramic-loaded mesh; (b) a step of sandwiching the ceramic-loaded mesh between a first ceramic calcined body and a second ceramic calcined body obtained by calcining after mold cast forming so as to prepare a multilayer body; and (c) a step of hot press firing the multilayer body to prepare the wafer-receiving table.Type: GrantFiled: September 14, 2020Date of Patent: June 27, 2023Assignee: NGK INSULATORS, LTD.Inventors: Kazuhiro Nobori, Takuji Kimura
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Patent number: 11664167Abstract: A multi-layer ceramic electronic component includes: a multi-layer unit including ceramic layers laminated in a direction of a first axis, internal electrodes disposed between the ceramic layers, and first and second side surfaces on which end portions of the internal electrodes in a direction of a second axis orthogonal to the first axis are positioned; and first and second side margins that cover the first and second side surfaces, respectively. When the first and second side margins are each divided equally into first and second regions along a plane perpendicular to the direction of the first axis, the first side margin has a larger average thickness in the first region than in the second region, and the second side margin has a larger average thickness in the second region than in the first region.Type: GrantFiled: November 25, 2020Date of Patent: May 30, 2023Assignee: TAIYO YUDEN CO., LTD.Inventor: Yoichi Kato
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Patent number: 11651898Abstract: A multilayer capacitor and a board having the same mounted thereon are provided. The multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, and first to sixth surfaces, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; first and second external electrodes; a first step-compensating portion disposed on a margin portion in a width direction on the second dielectric layer on which the second internal electrode is formed on the first internal electrode; and a second step-compensating portion disposed on another margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed on the second internal electrode.Type: GrantFiled: October 27, 2021Date of Patent: May 16, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hoon Kim, Beom Seock Oh, Kyoung Ok Kim, Kwang Sic Kim
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Patent number: 11626249Abstract: A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer structure. A bent portion, in which the plurality of dielectric layers in a substantially same position along a stacking direction project along the stacking direction, is formed in the multilayer chip. In the bent portion, a through-hole is formed in two or more of the plurality of internal electrode layers. The through-hole is a defect portion in a first direction in which the first end face faces with the second end face and in a second direction that is vertical to the first direction in a plane of the plurality of internal electrode layers.Type: GrantFiled: November 20, 2020Date of Patent: April 11, 2023Assignee: TAIYO YUDEN CO., LTD.Inventor: Shin Nishiura
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Patent number: 11610736Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.Type: GrantFiled: July 7, 2021Date of Patent: March 21, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Daiki Fukunaga, Hideaki Tanaka, Masahiro Wakashima, Daisuke Hamada, Hironori Tsutsumi, Satoshi Maeno, Ryota Aso, Koji Moriyama, Akihiro Tsuru
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Patent number: 11600444Abstract: A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer structure. A bent portion, in which the plurality of dielectric layers in a substantially same position along a stacking direction project along the stacking direction, is formed in the multilayer chip. In the bent portion, a through-hole is formed in two or more of the plurality of internal electrode layers. The through-hole is a defect portion in a first direction in which the first end face faces with the second end face and in a second direction that is vertical to the first direction in a plane of the plurality of internal electrode layers.Type: GrantFiled: November 20, 2020Date of Patent: March 7, 2023Assignee: TAIYO YUDEN CO., LTD.Inventor: Shin Nishiura
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Patent number: 11557432Abstract: A ceramic electronic device includes: a multilayer chip having a structure in which each of dielectric layers and each of internal electrode layers are alternately stacked; and external electrodes provided on end faces of the multilayer chip, wherein a main component of the external electrodes is a first metal, wherein the internal electrode layers include the first metal and a second metal of which a melting point is higher than that of the first metal, wherein a diffusion coefficient of the first metal with respect to the second metal is larger than that of the second metal with respect to the first metal, wherein a number of a cavity in a range of 10 numbers of the internal electrode layers that are next to each other and are connected to a same external electrode of the first external electrode and the second external electrode is 1 or less.Type: GrantFiled: April 17, 2020Date of Patent: January 17, 2023Assignee: TAIYO YUDEN CO., LTD.Inventors: Takehiro Tanaka, Kotaro Mizuno, Yusuke Kowase
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Patent number: 11557420Abstract: Methods of coupling inductors in an IC device using interconnecting elements with solder caps and the resulting device are disclosed. Embodiments include forming a top inductor structure, in a top inductor area on a lower surface of a top substrate, the top inductor structure having first and second top terminals at its opposite ends; forming a bottom inductor structure, in a bottom inductor area on an upper surface of a bottom substrate, the bottom inductor structure having first and second bottom terminals at its opposite ends; forming top interconnecting elements on the lower surface of the top substrate around the top inductor area; forming bottom interconnecting elements on the upper surface of the bottom substrate around the bottom inductor area; forming solder bumps on lower and upper surfaces, respectively, of the top and bottom interconnecting elements; and connecting the top and bottom interconnecting elements to each other.Type: GrantFiled: February 13, 2017Date of Patent: January 17, 2023Assignee: GLOBALFOUNDRIES INC.Inventors: Tak Ming Mak, Ajit M. Dubey
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Patent number: 11515091Abstract: A multilayer capacitor includes a capacitor body in which a first capacitor portion and a second capacitor portion are disposed to face each other with a connection region disposed therebetween, the connection portion having a predetermined thickness in which an internal electrode is not formed. The first capacitor portion comprises first and second internal electrodes that are alternately disposed with a dielectric layer interposed therebetween, and the second capacitor portion comprises third and fourth internal electrodes that are alternately disposed with a dielectric layer interposed therebetween. First and second external electrodes connected to the internal electrodes respectively comprise first and second internal layers containing copper (Cu), and first and second external layers containing silver (Ag) or nickel (Ni), and palladium (Pd).Type: GrantFiled: June 15, 2020Date of Patent: November 29, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jeong In Kim, Min Jun Kim, Byung Kil Seo, Mi Ok Park
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Patent number: 11508513Abstract: A coil-embedded ceramic substrate includes a plurality of ceramic layers including multi-turn coil patterns provided thereon. At least one ceramic layer of the plurality of ceramic layers includes thereon a multi-turn coil pattern and dummy patterns not electrically connected to the multi-turn coil pattern. The multi-turn coil pattern winds around and extends parallel or substantially parallel to sides of the ceramic layer. The dummy patterns are each parallel or substantially parallel to corresponding ones of the sides of the ceramic layer as an extension of portion of the coil pattern in an extending direction.Type: GrantFiled: September 19, 2019Date of Patent: November 22, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Toshiro Adachi, Masataka Nakaniwa
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Patent number: 11398349Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.Type: GrantFiled: March 1, 2021Date of Patent: July 26, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Patent number: 11373802Abstract: A magnet and a method of forming the magnet are provided. The method includes forming a slurry comprising magnetic powder material and binder material and creating raw layers from the slurry. A magnetic field is applied to the raw layers to orient the magnetic powder material in a desired direction, and each layer is cured to form another layer on the most recent cured layer. The layers are attached together.Type: GrantFiled: July 10, 2018Date of Patent: June 28, 2022Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Yucong Wang, Dale A. Gerard
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Patent number: 11367573Abstract: A multilayer ceramic capacitor includes, in at least one of a region between an end of a first internal electrode layer which is not connected to a second external electrode and the second external electrode, and a region between an end of a second internal electrode layer which is not connected to a first external electrode and the first external electrode, in a length direction, a defect portion provided on a plane including a stacking direction and a width direction, such that the defect portion is located between the first dielectric ceramic layers in the stacking direction and is located between the second dielectric ceramic layer and the third dielectric ceramic layer in the width direction.Type: GrantFiled: December 23, 2020Date of Patent: June 21, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yu Tsutsui, Yuta Kurosu, Daiki Fukunaga, Yuta Saito, Masahiro Wakashima
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Patent number: 11298526Abstract: A device for promoting healing of an injury in a living being is provided. Such device is based upon an injury covering portion, which portion comprises an electroactive polymer, such as poled polyvinylidine difluoride (PVDF) or a copolymer of PVDF. The electroactive polymer has either pyroelectric properties, piezoelectric properties, or both.Type: GrantFiled: September 9, 2019Date of Patent: April 12, 2022Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASAInventors: Lisa S. Carnell, Emilie J. Siochi, Kam W. Leong
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Patent number: 11246215Abstract: A ceramic substrate of the present disclosure is a ceramic substrate including a ceramic body having a ceramic layer on a surface thereof and a surface electrode placed on a primary face of the ceramic body. Between the surface electrode and the ceramic layer is an oxide layer made of an insulating oxide having a melting point higher than the firing temperature for the ceramic layer. The oxide layer also extends on the ceramic layer not occupied by the surface electrode. The oxide layer on the ceramic layer not occupied by the surface electrode has a rough surface.Type: GrantFiled: February 21, 2019Date of Patent: February 8, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Ryota Asai, Yosuke Matsushita
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Patent number: 11224119Abstract: A resin multilayer substrate includes a plurality of insulating resin base material layers and a plurality of conductor patterns provided on the plurality of insulating resin base material layers. The plurality of conductor patterns include a plurality of signal lines provided at positions not overlapping each other as viewed from a laminating direction of the insulating resin base material layers, and a ground conductor overlapping the plurality of the signal lines as viewed from the laminating direction. Openings are provided in the ground conductor and, as viewed from the laminating direction, an aperture ratio is higher in an inner zone that is sandwiched between two signal lines than in an outer zone of the two signal lines.Type: GrantFiled: May 4, 2020Date of Patent: January 11, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Hiromasa Koyama
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Patent number: 11212913Abstract: Resin films, all of which are formed of the same resin material, are laminated to form a laminate. Heat and pressure are applied to the laminate to integrate the resin films into one piece; then the pressure applied to the laminate is released and the laminate is cooled. In a predetermined region of the laminate which is to constitute a bent part, one or more of the resin films are arranged on each of one side and the other side in a lamination direction of the resin films with respect to one conductor pattern; and the total thickness of the one or more resin films arranged on the one side is larger than the total thickness of the one or more resin films arranged on the other side. Consequently, the predetermined region can be bent by utilizing the difference between contraction force generated in the one or more resin films arranged on the one side and contraction force generated in the one or more resin films arranged on the other side during the cooling after the application of heat and pressure.Type: GrantFiled: August 22, 2016Date of Patent: December 28, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Toshikazu Harada
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Patent number: 11145464Abstract: A multilayer ceramic capacitor includes a ceramic body including an active portion that includes a dielectric layer and a plurality of internal electrodes overlapping each other across the dielectric layer, and cover portions formed above and below the active portion, and including first and second surfaces opposing each other, third and fourth surfaces connecting the first and second surfaces, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other, and first and second side margin portions disposed on the first and second surfaces. In a cross-section of the ceramic body in a length-thickness (L-T) direction, a ratio Sd/Sc of an area Sd of a region except for the active portion to an overall area Sc of the cross-section is greater than 27%.Type: GrantFiled: May 29, 2020Date of Patent: October 12, 2021Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yeong Ju Choe, Min Woo Kim, Eun Jung Lee, Ki Pyo Hong
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Patent number: 11120934Abstract: An electronic component includes a main body made from a metal magnetic powder and an insulating resin, a coating film covering the surface of the main body, a conductor disposed inside the main body, inorganic particles adhering to the surface of the coating film, and outer electrodes which are electrically connected to the conductor and which cover portions of the surface of the coating film while inorganic particles adhere to the portions, wherein the coating film contains a resin and metal cations.Type: GrantFiled: August 13, 2019Date of Patent: September 14, 2021Assignee: Murata Manufacturing Co., Ltd.Inventors: Hironobu Kubota, Mitsunori Inoue
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Patent number: 11104114Abstract: A multi-layered structural element and a method for producing a multi-layered structural element are disclosed. In an embodiment dielectric green sheets, at least one ply containing an auxiliary material which contains at least one copper oxide and layers containing electrode material are provided and arranged alternately one above another. These materials are debindered and sintered. The copper oxide is reduced to form the copper metal and the at least one ply is degraded during debindering and sintering.Type: GrantFiled: April 22, 2013Date of Patent: August 31, 2021Assignee: EPCOS AGInventors: Marion Ottlinger, Marlene Fritz
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Patent number: 11067533Abstract: A manufacturing method for a sensor element includes a forming step. The forming step includes: a step (a) of forming an unfired electrode on one of plural green sheets; a step (b) of forming an unfired electrode lead and an unfired lead insulating layer on the same green sheet as in the step (a), the unfired electrode lead and to be connected to the unfired electrode, the unfired lead insulating layer surrounding at least part of the unfired electrode lead; and a step (c) of forming an unfired bonding layer so as to fill at least part of a region without the unfired lead insulating layer on the green sheet subjected to the step (b) and so as to overlap at least part of an edge portion of the unfired lead insulating layer.Type: GrantFiled: January 18, 2019Date of Patent: July 20, 2021Assignee: NGK INSULATORS, LTD.Inventors: Shiho Iwai, Takeya Miyashita
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Patent number: 10943736Abstract: A method of manufacturing a multilayer ceramic electronic component which includes preparing first and second ceramic green sheets; forming an internal electrode pattern on the first ceramic green sheet using a conductive metal paste; forming a ceramic member on first and second end portions of a first surface of the second ceramic green sheet to form a step portion absorption layer; stacking two or more of the first ceramic green sheets on each other in a stacking direction to form a first group; stacking two or more of the first ceramic green sheets on each other in the stacking direction to form a second group; and placing the second ceramic green sheet between the first group and the second group in the stacking direction to form a ceramic body, wherein the first and second end portions oppose each other in a first direction perpendicular to the stacking direction.Type: GrantFiled: April 3, 2019Date of Patent: March 9, 2021Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Ho Lee, Jae Yeol Choi, Ki Pyo Hong, Beom Seock Oh
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Patent number: 10930420Abstract: A coil component includes a magnetic body part and a coil part. The magnetic body part has first and second magnetic layers stacked together alternately in one axis direction, and cover parts covering the first and second magnetic layers from the one axis direction. The coil part has conductor patterns provided on the second magnetic layers. The magnetic body part includes: oblate soft magnetic grain-containing layers extending over the entire range of the magnetic body part in the direction perpendicular to the one axis direction, exposed in the direction perpendicular to the one axis direction, and formed by oblate soft magnetic grains whose thickness direction is oriented in the one axis direction; and spherical grain-containing layers adjoining the oblate soft magnetic grain-containing layers in the one axis direction, and formed by insulative spherical grains.Type: GrantFiled: November 30, 2017Date of Patent: February 23, 2021Assignee: TAIYO YUDEN CO., LTD.Inventors: Masahiro Hachiya, Hitoshi Matsuura, Takayuki Arai, Shuhei Kurahashi, Hideo Machida, Hidekazu Teshigawara, Naoya Honmo
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Patent number: 10910550Abstract: The invention relates to a piezoceramic material with reduced lead content, based on potassium sodium niobate (PSN) and having a defined parent composition. According to the invention the manner of addition of a mixture of Pb, Nb and optionally Ag and optionally Mn gives a wide sintering range together with reproducible electrical and mechanical properties of the material.Type: GrantFiled: August 7, 2014Date of Patent: February 2, 2021Assignee: PI CERAMIC GMBHInventors: Eberhard Hennig, Antje Kynast, Michael Töpfer, Michael Hofmann
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Patent number: 10650973Abstract: A method of manufacturing a multilayer ceramic electronic component includes preparing a green mother laminate in which ceramic layers and inner electrode layers are stacked; cutting the mother laminate perpendicularly or substantially perpendicularly to a main surface of the mother laminate and in a first direction when the mother laminate is viewed in plan such that first sectional surfaces are formed, and pressing the mother laminate to obtain a bonded laminate in which the first sectional surfaces are bonded to each other; and separating the bonded laminate between the first sectional surfaces to obtain laminates. Then, the bonded laminate is cut perpendicularly or substantially perpendicularly to the main surface and in a second direction that intersects the first sectional surfaces such that second sectional surfaces are formed.Type: GrantFiled: May 19, 2016Date of Patent: May 12, 2020Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yuya Takagi, Togo Matsui, Hikaru Okuda
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Patent number: 10566409Abstract: An integrated, quantized inductor, comprising a plurality of identical inductor sections, is provided for multiple applications on the chip. The inductor section represents one turn and includes two stacked metal layers with identical area and configuration, separated by dielectric layers, winding around the insulated ferromagnetic core, and interconnected by via. Power transformer, having a primary winding and multiple secondary windings comprised of a plurality of identical inductor sections and a shielded common ferromagnetic core ring, placed outside of the active chip area between the seal ring and pad-ring enhanced area. Inside of active chip area, in proximity to the related linear RF components are placed sensitive inductors, balun-transformers, resonator, separately protected by EM guard rings, wherein one node is open, and the second one is tied to the ground. The fabrication is compatible with integrated circuits manufacturing.Type: GrantFiled: May 10, 2016Date of Patent: February 18, 2020Inventors: Dumitru Nicolae Lesenco, Nicolae Dumitru Lesenco