Forming Electrical Article Or Component Thereof Patents (Class 156/89.12)
  • Patent number: 11398349
    Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: July 26, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
  • Patent number: 11373802
    Abstract: A magnet and a method of forming the magnet are provided. The method includes forming a slurry comprising magnetic powder material and binder material and creating raw layers from the slurry. A magnetic field is applied to the raw layers to orient the magnetic powder material in a desired direction, and each layer is cured to form another layer on the most recent cured layer. The layers are attached together.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 28, 2022
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Yucong Wang, Dale A. Gerard
  • Patent number: 11367573
    Abstract: A multilayer ceramic capacitor includes, in at least one of a region between an end of a first internal electrode layer which is not connected to a second external electrode and the second external electrode, and a region between an end of a second internal electrode layer which is not connected to a first external electrode and the first external electrode, in a length direction, a defect portion provided on a plane including a stacking direction and a width direction, such that the defect portion is located between the first dielectric ceramic layers in the stacking direction and is located between the second dielectric ceramic layer and the third dielectric ceramic layer in the width direction.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: June 21, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yu Tsutsui, Yuta Kurosu, Daiki Fukunaga, Yuta Saito, Masahiro Wakashima
  • Patent number: 11298526
    Abstract: A device for promoting healing of an injury in a living being is provided. Such device is based upon an injury covering portion, which portion comprises an electroactive polymer, such as poled polyvinylidine difluoride (PVDF) or a copolymer of PVDF. The electroactive polymer has either pyroelectric properties, piezoelectric properties, or both.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: April 12, 2022
    Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASA
    Inventors: Lisa S. Carnell, Emilie J. Siochi, Kam W. Leong
  • Patent number: 11246215
    Abstract: A ceramic substrate of the present disclosure is a ceramic substrate including a ceramic body having a ceramic layer on a surface thereof and a surface electrode placed on a primary face of the ceramic body. Between the surface electrode and the ceramic layer is an oxide layer made of an insulating oxide having a melting point higher than the firing temperature for the ceramic layer. The oxide layer also extends on the ceramic layer not occupied by the surface electrode. The oxide layer on the ceramic layer not occupied by the surface electrode has a rough surface.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: February 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Ryota Asai, Yosuke Matsushita
  • Patent number: 11224119
    Abstract: A resin multilayer substrate includes a plurality of insulating resin base material layers and a plurality of conductor patterns provided on the plurality of insulating resin base material layers. The plurality of conductor patterns include a plurality of signal lines provided at positions not overlapping each other as viewed from a laminating direction of the insulating resin base material layers, and a ground conductor overlapping the plurality of the signal lines as viewed from the laminating direction. Openings are provided in the ground conductor and, as viewed from the laminating direction, an aperture ratio is higher in an inner zone that is sandwiched between two signal lines than in an outer zone of the two signal lines.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: January 11, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiromasa Koyama
  • Patent number: 11212913
    Abstract: Resin films, all of which are formed of the same resin material, are laminated to form a laminate. Heat and pressure are applied to the laminate to integrate the resin films into one piece; then the pressure applied to the laminate is released and the laminate is cooled. In a predetermined region of the laminate which is to constitute a bent part, one or more of the resin films are arranged on each of one side and the other side in a lamination direction of the resin films with respect to one conductor pattern; and the total thickness of the one or more resin films arranged on the one side is larger than the total thickness of the one or more resin films arranged on the other side. Consequently, the predetermined region can be bent by utilizing the difference between contraction force generated in the one or more resin films arranged on the one side and contraction force generated in the one or more resin films arranged on the other side during the cooling after the application of heat and pressure.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: December 28, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Toshikazu Harada
  • Patent number: 11145464
    Abstract: A multilayer ceramic capacitor includes a ceramic body including an active portion that includes a dielectric layer and a plurality of internal electrodes overlapping each other across the dielectric layer, and cover portions formed above and below the active portion, and including first and second surfaces opposing each other, third and fourth surfaces connecting the first and second surfaces, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other, and first and second side margin portions disposed on the first and second surfaces. In a cross-section of the ceramic body in a length-thickness (L-T) direction, a ratio Sd/Sc of an area Sd of a region except for the active portion to an overall area Sc of the cross-section is greater than 27%.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: October 12, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yeong Ju Choe, Min Woo Kim, Eun Jung Lee, Ki Pyo Hong
  • Patent number: 11120934
    Abstract: An electronic component includes a main body made from a metal magnetic powder and an insulating resin, a coating film covering the surface of the main body, a conductor disposed inside the main body, inorganic particles adhering to the surface of the coating film, and outer electrodes which are electrically connected to the conductor and which cover portions of the surface of the coating film while inorganic particles adhere to the portions, wherein the coating film contains a resin and metal cations.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: September 14, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hironobu Kubota, Mitsunori Inoue
  • Patent number: 11104114
    Abstract: A multi-layered structural element and a method for producing a multi-layered structural element are disclosed. In an embodiment dielectric green sheets, at least one ply containing an auxiliary material which contains at least one copper oxide and layers containing electrode material are provided and arranged alternately one above another. These materials are debindered and sintered. The copper oxide is reduced to form the copper metal and the at least one ply is degraded during debindering and sintering.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: August 31, 2021
    Assignee: EPCOS AG
    Inventors: Marion Ottlinger, Marlene Fritz
  • Patent number: 11067533
    Abstract: A manufacturing method for a sensor element includes a forming step. The forming step includes: a step (a) of forming an unfired electrode on one of plural green sheets; a step (b) of forming an unfired electrode lead and an unfired lead insulating layer on the same green sheet as in the step (a), the unfired electrode lead and to be connected to the unfired electrode, the unfired lead insulating layer surrounding at least part of the unfired electrode lead; and a step (c) of forming an unfired bonding layer so as to fill at least part of a region without the unfired lead insulating layer on the green sheet subjected to the step (b) and so as to overlap at least part of an edge portion of the unfired lead insulating layer.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: July 20, 2021
    Assignee: NGK INSULATORS, LTD.
    Inventors: Shiho Iwai, Takeya Miyashita
  • Patent number: 10943736
    Abstract: A method of manufacturing a multilayer ceramic electronic component which includes preparing first and second ceramic green sheets; forming an internal electrode pattern on the first ceramic green sheet using a conductive metal paste; forming a ceramic member on first and second end portions of a first surface of the second ceramic green sheet to form a step portion absorption layer; stacking two or more of the first ceramic green sheets on each other in a stacking direction to form a first group; stacking two or more of the first ceramic green sheets on each other in the stacking direction to form a second group; and placing the second ceramic green sheet between the first group and the second group in the stacking direction to form a ceramic body, wherein the first and second end portions oppose each other in a first direction perpendicular to the stacking direction.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: March 9, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Ho Lee, Jae Yeol Choi, Ki Pyo Hong, Beom Seock Oh
  • Patent number: 10930420
    Abstract: A coil component includes a magnetic body part and a coil part. The magnetic body part has first and second magnetic layers stacked together alternately in one axis direction, and cover parts covering the first and second magnetic layers from the one axis direction. The coil part has conductor patterns provided on the second magnetic layers. The magnetic body part includes: oblate soft magnetic grain-containing layers extending over the entire range of the magnetic body part in the direction perpendicular to the one axis direction, exposed in the direction perpendicular to the one axis direction, and formed by oblate soft magnetic grains whose thickness direction is oriented in the one axis direction; and spherical grain-containing layers adjoining the oblate soft magnetic grain-containing layers in the one axis direction, and formed by insulative spherical grains.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: February 23, 2021
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masahiro Hachiya, Hitoshi Matsuura, Takayuki Arai, Shuhei Kurahashi, Hideo Machida, Hidekazu Teshigawara, Naoya Honmo
  • Patent number: 10910550
    Abstract: The invention relates to a piezoceramic material with reduced lead content, based on potassium sodium niobate (PSN) and having a defined parent composition. According to the invention the manner of addition of a mixture of Pb, Nb and optionally Ag and optionally Mn gives a wide sintering range together with reproducible electrical and mechanical properties of the material.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: February 2, 2021
    Assignee: PI CERAMIC GMBH
    Inventors: Eberhard Hennig, Antje Kynast, Michael Töpfer, Michael Hofmann
  • Patent number: 10650973
    Abstract: A method of manufacturing a multilayer ceramic electronic component includes preparing a green mother laminate in which ceramic layers and inner electrode layers are stacked; cutting the mother laminate perpendicularly or substantially perpendicularly to a main surface of the mother laminate and in a first direction when the mother laminate is viewed in plan such that first sectional surfaces are formed, and pressing the mother laminate to obtain a bonded laminate in which the first sectional surfaces are bonded to each other; and separating the bonded laminate between the first sectional surfaces to obtain laminates. Then, the bonded laminate is cut perpendicularly or substantially perpendicularly to the main surface and in a second direction that intersects the first sectional surfaces such that second sectional surfaces are formed.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: May 12, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuya Takagi, Togo Matsui, Hikaru Okuda
  • Patent number: 10566409
    Abstract: An integrated, quantized inductor, comprising a plurality of identical inductor sections, is provided for multiple applications on the chip. The inductor section represents one turn and includes two stacked metal layers with identical area and configuration, separated by dielectric layers, winding around the insulated ferromagnetic core, and interconnected by via. Power transformer, having a primary winding and multiple secondary windings comprised of a plurality of identical inductor sections and a shielded common ferromagnetic core ring, placed outside of the active chip area between the seal ring and pad-ring enhanced area. Inside of active chip area, in proximity to the related linear RF components are placed sensitive inductors, balun-transformers, resonator, separately protected by EM guard rings, wherein one node is open, and the second one is tied to the ground. The fabrication is compatible with integrated circuits manufacturing.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: February 18, 2020
    Inventors: Dumitru Nicolae Lesenco, Nicolae Dumitru Lesenco
  • Patent number: 10561851
    Abstract: A method of interconnecting a conductor and a hermetic feedthrough of an implantable medical device includes welding a lead to a pad on a feedthrough. The feedthrough includes a ceramic insulator and a via hermetically bonded to the insulator. The via includes platinum. The pad is bonded to the insulator and electrically connected to the via, includes platinum, and has a thickness of at least 50 ?m. The lead includes at least one of niobium, platinum, titanium, tantalum, palladium, gold, nickel, tungsten, and oxides and alloys thereof.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: February 18, 2020
    Assignee: MEDTRONIC, INC.
    Inventors: Mark Breyen, Tom Miltich, Gordon Munns
  • Patent number: 10535468
    Abstract: A method for manufacturing a multilayer ceramic capacitor includes preparing a green multilayer body including a stack of dielectric sheets printed with inner electrodes, coating the green multilayer body with a conductive paste that is connected to the inner electrodes, and firing the conductive paste and the green multilayer body at the same time, wherein a rate of temperature increase from about 800° C. to about 1,100° C. during the firing is about 15° C. per minute or more.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: January 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Yasuhiro Nishisaka, Satoshi Matsuno, Yoko Okabe
  • Patent number: 10395836
    Abstract: A multilayer ceramic electronic component includes a laminated body, a first external electrode, a pair of second external electrodes, and a pair of insulating coating portions. The pair of insulating coating portions extends in a laminating direction between each of the pair of second external electrodes and the first external electrode on a second principal surface, from the second principal surface to respective portions of a first side surface and a second side surface. As viewed from at least one direction in the laminating direction, an end of the pair of insulating coating portions, which is located closest to a first principal surface, is located closer to the first principal surface than an end of the first external electrode and pair of second external electrodes, which is located closest to the first principal surface.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: August 27, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Sawada, Yasuo Fujii, Takayuki Kayatani
  • Patent number: 10395835
    Abstract: A multilayer ceramic electronic component includes a laminated body, a first external electrode, a pair of second external electrodes, and a pair of insulating coating portions. The pair of insulating coating portions extends in a laminating direction between each of the pair of second external electrodes and the first external electrode on a second principal surface, from the second principal surface to respective portions of a first side surface and a second side surface. As viewed from at least one direction in the laminating direction, an end of the first external electrode and pair of second external electrodes, which is located closest to a first principal surface, is located closer to the first principal surface than an end of the pair of insulating coating portions, which is located closest to the first principal surface.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: August 27, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Sawada, Yasuo Fujii, Takayuki Kayatani
  • Patent number: 10340088
    Abstract: In a thin-film capacitor, an electrode terminal layer is divided into a plurality of parts by a penetration portion, and includes a frame portion as one divided part. The frame portion is disposed along an outer edge of the electrode terminal layer when viewed from the bottom surface side of the electrode terminal layer, and the frame portion can hinder deformation of the electrode terminal layer stretching or warping in a thickness direction or an in-plane direction, whereby such deformation can be prevented. Accordingly, in the thin-film capacitor, the electrode terminal layer is not likely to be deformed and an improvement in strength thereof is achieved.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: July 2, 2019
    Assignee: TDK CORPORATION
    Inventors: Koichi Tsunoda, Mitsuhiro Tomikawa, Kazuhiro Yoshikawa, Kenichi Yoshida
  • Patent number: 10308560
    Abstract: The present invention provides a high thermal conductive silicon nitride sintered body having a thermal conductivity of 50 W/m·K or more and a three-point bending strength of 600 MPa or more, wherein when an arbitrary cross section of the silicon nitride sintered body is subjected to XRD analysis and highest peak intensities detected at diffraction angles of 29.3±0.2°, 29.7±0.2°, 27.0±0.2°, and 36.1±0.2° are expressed as I29.3°, I29.7°, I27.0°, and I36.1°, a peak ratio (I29.3°)/(I27.0°+I36.1°) satisfies a range of 0.01 to 0.08, and a peak ratio (I29.7°)/(I27.0°+I36.1°) satisfies a range of 0.02 to 0.16. Due to above configuration, there can be provided a silicon nitride sintered body having a high thermal conductivity of 50 W/m·K or more, and excellence in insulating properties and strength.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: June 4, 2019
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.
    Inventor: Katsuyuki Aoki
  • Patent number: 10300701
    Abstract: In an example, a fluid ejection apparatus includes a printhead die embedded in a printed circuit board. Fluid may flow to the printhead die through a plunge-cut fluid feed slot in the printed circuit board and into the printhead die.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: May 28, 2019
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Chien-Hua Chen, Michael W. Cumbie
  • Patent number: 10304628
    Abstract: A multilayer capacitor includes a body including dielectric layers and first and second internal electrodes alternately disposed with dielectric layers interposed therebetween. First and second external electrodes are on the body and connected to the first and second internal electrodes, respectively. The first and second internal electrodes are plating layers. A manufacturing method of a multilayer capacitor includes preparing a plurality of laminated sheets including internal electrodes, dummy electrodes, and dielectric layers. The plurality of laminated sheets, and covers on and below the laminated sheets, are simultaneously stacked and then cured to prepare a cured product. The cured product is then diced depending on the size of the capacitor to prepare a body where the internal electrodes and the dummy electrodes are partially exposed. External electrodes are formed on external surfaces of the body using the dummy electrodes as seeds in a plating method.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Sun Hwang, Myung Sam Kang, Dong Keun Lee
  • Patent number: 10304632
    Abstract: A multilayer ceramic electronic component includes a ceramic body contributing to capacitance formation and including an active region formed by alternately stacking dielectric layers and first and second internal electrodes and, and a protective layer provided on at least one of upper and lower surfaces of the active region; and first and second external electrodes formed on respective ends of the ceramic body, wherein a step portion absorption layer is disposed in at least one of: both end portions of the ceramic body in a length direction or both end portions of the ceramic body in a width direction, and a total thickness of dielectric layers disposed on the same plane as the step portion absorption layer is greater than a thickness of a dielectric layer disposed in another region.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 28, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Ho Lee, Jae Yeol Choi, Ki Pyo Hong, Beom Seock Oh
  • Patent number: 10297982
    Abstract: An ESD protective device includes an element assembly with a hollow portion that includes inner surfaces including a first inner surface, a second inner surface, and a third inner surface inclined to a Z direction in a cross section including the Z direction. Accordingly, a surface area of the inner surfaces of the hollow portion is increased, the heat load on an auxiliary discharge electrode is reduced, and the deterioration of the auxiliary discharge electrode is significantly reduced or prevented.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: May 21, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshihito Okutomi, Jun Adachi
  • Patent number: 10290407
    Abstract: In at least one embodiment, a single sintered magnet is provided having a concentration profile of heavy rare-earth (HRE) elements within a continuously sintered rare-earth (RE) magnet bulk. The concentration profile may include at least one local maximum of HRE element concentration within the bulk such that a coercivity profile of the magnet has at least one local maximum within the bulk. The magnet may be formed by introducing alternating layers of an HRE containing material and a magnetic powder into a mold, pressing the layers into a green compact, and sintering the green compact to form a single, unitary magnet.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 14, 2019
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Feng Liang, C Bing Rong, Michael W. Degner
  • Patent number: 10246376
    Abstract: The invention relates to a lead-free piezoceramic material based on bismuth sodium titanate (BST) having the following parent composition: x(Bi0.5Na0.5)TiO3-yBaTiO3-zSrTiO3 where x+y+z=1 and 0<x<1, 0<y<1, 0?z?0.07 or x(Bi0.5Na0.5)TiO3-yBaTiO3-zCaTiO3 where x+y+z=1 and 0<x<1, 0<y<1, 0<z?0.05 or x(Bi0.5Na0.5)TiO3-y(Bi0.5K0.5)TiO3-zBaTiO3 where x+y+z=1 and 0<x<1, 0<y<1, 0?z<1, characterized by addition of a phosphorus-containing material in a quantity that gives a phosphorus concentration of from 100 to 2000 ppm in the piezoceramic material.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: April 2, 2019
    Assignee: PI CERAMIC GMBH
    Inventors: Eberhard Hennig, Antje Kynast, Michael Töpfer, Michael Hofmann
  • Patent number: 10117334
    Abstract: A magnetic assembly is disclosed. The magnetic assembly includes a first magnetic core, a second magnetic core and a first series winding. The first magnetic core has a first top surface, a first bottom surface, a first sidewall, a second sidewall, at least one first sidewall through-hole and at least one second sidewall through-hole. The second magnetic core is connected to the first top surface of the first magnetic core. The first series winding has a first upper winding set, a first sidewall winding set, and a second sidewall winding set disposed on the first top surface, the first sidewall and the second sidewall respectively. The upper winding set is connected to the lower winding set via the first sidewall winding set and the second sidewall winding set is further connected to the lower winding set, so as to form the first series winding around the first magnetic core.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 30, 2018
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Jianhong Zeng, Shouyu Hong, Min Zhou
  • Patent number: 10115522
    Abstract: A multi-layered dielectric polymer material, a capacitor comprising the multi-layered dielectric polymer material, a use of the multi-layered dielectric polymer material and a method for forming the multi-layered dielectric polymer material are disclosed. The multi-layered dielectric polymer material may comprise a plurality of dielectric layers wherein the plurality of dielectric layers may comprise an identical base material. The base material may be compound with agents for at least one of the plurality of dielectric layers. It may overcome compatible issues for convention multi-layered material. The dielectric polymer material may have increased dielectric strength and excellent thermal properties.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: October 30, 2018
    Assignee: ABB Schweiz AG
    Inventors: Lejun Qi, Nan Li, Delun Meng, Sari Laihonen, Francois Delince
  • Patent number: 10071518
    Abstract: A method for depositing a structure comprising interdigitated materials includes merging flows of at least two materials in a first direction into a first combined flow, dividing the first combined flow in a second direction to produce at least two separate flows, wherein the second direction is perpendicular to the first direction, and merging the two separate flows into a second combined flow.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: September 11, 2018
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: David K. Fork, Karl Littau
  • Patent number: 10074465
    Abstract: A method of manufacturing an electronic component includes manufacturing a ceramic element including one pair of end surfaces and four side surfaces, forming external electrodes at both end portions of the ceramic element, measuring an initial characteristic value, determining any side surface to be machined among the four side surfaces and then determining, based on stored data, an amount of machining to be performed on the side surface to be machined, and machining, by the determined machining amount, the side surface of the ceramic element, which is determined to be machined, to be flush or substantially flush with the external electrodes.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: September 11, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yuichi Hirata, Noboru Furukawa, Yasuo Sasaki, Kiyohiro Koto, Kojiro Tokieda, Yukiko Ueda
  • Patent number: 10062505
    Abstract: A microfabricated laminated conductor, comprising at least two flat metallic conductors held together parallel by their edges by a first dielectric material anchor, such that there exists a gap of between several nanometers and several micrometers between most of the at least two flat metallic conductors.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: August 28, 2018
    Assignee: HRL Laboratories, LLC
    Inventors: Florian G. Herrault, Melanie S. Yajima
  • Patent number: 10044056
    Abstract: In some examples, solid oxide fuel cell system comprising a solid oxide fuel cell including an anode, an anode conductor layer, a cathode, a cathode conductor layer, and electrolyte, wherein the anode and the anode conductor layer each comprise nickel; and a sacrificial nickel source separate from that of the anode and anode conductor layer, wherein the sacrificial nickel source is configured to reduce the loss or migration of the nickel of the anode and/or the anode current collector in the fuel cell during operation.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 7, 2018
    Assignee: LG FUEL CELL SYSTEMS, INC.
    Inventors: Richard W. Goettler, Liang Xue
  • Patent number: 10026683
    Abstract: The present invention relates to an integrated circuit package substrate and, more specifically, to an integrated circuit package substrate, which exhibits excellent conductivity and reliability through the improvement of an adhesive force between a metal line for electrically connecting an upper part and a lower part of the integrated circuit package substrate and glass formed inside the integrated circuit package substrate.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: July 17, 2018
    Assignee: CORNING PRECISION MATERIALS CO., LTD.
    Inventors: Hyun Hang Park, Bo Gyeong Kim, Hyun Bin Kim, Sung Hoon Lee
  • Patent number: 9967980
    Abstract: A multilayer ceramic capacitor includes a ceramic element body including first and second external electrodes on first and second end surface sides of the ceramic element body, respectively. The first external electrode includes an Ni plating layer and an Sn plating layer defining a plating layer. The second external electrode includes an Au plating layer defining a plating layer.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: May 8, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akio Masunari, Hirokazu Takashima, Tomoyuki Nakamura
  • Patent number: 9960120
    Abstract: A wiring substrate includes a buried substrate disposed within a through-hole penetrating through a resin substrate of a core layer and including a plate-like body and a plurality of linear conductors penetrating the plate-like body, a first insulating layer covering a first surface of the resin substrate, a first wiring layer including a first pad pattern formed on a first surface of the buried substrate and a first wiring pattern formed on a first surface of the first insulating layer, and a third wiring pattern formed on the first surface of the resin substrate and covered by the first insulating layer. In the plurality of linear conductors, a gap between the adjacent linear conductors is smaller than a diameter of each of the linear conductors. The third wiring pattern is formed so as to have a thickness thicker than a thickness of the first wiring pattern.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: May 1, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo Fukasawa, Sumihiro Ichikawa, Michio Horiuchi
  • Patent number: 9919472
    Abstract: Embodiments are directed to methods of producing devices using modified multi-layer, multi-material electrochemical fabrication processes and/or using a laser cutting processes wherein individual layers or layer groups are formed and then stacked and bonded to produce prototypes or production parts. The methods can reduce the cost and lead time of prototyping when compared with previous multi-layer, multi-material electrochemical fabrication processes and can also reduce the lead time of production quantities, by allowing multiple layers of a multilayer device to be formed simultaneously, e.g. in parallel on the same wafer. Additionally, these methods may be used to extend the maximum height to which parts may practically be made. Finally, the methods allow geometries that are impossible, impractical or difficult to release (e.g. microfluidic devices such as pumps or parts with long, narrow channels) to be fabricated in multiple pieces and then joined after full or partial release.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: March 20, 2018
    Assignee: Microfabrica Inc.
    Inventors: Adam L. Cohen, Michael S. Lockard, Rulon J. Larsen, III, Uri Frodis, Kieun Kim, Dennis R. Smalley
  • Patent number: 9908817
    Abstract: The invention provides a stacked capacitor configuration comprising subunits each with a thickness of as low as 20 microns. Also provided is combination capacitor and printed wire board wherein the capacitor is encapsulated by the wire board. The invented capacitors are applicable in micro-electronic applications and high power applications, whether it is AC to DC or DC to AC, or DC to DC.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: March 6, 2018
    Assignee: UCHICAGO ARGONNE, LLC
    Inventors: Beihai Ma, Uthamalingam Balachandran
  • Patent number: 9895887
    Abstract: Provided is a liquid ejection head capable of stably ejecting a liquid at a practical liquid droplet velocity without separating minute liquid droplets before ejection of main liquid droplets in the case of reducing the amount of liquid droplets by reducing a nozzle diameter of the liquid ejection head. In a liquid ejection head including a nozzle for ejecting a liquid, a recess portion recessed relative to a nozzle inner wall surface is formed on a nozzle inner wall in a region having a nozzle inner diameter of 15 ?m or less.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: February 20, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Junri Ishikura, Yo Watanabe, Norihiko Ochi, Hidehiko Fujimura
  • Patent number: 9843014
    Abstract: An electronic device may have a display that is protected by a transparent cover layer. The transparent cover layer may include a laser-annealed sapphire coating on the outer surface of a glass substrate or other transparent substrate. The sapphire coating may provide the display with a hard, scratch-resistant outer surface. The sapphire coating may be formed by coating a glass substrate with a thin film of amorphous aluminum oxide. The aluminum oxide thin film may be locally heated to transform the amorphous aluminum oxide into alpha-phase aluminum oxide (sapphire). Local heating may be achieved by laser annealing the aluminum oxide coating with a carbon dioxide laser. The laser may produce laser light having a wavelength that is absorbed in the aluminum oxide coating without being absorbed by the glass substrate so that the glass substrate is not damaged during the laser annealing process.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: December 12, 2017
    Assignee: Apple Inc.
    Inventors: Tingjun Xu, Xianwei Zhao, Wookyung Bae, Sunggu Kang, John Z. Zhong
  • Patent number: 9807884
    Abstract: A substrate that includes a first dielectric layer and a capacitor embedded in the first dielectric layer. The capacitor includes a first terminal, a second terminal, and a third terminal. The second terminal is laterally located between the first terminal and the third terminal. The capacitor also includes a second dielectric layer, a first metal layer and a second metal layer. The first metal layer is coupled to the first and third terminals. The first metal layer, the first terminal, and the third terminal are configured to provide a first electrical path for a first signal. The second metal layer is coupled to the second terminal. The second metal layer and the second terminal are configured to provide a second electrical path for a second signal.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 31, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Kyu-Pyung Hwang, Young Kyu Song
  • Patent number: 9786419
    Abstract: In at least one embodiment, a single sintered magnet is provided having a concentration profile of heavy rare-earth (HRE) elements within a continuously sintered rare-earth (RE) magnet bulk. The concentration profile may include at least one local maximum of HRE element concentration within the bulk such that a coercivity profile of the magnet has at least one local maximum within the bulk. The magnet may be formed by introducing alternating layers of an HRE containing material and a magnetic powder into a mold, pressing the layers into a green compact, and sintering the green compact to form a single, unitary magnet.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: October 10, 2017
    Assignee: Ford Global Technologies, LLC
    Inventors: Feng Liang, C Bing Rong, Michael W. Degner
  • Patent number: 9774358
    Abstract: An ultrasonic sensor includes a plurality of ultrasonic wave elements each including a first electrode and a second electrode, and a control circuit configured to switch parallel connection and serial connection of the plurality of the ultrasonic wave elements.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: September 26, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Hiroshi Matsuda, Kazuyuki Kano
  • Patent number: 9764535
    Abstract: A method for making a thin ceramic part involves making a casting slurry including a ceramic powder, a solvent, a binder, a plasticizer, and a dispersant. The casting slurry is tape casted to achieve a single layer green tape. At least two single layer green tapes are laminated to form a green tape lamination. The green tape lamination is dry pressed, dried, shaped, degreased, and fired to achieve the exterior component required.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: September 19, 2017
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Zhi-Peng Xie, Hong-Yan Yan, Yu-Xi Liao
  • Patent number: 9711835
    Abstract: Disclosed are apparatus and methods related to junction ferrite devices having improved insertion loss performance. In some implementations, a ferrite disk assembly can be configured for a radio-frequency (RF) circulator. The disk assembly can include a ferrite-based disk having a ferrite portion and a metalized layer formed on a grounding surface of the disk to improve electrical contact between the grounding surface of the disk with an external grounding surface. The ferrite-based disk can further include a dielectric portion disposed around the periphery of the ferrite center portion. In some embodiments, the metalized layer can be a silver layer formed on the grounding surface of the disk and having a desired thickness.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: July 18, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: David Bowie Cruickshank, Iain Alexander Macfarlane
  • Patent number: 9706640
    Abstract: A printed circuit board includes a first printed circuit substrate and a second printed circuit substrate. The first printed circuit substrate includes a substrate layer and a first conductive circuit layer. The first conductive circuit layer is formed on the substrate layer. The substrate layer includes at least two first grooves. The first conductive circuit layer includes at least one signal wire. The first grooves are defined in both sides of the signal wire. The second printed circuit substrate is formed on the first printed circuit substrate. The second circuit substrate includes a third copper layer. A second groove is defined in the third copper layer. The first grooves are opposite to the second groove. The first grooves and the second groove form a space. The signal wire is surrounded by air in the space. A method for manufacturing the printed circuit board is also provided.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 11, 2017
    Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd., GARLIDA TECHNOLOGY CO., LTD.
    Inventors: Ming-Jaan Ho, Xian-Qin Hu, Yi-Qiang Zhuang, Fu-Wei Zhong
  • Patent number: 9509272
    Abstract: On aspect relates to an electrical bushing for use in a housing of an implantable medical device. The bushing includes at least one electrically insulating base body and at least one electrical conducting element. The conducting element is set up to establish, through the base body, at least one electrically conductive connection between an internal space of the housing and an external space. The at least one conducting element comprises at least one cermet such that the conducting element is hermetically sealed with respect to the base body. The bushing includes an electrical filter structure. The at least one conducting element provides at least a one conducting section of the filter structure and the base body provides at least one dielectric section of the filter.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: November 29, 2016
    Assignee: Heraeus Deutschland GmbH & Co. KG
    Inventor: Andreas Reisinger
  • Patent number: 9449766
    Abstract: A composite electronic component may include: a composite body including a capacitor and an inductor coupled to each other, the capacitor having a ceramic body in which dielectric layers and internal electrodes facing each other with the dielectric layers interposed therebetween are stacked, and the inductor having a magnetic body in which magnetic layers having conductive patterns are stacked; an input terminal disposed on a first end surface of the composite body and connected to the conductive pattern of the inductor; an output terminal including a first output terminal formed on a second end surface of the composite body and connected to the conductive pattern of the inductor and a second output terminal disposed on a second side surface of the composite body; and a ground terminal disposed on a first side surface of the composite body and connected to the internal electrodes of the capacitor.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: September 20, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Ghyu Ahn, Byoung Hwa Lee, Sang Soo Park, Min Cheol Park
  • Patent number: 9437458
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. The lead frame strip is processed by attaching a semiconductor die to each of the die paddles and covering the unit lead frames with a molding compound after the semiconductor dies are attached to the die paddles. Spaced apart cuts are formed in the periphery of each unit lead frame that sever the leads from the periphery of each unit lead frame and extend at least partially into the molding compound in regions of the periphery where the leads are located so that the molding compound remains intact between the cuts. The lead frame strip is processed after the cuts are formed, and the unit lead frames are later separated into individual packages.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: September 6, 2016
    Assignee: Infineon Technologies AG
    Inventors: Nee Wan Khoo, Vigneswaran Letcheemana