Abstract: A multilayer electronic component includes: a body including dielectric layers and first and second internal electrodes and having first to sixth surfaces; a first external electrode including a first connection portion, disposed on the third surface, and a first band portion extending from the first connection portion onto a portion of the first surface; a second external electrode including a second connection portion, disposed on the fourth surface, and a second band portion extending from the second connection portion onto a portion of the first surface; an insulating layer disposed on the second surface and disposed to extend to the first and second connection portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion. The insulating layer includes a fluorine-based organic material.

Abstract: A planar coil in the present disclosure includes a substrate that is composed of a ceramic(s) and includes a first surface, and a first metal layer that is positioned on the first surface and includes a void.

Abstract: A multi-layer ceramic capacitor includes: a multi-layer unit including ceramic layers laminated in a first direction and electrodes disposed between the ceramic layers, positions of end portions of the electrodes falling within a range of 0.5 ?m in a second direction; and side margins each containing manganese or magnesium and silicon and facing each other in the second direction. When each margin is equally divided into an inner region and an outer region, a total concentration of manganese and magnesium in the outer region is higher than a total concentration of manganese and magnesium in the inner region and higher than a total concentration of manganese and magnesium in the ceramic layers, and a concentration of silicon in the inner region is not less than a concentration of silicon in the outer region and higher than a concentration of silicon in the ceramic layers.

Abstract: One aspect relates to a process for producing a sintered workpiece, which includes sintering of a ceramic material at a temperature of at least 1000° C. and in an atmosphere, in the case of which the partial pressure of atmospheric air is reduced to less than 10?6-times, based on the ambient air at the same temperature under equilibrium conditions.

Abstract: In a multilayer ceramic capacitor, a proportion of a glass component in a first side surface-side base electrode layer is about 60% or more in a first range from a tip in a vicinity of a second end surface of the first side surface-side base electrode layer to a position of a length which is about 10% of a dimension in a length direction of the first side surface-side base electrode layer, and a proportion of a glass component in a second side surface-side base electrode layer is about 60% or more in a second range from a tip in a vicinity of a first end surface of the second side surface-side base electrode layer to a position of a length which is about 10% of a dimension in a length direction of the second side surface-side base electrode layer.

Abstract: A method for producing a multilayer coil component includes preparing an insulating sheet; forming a resin paste layer on the insulating sheet by using a resin paste; forming a conductive paste layer by using a conductive paste, the conductive paste layer covering the resin paste layer and having a projecting portion at a portion where a second void portion is to be formed; forming an insulating paste layer on the insulating sheet by using an insulating paste such that at least part of an upper surface of the conductive paste layer is exposed; stacking the insulating sheets having the resin paste layer, the conductive paste layer, and the insulating paste layer formed thereon to form a multilayer compact that includes the conductive paste layers connected into a coil shape; and firing the multilayer compact.

Abstract: A multilayer ceramic capacitor includes a multilayer body including an inner layer portion including internal electrode layers and inner dielectric layers laminated alternately, and internal electrode layers at both ends thereof in a lamination direction, and outer dielectric layers covering the inner layer portion, and two external electrodes on both end surfaces of the multilayer body in a length direction intersecting the lamination direction. The inner and outer dielectric layers each include grains, and a difference between an average grain size of grains in the inner dielectric layers and an average grain size of grains in the outer dielectric layers is about 100 nm or less.

Abstract: A multilayer ceramic capacitor includes a multilayer body including laminated dielectric layers, first and second main surfaces, first and second end surfaces, and first and second side surfaces, first and second internal electrode layers on the dielectric layers and respectively exposed to the first and second end surfaces, and first and second external electrodes respectively on the first and second end surfaces. The multilayer body includes an effective layer portion in which the first and second internal electrode layers are opposite to each other, the effective layer portion includes inner and outer effective layer portions, and a coverage of the first and second internal electrode layers with respect to the dielectric layer in the outer effective layer portion is larger than a coverage of the first and second internal electrode layers with respect to the dielectric layer located in the inner effective layer portion.

Abstract: A substrate that enables increasing an allowable current value of a current path in a thickness direction of the substrate and narrowing spaces between multiple current paths, and the like are provided. To solve this subject, a substrate includes a sheet-shaped first base material (1) having a penetrating hole (1B) in the thickness direction and includes a second base material (2) fitted into the penetrating hole (1B). The second base material (2) includes multiple metal bodies (2B). The metal bodies (2B) penetrate in the thickness direction of the first base material (1) in a state of having an end exposed at each of a first surface and a second surface of the second base material (2) that face each other in the thickness direction.

Abstract: A coil component in which stress inside thereof is alleviated and the DC resistance is low. A multilayer coil component includes an element body that includes an insulator portion and a coil embedded in the insulator portion; and outer electrodes disposed on surfaces of the insulator portion and electrically connected to ends of the coil. There is a groove-shaped void portion at a boundary between the coil and the insulator portion, and the void portion extends in a length direction of the coil. The coil has a ridge in the void portion, and the ridge extends in the length direction of the coil.

Abstract: A multilayer coil component includes an insulator portion, a coil embedded in the insulator portion and including a plurality of coil conductor layers electrically connected together, and an outer electrode disposed on a surface of the insulator portion and electrically connected to the coil. The insulator portion is a multilayer body including first and second insulator layers. The coil conductor layers and the second insulator layers are disposed on the first insulator layers. The multilayer coil component has void layers (e.g., voids) between the first insulator layers and at least a portion of the coil conductor layers. If the thickness of the first insulator layers is a, the thickness of the coil conductor layers is b, and the thickness of the void layers is c, the ratio of c to b (c/b) is 0.10 to 0.70, and the ratio of a to b (a/b) is 0.25 to 1.00.

Abstract: The disclosed pre-concentrator comprises: a base substrate having a trench; a metal layer conformally disposed along the inner surface of the trench; and a three-dimensional porous nanostructure disposed on the metal layer in the trench and having aligned pores connected to each other in three dimensions. The pre-concentrator can improve the concentration performance of a sample and the thermal desorption efficiency of a concentrated sample.

Abstract: Shaped body, in particular for a pressure sensor, having a membrane and having a supporting section supporting the membrane, the membrane being produced at least in sections from a ceramic material by means of additive manufacturing, in particular 3D screen printing, and the greatest possible distance between two points lying on the outer circumference of the membrane (12) is less than 20 mm.

Abstract: A method for producing a conversion element comprising the following steps is described: providing a conversion layer having a matrix, in which phosphor particles are brought in, the phosphor particles comprising a host lattice having activator ions and being concentrated in a enrichment zone, providing a compensation layer having the matrix, in which compensation particles are brought in, which comprise the host lattice and are concentrated in a enrichment zone, and joining the conversion layer and the compensation layer in such a way that the enrichment zone of the conversion layer and the enrichment zone of the compensation layer are arranged symmetrically to one another with respect to a symmetry plane of the conversion element. A conversion element and a component are also specified.

Abstract: A multilayer substrate includes a multilayer body in which insulating layers are laminated in a laminating direction, a front electrode that is provided on a front surface side of a first insulating layer which is positioned on a front surface side of the multilayer body among the insulating layers, a first internal electrode that is provided on an opposite side to the front electrode with the first insulating layer interposed therebetween, and a first interlayer connection conductor that electrically connects the front electrode and the first internal electrode with each other. The first interlayer connection conductor includes a front side connection surface that is electrically connected with the front electrode and a back side connection surface that is electrically connected with the first internal electrode.

Abstract: There is provided a multilayer electronic component in which a short circuit between the internal electrodes, a decrease in capacitance, a decrease in breakdown voltage, and the like, may be suppressed by controlling an area fraction occupied by a region in which an intensity of brightness in a capacitance formation portion is 110% or more and 126% or less of an average value of an intensity of brightness of a cover portion.

Abstract: An all-solid-state battery including a laminated body in which a positive electrode having a positive electrode current collector layer and a positive electrode active material layer and a negative electrode having a negative electrode current collector layer and a negative electrode active material layer, are laminated with a solid electrolyte layer therebetween; a pair of a positive external electrode and a negative external electrode provided on one of pairs of side surfaces of the laminated body facing each other; wherein the positive electrode current collector layer is bonded to the positive external electrode and the negative electrode current collector layer is bonded to the negative external electrode; the thickness of a portion of at least one of the positive electrode current collector layer and the negative electrode current collector layer which is bonded to the positive external electrode or the negative external electrode is thicker than the other portion.

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers which are stacked and internal electrode layers which are stacked, and external electrodes, each connected to the internal electrode layers. The external electrodes each include a conductive resin layer and a plated layer on the conductive resin layer. The conductive resin layer includes a resin portion, conductive fillers dispersed in the resin portion, and metal particles dispersed unevenly in a distribution differing from that of the conductive fillers in the conductive resin layer. An abundance ratio of the metal particles to the resin portion is higher on a side of the plated layer of the conductive resin layer than on a side of the conductive resin layer close to the multilayer body.

Abstract: A multilayer coil component includes an insulator portion, a coil embedded in the insulator portion and including a plurality of coil conductor layers electrically connected together, and an outer electrode disposed on a surface of the insulator portion and electrically connected to the coil. The coil conductor layers have a thickness of 30 ?m to 60 ?m. The coil conductor layers are rectangular and include a corner portion with a radius of curvature of 0.08 mm to 0.24 mm.

Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.

Abstract: Processes for laminating a graphene-coated printed circuit board (PCB) are disclosed. An example laminated PCB may include a lamination stack that may include an inner core, an adhesive layer, and at least one graphene-metal structure. Pressure and heat—which may be applied under vacuum or controlled gas atmosphere—may be applied to the lamination stack, after all materials have been placed. The graphene of the graphene-metal structure is designed to promote high frequency performance and heat management within the PCB.

Abstract: A method of bonding includes applying a glass composition to at least a first material surface. The glass composition includes a glass powder and a solvent. The first material surface is disposed onto a second material surface. An elevated temperature is applied to the first material surface and the second material surface to form a bond between the first material surface and the second material surface. The first material surface and the second material surface are compressed under an isostatic pressure.

Abstract: Provided is a semiconductor substrate manufacturing device which is capable of uniformly heating the surface of a semiconductor substrate that has a relatively large diameter or major axis. The semiconductor substrate manufacturing device includes a container body for accommodating a semiconductor substrate and a heating furnace that has a heating chamber which accommodates the container body, and the heating furnace has a heating source in a direction intersecting the semiconductor substrate to be disposed inside the heating chamber.

Abstract: A multi-layer ceramic electronic component includes: a ceramic body including a main surface, an end surface, and a side surface respectively perpendicular to a first axis, a second axis, and a third axis orthogonal to one another, a top portion that connects the main surface, the end surface, and the side surface to one another, and a plurality of internal electrodes laminated in a direction of the first axis; and an end external electrode including a corner portion located on the top portion, a base portion that covers the end surface and extends from the end surface to the main surface and the side surface, and a protrusion that protrudes from the base portion in a thickness direction, the protrusion including an L-shaped main surface protrusion located on the main surface and extending in directions of the second axis and the third axis from the corner portion.

Abstract: A multilayer capacitor and a board having the same mounted thereon are provided. The multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, and first to sixth surfaces, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; first and second external electrodes; a first step-compensating portion disposed on a margin portion in a width direction on the second dielectric layer on which the second internal electrode is formed on the first internal electrode; and a second step-compensating portion disposed on another margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed on the second internal electrode.

Abstract: A multilayer ceramic capacitor includes first and second main surfaces opposite to each other in a thickness direction, first and second side surfaces opposite to each other in a width direction, first and second end surfaces opposite to each other in a longitudinal direction, an element body including dielectric layers and internal electrode layers stacked in the thickness direction, and a pair of external electrodes on the first and second end surfaces and electrically connected to the internal electrode layers, in which the dielectric layers include, as a main component, a perovskite oxide including barium and titanium, and the dielectric layers include an inner portion that is in contact with the internal electrode layer and includes an interface layer including a non-perovskite oxide including tin, barium, and titanium.

Abstract: A circuit module includes a first wiring substrate having a first main surface and a plurality of first components mounted on the first main surface. The plurality of first components includes a multilayer component formed as a single chip by being sealed using resin members. The multilayer component includes a second wiring substrate having a second main surface and a third main surface that face each other, a second component mounted on the second main surface, and a third component mounted on the third main surface.

Abstract: A component is provided for a human-powered vehicle. The component includes a component body, a strain gauge provided on the component body, a signal processing unit electrically connected to the strain gauge, a signal output that outputs a signal from the signal processing unit, and an electric power input electrically connected to the signal processing unit and supplied with electric power from a power supply provided on at least one of the human-powered vehicle and the component body. The strain gauge includes a substrate and a resistor provided on the substrate. The resistor is formed by a metal layer having a thickness of 0.01 micrometers or greater and 1 micrometer or less.

Abstract: A multilayer capacitor includes a capacitor body in which a first capacitor portion and a second capacitor portion are disposed to face each other with a connection region disposed therebetween, the connection portion having a predetermined thickness in which an internal electrode is not formed. The first capacitor portion comprises first and second internal electrodes that are alternately disposed with a dielectric layer interposed therebetween, and the second capacitor portion comprises third and fourth internal electrodes that are alternately disposed with a dielectric layer interposed therebetween. First and second external electrodes connected to the internal electrodes respectively comprise first and second internal layers containing copper (Cu), and first and second external layers containing silver (Ag) or nickel (Ni), and palladium (Pd).

Abstract: A multilayer capacitor includes a body including a dielectric layer and internal electrodes; and an external electrode disposed on the body to be connected to the internal electrode, wherein the dielectric layer includes a plurality of grains having a core-shell structure having a pore in a core, and the dielectric layer includes 20% to 40% of grains having two or less pores, among the plurality of grains.

Abstract: A multi-layer ceramic capacitor includes: a multi-layer unit including ceramic layers laminated in a first direction and electrodes disposed between the ceramic layers, positions of end portions of the electrodes falling within a range of 0.5 ?m in a second direction; and side margins each containing manganese or magnesium and silicon and facing each other in the second direction. When each margin is equally divided into an inner region and an outer region, a total concentration of manganese and magnesium in the outer region is higher than a total concentration of manganese and magnesium in the inner region and higher than a total concentration of manganese and magnesium in the ceramic layers, and a concentration of silicon in the inner region is not less than a concentration of silicon in the outer region and higher than a concentration of silicon in the ceramic layers.

Abstract: The multilayer ceramic electronic component includes a ceramic body including a dielectric layer; and first and second internal electrodes disposed inside the ceramic body, and disposed to oppose each other with the dielectric layer interposed therebetween. When an average thickness of the dielectric layer is referred to as td and a standard deviation of a thickness of the dielectric layer in each position is referred to as ?td, while an average thickness of the first and second internal electrodes is referred to as te and a standard deviation of a thickness of a pre-determined region of any layer of the internal electrodes in each position is referred to as ?te, a ratio (?te/?td) of the standard deviation of the internal electrodes in each position to the standard deviation of the thickness of the dielectric layer in each position satisfies 1.10??te/?td?1.35.

Abstract: A multilayer capacitor includes a capacitor body in which a first capacitor portion and a second capacitor portion are disposed to face each other with a connection region disposed therebetween, the connection portion having a predetermined thickness in which an internal electrode is not formed. The first capacitor portion comprises first and second internal electrodes that are alternately disposed with a dielectric layer interposed therebetween, and the second capacitor portion comprises third and fourth internal electrodes that are alternately disposed with a dielectric layer interposed therebetween. First and second external electrodes connected to the internal electrodes respectively comprise first and second internal layers containing copper (Cu), and first and second external layers containing silver (Ag) or nickel (Ni), and palladium (Pd).

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers provided on opposing end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected with the internal electrode layers, in which the dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and when a dimension in the lamination direction of the multilayer body is defined as T0, a dimension in the length direction of the multilayer body is defined as L0, and a dimension in a width direction orthogonal or substantially orthogonal to the lamination direction and the length direction is defined as W0, a relationship of L0<W0<T0 is satisfied.

Abstract: A method of manufacturing a wafer mounting table according to an embodiment includes: (a) a step of loading a ceramic slurry containing a ceramic powder and a gelling agent into opening portions of a metal mesh, inducing a chemical reaction of the gelling agent to gelate the ceramic slurry, and then performing degreasing and calcining to prepare a ceramic-loaded mesh; (b) a step of sandwiching the ceramic-loaded mesh between a first ceramic calcined body and a second ceramic calcined body obtained by calcining after mold cast forming so as to prepare a multilayer body; and (c) a step of hot press firing the multilayer body to prepare the wafer-receiving table.

Abstract: A multi-layer ceramic electronic component includes: a multi-layer unit including ceramic layers laminated in a direction of a first axis, internal electrodes disposed between the ceramic layers, and first and second side surfaces on which end portions of the internal electrodes in a direction of a second axis orthogonal to the first axis are positioned; and first and second side margins that cover the first and second side surfaces, respectively. When the first and second side margins are each divided equally into first and second regions along a plane perpendicular to the direction of the first axis, the first side margin has a larger average thickness in the first region than in the second region, and the second side margin has a larger average thickness in the second region than in the first region.

Abstract: A multilayer capacitor and a board having the same mounted thereon are provided. The multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, and first to sixth surfaces, the first internal electrode being exposed through the third surface and the fifth surface and the second internal electrode being exposed through the fourth surface and the sixth surface; first and second side portions disposed on the fifth and sixth surfaces, respectively, of the capacitor body; first and second external electrodes; a first step-compensating portion disposed on a margin portion in a width direction on the second dielectric layer on which the second internal electrode is formed on the first internal electrode; and a second step-compensating portion disposed on another margin portion in the width direction on the first dielectric layer on which the first internal electrode is disposed on the second internal electrode.

Abstract: A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer structure. A bent portion, in which the plurality of dielectric layers in a substantially same position along a stacking direction project along the stacking direction, is formed in the multilayer chip. In the bent portion, a through-hole is formed in two or more of the plurality of internal electrode layers. The through-hole is a defect portion in a first direction in which the first end face faces with the second end face and in a second direction that is vertical to the first direction in a plane of the plurality of internal electrode layers.

Abstract: An electronic component includes a laminate in which a plurality of dielectric layers and a plurality of internal electrodes are alternately laminated and external electrodes electrically connected to the internal electrodes. A side margin portion as a region in which the plurality of internal electrodes is not provided when a section of the laminate having the length direction and the width direction is viewed from the laminating direction includes a plurality of side margin layers laminated in the width direction. An outer layer portion as a region in which the plurality of internal electrodes is not provided except for the side margin portion when a section of the laminate including the laminating direction and the width direction is viewed from the length direction includes a plurality of layer-margin layers laminated in the laminating direction.

Abstract: A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked, the plurality of internal electrode layers being alternately exposed to a first end face and a second end face of the multilayer structure. A bent portion, in which the plurality of dielectric layers in a substantially same position along a stacking direction project along the stacking direction, is formed in the multilayer chip. In the bent portion, a through-hole is formed in two or more of the plurality of internal electrode layers. The through-hole is a defect portion in a first direction in which the first end face faces with the second end face and in a second direction that is vertical to the first direction in a plane of the plurality of internal electrode layers.

Abstract: A ceramic electronic device includes: a multilayer chip having a structure in which each of dielectric layers and each of internal electrode layers are alternately stacked; and external electrodes provided on end faces of the multilayer chip, wherein a main component of the external electrodes is a first metal, wherein the internal electrode layers include the first metal and a second metal of which a melting point is higher than that of the first metal, wherein a diffusion coefficient of the first metal with respect to the second metal is larger than that of the second metal with respect to the first metal, wherein a number of a cavity in a range of 10 numbers of the internal electrode layers that are next to each other and are connected to a same external electrode of the first external electrode and the second external electrode is 1 or less.

Abstract: Methods of coupling inductors in an IC device using interconnecting elements with solder caps and the resulting device are disclosed. Embodiments include forming a top inductor structure, in a top inductor area on a lower surface of a top substrate, the top inductor structure having first and second top terminals at its opposite ends; forming a bottom inductor structure, in a bottom inductor area on an upper surface of a bottom substrate, the bottom inductor structure having first and second bottom terminals at its opposite ends; forming top interconnecting elements on the lower surface of the top substrate around the top inductor area; forming bottom interconnecting elements on the upper surface of the bottom substrate around the bottom inductor area; forming solder bumps on lower and upper surfaces, respectively, of the top and bottom interconnecting elements; and connecting the top and bottom interconnecting elements to each other.

Abstract: A multilayer capacitor includes a capacitor body in which a first capacitor portion and a second capacitor portion are disposed to face each other with a connection region disposed therebetween, the connection portion having a predetermined thickness in which an internal electrode is not formed. The first capacitor portion comprises first and second internal electrodes that are alternately disposed with a dielectric layer interposed therebetween, and the second capacitor portion comprises third and fourth internal electrodes that are alternately disposed with a dielectric layer interposed therebetween. First and second external electrodes connected to the internal electrodes respectively comprise first and second internal layers containing copper (Cu), and first and second external layers containing silver (Ag) or nickel (Ni), and palladium (Pd).

Abstract: A coil-embedded ceramic substrate includes a plurality of ceramic layers including multi-turn coil patterns provided thereon. At least one ceramic layer of the plurality of ceramic layers includes thereon a multi-turn coil pattern and dummy patterns not electrically connected to the multi-turn coil pattern. The multi-turn coil pattern winds around and extends parallel or substantially parallel to sides of the ceramic layer. The dummy patterns are each parallel or substantially parallel to corresponding ones of the sides of the ceramic layer as an extension of portion of the coil pattern in an extending direction.

Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.

Abstract: A magnet and a method of forming the magnet are provided. The method includes forming a slurry comprising magnetic powder material and binder material and creating raw layers from the slurry. A magnetic field is applied to the raw layers to orient the magnetic powder material in a desired direction, and each layer is cured to form another layer on the most recent cured layer. The layers are attached together.

Abstract: A multilayer ceramic capacitor includes, in at least one of a region between an end of a first internal electrode layer which is not connected to a second external electrode and the second external electrode, and a region between an end of a second internal electrode layer which is not connected to a first external electrode and the first external electrode, in a length direction, a defect portion provided on a plane including a stacking direction and a width direction, such that the defect portion is located between the first dielectric ceramic layers in the stacking direction and is located between the second dielectric ceramic layer and the third dielectric ceramic layer in the width direction.

Abstract: A device for promoting healing of an injury in a living being is provided. Such device is based upon an injury covering portion, which portion comprises an electroactive polymer, such as poled polyvinylidine difluoride (PVDF) or a copolymer of PVDF. The electroactive polymer has either pyroelectric properties, piezoelectric properties, or both.

Abstract: A ceramic substrate of the present disclosure is a ceramic substrate including a ceramic body having a ceramic layer on a surface thereof and a surface electrode placed on a primary face of the ceramic body. Between the surface electrode and the ceramic layer is an oxide layer made of an insulating oxide having a melting point higher than the firing temperature for the ceramic layer. The oxide layer also extends on the ceramic layer not occupied by the surface electrode. The oxide layer on the ceramic layer not occupied by the surface electrode has a rough surface.

Abstract: A resin multilayer substrate includes a plurality of insulating resin base material layers and a plurality of conductor patterns provided on the plurality of insulating resin base material layers. The plurality of conductor patterns include a plurality of signal lines provided at positions not overlapping each other as viewed from a laminating direction of the insulating resin base material layers, and a ground conductor overlapping the plurality of the signal lines as viewed from the laminating direction. Openings are provided in the ground conductor and, as viewed from the laminating direction, an aperture ratio is higher in an inner zone that is sandwiched between two signal lines than in an outer zone of the two signal lines.