Forming Electrical Article Or Component Thereof Patents (Class 156/89.12)
  • Patent number: 10340088
    Abstract: In a thin-film capacitor, an electrode terminal layer is divided into a plurality of parts by a penetration portion, and includes a frame portion as one divided part. The frame portion is disposed along an outer edge of the electrode terminal layer when viewed from the bottom surface side of the electrode terminal layer, and the frame portion can hinder deformation of the electrode terminal layer stretching or warping in a thickness direction or an in-plane direction, whereby such deformation can be prevented. Accordingly, in the thin-film capacitor, the electrode terminal layer is not likely to be deformed and an improvement in strength thereof is achieved.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: July 2, 2019
    Assignee: TDK CORPORATION
    Inventors: Koichi Tsunoda, Mitsuhiro Tomikawa, Kazuhiro Yoshikawa, Kenichi Yoshida
  • Patent number: 10308560
    Abstract: The present invention provides a high thermal conductive silicon nitride sintered body having a thermal conductivity of 50 W/m·K or more and a three-point bending strength of 600 MPa or more, wherein when an arbitrary cross section of the silicon nitride sintered body is subjected to XRD analysis and highest peak intensities detected at diffraction angles of 29.3±0.2°, 29.7±0.2°, 27.0±0.2°, and 36.1±0.2° are expressed as I29.3°, I29.7°, I27.0°, and I36.1°, a peak ratio (I29.3°)/(I27.0°+I36.1°) satisfies a range of 0.01 to 0.08, and a peak ratio (I29.7°)/(I27.0°+I36.1°) satisfies a range of 0.02 to 0.16. Due to above configuration, there can be provided a silicon nitride sintered body having a high thermal conductivity of 50 W/m·K or more, and excellence in insulating properties and strength.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: June 4, 2019
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.
    Inventor: Katsuyuki Aoki
  • Patent number: 10304628
    Abstract: A multilayer capacitor includes a body including dielectric layers and first and second internal electrodes alternately disposed with dielectric layers interposed therebetween. First and second external electrodes are on the body and connected to the first and second internal electrodes, respectively. The first and second internal electrodes are plating layers. A manufacturing method of a multilayer capacitor includes preparing a plurality of laminated sheets including internal electrodes, dummy electrodes, and dielectric layers. The plurality of laminated sheets, and covers on and below the laminated sheets, are simultaneously stacked and then cured to prepare a cured product. The cured product is then diced depending on the size of the capacitor to prepare a body where the internal electrodes and the dummy electrodes are partially exposed. External electrodes are formed on external surfaces of the body using the dummy electrodes as seeds in a plating method.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Sun Hwang, Myung Sam Kang, Dong Keun Lee
  • Patent number: 10304632
    Abstract: A multilayer ceramic electronic component includes a ceramic body contributing to capacitance formation and including an active region formed by alternately stacking dielectric layers and first and second internal electrodes and, and a protective layer provided on at least one of upper and lower surfaces of the active region; and first and second external electrodes formed on respective ends of the ceramic body, wherein a step portion absorption layer is disposed in at least one of: both end portions of the ceramic body in a length direction or both end portions of the ceramic body in a width direction, and a total thickness of dielectric layers disposed on the same plane as the step portion absorption layer is greater than a thickness of a dielectric layer disposed in another region.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 28, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Ho Lee, Jae Yeol Choi, Ki Pyo Hong, Beom Seock Oh
  • Patent number: 10300701
    Abstract: In an example, a fluid ejection apparatus includes a printhead die embedded in a printed circuit board. Fluid may flow to the printhead die through a plunge-cut fluid feed slot in the printed circuit board and into the printhead die.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: May 28, 2019
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Chien-Hua Chen, Michael W. Cumbie
  • Patent number: 10297982
    Abstract: An ESD protective device includes an element assembly with a hollow portion that includes inner surfaces including a first inner surface, a second inner surface, and a third inner surface inclined to a Z direction in a cross section including the Z direction. Accordingly, a surface area of the inner surfaces of the hollow portion is increased, the heat load on an auxiliary discharge electrode is reduced, and the deterioration of the auxiliary discharge electrode is significantly reduced or prevented.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: May 21, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshihito Okutomi, Jun Adachi
  • Patent number: 10290407
    Abstract: In at least one embodiment, a single sintered magnet is provided having a concentration profile of heavy rare-earth (HRE) elements within a continuously sintered rare-earth (RE) magnet bulk. The concentration profile may include at least one local maximum of HRE element concentration within the bulk such that a coercivity profile of the magnet has at least one local maximum within the bulk. The magnet may be formed by introducing alternating layers of an HRE containing material and a magnetic powder into a mold, pressing the layers into a green compact, and sintering the green compact to form a single, unitary magnet.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 14, 2019
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Feng Liang, C Bing Rong, Michael W. Degner
  • Patent number: 10246376
    Abstract: The invention relates to a lead-free piezoceramic material based on bismuth sodium titanate (BST) having the following parent composition: x(Bi0.5Na0.5)TiO3-yBaTiO3-zSrTiO3 where x+y+z=1 and 0<x<1, 0<y<1, 0?z?0.07 or x(Bi0.5Na0.5)TiO3-yBaTiO3-zCaTiO3 where x+y+z=1 and 0<x<1, 0<y<1, 0<z?0.05 or x(Bi0.5Na0.5)TiO3-y(Bi0.5K0.5)TiO3-zBaTiO3 where x+y+z=1 and 0<x<1, 0<y<1, 0?z<1, characterized by addition of a phosphorus-containing material in a quantity that gives a phosphorus concentration of from 100 to 2000 ppm in the piezoceramic material.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: April 2, 2019
    Assignee: PI CERAMIC GMBH
    Inventors: Eberhard Hennig, Antje Kynast, Michael Töpfer, Michael Hofmann
  • Patent number: 10117334
    Abstract: A magnetic assembly is disclosed. The magnetic assembly includes a first magnetic core, a second magnetic core and a first series winding. The first magnetic core has a first top surface, a first bottom surface, a first sidewall, a second sidewall, at least one first sidewall through-hole and at least one second sidewall through-hole. The second magnetic core is connected to the first top surface of the first magnetic core. The first series winding has a first upper winding set, a first sidewall winding set, and a second sidewall winding set disposed on the first top surface, the first sidewall and the second sidewall respectively. The upper winding set is connected to the lower winding set via the first sidewall winding set and the second sidewall winding set is further connected to the lower winding set, so as to form the first series winding around the first magnetic core.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 30, 2018
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Jianhong Zeng, Shouyu Hong, Min Zhou
  • Patent number: 10115522
    Abstract: A multi-layered dielectric polymer material, a capacitor comprising the multi-layered dielectric polymer material, a use of the multi-layered dielectric polymer material and a method for forming the multi-layered dielectric polymer material are disclosed. The multi-layered dielectric polymer material may comprise a plurality of dielectric layers wherein the plurality of dielectric layers may comprise an identical base material. The base material may be compound with agents for at least one of the plurality of dielectric layers. It may overcome compatible issues for convention multi-layered material. The dielectric polymer material may have increased dielectric strength and excellent thermal properties.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: October 30, 2018
    Assignee: ABB Schweiz AG
    Inventors: Lejun Qi, Nan Li, Delun Meng, Sari Laihonen, Francois Delince
  • Patent number: 10074465
    Abstract: A method of manufacturing an electronic component includes manufacturing a ceramic element including one pair of end surfaces and four side surfaces, forming external electrodes at both end portions of the ceramic element, measuring an initial characteristic value, determining any side surface to be machined among the four side surfaces and then determining, based on stored data, an amount of machining to be performed on the side surface to be machined, and machining, by the determined machining amount, the side surface of the ceramic element, which is determined to be machined, to be flush or substantially flush with the external electrodes.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: September 11, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yuichi Hirata, Noboru Furukawa, Yasuo Sasaki, Kiyohiro Koto, Kojiro Tokieda, Yukiko Ueda
  • Patent number: 10071518
    Abstract: A method for depositing a structure comprising interdigitated materials includes merging flows of at least two materials in a first direction into a first combined flow, dividing the first combined flow in a second direction to produce at least two separate flows, wherein the second direction is perpendicular to the first direction, and merging the two separate flows into a second combined flow.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: September 11, 2018
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: David K. Fork, Karl Littau
  • Patent number: 10062505
    Abstract: A microfabricated laminated conductor, comprising at least two flat metallic conductors held together parallel by their edges by a first dielectric material anchor, such that there exists a gap of between several nanometers and several micrometers between most of the at least two flat metallic conductors.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: August 28, 2018
    Assignee: HRL Laboratories, LLC
    Inventors: Florian G. Herrault, Melanie S. Yajima
  • Patent number: 10044056
    Abstract: In some examples, solid oxide fuel cell system comprising a solid oxide fuel cell including an anode, an anode conductor layer, a cathode, a cathode conductor layer, and electrolyte, wherein the anode and the anode conductor layer each comprise nickel; and a sacrificial nickel source separate from that of the anode and anode conductor layer, wherein the sacrificial nickel source is configured to reduce the loss or migration of the nickel of the anode and/or the anode current collector in the fuel cell during operation.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 7, 2018
    Assignee: LG FUEL CELL SYSTEMS, INC.
    Inventors: Richard W. Goettler, Liang Xue
  • Patent number: 10026683
    Abstract: The present invention relates to an integrated circuit package substrate and, more specifically, to an integrated circuit package substrate, which exhibits excellent conductivity and reliability through the improvement of an adhesive force between a metal line for electrically connecting an upper part and a lower part of the integrated circuit package substrate and glass formed inside the integrated circuit package substrate.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: July 17, 2018
    Assignee: CORNING PRECISION MATERIALS CO., LTD.
    Inventors: Hyun Hang Park, Bo Gyeong Kim, Hyun Bin Kim, Sung Hoon Lee
  • Patent number: 9967980
    Abstract: A multilayer ceramic capacitor includes a ceramic element body including first and second external electrodes on first and second end surface sides of the ceramic element body, respectively. The first external electrode includes an Ni plating layer and an Sn plating layer defining a plating layer. The second external electrode includes an Au plating layer defining a plating layer.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: May 8, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akio Masunari, Hirokazu Takashima, Tomoyuki Nakamura
  • Patent number: 9960120
    Abstract: A wiring substrate includes a buried substrate disposed within a through-hole penetrating through a resin substrate of a core layer and including a plate-like body and a plurality of linear conductors penetrating the plate-like body, a first insulating layer covering a first surface of the resin substrate, a first wiring layer including a first pad pattern formed on a first surface of the buried substrate and a first wiring pattern formed on a first surface of the first insulating layer, and a third wiring pattern formed on the first surface of the resin substrate and covered by the first insulating layer. In the plurality of linear conductors, a gap between the adjacent linear conductors is smaller than a diameter of each of the linear conductors. The third wiring pattern is formed so as to have a thickness thicker than a thickness of the first wiring pattern.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: May 1, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo Fukasawa, Sumihiro Ichikawa, Michio Horiuchi
  • Patent number: 9919472
    Abstract: Embodiments are directed to methods of producing devices using modified multi-layer, multi-material electrochemical fabrication processes and/or using a laser cutting processes wherein individual layers or layer groups are formed and then stacked and bonded to produce prototypes or production parts. The methods can reduce the cost and lead time of prototyping when compared with previous multi-layer, multi-material electrochemical fabrication processes and can also reduce the lead time of production quantities, by allowing multiple layers of a multilayer device to be formed simultaneously, e.g. in parallel on the same wafer. Additionally, these methods may be used to extend the maximum height to which parts may practically be made. Finally, the methods allow geometries that are impossible, impractical or difficult to release (e.g. microfluidic devices such as pumps or parts with long, narrow channels) to be fabricated in multiple pieces and then joined after full or partial release.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: March 20, 2018
    Assignee: Microfabrica Inc.
    Inventors: Adam L. Cohen, Michael S. Lockard, Rulon J. Larsen, III, Uri Frodis, Kieun Kim, Dennis R. Smalley
  • Patent number: 9908817
    Abstract: The invention provides a stacked capacitor configuration comprising subunits each with a thickness of as low as 20 microns. Also provided is combination capacitor and printed wire board wherein the capacitor is encapsulated by the wire board. The invented capacitors are applicable in micro-electronic applications and high power applications, whether it is AC to DC or DC to AC, or DC to DC.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: March 6, 2018
    Assignee: UCHICAGO ARGONNE, LLC
    Inventors: Beihai Ma, Uthamalingam Balachandran
  • Patent number: 9895887
    Abstract: Provided is a liquid ejection head capable of stably ejecting a liquid at a practical liquid droplet velocity without separating minute liquid droplets before ejection of main liquid droplets in the case of reducing the amount of liquid droplets by reducing a nozzle diameter of the liquid ejection head. In a liquid ejection head including a nozzle for ejecting a liquid, a recess portion recessed relative to a nozzle inner wall surface is formed on a nozzle inner wall in a region having a nozzle inner diameter of 15 ?m or less.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: February 20, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Junri Ishikura, Yo Watanabe, Norihiko Ochi, Hidehiko Fujimura
  • Patent number: 9843014
    Abstract: An electronic device may have a display that is protected by a transparent cover layer. The transparent cover layer may include a laser-annealed sapphire coating on the outer surface of a glass substrate or other transparent substrate. The sapphire coating may provide the display with a hard, scratch-resistant outer surface. The sapphire coating may be formed by coating a glass substrate with a thin film of amorphous aluminum oxide. The aluminum oxide thin film may be locally heated to transform the amorphous aluminum oxide into alpha-phase aluminum oxide (sapphire). Local heating may be achieved by laser annealing the aluminum oxide coating with a carbon dioxide laser. The laser may produce laser light having a wavelength that is absorbed in the aluminum oxide coating without being absorbed by the glass substrate so that the glass substrate is not damaged during the laser annealing process.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: December 12, 2017
    Assignee: Apple Inc.
    Inventors: Tingjun Xu, Xianwei Zhao, Wookyung Bae, Sunggu Kang, John Z. Zhong
  • Patent number: 9807884
    Abstract: A substrate that includes a first dielectric layer and a capacitor embedded in the first dielectric layer. The capacitor includes a first terminal, a second terminal, and a third terminal. The second terminal is laterally located between the first terminal and the third terminal. The capacitor also includes a second dielectric layer, a first metal layer and a second metal layer. The first metal layer is coupled to the first and third terminals. The first metal layer, the first terminal, and the third terminal are configured to provide a first electrical path for a first signal. The second metal layer is coupled to the second terminal. The second metal layer and the second terminal are configured to provide a second electrical path for a second signal.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 31, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Kyu-Pyung Hwang, Young Kyu Song
  • Patent number: 9786419
    Abstract: In at least one embodiment, a single sintered magnet is provided having a concentration profile of heavy rare-earth (HRE) elements within a continuously sintered rare-earth (RE) magnet bulk. The concentration profile may include at least one local maximum of HRE element concentration within the bulk such that a coercivity profile of the magnet has at least one local maximum within the bulk. The magnet may be formed by introducing alternating layers of an HRE containing material and a magnetic powder into a mold, pressing the layers into a green compact, and sintering the green compact to form a single, unitary magnet.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: October 10, 2017
    Assignee: Ford Global Technologies, LLC
    Inventors: Feng Liang, C Bing Rong, Michael W. Degner
  • Patent number: 9774358
    Abstract: An ultrasonic sensor includes a plurality of ultrasonic wave elements each including a first electrode and a second electrode, and a control circuit configured to switch parallel connection and serial connection of the plurality of the ultrasonic wave elements.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: September 26, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Hiroshi Matsuda, Kazuyuki Kano
  • Patent number: 9764535
    Abstract: A method for making a thin ceramic part involves making a casting slurry including a ceramic powder, a solvent, a binder, a plasticizer, and a dispersant. The casting slurry is tape casted to achieve a single layer green tape. At least two single layer green tapes are laminated to form a green tape lamination. The green tape lamination is dry pressed, dried, shaped, degreased, and fired to achieve the exterior component required.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: September 19, 2017
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Zhi-Peng Xie, Hong-Yan Yan, Yu-Xi Liao
  • Patent number: 9711835
    Abstract: Disclosed are apparatus and methods related to junction ferrite devices having improved insertion loss performance. In some implementations, a ferrite disk assembly can be configured for a radio-frequency (RF) circulator. The disk assembly can include a ferrite-based disk having a ferrite portion and a metalized layer formed on a grounding surface of the disk to improve electrical contact between the grounding surface of the disk with an external grounding surface. The ferrite-based disk can further include a dielectric portion disposed around the periphery of the ferrite center portion. In some embodiments, the metalized layer can be a silver layer formed on the grounding surface of the disk and having a desired thickness.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: July 18, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: David Bowie Cruickshank, Iain Alexander Macfarlane
  • Patent number: 9706640
    Abstract: A printed circuit board includes a first printed circuit substrate and a second printed circuit substrate. The first printed circuit substrate includes a substrate layer and a first conductive circuit layer. The first conductive circuit layer is formed on the substrate layer. The substrate layer includes at least two first grooves. The first conductive circuit layer includes at least one signal wire. The first grooves are defined in both sides of the signal wire. The second printed circuit substrate is formed on the first printed circuit substrate. The second circuit substrate includes a third copper layer. A second groove is defined in the third copper layer. The first grooves are opposite to the second groove. The first grooves and the second groove form a space. The signal wire is surrounded by air in the space. A method for manufacturing the printed circuit board is also provided.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 11, 2017
    Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd., GARLIDA TECHNOLOGY CO., LTD.
    Inventors: Ming-Jaan Ho, Xian-Qin Hu, Yi-Qiang Zhuang, Fu-Wei Zhong
  • Patent number: 9509272
    Abstract: On aspect relates to an electrical bushing for use in a housing of an implantable medical device. The bushing includes at least one electrically insulating base body and at least one electrical conducting element. The conducting element is set up to establish, through the base body, at least one electrically conductive connection between an internal space of the housing and an external space. The at least one conducting element comprises at least one cermet such that the conducting element is hermetically sealed with respect to the base body. The bushing includes an electrical filter structure. The at least one conducting element provides at least a one conducting section of the filter structure and the base body provides at least one dielectric section of the filter.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: November 29, 2016
    Assignee: Heraeus Deutschland GmbH & Co. KG
    Inventor: Andreas Reisinger
  • Patent number: 9449766
    Abstract: A composite electronic component may include: a composite body including a capacitor and an inductor coupled to each other, the capacitor having a ceramic body in which dielectric layers and internal electrodes facing each other with the dielectric layers interposed therebetween are stacked, and the inductor having a magnetic body in which magnetic layers having conductive patterns are stacked; an input terminal disposed on a first end surface of the composite body and connected to the conductive pattern of the inductor; an output terminal including a first output terminal formed on a second end surface of the composite body and connected to the conductive pattern of the inductor and a second output terminal disposed on a second side surface of the composite body; and a ground terminal disposed on a first side surface of the composite body and connected to the internal electrodes of the capacitor.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: September 20, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Ghyu Ahn, Byoung Hwa Lee, Sang Soo Park, Min Cheol Park
  • Patent number: 9437458
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. The lead frame strip is processed by attaching a semiconductor die to each of the die paddles and covering the unit lead frames with a molding compound after the semiconductor dies are attached to the die paddles. Spaced apart cuts are formed in the periphery of each unit lead frame that sever the leads from the periphery of each unit lead frame and extend at least partially into the molding compound in regions of the periphery where the leads are located so that the molding compound remains intact between the cuts. The lead frame strip is processed after the cuts are formed, and the unit lead frames are later separated into individual packages.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: September 6, 2016
    Assignee: Infineon Technologies AG
    Inventors: Nee Wan Khoo, Vigneswaran Letcheemana
  • Patent number: 9248637
    Abstract: An apparatus is provided for magnetically imprinting indicia into a layer on an article, the layer comprising a composition in which magnetic or magnetizable particles are suspended. The apparatus comprises: a soft magnetizable sheet, having an outer surface arranged to face the article in use, and an opposing interior surface; and a permanent magnet, shaped such that its magnetic field contains perturbations giving rise to indicia. The permanent magnet is disposed adjacent the interior surface of the soft magnetizable sheet. The soft magnetizable sheet enhances the perturbations of the magnetic field of the permanent magnet such that when the layer to be imprinted is located adjacent the outer surface of the soft magnetizable sheet, the magnetic or magnetizable particles are oriented by the magnetic field to display the indicia.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: February 2, 2016
    Assignee: DE LA RUE INTERNATIONAL LIMITED
    Inventors: Sameer Mohammed Bargir, Paul Howland
  • Patent number: 9224666
    Abstract: The circuit arrangement according to the invention provides a substrate (10), a connecting element (18) and a chip (16). The substrate (10) provides at least a partial metallisation (11) on its surface. The connecting element (18) is applied to the metallisation (11). The chip (16) is applied to the connecting element (18). The connecting element (18) provides an electrically non-conductive glass layer (14), which is applied directly to the metallisation (11), and an adhesive layer (15) between the chip (16) and the glass layer (14).
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: December 29, 2015
    Assignee: RHODE & SCHWARZ GMBH & CO. KG
    Inventor: Robert Ziegler
  • Patent number: 9208948
    Abstract: A method for manufacturing a monolithic ceramic electronic component includes the steps of preparing a first ceramic outer layer, stacking a plurality of inner electrodes and a plurality of ceramic green sheets on the first ceramic outer layer, forming an inner portion, applying first pressing in the stacking direction, forming an outer portion on the inner portion to form a second ceramic outer layer, applying second pressing in the stacking direction to form a multilayer body, cutting the mother multilayer body to obtain individual multilayer bodies, sintering the individual multilayer bodies to obtain ceramic bodies, and forming first and second outer electrodes on the outer surface of each of ceramic bodies.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: December 8, 2015
    Assignee: Murata Manufacturing Co., Ltd
    Inventor: Hironori Tsutsumi
  • Patent number: 9130152
    Abstract: A piezoelectric component includes at least one planned fracture layer for generating and guiding cracks in the component in a controlled manner. The planned fracture layer is disposed between two electrode layers adjacent to each other in the direction of the stack. The distance d2 of the two electrode layers is greater than the distance dl of two adjacent electrode layers between which no planned fracture layer is provided.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: September 8, 2015
    Assignee: EPCOS AG
    Inventors: Alexander Glazunov, Martin Galler
  • Patent number: 9113575
    Abstract: A wiring board with a built-in electronic component includes a substrate having an accommodation portion, an electronic component having an electrode and accommodated in the accommodation portion of the substrate, a conductive layer having a planar conductive pattern formed over the electrode of the electronic component, and one or more via conductors connecting the planar conductive pattern of the conductive layer and the electrode of the electronic component. The electrode of the electronic component has a portion which faces the planar conductive pattern of the conductive layer and which has a plurality of outer edges facing outward with respect to a surface of the electronic component on which the portion of the electrode is formed, and the planar conductive pattern of the conductive layer has a portion positioned directly over one or more of the outer edges of the electrode of the electronic component.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: August 18, 2015
    Assignee: IBIDEN CO., LTD.
    Inventor: Keisuke Shimizu
  • Patent number: 9053401
    Abstract: Thin film integrated circuits are peeled from a substrate and the peeled thin film integrated circuits are sealed, efficiently in order to improve manufacturing yields. The present invention provides laminating system comprising transporting means for transporting a substrate provided with a plurality of thin film integrated circuits; first peeling means for bonding first surfaces of the thin film integrated circuits to a first sheet member to peel the thin film integrated circuits from the substrate; second peeling means for bonding second surfaces of the thin film integrated circuits to a second sheet member to peel the thin film integrated circuits from the first sheet member; and sealing means for interposing the thin film integrated circuits between the second sheet member and a third sheet member to seal the thin film integrated circuit with the second sheet member and the third sheet member.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryosuke Watanabe, Naoto Kusumoto, Osamu Nakamura
  • Publication number: 20150144252
    Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.
    Type: Application
    Filed: December 11, 2013
    Publication date: May 28, 2015
    Applicant: International Business Machines Corporation
    Inventors: Jinwoo Choi, Daniel M. Dreps, Rohan U. Mandrekar
  • Publication number: 20150144382
    Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: International Business Machines Corporation
    Inventors: Jinwoo Choi, Daniel M. Dreps, Rohan U. Mandrekar
  • Patent number: 9039859
    Abstract: A ceramic green sheet laminate is produced by stacking ceramic green sheets, each including conductive films for forming first or second internal electrodes on a surface thereof. A first cutting step is performed in which the ceramic green sheet laminate is cut to form first and second end surfaces at which the first or second internal electrodes are exposed. A second cutting step is performed in which the ceramic green sheet laminate is cut to form first and second side surfaces at which the first and second internal electrodes are exposed. In the second cutting step, the ceramic green sheet laminate is pressed and cut by moving a cutting blade in a length direction or a width direction.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: May 26, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Junya Tanaka, Hironori Tsutsumi
  • Publication number: 20150129112
    Abstract: A shower head assembly includes an electrode plate, and a laminate base that is constituted of ceramic sheets and provided to hold the electrode plate. The laminate base includes no bonding surface between the ceramic sheets. The laminate base includes a first gas diffusion space formed in its central area and a second gas diffusion space formed in its peripheral area. A first heater electrode layer is provided above the first gas diffusion space, and a second heater electrode layer is provided above the second gas diffusion space. A first coolant passage is formed above the first gas diffusion space, and a second coolant passage is formed above the second gas diffusion space. A first gas supply passage is connected to the first gas diffusion space, and a second gas supply passage is connected to the second gas diffusion space.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 14, 2015
    Inventors: Michishige SAITO, Koichi MURAKAMI, Takashi YAMAMOTO
  • Patent number: 9003653
    Abstract: A method for producing a ceramic multilayer circuit system, and a corresponding multilayer circuit system are provided. An embodiment of the method includes sequential deposition of a plurality of circuit layers of the multilayer circuit system on a substrate using a powder spray method; pressing of the deposited plurality of circuit layers; and thermal sintering of the pressed plurality of circuit layers. The individual circuit layers have electrically conductive areas made of at least one conductive material and electrically insulating areas made of at least one ceramic material.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: April 14, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Juergen Egerter, Walter Roethlingshoefer, Markus Werner
  • Patent number: 9005383
    Abstract: A ceramic member in which the metal layers with high void ratio are sufficiently sintered to lower a residue of resin is produced. The method for manufacturing a ceramic member which comprises a step of forming a stacked compact from a plurality of metallic paste layers containing a metal component M1 that are stacked one on another via ceramic green sheets, and a step of firing the stacked compact, wherein at least one of plural metallic paste layers is formed as a second metallic paste layer that has the mass percentage X higher than that of the metallic paste layer that adjoin therewith in the stacking direction, the mass percentage X being the proportion of the metal component M1 to the total metal content in the metallic paste layer.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: April 14, 2015
    Assignee: Kyocera Corporation
    Inventors: Takeshi Okamura, Tomohiro Kawamoto, Shigenobu Nakamura
  • Publication number: 20150093661
    Abstract: To provide a method for manufacturing a solid oxide fuel cell apparatus. The present invention is a method for manufacturing a fuel cell apparatus, including an adhesive application step for adhering ceramic adhesive to joining portions so as to constitute an airtight flow path for guiding fuel, and a drying and hardening step for drying and hardening ceramic adhesive, whereby the drying and hardening step has: a workable hardening step for drying the ceramic adhesive at a predetermined first temperature to a state whereby the next manufacturing step can be implemented, and a solvent elimination and hardening step further hardens ceramic adhesive hardened in each of the workable hardening steps by raising it to a second temperature higher than the first temperature and approximately equal to the temperature of the fuel cells during an electrical generation operation.
    Type: Application
    Filed: September 25, 2014
    Publication date: April 2, 2015
    Inventors: Naoki WATANABE, Nobuo ISAKA, Takuya HOSHIKO, Masaki SATO, Shuhei TANAKA, Shigeru ANDO, Osamu OKAMOTO, Seiki FURUYA, Yutaka MOMIYAMA, Kiyoshi HAYAMA
  • Patent number: 8980028
    Abstract: In a metal base substrate with a low-temperature sintering ceramic layer located on a copper substrate, bonding reliability is increased between the copper substrate and the low-temperature sintering ceramic layer. A raw laminated body is prepared by stacking, on a surface of a copper substrate, a low-temperature sintering ceramic green layer including a low-temperature sintering ceramic material containing about 10 mol % to about 40 mol % of barium in terms of BaO and about 40 mol % to about 80 mol % of silicon in terms of SiO2, and this raw laminated body is subjected to firing at a temperature at which the low-temperature sintering ceramic green layer is sintered. In the thus obtained metal base substrate, a glass layer composed of Cu—Ba—Si based glass with a thickness of about 1 ?m to about 5 ?m is formed between the metal substrate and the low-temperature sintering ceramic layer.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: March 17, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoichi Moriya, Tsuyoshi Katsube, Yuki Takemori, Tetsuo Kanamori, Yasutaka Sugimoto, Takahiro Takada
  • Publication number: 20150061810
    Abstract: Disclosed herein is a multilayer type inductor for implementing high quality factor (Q factor), and more particularly, a multilayer type inductor, including: a ceramic body formed by laminating a plurality of ceramic sheets; a coil electrode provided between the ceramic sheets and having an outer peripheral formed in a curved surface; and a pair of external terminals provided at both side portions of the ceramic body.
    Type: Application
    Filed: August 29, 2014
    Publication date: March 5, 2015
    Inventor: Bong Sup LIM
  • Patent number: 8961719
    Abstract: A method for making a treated super-hard structure, the method including providing a super-hard structure comprising super-hard material selected from polycrystalline cubic boron nitride (PCBN) material or thermally stable polycrystalline diamond (PCD) material; subjecting the super-hard structure to heat treatment at a treatment temperature of greater than 700 degrees centigrade at a treatment pressure at which the super-hard material is not thermodynamically stable, for a treatment period of at least about 5 minutes to produce the treated super-hard structure.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: February 24, 2015
    Assignee: Element Six Limited
    Inventors: Stig Åke Andersin, Bernd Heinrich Ries, Frank Friedrich Lachmann, Lars-Ivar Nilsson
  • Publication number: 20150049412
    Abstract: There is provided a multilayer ceramic capacitor, including: a ceramic body including a plurality of dielectric layers stacked therein; first and second internal electrodes alternately exposed to both end surfaces of the ceramic body, having each of the dielectric layers disposed therebetween; and first and second external electrodes formed on the end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively, wherein a difference in rigidity between upper and lower portions of the ceramic body is 4% or less.
    Type: Application
    Filed: December 19, 2013
    Publication date: February 19, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Tae Hyeok KIM, Byoung Hwa LEE, Jin Man JUNG
  • Publication number: 20150047767
    Abstract: A method of producing an all-solid-state lithium-ion secondary battery including forming primary sintered bodies of an anode, a cathode, and a solid electrolyte layer; disposing the primary sintered body of the solid electrolyte layer between the primary sintered bodies of the anode and the cathode; forming a laminate of the primary sintered bodies and at least one of a first intermediate layer disposed between the anode and the solid electrolyte layer, and a second intermediate layer disposed between the cathode and the solid electrolyte layer; and firing the laminate to obtain a sintered body including an anode, a solid electrolyte layer, and a cathode, and at least one of a first intermediate layer and a second intermediate layer. In the resulting all-solid-state lithium-ion secondary battery, the first and second intermediate layers have a particle size that is smaller than that of the anode, cathode, and solid electrolyte layer.
    Type: Application
    Filed: November 3, 2014
    Publication date: February 19, 2015
    Inventor: Atsushi SANO
  • Publication number: 20150048392
    Abstract: A wavelength conversion element including at least two ceramic conversion segments each including a ceramic wavelength conversion substance and connected together in a matrix by a non-transparent connecting material, wherein each conversion segment emits light by absorbing primary radiation and re-emitting secondary radiation different from the primary radiation, and the light comprises the secondary radiation and a proportion of the primary radiation is less than or equal to 5%.
    Type: Application
    Filed: March 5, 2013
    Publication date: February 19, 2015
    Inventor: Mikael Ahlstedt
  • Patent number: 8956486
    Abstract: In a manufacturing method for a monolithic ceramic electronic component, a plurality of green chips arrayed in row and column directions which are obtained after cutting a mother block are spaced apart from each other and then tumbled, thereby uniformly making the side surface of each of the green chips an open surface. Thereafter, an adhesive is applied to the side surface. Then, by placing a side surface ceramic green sheet on an affixation elastic body, and pressing the side surface of the green chips against the side surface ceramic green sheet, the side surface ceramic green sheet is punched and stuck to the side surface.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: February 17, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Togo Matsui, Minoru Dooka, Hiroyoshi Takashima, Kenichi Okajima