With Heat Sink Patents (Class 174/16.3)
  • Patent number: 9907208
    Abstract: At least one implementation provides a hold down for an electronic device. The electronic device includes a support frame, a circuit board coupled to the support frame and having at least one component, a thermal pad thermally coupled to the component, and a heat sink associated with the thermal pad. The hold down includes a generally planar portion adapted to be positioned over a surface of the heat sink. The hold down also includes a plurality of connecting structures extending angularly from the generally planar portion. The connecting structures and configured to engage the support frame to cause the hold down to apply the biasing force to retain the thermal pad against at least one of the heat sink or the component when the heat sink and the thermal pad are positioned between the hold down and the support frame. A method is also provided for attaching the hold down.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: February 27, 2018
    Assignee: THOMSON LICENSING
    Inventors: William Hofmann Bose, Mickey Jay Hunt
  • Patent number: 9907209
    Abstract: A retaining clip is provided for use with a heat sink. The heat sink has a flat bottom surface in heat conducting engagement with an electronic device and fins extending from a top surface of the heat sink, the fins defining a channel. The retainer clip includes a middle section and a first end section and a second end section on either side of the middle section. The middle section fits within the channel and engages the heat sink to hold the bottom surface against the electronic device. The middle section further includes a portion extending above the top surface, within the channel, to limit rotation of the heat sink. Each of the first and second end sections include a pivot end adjacent to the middle section, a distal end to engage an anchor, a first leg adjacent to the distal end, a second leg adjacent to a pivot end, and a bend between the first leg and the second leg, the bend located to form a moment arm from the pivot end.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: February 27, 2018
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Gregory A. James, Steve S. Chen
  • Patent number: 9893643
    Abstract: In a semiconductor module, at least one snubber circuit module is attachable/detachable to/from an interior communicated with a snubber-circuit-connecting opening; a plurality of snubber-circuit electrodes for electrically connecting with the at least one snubber circuit module are joined with a circuit pattern; the plurality of snubber-circuit electrodes are disposed in the interior of the snubber-circuit-connecting opening; in a state that the snubber circuit module is attached in the interior of the snubber-circuit-connecting opening, the snubber circuit module does not stick out from an outer surface of an outer enclosure member, the plurality of snubber-circuit electrodes are in surface-contact with electrodes in the side of the snubber circuit module, respectively; and the snubber-circuit-connecting opening and the interior are not overlapped with the at least one semiconductor element in a planar view.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: February 13, 2018
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Nobuhisa Honda, Yasuo Kotake
  • Patent number: 9881847
    Abstract: A semiconductor structure includes a semiconductor substrate having a recess disposed beneath a semiconductor device. The semiconductor structure also includes a thermally conductive core disposed in the recess, and a package substrate including a heat sink. The heat sink is in thermal contact with the thermally conductive core.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: January 30, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Nathan Perkins
  • Patent number: 9875992
    Abstract: An embodiment includes a semiconductor package comprising: a substrate; a first semiconductor chip mounted on the substrate; a second semiconductor chip mounted on a top surface of the first semiconductor chip; a connecting bump disposed between the first and second semiconductor chips to electrically connect the second semiconductor chip to the first semiconductor chip; and a first heat dissipation part disposed on the top surface of the first semiconductor chip between the first and second semiconductor chips and spaced apart from a bottom surface of the second semiconductor chip.
    Type: Grant
    Filed: August 9, 2015
    Date of Patent: January 23, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junyeong Heo, Chajea Jo, Taeje Cho
  • Patent number: 9859186
    Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: January 2, 2018
    Assignee: Elenion Technologies, LLC
    Inventor: Nathan A. Nuttall
  • Patent number: 9832876
    Abstract: Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 28, 2017
    Assignee: Intel Corporation
    Inventors: Mani Prakash, Thomas T. Holden, Jeffory L. Smalley, Ram S. Viswanath, Bassam N. Coury, Dimitrios Ziakas, Chong J. Zhao, Jonathan W. Thibado, Gregorio R. Murtagian, Kuang C. Liu, Rajasekaran Swaminathan, Zhichao Zhang, John M. Lynch, David J. Llapitan, Sanka Ganesan, Xiang Li, George Vergis
  • Patent number: 9831150
    Abstract: According to one embodiment, a semiconductor device includes a first substrate, a second substrate, a first electronic component, a heat-conducting layer, a covering portion, and a heat-transporting portion. The first substrate has a first face and the second substrate has a second face and a third face. The first electronic component has a fourth face and a fifth face. The heat-conducting layer covers the third face and the fifth face. The covering portion covers at least the heat-conducting layer. The heat-transporting portion thermally connects the heat-conducting layer and the first substrate, and is located outside the second substrate and outside the covering portion.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: November 28, 2017
    Assignee: Toshiba Memory Corporation
    Inventor: Tatsuro Hiruta
  • Patent number: 9831190
    Abstract: Between an adhesive surface of a heat spreader lid and a top surface of a semiconductor package, in addition to a spreader adhesive layer, several warpage control adhesive layers are also provided. The warpage control adhesive layers are disposed on corner areas of the adhesive surface of the heat spreader lid to reduce high temperature warpage of the semiconductor device package.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: November 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Chih Yew, Fu-Jen Li, Po-Yao Lin, Kuo-Chuan Liu
  • Patent number: 9805979
    Abstract: An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface opposite to the active surface, and a side surface adjacent to and connecting the active and inactive surfaces; a plurality of conductive elements formed on the electrode pads of the electronic element; and an encapsulant covering the active and side surfaces of the electronic element and portions of side surfaces of the conductive elements and exposing the inactive surface of the electronic element. Therefore, the invention enhances the structural strength of the active surface of the electronic element so as to prevent cracking of the electronic element and hence avoid delamination of the conductive elements from the electronic element.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: October 31, 2017
    Assignee: Siliconware Precision Industires Co., Ltd.
    Inventors: Shao-Tzu Tang, Chang-Yi Lan, Ying-Chou Tsai
  • Patent number: 9806010
    Abstract: A method of fabricating a package module includes placing a pin frame having plural pins on a circuit substrate; bonding the pins to corresponding bonding areas on a circuit substrate, thereby connecting the pins to the bonding areas; cutting off a connecting portion of the pin frame; and bending the pins to be vertical to the circuit substrate. By placing the pins on the corresponding bonding areas on the circuit substrate through the pin frame, and then cutting off the connecting portion of the pin frame and bending the pins, the efficiency of assembling the package module can be greatly promoted.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: October 31, 2017
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Kai Lu, Zhen-Qing Zhao, Tao Wang
  • Patent number: 9793191
    Abstract: A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one of the stiffener and the heat spreader. In addition, the at least one orifice is aligned with the at least one stud.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: October 17, 2017
    Assignee: General Electric Company
    Inventor: Gamal Refai-Ahmed
  • Patent number: 9788428
    Abstract: The invention provides a stacked structure comprising a master circuit board and at least two slave circuit boards. The master circuit board comprises a plurality of connecting seats. Each slave circuit board is equipped with a connector, and defined with a plurality of post-production process areas. Wherein the connector of each slave circuit board is disposed on one of post-production process areas, and inserted into the corresponding connecting seat. When the connector of the slave circuit board must be through other slave circuit boards in order to insert the corresponding connecting seat, the post-production process areas that are disposed on other slave circuit boards and impede the connection between the connector and the corresponding connecting seat will be cut into hollow areas. Accordingly, the connector of the slave circuit board is capable of inserting the corresponding connecting seat through the hollow areas of other slave circuit boards.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: October 10, 2017
    Assignee: INNODISK CORPORATION
    Inventors: Chih-Hsing Chen, Hsiao-Yu Wang
  • Patent number: 9780014
    Abstract: A method of mounting a plurality of semiconductor or microelectronic chips or dies, the method including providing a carrier, temporarily adhering the plurality of semiconductor or microelectronic chips or dies to the carrier with active faces of the chips or dies facing towards the carrier, covering backsides of the chips and filling empty spaces between the chips or dies with a metallic material to thereby define an assembly of the chips or dies and the metallic material, and releasing the assembly from the carrier, wherein each chip or die comprises at least one bonding ring higher than a height of the active face of the respective chip or die or any connections on the active face of the respective chip or die.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: October 3, 2017
    Assignee: HRL Laboratories, LLC
    Inventors: Alexandros D. Margomenos, Miroslav Micovic
  • Patent number: 9781850
    Abstract: An electronic controller which includes a cover connected to a base plate, a housing, and a printed circuit board disposed in the housing. The base plate includes a press-fit inspection opening or aperture, and a cover is placed on the base plate over the opening, creating a seal path between the cover and the edge of the opening in the base plate. In one embodiment, there is a sealant, such as room temperature vulcanization (RTV) or heat cured sealant, dispensed on the sheet metal base plate around the perimeter of the opening, and the sealant is cured to prevent the formation of a leak path. Prior to the curing process, the cover is held in place by a pressure sensitive adhesive (PSA), as the sealant is cured. The controller is treated to a curing process to cure the sealant between the cover and the base plate.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: October 3, 2017
    Assignee: Continental Automotive Systems, Inc.
    Inventors: David Wayne Currier, Donald J Zito, Keith A Meny, James D Baer
  • Patent number: 9775265
    Abstract: A heatsink to be mounted on a circuit board including a plurality of electronic parts is constituted of a conductive and rectangular plate-shaped member, and mounted on the circuit board such that a main surface of the heatsink blocks an airflow generated on the circuit board, the heatsink being electrically grounded. The main surface includes a contacting portion disposed in contact with the circuit board and an isolated portion separated from the circuit board, the isolated portion being cut into two parts along a straight line extending in a direction away from the circuit board. The two parts are each bent such that an end portion on a side of the straight line is oriented to a downstream side of the airflow, so that an opening is defined between the respective end portions of the two parts on the side of the straight line.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: September 26, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Shogo Yoneda
  • Patent number: 9754868
    Abstract: A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: September 5, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Ching-Wen Chiang, Hsin-Chih Wang, Chih-Yuan Shih, Shih-Ching Chen
  • Patent number: 9735826
    Abstract: An electronic device may include a noise shielding device that may include: a substrate including at least one heat generating component; a metallic shield cover that is disposed on the substrate to enclose the at least one heat generating component; a metal housing disposed around the shield cover; and a heat transfer member that is configured to transfer heat emitted from the heat generating component through an opening formed at a position corresponding to the heat generating component to the metal housing, wherein the metallic shield cover includes a plurality of tension fingers that protrude at predetermined intervals and contact a bottom face of the metal housing, and noise emitted from the heat generating component is shielded by a shielding region that is formed by the tension fingers and the metal housing.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: August 15, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jongryul Sohn, Cheolwoong Park, Hosoo Seo
  • Patent number: 9713293
    Abstract: An electric power converter includes a semiconductor module constituting a power conversion circuit, a capacitor electrically connected to the semiconductor module, and a cooling member for cooling the capacitor. The capacitor includes an element body provided with internal electrode, and a pair of end-face-electrodes provided on both end faces of the element body and connected to the internal electrode. The pair of end-face-electrodes are connected with a pair of bus bars, respectively, in a manner of surface contact. The capacitor is disposed in a state where one of the pair of end-face-electrodes is facing the cooling member. The end-face-electrode facing the cooling member is in contact with the cooling member via the bus bar.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: July 18, 2017
    Assignee: DENSO CORPORATION
    Inventors: Kazuya Takeuchi, Makoto Okamura, Yuuichi Handa, Naoki Hirasawa, Hiromi Ichijo, Ryota Tanabe, Tetsuya Matsuoka
  • Patent number: 9704776
    Abstract: The present invention provides a semiconductor device that is reduced in size by changing the structure of a fixing portion used for fixing a semiconductor module to a cooler. Bolts 17 are inserted through first through-holes 4 of external conductive terminals 3, second through-holes 6 formed in a resin frame 5, and third through-holes 10 formed in a top plate 9, and the ends of the bolts 17 are screwed to resin nuts 16. External wiring 25, the external conductive terminals 3, a semiconductor module 1, and a cooler 2 are fastened by the bolts 17, thereby fixing the whole members.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: July 11, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Ryuichi Sawagashira
  • Patent number: 9693456
    Abstract: This substrate includes an insulating substrate having a first surface and a second surface, and a metal layer of a metal plate bonded to the first surface. The insulating substrate has a through hole. The metal layer includes: a bent section that is inserted through the through hole and bulges from the first surface toward the second surface; and outer periphery sections that are positioned around the bent section and are bonded to the first surface. The bent section has a first end and a second end positioned on opposite sides, and is bent with respect to the outer periphery sections at the first end and the second ends. The outer periphery sections are divided into a first outer periphery section and a second outer periphery section, which are respectively continuous with the first end and the second end of the bent section.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: June 27, 2017
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Kiminori Ozaki, Yasuhiro Koike, Hiroaki Asano, Hitoshi Shimadu, Shigeki Kawaguchi, Tomoaki Asai
  • Patent number: 9661689
    Abstract: A cooling and holding device for heating-elements, more particularly PTC heating-elements, including a flat housing having at least one heating shaft in which there is at least one heating-element, wherein the heating shaft has opposing shaft walls between which the heating-element is clamped, and at least one side slit that separates the shaft walls such that the distance between the shaft walls can be varied for installation of the heating-element, wherein at least one clamping section outwardly protruding from the flat housing, grips the flat housing, spanning the side slit, and is elastically deformed in the mounted state of the heating-element so as to provide a pressing force of the shaft walls on the heating-element in the assembled state.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: May 23, 2017
    Assignee: STEGO-HOLDING GMBH
    Inventors: Robert Dent, Elmar Mangold
  • Patent number: 9655280
    Abstract: A system for selectively engaging a plurality of electronics modules with a respective heat sink is provided. The system includes a spring element and a force generation system for selectively applying a force on the spring element. The spring element, in response to the force, is configured to generate a first resultant force on a first electronics module in a first direction generally parallel to the direction of said force applied by the force generation system, a second resultant force on a second electronics module in a second direction, the second direction different from the first direction, and a third resultant force on a third electronics module in a third direction, the third direction generally opposite that of the second direction.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: May 16, 2017
    Assignee: Lockheed Martin Corporation
    Inventor: Alexander J. Silverman
  • Patent number: 9646937
    Abstract: A packaging structure for thin die is provided. The packaging structure has a substrate, a thin die, a strengthening layer and an encapsulation body. The thin die is disposed on and electrically connected with the substrate; the strengthening layer is disposed on the thin die; and the encapsulation body is formed on the substrate and covers both the thin die and the strengthening layer. The strengthening layer can bear pressure or stress during the formation of the encapsulation body to protect the thin die. A method for manufacturing the packaging structure for the thin die is further provided to manufacture the above packaging structure for the thin die.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: May 9, 2017
    Assignee: Dawning Leading Technology Inc.
    Inventor: Diann-Fang Lin
  • Patent number: 9627864
    Abstract: A detachable high powered electronic module of a high powered electronic system capable of receiving high power is disclosed. In one embodiment, the detachable high powered electronic includes a sub-array of the high powered electronic module, a heat exchanger assembly, a power converter module, and a mechanical interface. The mechanical interface is configured to detachably couple the sub-array and the power converter module via the heat exchanger assembly. Further, the detachable sub-array assembly is configured to deliver power received from the power converter module to the sub-array and also to substantially simultaneously extract heat away from the detachable sub-array.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: April 18, 2017
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Kevin W. Sliech, Timothy M. Dresser, Jared P. Majcher
  • Patent number: 9618567
    Abstract: Disclosed is in particular a device (2) for stressing an integrated circuit (1) including an electronic chip (10) mounted in a housing (12), the device including a source (20) of thermal stress. The device (2) also includes a thermally conductive coupling member (22), designed to be thermally coupled to the source (20) of thermal stress during the stressing operation. The coupling member (22) includes an end (220) whose geometry is suitable for being introduced into an aperture with a predefined geometry, to be made in the housing (12) of the integrated circuit (1) so as to thermally couple a coupling face (222) of this end (220) with a face (102) of the electronic chip (10).
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: April 11, 2017
    Assignee: EUROPEAN AERONAUTIC DEFENCE AND SPACE COMPANY EADS FRANCE
    Inventors: Florian Moliere, Sebastien Morand, Alexandre Douin, Gerard Salvaterra, Christian Binois, Daniel Peyre
  • Patent number: 9615444
    Abstract: An electronic device is attached to a first surface of a board which includes vias. A heat sink precursor for the electronic device is attached to the second surface of the electronic board. The heat sink precursor includes a cavity facing the vias. A wave of solder is applied to the second surface. The solder penetrates into the cavity of the heat sink precursor and flows by capillary action through the vias to join a thermal radiator and/or electronic contact of the electronic device to the vias. The solder further remains in the cavity to form a corresponding heat sink.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: April 4, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Giuseppe Luigi Malgioglio, Rosalba Cacciola
  • Patent number: 9613764
    Abstract: An electrical contactor assembly is provided including an electrical contactor positioned within a contactor housing, an electrical bus bar, and a post constructed from an electrically and thermally conductive material connected to the bus bar. At least one lead is coupled to the electrical contact and to the post. The at least one lead has a first portion oriented about a first plane and a second portion extending from the first portion and being oriented about a second plane. The second plane is arranged at an angle to the first plane such that one or more surface of the at least one lead are configured to transmit heat to the contactor housing.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: April 4, 2017
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventor: Debabrata Pal
  • Patent number: 9603286
    Abstract: There is provided an electronic device. The electronic device includes a circuit board having heat generating components thereon. The electronic device further includes spring clips or bend tabs. The electronic device also includes a heat sink, disposed over the circuit board, through which heat from the circuit board and the components thereon is released. The heat sink has a generally flat horizontal base and a series of vertically directed fins. The heat sink is secured to at least one of the circuit board and at least one of the components thereon by the spring clips or bend tabs being positioned at a periphery of the horizontal base. The spring clips or bend tabs have distal contact prongs that contact and apply downward force on the horizontal base.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: March 21, 2017
    Assignee: THOMSON LICENSING
    Inventors: Joseph Lee Carpenter, Sin Hui Cheah, Christopher Michael William Proctor
  • Patent number: 9589874
    Abstract: An assembly is made of an integrated circuit chip and a plate. At least one channel is arranged between the chip and the plate. The channel is delimited by metal sidewalls at least partially extending from one surface of the chip to an opposite surface of the plate. The assembly is encapsulated in a body that includes an opening extending to reach the channel. The plate may be one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: March 7, 2017
    Assignees: STMicroelectronics (Crolles 2) SAS, SOCPRA Sciences et Génie S.E.C.
    Inventors: Louis-Michel Collin, Luc Guy Frechette, Sandrine Lhostis
  • Patent number: 9589842
    Abstract: A method of fabricating a semiconductor package is disclosed. The method includes disposing semiconductor chips on a support substrate, forming a protection layer covering top surfaces of the semiconductor chips, forming a molding layer covering the support substrate and the protection layer, and etching the molding layer to expose the protection layer.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: March 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inho Choi, Donghan Kim, Jae Choon Kim, Jikho Song, Mitsuo Umemoto
  • Patent number: 9580827
    Abstract: The present invention provides a method for producing an electronic component, capable of simply and efficiently producing an electronic component having both of a via electrode(s) (bump(s)) and a plate-like member. The method is a method for producing an electronic component. The electronic component includes: a substrate 21, a chip(s) 31, a resin 41, a plate-like member 11 having a surface(s), a bump(s) 12 that includes a deformable portion 12A, and a wiring pattern 22. The method includes: disposing the chip(s) 31 on the surface(s); and encapsulating the bump(s) 31 in the resin 41. The encapsulating includes: encapsulating the chip(s) 31 in the resin 41 between a bump 12-formed surface of the plate-like member 11 on which the bump(s) 12 is formed and a wiring pattern 22-formed surface of the substrate 21 on which the wiring pattern is formed; and causing the bump(s) 12 to be in contact with the wiring pattern 22.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: February 28, 2017
    Assignee: Towa Corporation
    Inventors: Hirokazu Okada, Hiroshi Uragami, Tsuyoshi Amakawa, Muneo Miura
  • Patent number: 9554492
    Abstract: A power converter is provided. The power converter includes a heat sink provided with a holding unit, a plurality of semiconductor devices disposed on the heat sink, and a fixing assembly pressing each of the semiconductor devices toward the heat sink to fix the semiconductor device. The fixing assembly includes a lower push unit disposed on the semiconductor device, and an upper push unit disposed on the lower push unit to press the lower push unit downward, the upper push unit being coupled to the holding unit. The upper push unit includes a central bent part that partially protrudes downward, an insertion part disposed on each of both ends of the central bent part in a left/right direction, the insertion part having a left/right distance therebetween that gradually increases upward, and a fixing bar inserted into the insertion part.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: January 24, 2017
    Assignee: LSIS CO., LTD.
    Inventor: Jun Seok Eom
  • Patent number: 9537224
    Abstract: Systems, methods, devices and apparatuses directed to transceiver devices are disclosed. In accordance with one method, a first set of antenna positions in a first section of a set of sections of a circuit layout for the circuit package is selected. The method further includes selecting another set of antenna positions in another section of the circuit layout such that an arrangement of selected antenna positions of the other set is different from an arrangement of selected antenna positions of a previously selected set of antenna positions. The selecting another set of positions in another section is iterated until selections have been made for a total number of antennas. The selecting the other set is performed such that consecutive unselected positions in the other section do not exceed a predetermined number of positions. In addition, antenna elements are formed at the selected positions to fabricate the circuit package.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Daniel J. Friedman, Xiaoxiong Gu, Duixian Liu, Arun S. Natarajan, Scott K. Reynolds, Alberto Valdes Garcia
  • Patent number: 9530545
    Abstract: The present invention discloses a device comprising a thermal fuse, a resistor and a protective casing. The protective casing provides housing for the thermal fuse and the resistor and increases the anti-explosion properties and insulating and voltage-withstanding properties at the same time. The thermal fuse and the resistor can be used as a basic unit and be directly installed into a switch-mode power supply. It is capable of replacing the existing simple wirewound resistor or the wirewound resistor with an external contact type thermal fuse, and realizing the functions of general impedance, over-current fuse protection, surge protection, anti-explosion and over-temperature protection in case of overloading.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: December 27, 2016
    Inventor: Zhonghou Xu
  • Patent number: 9521742
    Abstract: A mounting block is provided that has a multi-level upper surface that is used to mount one or more IC chips and the printed circuit board (PCB) thereon at heights that allow the lengths of the bond wires interconnecting the chips with the PCB and/or with the other IC chips to be reduced. The distances between the levels of the multi-level surface are preselected based at least in part on the known height of the PCB and the known height of at least one of the IC chips such that when the chip and the PCB are mounted on the mounting block, the distance between the contact pads of the PCB and the contact pads of the IC chip is very small, thereby allowing the lengths of the bond wires to be kept very short.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: December 13, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Andrew C. Engel, Michael J. Brosnan, David J. K. Meadowcroft, Klaus D. Giessler, Paul Yu
  • Patent number: 9508639
    Abstract: A package-in-substrate includes an exposed pad having a surface that is capable of contacting the outside; a semiconductor chip arranged on a surface opposite to the surface of the exposed pad; a molding resin for molding the semiconductor chip; and a lead frame extending from a side surface of the molding resin and having a leading end portion with a machined shape. The leading end portion of the lead frame is cut to have a cutting angel that is an acute angle formed by an extended straight line of the lead frame with respect to a top surface of a package.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: November 29, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Hirotoshi Usui
  • Patent number: 9509102
    Abstract: A pluggable module includes a pluggable body extending between a mating end and a cable end. The pluggable body has a first end and an opposite second end with sides extending therebetween along a length of the pluggable body. The first end, second end and sides define a cavity. An internal circuit board is held in the cavity. The internal circuit board is provided at an end of a cable communicatively coupled to the internal circuit hoard. The pluggable body is configured to be plugged into a receptacle assembly such that the internal circuit board is communicatively coupled to a communication connector of the receptacle assembly. The pluggable body includes a plurality of fins extending outward from at least one of the first end, the second end and the sides. The fins are provided proximate to the cable end of the pluggable body.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: November 29, 2016
    Assignee: Tyco Electronics Corporation
    Inventors: Alex Michael Sharf, Alan Weir Bucher, Nikhil Shankar
  • Patent number: 9496199
    Abstract: A semiconductor device packaging system includes a substrate, a heat spreader, a stiffener attached to the substrate, and at least one die electrically coupled to the substrate and thermally coupled to the heat spreader. The semiconductor device packaging system further includes at least one stud coupled to one of the stiffener and the heat spreader and at least one orifice formed through one of the stiffener and the heat spreader. In addition, the at least one orifice is aligned with the at least one stud.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: November 15, 2016
    Assignee: General Electric Company
    Inventor: Gamal Refai-Ahmed
  • Patent number: 9490772
    Abstract: A ceramic package includes a package body made of a ceramic and including a pair of surfaces, and side surfaces, disposed between four sides of one of the surfaces and four sides of the other surface; a cavity that has an opening in the surface of the package body; a metalizing layer disposed over the surface of the package body surrounding the opening of the cavity; and a metal frame joined to an upper surface of the metalizing layer with a brazing filler metal layer interposed therebetween. The surface surrounding the opening of the cavity includes pairs of opposing side portions and each side portion of at least one of the pairs has a recessed portion in a middle portion of the side portion and a pair of flat portions on respective sides of the recessed portion.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: November 8, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventor: Masami Hasegawa
  • Patent number: 9484320
    Abstract: A device comprises a semiconductor package including a first integrated circuit (IC) die including a plurality of through silicon vias (TSVs). The TSVs are formed of conductive material that extend through the first IC die from an outer surface on a first side of the die to an outer surface of a second side of the die. The package further includes first electrical connections contacting the first side of the first IC die, and second electrical connections contacting the second side of the first IC die. The first electrical connections are independent of the second electrical connections. Molding compound encapsulates the first IC die and the first and second electrical connections. The semiconductor package is mounted on a substrate so that the first and second sides of the IC die are oriented perpendicular to the substrate.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: November 1, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Christopher W. Argento
  • Patent number: 9485852
    Abstract: An arrangement for cooling subassemblies of an automation or control system is disclosed, wherein the subassemblies each comprise at least one printed circuit board (LP) having electronic components of different temperature sensitivity arranged thereon. The printed circuit board (LP) has at least one first portion for temperature-sensitive components and at least one second portion for temperature-insensitive components that generate waste heat. Interspaces are arranged between the first portion and the second portion, the interspaces each forming a thermally insulated trench. Means can be provided which keep away the heat over the temperature-sensitive components in a suitable manner and dissipate the waste heat from the printed circuit board (LP) before the heat reaches the temperature-sensitive components.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: November 1, 2016
    Assignee: ABB AG
    Inventor: Stefan Gutermuth
  • Patent number: 9465049
    Abstract: A method and apparatus for preparing electronic samples for a subsequent treatment, e.g., application of a failure analysis treatment. In one embodiment, an electronic device is mounted on a thermally controlled plate and a select temperature is applied thereto. While maintaining the select temperature applied to the thermally controlled plate, a sample preparation process is performed on the electronic device, such as, e.g., performing polishing, thinning, milling, lapping or extracting one or more semiconductor dies that form the electronic device.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: October 11, 2016
    Inventor: James B. Colvin
  • Patent number: 9439330
    Abstract: A computer system includes central processing units designed by using reduced instruction set computing (RISC) strategy, dynamic random access memory (DRAM) packages manufactured by using three-dimensional integrated circuit (3D IC) stacked using through-silicon via (TSV) stacking processes, and liquid cooling approach. The system has advantages of low power consumption, fast DRAM access rate, high performance, high cooling efficiency, small form factor, and low costs. Cooling liquid could be water, oil, and ionic liquid. The heat generated in 3D IC chips is carried out by liquid coolant and dissipated to heat exchanger where cooling water dissipates heat to large water body such as river, reservoir, or ocean. The computer disclosed in this invention is suitable to be a server for application in datacenter.
    Type: Grant
    Filed: March 29, 2015
    Date of Patent: September 6, 2016
    Inventors: Banqiu Wu, Ming Xu
  • Patent number: 9433091
    Abstract: A method is provided for customizing connections of conductors of a printed circuit board (PCB) including conductors and a cavity formed in a thickness of the PCB, and adjoining two of the conductors. The cavity includes two distinct electrical contacts, each in electrical communication with one of the two conductors. The cavity is at least partly filled with an electrically conductive material to enable electrical communication between the two conductors. The cavity is preferably a buried cavity, joined by one or more ducts, such that the electrically conductive material can be injected into the cavity via the duct. One, or each, of the two conductors is an inner conductor of the PCB. The injected conductive material may be a liquid or a gel; and is preferably a conductive adhesive. The present invention further concerns a PCB as obtained from the above method.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventor: Andreas C. Doering
  • Patent number: 9433130
    Abstract: The invention relates to a cooling device for heat-emitting components, wherein at least one component is arranged on a printed circuit board and wherein the cooling device includes a first cooling member and a second cooling member. The two cooling members are arranged on the printed circuit board adjacent to and at a predetermined distance from the at least one component on opposite sides of the component. The invention further relates to a cooling arrangement for cooling at least one heat-emitting component arranged on a printed circuit board, wherein use is made of the cooling device.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: August 30, 2016
    Assignee: HKR SEUFFER AUTOMOTIVE GMBH & CO. KG
    Inventor: Wolfgang Bass
  • Patent number: 9418941
    Abstract: A semiconductor wafer contains a plurality of semiconductor die with bumps formed over contact pads on an active surface of the semiconductor die. A b-stage conductive polymer is deposited over the contact pads on the semiconductor wafer. The semiconductor wafer is singulated to separate the die. An insulating layer is formed over a carrier with openings formed in the insulating layer. The die is mounted to the carrier with the conductive polymer disposed in the openings of the insulating layer. The conductive polymer is heated to a glass transition temperature to liquefy the conductive polymer to an electrically conductive state. An encapsulant is deposited over the die and insulating layer. The carrier is removed to expose the conductive polymer. An interconnect structure is formed over the die, encapsulant, and conductive polymer. The interconnect structure is electrically connected through the conductive polymer to the contact pads on the die.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: August 16, 2016
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Byung Tai Do, Reza A. Pagaila
  • Patent number: 9414528
    Abstract: A cooling apparatus for dissipating heat from an electronic module is disclosed. The cooling apparatus may include a thermally conductive shell having a surface in contact with, and configured to conduct heat away from, the module. The apparatus may also include an electrically insulative layer positioned between, and configured to conduct heat from, the module to the shell. The apparatus may also include an electrical cord, attached to the module that contains a thermally conductive layer in thermally conductive contact with the shell that is configured to conduct heat away from the shell. The apparatus may also include an electrically insulative layer between the thermally conductive layer and an electrical conductor within the electrical cord. The apparatus may also include an electrically insulative layer, positioned between the thermally conductive layer and an electrical cord outer surface, configured to convectively dissipate heat from the thermally conductive layer.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventors: Phillip V. Mann, Kevin M. O'Connell, Arvind K. Sinha, Karl Stathakis
  • Patent number: 9396885
    Abstract: A switch for electrically connecting at least two lines as and when required, having a housing having at least two terminals for the lines to be connected to, having a first conductor connected to a first terminal and a second conductor connected to a second terminal and having a connecting conductor which can be brought into contact with the two conductors by an actuating device in order to close the switch, wherein at least one of the conductors and the connecting conductor are in contact indirectly via a dielectric when the switch is in the closed state.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: July 19, 2016
    Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KG
    Inventors: Christian Entsfellner, Thomas Müller
  • Patent number: 9392716
    Abstract: A driver assembly includes a driver housing and a driver, the driver including at least one first portion and a second portion, the first portion having a lower heat resistance than the second portion, wherein the driver housing includes at least one first cavity for at least partially accommodating the first portion and a second cavity for accommodating the second portion, and a potting material is potted into the first cavity to envelop the first portion.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: July 12, 2016
    Assignee: OSRAM GMBH
    Inventors: MingTao Wang, Guoan He, LiBo Wu