With Encapsulated Wire Patents (Class 174/251)
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Method for producing silver nanowires, silver nanowires, dispersion, and transparent conductive film
Patent number: 12285805Abstract: In order to provide a method for producing silver nanowires in which a local maximum of optical absorption in the plasmon absorption band can be shifted toward the short wavelength side without making the wire diameter smaller, a method for producing silver nanowires includes a step of heating a mixed liquid of a dispersion of silver nanowires and metal ions of a transition metal that is different from silver, and reducing the metal ions, thereby intermittently precipitating clumps of the transition metal on a surface of the silver nanowires. The thus produced silver nanowires have metal clumps intermittently along the length direction, and a local maximum of optical absorption in the plasmon absorption band of the silver nanowires has been shifted toward the short wavelength side.Type: GrantFiled: December 3, 2021Date of Patent: April 29, 2025Assignee: Microwave Chemical Co., Ltd.Inventors: Tomohisa Yamauchi, Kei Sakamoto -
Patent number: 12283545Abstract: A package structure includes a semiconductor die and a first redistribution circuit structure. The first redistribution circuit structure is disposed on and electrically connected to the semiconductor die, and includes a first build-up layer. The first build-up layer includes a first metallization layer and a first dielectric layer laterally wrapping the first metallization layer, wherein at least a portion of the first metallization layer is protruded out of the first dielectric layer.Type: GrantFiled: August 1, 2023Date of Patent: April 22, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Chi Chu, Hung-Jui Kuo, Yu-Hsiang Hu, Wei-Chih Chen
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Patent number: 12283549Abstract: Multiple component package structures are described in which an interposer chiplet is integrated to provide fine routing between components. In an embodiment, the interposer chiplet and a plurality of conductive vias are encapsulated in an encapsulation layer. A first plurality of terminals of the first and second components may be in electrical connection with the plurality of conductive pillars and a second plurality of terminals of first and second components may be in electrical connection with the interposer chiplet.Type: GrantFiled: February 1, 2023Date of Patent: April 22, 2025Assignee: Apple Inc.Inventors: Jun Zhai, Chonghua Zhong, Kunzhong Hu
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Patent number: 12278157Abstract: The invention comprises: a thermally conductive plate; and a resin coating integrated with the thermally conductive plate so as to cover at least a portion of the surface of the thermally conductive plate, wherein the resin coating includes a ventilation cylinder through which ventilation holes passing through the thermally conductive plate and the resin coating, and wherein at least a portion of the thermally conductive plate is housed inside a cylindrical wall of the ventilation cylinder.Type: GrantFiled: November 16, 2021Date of Patent: April 15, 2025Assignee: Molex, LLCInventor: Tetsunori Tsumuraya
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Patent number: 12274001Abstract: A printed circuit board includes a substrate including a plurality of wiring layers; a first metal post disposed on the substrate and connected to at least a portion of an uppermost wiring layer among the plurality of wiring layers; a second metal post disposed on the substrate and connected to at least another portion of the uppermost wiring layer among the plurality of wiring layers; a resist layer disposed on the substrate and embedding at least a portion of each of the first and second metal posts; and a metal via penetrating through the resist layer on the second metal post and connected to the second metal post.Type: GrantFiled: January 17, 2023Date of Patent: April 8, 2025Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Sang Min Ahn
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Patent number: 12272631Abstract: A semiconductor device and method of manufacture is provided including a redistribution structure; a plurality of core substrates attached to the redistribution structure using conductive connectors, each core substrate of the plurality of core substrates comprising a plurality of conductive posts; and one or more molding layers encapsulating the plurality of core substrates, where the one or more molding layers extends along sidewalls of the plurality of core substrates, and where the one or more molding layers extends along a portion of a sidewall of each of the conductive posts.Type: GrantFiled: August 9, 2023Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jiun Yi Wu, Chen-Hua Yu
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Patent number: 12262105Abstract: A camera module according to an embodiment includes a circuit board; and an image sensor disposed on the circuit board; wherein the circuit board includes: an insulating layer; a pad disposed on the insulating layer; a terminal disposed on the insulating layer and spaced apart from the pad; a protective layer disposed on the insulating layer and including an opening exposing the pad and the terminal; a wire part disposed on the pad; and a connecting wire connecting the image sensor and the terminal, wherein a lower surface of the image sensor is in direct contact with the wire part, and wherein the wire part and the image sensor are electrically separated from each other.Type: GrantFiled: December 28, 2021Date of Patent: March 25, 2025Assignee: LG INNOTEK CO., LTD.Inventor: Won Seob Shin
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Patent number: 12238858Abstract: Provided is a wiring circuit board that includes a first insulating layer, a conductive pattern disposed on the first insulating layer, and a second protective layer disposed between the first insulating layer and protecting the conductive pattern. The second protective layer consists of a metal oxide.Type: GrantFiled: November 9, 2022Date of Patent: February 25, 2025Assignee: NITTO DENKO CORPORATIONInventors: Shusaku Shibata, Teppei Niino, Yosuke Nakanishi
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Patent number: 12232268Abstract: A wiring substrate includes an insulating layer, and a build-up part formed on the insulating layer and including an interlayer insulating layer and a conductor layer. The build-up part has a cavity penetrating through the build-up part such that the cavity is formed to accommodate an electronic component and has an inner wall and a bottom surface having a groove and that the groove is extending entirely in an outer edge part of the bottom surface and formed continuously from the inner wall surface of the cavity.Type: GrantFiled: February 25, 2022Date of Patent: February 18, 2025Assignee: IBIDEN CO., LTD.Inventors: Hirotaka Taniguchi, Akihide Ishihara
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Patent number: 12224086Abstract: A wiring member includes: a wire-like transmission member (for example, an electric wire); a first sheet member including one main surface to which the wire-like transmission member is fixed; and a second sheet member fixed to the first sheet member on a side of another main surface of the first sheet member. The first sheet member is suitable for fixing of the wire-like transmission member in comparison to the second sheet member. One member of the first sheet member and the second sheet member includes a space into which another member being melted can be filled. The first sheet member and the second sheet member overlap each other with the another member out of the first sheet member and the second sheet member being melted, filled and then solidified in the space of the one member.Type: GrantFiled: July 19, 2019Date of Patent: February 11, 2025Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Miyu Aramaki, Housei Mizuno, Daichi Fukushima
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Patent number: 12199103Abstract: A display panel is provided, including a display region and a bending region at a side of the display region, a base substrate the base substrate includes a first flexible substrate and a second flexible substrate stacked on each other; the display region includes a driver circuit layer, the driver circuit layer is at a side of the second flexible substrate away from the first flexible substrate and includes at least one first wiring, the bending region includes at least one second wiring, and the at least one second wiring is electrically connected with the at least one first wiring; the at least one second wiring is between the first flexible substrate and the second flexible substrate. The display panel has high reliability, narrow bezel, and large screen.Type: GrantFiled: April 29, 2021Date of Patent: January 14, 2025Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Qingsong Wang, Liqiang Chen, Jiafan Shi, Yang Yang, Peng Hou
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Patent number: 12185463Abstract: A wiring circuit board includes an insulating layer having a via penetrating in a thickness direction, a first conductive layer disposed on a one-side surface in the thickness direction of the insulating layer, a second conductive layer disposed on the other-side surface in the thickness direction of the insulating layer, and a conductive portion disposed on an inner peripheral surface of the via and electrically connecting the first and second conductive layers. Length L of 1 ?m-10 ?m inclusive, is measured by: drawing a segment joining first and second connection points from respectively, the one-side surface to the other-side surface in the thickness direction of the insulating layer and the inner peripheral surface in the cross-sectional view; identifying an outermost position farthest outward from the segment on the inner peripheral surface in the cross-sectional view; and measuring the length as the shortest distance from the segment to the outermost position.Type: GrantFiled: November 16, 2022Date of Patent: December 31, 2024Assignee: NITTO DENKO CORPORATIONInventors: Kanayo Sawashi, Akihito Matsutomi
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Patent number: 12183700Abstract: Semiconductor devices and methods of manufacture are described herein. The methods include forming a local organic interconnect (LOI) by forming a stack of conductive traces embedded in a passivation material, forming first and second local contacts over the passivation material, the second local contact being electrically coupled to the first local contact by a first conductive trace of the stack. The methods further include forming a backside redistribution layer (RDL) and a front side RDL on opposite sides of the LOI with TMVs electrically coupling the backside and front side RDLs to one another. First and second external contacts are formed over the backside RDL for mounting of semiconductor devices, the first and second external contacts being electrically connected to one another by the LOI. An interconnect structure is attached to the front side RDL for further routing. External connectors electrically coupled to the external contacts at the backside RDL.Type: GrantFiled: July 27, 2022Date of Patent: December 31, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jiun Yi Wu, Chen-Hua Yu
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Patent number: 12177963Abstract: A printed circuit board of an information handling system includes a pair of signal vias including a pair of keepout objects. Each one of the keepout objects surrounds one of the signal vias. The printed circuit board includes a pair of signal traces that includes a positive signal trace and a negative signal trace, wherein the pair of signal traces are between the keepout objects, and wherein a width of each of the signal traces is increased.Type: GrantFiled: April 26, 2022Date of Patent: December 24, 2024Assignee: Dell Products L.P.Inventors: Sandor Farkas, Bhyrav Mutnury
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Patent number: 12167540Abstract: A printed circuit board according to an embodiment includes a first insulating layer; a first circuit pattern disposed on a lower surface or inside the first insulating layer; a second circuit pattern disposed on an upper surface of the first insulating layer; a second insulating layer disposed on the upper surface of the first insulating layer and surrounding the second circuit pattern; and a protective layer disposed on an upper surface of the second insulating layer, wherein the second insulating layer has at least one recess formed on its upper surface, and wherein the protective layer is disposed in the recess formed on the upper surface of the second insulating layer.Type: GrantFiled: September 9, 2020Date of Patent: December 10, 2024Assignee: LG INNOTEK CO., LTD.Inventors: Eui Yeol Yang, Se Woong Na, Do Hyuk Yoo
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Patent number: 12160950Abstract: An electronic device is provided, including a substrate, a conductive element, and an insulating layer. The conductive element is disposed on the substrate. The conductive element includes a first layer, a second layer, and a third layer. The second layer is disposed on the first layer. The third layer is disposed on the second layer. The insulating layer is disposed on the conductive element. A thickness of the second layer is greater than a thickness of the first layer, and the thickness of the second layer is greater than a thickness of the third layer. There is a gap between the insulating layer and the conductive element.Type: GrantFiled: April 27, 2023Date of Patent: December 3, 2024Assignee: Innolux CorporationInventors: Roger Huang, Joe Huang, Lavender Cheng, Sean Chang
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Patent number: 12124659Abstract: A display device includes a display panel including a first non-bending area, a bending area, and a second non-bending area, which are sequentially arranged in a first direction, and an input sensor including sensing electrodes and first and second trace lines. The first trace line includes a first line portion, a second line portion, and a first bridge connecting the first and second line portions and disposed on a layer different from the first and second line portions. The second trace line includes a third line portion, a fourth line portion disposed on a layer different from the third line portion, and a second bridge connecting the third and fourth line portions and disposed on a layer different from the third and fourth line portions. The first bridge and the second bridge do not overlap each other in a second direction perpendicular to the first direction.Type: GrantFiled: April 24, 2023Date of Patent: October 22, 2024Assignee: Samsung Display Co., Ltd.Inventors: Yongmyeong Kim, Byeonggi Kim, Hyuk-Jin Kim, Sungsang Park, Hyunchul Son
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Patent number: 12048099Abstract: A base substrate has a thickness between two faces. The base substrate includes at least one hole extending in a thickness of the base substrate perpendicular to one of the two face. At least one dipole of a surface-mount device type is housed in the at least one hole of the base substrate.Type: GrantFiled: March 5, 2021Date of Patent: July 23, 2024Assignee: STMicroelectronics (Grenoble 2) SASInventor: Pierino Calascibetta
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Patent number: 12021031Abstract: A semiconductor package structure includes a substrate, a bridge structure, a redistribution layer, a first semiconductor component, and a second semiconductor component. The substrate has a wiring structure. The bridge structure is over the substrate. The redistribution layer is over the bridge structure. The first semiconductor component and the second semiconductor component are over the redistribution layer, wherein the first semiconductor component is electrically coupled to the second semiconductor component through the redistribution layer and the bridge structure.Type: GrantFiled: November 16, 2020Date of Patent: June 25, 2024Assignee: MEDIATEK INC.Inventors: Yi-Lin Tsai, Yi-Jou Lin, I-Hsuan Peng, Wen-Sung Hsu
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Patent number: 11977710Abstract: A position detection sensor includes a base made of a flexible material. The base includes a terminal section having a plurality of terminal conductors disposed on a first surface of the base. The base includes a sensor pattern section including a plurality of electrode conductors arranged in predetermined patterns in an area that does not overlap with the terminal section on the first surface of the base. End portions of the plurality of electrode conductors are positioned so as to be connectable to corresponding ones of the terminal conductors in the terminal section. The first surface of the base includes a region of the terminal section, a region of the sensor pattern section, and a bendable region between these two regions. Each of the plurality of electrode conductors, which is electrically connected to each of the plurality of terminal conductors, is disposed so as to be extensible in the bendable region.Type: GrantFiled: August 18, 2022Date of Patent: May 7, 2024Assignee: Wacom Co., Ltd.Inventor: Yoshiharu Matsumoto
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Patent number: 11804327Abstract: A coil component includes: a body including a magnetic material and a coil of which both ends are externally exposed; intermetallic compounds disposed on the exposed both ends of the coil; and external electrodes disposed on the body to cover the intermetallic compounds. The external electrodes include: conductive resin layers disposed on outer surfaces of the body to contact the exposed both ends of the coil and including base resins, a plurality of metal particles disposed in the base resins, and conductive connecting parts surrounding the plurality of metal particles and contacting the intermetallic compounds. The coil component further includes electrode layers disposed on the conductive resin layers and contacting the conductive connecting parts.Type: GrantFiled: December 16, 2021Date of Patent: October 31, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoon Hee Lee, Bon Seok Koo, Yeon Tae Kim, Chang Hak Choi, Jung Min Kim
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Patent number: 11775099Abstract: A touch sensing module includes a sensing coil, a metal portion disposed to be spaced apart from the sensing coil, and a first bracket having one surface, on which the metal portion is disposed, and an other surface, opposing the one surface, on which a pad having a capacitance, configured to vary as a touch is applied, is disposed.Type: GrantFiled: July 29, 2021Date of Patent: October 3, 2023Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hee Sun Oh, Gye Won Lee, Hong Seok Lee, Chang Ju Lee, Jong Yun Kim
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Patent number: 11756872Abstract: A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.Type: GrantFiled: March 11, 2021Date of Patent: September 12, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Yueh Wu, Chien-Ling Hwang, Jen-Chun Liao, Ching-Hua Hsieh, Pei-Hsuan Lee, Chia-Hung Liu
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Patent number: 11756945Abstract: A method includes forming a redistribution structure on a carrier substrate, coupling a first side of a first interconnect structure to a first side of the redistribution structure using first conductive connectors, where the first interconnect structure includes a core substrate, where the first interconnect structure includes second conductive connectors on a second side of the first interconnect structure opposite the first side of the first interconnect structure, coupling a first semiconductor device to the second side of the first interconnect structure using the second conductive connectors, removing the carrier substrate, and coupling a second semiconductor device to a second side of the redistribution structure using third conductive connectors, where the second side of the redistribution structure is opposite the first side of the redistribution structure.Type: GrantFiled: February 26, 2021Date of Patent: September 12, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jiun Yi Wu, Chen-Hua Yu
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Patent number: 11758643Abstract: A printed circuit board includes a front layer including frame ground regions on which connectors to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region which is separated from the frame ground regions at the front layer, on which electronic devices configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region separated from the frame ground regions and the signal ground region at the front layer, situated outside the frame ground regions, and connected with a ground.Type: GrantFiled: April 26, 2022Date of Patent: September 12, 2023Assignee: Canon Kabushiki KaishaInventors: Yo Kobayashi, Koji Hirai
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Patent number: 11700688Abstract: The present disclosure provides a display substrate, a method for manufacturing the display substrate, and a display device. The display substrate includes a first conductive line extending in a first direction on a base substrate, a second conductive line extending in a second direction crossing the first direction on the base substrate, and an insulation layer arranged between the first conductive line and the second conductive line. The display substrate further includes a buffer layer arranged between the first conductive line and the base substrate, a groove extending in the first direction is formed in the buffer layer, the first conductive line is arranged in the groove, and a surface of the first conductive line away from the base substrate is flush with a surface of the buffer layer away from the base substrate.Type: GrantFiled: February 24, 2021Date of Patent: July 11, 2023Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yongchao Huang, Qinghe Wang, Haitao Wang, Jun Liu, Jun Cheng, Ce Zhao, Liangchen Yan
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Patent number: 11676904Abstract: A semiconductor package includes a first sub-semiconductor device, an interposer, and a second sub-semiconductor device stacked on each other, and a heat sink covering the second sub-semiconductor device. The first sub-semiconductor device includes a first substrate and a first semiconductor chip. The interposer includes a dielectric layer, a thermal conductive layer in contact with a bottom surface of the dielectric layer, a first thermal conductive pad in contact with a top surface of the dielectric layer, and thermal conductive vias penetrating the dielectric layer to connect the thermal conductive layer to the first thermal conductive pad. A bottom surface of the thermal conductive layer is adjacent to and connected to a top surface of the first semiconductor chip. The second sub-semiconductor device is disposed on the dielectric layer without overlapping the first thermal conductive pad. The heat sink further covers the first thermal conductive pad to be connected thereto.Type: GrantFiled: May 24, 2021Date of Patent: June 13, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jiwon Shin, Donguk Kwon, Kwang Bok Woo, Minseung Ji
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Patent number: 11665820Abstract: Disclosure provides an adapter board and a method for making the adapter board, which includes providing a mold in which a plurality of first fixing plates and second fixing plates are provided, providing a plurality of wires sequentially passed through the plurality of first fixing plates and the second fixing plate, injecting a non-conductive material into the cavity to form a body, and cutting the body along both sides of the first fixing plates and the second fixing plates to obtain a plurality of board bodies. The first fixing plates are provided with a plurality of first fixing holes, and the second fixing plates are provided with a plurality of second fixing holes. The board body includes a first surface and a second surface. A plurality of first connection pads are formed on the first surface, and a plurality of second connection pads are formed on the second surface.Type: GrantFiled: November 29, 2021Date of Patent: May 30, 2023Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.Inventors: Man-Zhi Peng, Rui-Wu Liu, Ming-Jaan Ho
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Patent number: 11664240Abstract: The method for producing a laminate having a patterned metal foil includes masking the whole surface of a first metal foil in a laminate having the first metal foil, a first insulating resin layer having a thickness of 1 to 200 ?m and a second metal foil laminated in this order, and patterning the second metal foil.Type: GrantFiled: November 1, 2018Date of Patent: May 30, 2023Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.Inventors: Syunsuke Hirano, Yoshihiro Kato, Takaaki Ogashiwa, Kazuaki Kawashita, Makoto Murakami
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Patent number: 11646157Abstract: A component built-in substrate includes a multilayer body and a substrate including a multilayer ceramic electronic component embedded therein. The multilayer ceramic electronic component includes a first connection portion that protrudes from the first external electrode, and a second connection portion that protrudes from the second external electrode. The substrate includes a core material. The multilayer ceramic electronic component including the first connection portion and the second connection portion includes a surface covered by the core material and embedded in the substrate. The first connection portion protrudes toward a surface of the substrate, and is not exposed at the surface of the substrate. The second connection portion protrudes toward the surface of the substrate, and is not exposed at the surface of the substrate.Type: GrantFiled: July 23, 2021Date of Patent: May 9, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yuichiro Tanaka, Hiroki Awata
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Patent number: 11627658Abstract: A printed wiring board includes a first insulating layer, a conductor layer on the first insulating layer, and a second insulating layer formed on the first insulating layer and covering the conductor layer. The conductor layer includes first, second and third circuits, the first circuit has first width of 15 ?m or less, the first and second circuits have second space between the first and second circuits such that the second space has second width of 14 ?m or less, the first and third circuits have third space between the first and third circuits such that the third space has third width of 20 ?m or more, and the first circuit has first lower and upper surfaces, and second and third side walls such that second angle between the second wall and the first lower surface is larger than third angle between the third wall and the first lower surface.Type: GrantFiled: January 19, 2022Date of Patent: April 11, 2023Assignee: IBIDEN CO., LTD.Inventor: Kyohei Yoshikawa
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Patent number: 11616026Abstract: A device includes an interconnect device attached to a redistribution structure, wherein the interconnect device includes conductive routing connected to conductive connectors disposed on a first side of the interconnect device, a molding material at least laterally surrounding the interconnect device, a metallization pattern over the molding material and the first side of the interconnect device, wherein the metallization pattern is electrically connected to the conductive connectors, first external connectors connected to the metallization pattern, and semiconductor devices connected to the first external connectors.Type: GrantFiled: January 17, 2020Date of Patent: March 28, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jiun Yi Wu, Chen-Hua Yu
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Patent number: 11581500Abstract: A mobile terminal according to an embodiment includes a display panel having flexibility, and a support plate configured to support the display panel and to include a curved edge, at least a part of which is surrounded by the display panel. The display panel includes a base substrate, a light-emitting layer provided on the base substrate and configured to include a light-emitting element, a thin-film encapsulation layer configured to seal the light-emitting element, and a thin-film transistor (TFT) film configured to supply a signal to the light-emitting element, a polarizing film provided on the light-emitting layer, and a protective film provided on the polarizing film. The TFT film is extended from the base substrate at the curved edge to cover an edge of the base substrate.Type: GrantFiled: January 12, 2021Date of Patent: February 14, 2023Assignee: LG ELECTRONICS INC.Inventors: Insu Song, Kyungsoo Son, Jihoon Lee, Kiseong Mun, Jaewook Lee
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Patent number: 11541640Abstract: A circuit-including film comprising: a resin film (1); and a conductive fine wire circuit (A) and a conductive circuit (B) independent of the conductive fine wire circuit (A), which are arranged on one surface of the resin film (1), wherein the resin film (1) contains at least one resin selected from the group consisting of a polyvinyl acetal resin, an ionomer resin and an ethylene-(vinyl acetate) copolymer resin.Type: GrantFiled: December 27, 2018Date of Patent: January 3, 2023Assignee: Kuraray Europe GmbHInventors: Yuhi Shimazumi, Koichiro Isoue, Jun Koishikawa
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Patent number: 11538798Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip mounted on the first redistribution substrate, a first molding layer on the first redistribution substrate and covering a top surface and lateral surfaces of the first semiconductor chip, a second redistribution substrate on the first molding layer, and an adhesive film between the second redistribution substrate and the first molding layer. The adhesive film is spaced apart from the first semiconductor chip and covers a top surface of the first molding layer. A lateral surface of the adhesive film is coplanar with a lateral surface of the second redistribution substrate.Type: GrantFiled: February 25, 2021Date of Patent: December 27, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyeonjeong Hwang, Kyoung Lim Suk, Seokhyun Lee, Jaegwon Jang
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Patent number: 11530308Abstract: A method of manufacturing a modified liquid crystal polymer includes: providing a liquid crystal polymer having a first melting point; heating the liquid crystal polymer to a first temperature and maintaining at the first temperature for a first time period, in which the first temperature is lower than or equal to the first melting point; and cooling the liquid crystal polymer to a second temperature to form a first modified liquid crystal polymer, the second temperature being lower than the first temperature, the first modified liquid crystal polymer having a second melting point, in which the second melting point is higher than the first melting point.Type: GrantFiled: February 19, 2020Date of Patent: December 20, 2022Assignee: AZOTEK CO., LTD.Inventor: Hung-Jung Lee
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Patent number: 11516910Abstract: A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.Type: GrantFiled: July 9, 2021Date of Patent: November 29, 2022Assignee: Unimicron Technology Corp.Inventors: Chia-Yu Peng, John Hon-Shing Lau, Kai-Ming Yang, Pu-Ju Lin, Cheng-Ta Ko, Tzyy-Jang Tseng
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Patent number: 11504945Abstract: An item may be formed from structures that include holes. Stitching may be used to form a seam that joins the structures. The stitching may be formed from a chain stitch that passes through the holes. The holes may be formed from loops of knit fabric or other holes. Leather layers, polymer layers, fabric layers, and other structures with holes may be joined using the stitching. During fabrication, a layer of material with holes may be placed on an adjustable-shape fixture having a bed of needles. The shape of the bed of nails in the adjustable-shape fixture may then be changed. After the fixture has been used to transform the shape of one or more of the structures, the structures may be placed on needles in an assembly fixture and the stitching between the structures may be formed. The item may be an electronic device cover or other item.Type: GrantFiled: March 19, 2019Date of Patent: November 22, 2022Assignee: Apple Inc.Inventors: Sofiane Berlat, Aedhan M. Loomis, Peter F. Coxeter, Sarah J. Montplaisir, Timon A. Wright, Yohji Hamada, Patrick Perry, Chad J. Miller, Andrew L. Rosenberg, Daniel A. Podhajny, Daniel D. Sunshine, Jessica J. Lu, Lia M. Uesato, Donald L. Olmstead
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Patent number: 11468800Abstract: A back-film structure may include a first back-film portion which serves as a first circle upon rolling and a second back-film portion arranged side by side with the first back-film portion in the rolling direction, wherein a thickness of the first back-film portion increases in the rolling direction. This solution can ensure that the inner surface of the tail end of the first back-film portion is located as close as possible to the inner surface of the head end of the first back-film portion after the rolling.Type: GrantFiled: April 29, 2020Date of Patent: October 11, 2022Assignee: Beijing BOE Technology Development Co., Ltd.Inventors: Tao Wang, Song Zhang
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Patent number: 11450598Abstract: A package that includes an integrated device, a substrate coupled to the integrated device, and an encapsulation layer coupled to the substrate. The encapsulation layer encapsulates the integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects located in the at least one dielectric layer, wherein at least one of the interconnects has a rectangular side cross-section having at least one corner with a corner radius less than a corner radius threshold.Type: GrantFiled: July 28, 2020Date of Patent: September 20, 2022Assignee: Qualcomm IncorporatedInventor: Sebastian Brunner
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Patent number: 11419222Abstract: A method of manufacturing a circuit board includes: providing a substrate including a bottom layer and a resin layer over the bottom layer, the resin layer including a first surface in contact with the bottom layer and a second surface opposite to the first surface; forming a plurality of vias through the resin layer; depositing a first metal layer in the vias, the first metal layer filling a portion of each of the vias; depositing a second metal layer over the first metal layer and in the vias; forming a patterned metal layer over the second metal layer and extending from each of the vias to a position over the second surface; separating the bottom layer and the resin layer; and removing a portion of the resin layer from the first surface, so that the first metal layer protrudes from the resin layer.Type: GrantFiled: February 6, 2020Date of Patent: August 16, 2022Assignee: Unimicron Technology Corp.Inventor: Hsin-Chi Hu
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Patent number: 11373779Abstract: Proposed is a conductive particle used for a testing socket electrically connecting a lead of a device to be tested and a pad of a test board by being arranged between the device to be tested and the test board, wherein the conductive particle has a predetermined depth d and has a length l that is greater than a width w, the conductive particle having a body part in a pillar shape, a first convex part having an upper surface, formed in a top of the body part, and a second convex part having a lower surface, formed in a bottom of the body part.Type: GrantFiled: June 9, 2021Date of Patent: June 28, 2022Assignee: SNOW CO., LTD.Inventor: Gyu Sun Kim
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Patent number: 11342259Abstract: An electronic module includes an electronic part including a bottom surface and lands, the bottom surface including a first region and a third region surrounding the first region, the first lands being disposed in the third region, a printed wiring board including a main surface and second lands, the main surface including a second region and a fourth region surrounding the second region, the main surface facing the bottom surface of the electronic part, the second lands being disposed in the fourth region, solder bonding portions respectively bonding the first lands to the second lands, and a resin portion containing a cured product of a thermosetting resin and being in contact with the solder boding portions. A recess portion is provided in the second region. The resin portion is not provided in the recess portion.Type: GrantFiled: November 2, 2020Date of Patent: May 24, 2022Assignee: CANON KABUSHIKI KAISHAInventors: Shingo Ishiguri, Mitsutoshi Hasegawa, Kunihiko Minegishi, Takashi Sakaki
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Patent number: 11335217Abstract: A display device and a method for manufacturing a display device is provided. The display device includes a display panel. The display panel includes a bending portion, a first non-bending portion and a second non-bending portion, positioned at two opposite sides of the bending portion. The second non-bending portion is positioned by bending the bending portion in an asymmetric and non-180 degree way toward a back side of the first non-bending portion. The present disclosure solves the issues of the conventional art, which cannot narrow down the width of the side frame.Type: GrantFiled: April 21, 2020Date of Patent: May 17, 2022Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Cuilin Zhu
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Patent number: 11319398Abstract: Method for the production of polyoxazolidinone compounds, comprising the reaction of at least one biscarbamate compound (A) with at least one bisepoxide compound (B) in the presence of at least one base (D), at least one Lewis acid catalyst (E), and optionally at least one compound (C), wherein the compound (C) comprising a mono-carbamate group, a mono-isocyanate group and/or a mono-epoxide group, and wherein the base (D) having a pKb-value of ?9. The invention is also related to the resulting polyoxazolidinone compounds.Type: GrantFiled: January 30, 2018Date of Patent: May 3, 2022Assignee: Covestro Deutschland AGInventors: Thomas Ernst Müller, Christoph Gürtler, Carsten Koopmans, Volker Marker, Claudine Rangheard, Walter Leitner
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Patent number: 11304309Abstract: A printed circuit board according to an embodiment of the present disclosure includes a base film having an insulating property, and a conductive pattern that is stacked on at least one surface of the base film and that includes a plurality of wiring parts arranged in parallel. The plurality of wiring parts have an average width of 5 ?m or more and 15 ?m or less. The plurality of wiring parts have an electroless plating layer and an electroplating layer stacked on the electroless plating layer. A void density at an interface between the electroless plating layer and the electroplating layer in a section of the plurality of wiring parts in a thickness direction is 0.01 ?m2/?m or less.Type: GrantFiled: March 7, 2019Date of Patent: April 12, 2022Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Shoichiro Sakai, Eiko Imazaki, Koji Nitta
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Patent number: 11297722Abstract: A multi-layered circuit board proofed against conductor loss or diminution when heated includes first and second circuit base boards. Each first circuit base board includes a first dielectric layer and a first wiring layer formed thereon and a first stepped paste block as a conductor formed in the first dielectric layer. The first stepped paste block is electrically connected to the first dielectric layer. Each second circuit base board includes a second dielectric layer and a second wiring layer, a second stepped paste block as a conductor is formed in the second dielectric layer. When pressed together for an electrical interconnection, the paste blocks are sealed and thus captive between the first and second circuit base boards.Type: GrantFiled: October 30, 2020Date of Patent: April 5, 2022Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTDInventors: Zhi Guo, Chao-Feng Huang
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Patent number: 11276630Abstract: Generally discussed herein are systems, methods, and apparatuses that include conductive pillars that are about co-planar. According to an example, a technique can include growing conductive pillars on respective exposed landing pads of a substrate, situating molding material around and on the grown conductive pillars, removing, simultaneously, a portion of the grown conductive pillars and the molding material to make the grown conductive pillars and the molding material about planar, and electrically coupling a die to the conductive pillars.Type: GrantFiled: April 8, 2020Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Robert L. Sankman, Sanka Ganesan
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Patent number: 11227823Abstract: A wiring structure is provided. The wiring structure includes an upper redistribution structure, a lower redistribution structure, a conductive structure, an upper bonding layer and a lower bonding layer. The conductive structure is disposed between and electrically connected to the upper redistribution structure and the lower redistribution structure. The upper bonding layer is disposed between the upper redistribution structure and the conductive structure to bond the upper redistribution structure and the conductive structure together. The lower bonding layer is disposed between the lower redistribution structure and the conductive structure to bond the lower redistribution structure and the conductive structure together.Type: GrantFiled: April 20, 2020Date of Patent: January 18, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Tang-Yuan Chen, Chih-Pin Hung
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Patent number: 11227714Abstract: A coil component includes: a body including a magnetic material and a coil of which both ends are externally exposed; intermetallic compounds disposed on the exposed both ends of the coil; and external electrodes disposed on the body to cover the intermetallic compounds. The external electrodes include: conductive resin layers disposed on outer surfaces of the body to contact the exposed both ends of the coil and including base resins, a plurality of metal particles disposed in the base resins, and conductive connecting parts surrounding the plurality of metal particles and contacting the intermetallic compounds. The coil component further includes electrode layers disposed on the conductive resin layers and contacting the conductive connecting parts.Type: GrantFiled: January 15, 2020Date of Patent: January 18, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoon Hee Lee, Bon Seok Koo, Yeon Tae Kim, Chang Hak Choi, Jung Min Kim