Specific Layers Patents (Class 174/386)
  • Patent number: 11533833
    Abstract: An electromagnetic wave shielding sheet according to the disclosure is configured by a protection layer, a metal layer, and a conductive adhesive layer. The metal layer has a plurality of openings, and an aperture ratio of the opening is 0.1%-20%. In addition, a tensile breaking strength of the electromagnetic wave shielding sheet is 10 N/20 mm-80 N/20 mm.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: December 20, 2022
    Assignees: TOYO INK SC HOLDINGS CO., LTD., TOYOCHEM CO., LTD.
    Inventors: Daisuke Kishi, Shota Mori, Takahiro Matsuzawa, Tsutomu Hayasaka
  • Patent number: 11445644
    Abstract: The electromagnetic shielding of an enclosable building structure is provided by applying a shielding wallcovering to at least a portion of building structure. The shielding wall covering is wallpaper comprising a metal-coated substrate core and resin. To connect the shielded wallpaper to the building structure a layer of the resin or an adhesive layer may be used.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: September 13, 2022
    Assignee: Conductive Composites Company IP, LLC
    Inventors: George Clayton Hansen, Nathan D. Hansen, Jared Thompson Weese
  • Patent number: 11335496
    Abstract: A coil component includes a body having a bottom surface and a top surface opposing each other in one direction, and a plurality of walls each connecting the bottom surface to the top surface of the body; recesses respectively formed in both front and rear surfaces of the body opposing each other among the plurality of walls of the body and extending up to the bottom surface of the body; a coil portion buried in the body and including first and second lead-out portions exposed to internal walls and lower ledge surfaces of the recesses; first and second external electrodes respectively including connection portions disposed in the recesses and extended portions disposed on the bottom surface of the body, and connected to the coil portion; a shielding layer including a cap portion disposed on the top surface of the body and side wall portions respectively disposed on the plurality of walls of the body; and an insulating layer disposed between the body and the shielding layer and extending onto lower ledge surfa
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 17, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Byung Soo Kang, Tai Yon Cho, Yoon Mi Cha, Ju Hwan Yang, Jeong Suong Yang, No Il Park, Byeong Cheol Moon, Tae Jun Choi, Seung Mo Lim
  • Patent number: 11191198
    Abstract: A shield package is disclosed including: a package in which an electronic component is mounted on a substrate, the electronic component being sealed with sealing material; and a shield layer including a first layer and a second layer that are sequentially laminated on the package, in which the first layer made from a conductive resin composition having 100 parts by mass of a binder component, 400 parts by mass to 1800 parts by mass of metal particles, and 0.3 part by mass to 40 parts by mass of a curing agent, the metal particles include at least spherical metal particles and flaky metal particles, and the second layer made from a conductive resin composition containing a binder component, metal particles haying an average particle diameter of 10 nm to 500 nm, metal particles having an average particle diameter of 1 ?m to 50 ?m, and a radical polymerization initiator.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: November 30, 2021
    Assignee: TATSUTA ELECTRIC WIRE & CABLE CO., LTD.
    Inventors: Hiroaki Umeda, Kazuhiro Matsuda, Hajime Nakazono, Hidetoshi Noguchi
  • Patent number: 11177695
    Abstract: A wireless electrical energy transmission system is provided. The system comprises a wireless transmission base configured to wirelessly transmit electrical energy or data via near field magnetic coupling to a receiving antenna configured within an electronic device. The wireless electrical energy transmission system is configured with at least one transmitting antenna and a transmitting electrical circuit positioned within the transmission base. The transmission base is configured so that at least one electronic device can be wirelessly electrically charged or powered by positioning the at least one device external and adjacent to the transmission base.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: November 16, 2021
    Assignee: NuCurrent, Inc.
    Inventors: Alberto Peralta, Md. Nazmul Alam, Vinit Singh, Christine A. Frysz, Ajit Rajagopalan
  • Patent number: 11155195
    Abstract: A vehicle lower portion structure is provided with electromagnetic wave emitting components that are disposed at a rear surface side of a floor panel provided in a lower portion of a vehicle, and a carpet component that has a backing layer in which is dispersed a magnetic material, and a carpet pile that is provided on a front surface side of the backing layer, and that is disposed at a front surface side of the floor panel.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 26, 2021
    Assignees: Toyota Jidosha Kabushiki Kaisha, Hayashi Telempu Corporation
    Inventors: Ken Tanaka, Yuichi Kondo
  • Patent number: 11121095
    Abstract: A semiconductor device is provided that has high electromagnetic wave shielding properties while exhibiting good heat dissipation. The semiconductor device includes a semiconductor package bonded onto a circuit board, an electromagnetic wave absorbing layer covering surfaces of the semiconductor package other than a surface bonded to the circuit board, and an electromagnetic wave reflecting layer covering the electromagnetic wave absorbing layer on a side remote from the semiconductor package, in which the electromagnetic wave absorbing layer is made of resin containing magnetic particles or carbon, and the electromagnetic wave reflecting layer is made of resin containing conductive particles.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: September 14, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tomohiro Tanishita, Tsuneo Hamaguchi, Kiyoshi Ishida
  • Patent number: 11038267
    Abstract: A packaged radio frequency module includes a package substrate. A semiconductor die is attached to the package substrate and includes one or more radio frequency circuits fabricated therein. A molding compound encapsulates the semiconductor die. An electromagnetic shielding structure at least partially covers the molding compound, the electromagnetic shielding structure having an outer layer including cobalt. A phone board assembly can include the packaged radio frequency module attached to a printed circuit board. The packaged radio frequency module can be incorporated into a mobile device.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: June 15, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Anthony James LoBianco, Hoang Mong Nguyen
  • Patent number: 11011474
    Abstract: According to one embodiment, an electromagnetic wave attenuator includes a plurality of magnetic layers, and a plurality of nonmagnetic layers. The plurality of nonmagnetic layers is conductive. A direction from one of the plurality of magnetic layers toward an other one of the plurality of magnetic layers is aligned with a first direction. One of the plurality of nonmagnetic layers is between the one of the plurality of magnetic layers and the other one of the plurality of magnetic layers. A first thickness along the first direction of the one of the plurality of magnetic layers is not less than ½ times a second thickness along the first direction of the one of the plurality of nonmagnetic layers.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: May 18, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, SHIBAURA MECHATRONICS CORPORATION
    Inventors: Akira Kikitsu, Yoshinari Kurosaki, Kenichiro Yamada, Shigeki Matsunaka
  • Patent number: 10950555
    Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Kaladhar Radhakrishnan, Jaejin Lee, Hao-Han Hsu, Chung-Hao J. Chen, Dong-Ho Han
  • Patent number: 10842022
    Abstract: A multilayer flexible electronics platform is an apparatus that allows modular thin-film electronics to be integrated into everyday flexible, flat objects such as pieces of clothing, material coatings, or wearable devices. The apparatus includes a flexible water-impermeable envelop, a flexible power-source layer, a flexible printed circuit board (PCB) layer, and a flexible accessory-interfacing layer. The flexible accessory-interfacing layer allows those modular thin-film electronics to be electronically and electrically attached to the apparatus. The flexible PCB layer allows the apparatus to control and manage those modular thin-film electronics. The flexible power-source layer is used to provide electrical power to those modular thin-film electronics. The flexible water-impermeable envelop protectively encloses those modular thin-film electronics and the aforementioned functional layers of the apparatus.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: November 17, 2020
    Assignee: OCELLA INC
    Inventor: Rajan Kumar
  • Patent number: 10741501
    Abstract: Illustrative systems and methods disclosed herein pertain to a circuit assembly having components mounted upon a substratum element. The components are encased in a conductive sheath that may be made of metal. The conductive sheath, which is operative as a heat sink and/or an EMI shield, is structurally constructed to counteract deformation of the substratum element when the one or more components heat up during operation, or due to ambient temperature changes. In one exemplary embodiment, the conductive sheath has different thickness at different locations. An edge portion located at a transition between a first thickness and a second thickness of the conductive sheath undergoes deformation that prevents warping of the circuit assembly due to heat. In another exemplary embodiment, the conductive sheath has a gap provided between adjacent segments. The gap allows room for thermal expansion and counteracts deformation of the circuit assembly caused by heating.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 11, 2020
    Assignee: Keysight Technologies, Inc.
    Inventor: Timothy Earl Shirley
  • Patent number: 10660194
    Abstract: A heat conducting member includes: a magnetic substance-containing layer containing a magnetic substance, the magnetic substance being oriented along a predetermined orientation direction; and a metal-containing layer containing a metal body including a surface crossing the orientation direction of the magnetic substance.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: May 19, 2020
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Masaaki Ito
  • Patent number: 10519672
    Abstract: The electromagnetic shielding of an enclosable building structure is provided by applying a shielding wallcovering to at least a portion of building structure. The shielding wall covering is wallpaper comprising a metal-coated substrate core and resin. To connect the shielded wallpaper to the building structure a layer of the resin or an adhesive layer may be used.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 31, 2019
    Assignee: Conductive Composites Company IP, LLC
    Inventors: George Clayton Hansen, Nathan D. Hansen, Jared Thompson Weese
  • Patent number: 10440799
    Abstract: The present disclosure discloses an optical module, and relates to the field of optical fiber communication technologies. A first sealing piece is configured to block the gap between the optical fiber ribbon and the blocking piece. For the optical module and an optical communication terminal provided in the present application, an electromagnetic wave generated by the optical module is directly radiated or is reflected several times until the electromagnetic wave enters a wave-absorbing pad. The wave-absorbing pad absorbs to the greatest extent an electromagnetic wave generated by a chip, and can reduce to the greatest extent electromagnetic interference (EMI) generated by the optical module. By means of the present disclosure, the sealing performance of a housing of the optical module can be improved, so that an EMI shielding effect is improved, thereby effectively reducing EMI.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: October 8, 2019
    Assignees: Hisense Broadband Multimedia Technologies Co., Ltd., Hisense Broadband Multimedia Technologies, Ltd.
    Inventor: Long Zheng
  • Patent number: 10390423
    Abstract: The subject disclosure relates generally to a method of implementing magnetic shielding walls with specific respective dimensions to reduce crosstalk between transmission lines in wire-bonds for supercomputing chipsets. In one embodiment, the device comprises: a chip-set comprised of superconducting materials; at least one superconducting data line attached to chip-set dies by a set of wire bonds; and magnetic shielding walls that respectively isolate the set of wire bonds.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: August 20, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Salvatore Bernardo Olivadese
  • Patent number: 10373901
    Abstract: A semiconductor structure includes a first substrate including a first surface and a second surface opposite to the first surface; a second substrate including a third surface and a fourth surface opposite to the third surface; a polymeric layer disposed between the second surface of the first substrate and the third surface of the second substrate; a first conductive via extended through the first substrate, the second substrate and the polymeric layer; a second conductive via extended through the first substrate, the second substrate and the polymeric layer; and a third conductive via extended through the first substrate, the second substrate and the polymeric layer, wherein the second conductive via is disposed between the first conductive via and the third conductive via, the second conductive via is configured to connect to a signal source, the first conductive via and the third conductive via are configured to connect to electrical ground.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: August 6, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Pei-Haw Tsao, Tsung-Hsing Lu, Li-Huan Chu
  • Patent number: 10300658
    Abstract: Electronic device housing structures and other structures may be formed from molded plastic. Plastic structures such as injection molding housing structures and other structures may be provided with openings. An opening may have sidewall surfaces. Machining operations and other techniques may be used in forming the openings. Openings may be processed to enhance resistance to stress-induced cracking of the plastic structures along the sidewall surfaces. Cracking resistance may be obtained by activating the surface using heat or laser treatment and by electroplating the activated surface to form a metal liner structure. Surface treatments using applied liquid chemicals or heat may form a treated layer on the surface of an opening with enhanced cracking resistance. A plastic sleeve or other insert may form a liner structure in an opening that resists cracking. Liner structures may also be formed by applying heat or light to a coating in an opening.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: May 28, 2019
    Assignee: APPLE INC.
    Inventors: Richard H. Dinh, Daniel W. Jarvis
  • Patent number: 10242954
    Abstract: Disclosed herein is an electronic circuit package includes: a substrate having a power supply pattern; an electronic component mounted on a surface of the substrate; a magnetic mold resin that covers the surface of the substrate so as to embed the electronic component therein, the magnetic mold resin comprising a composite magnetic material containing a thermosetting resin material and a magnetic filler; and a laminated film including at least a metal film and a magnetic film, the laminated film covering at least an top surface of the magnetic mold resin. The metal film is connected to the power supply pattern, and the magnetic film has a higher effective permeability than that of the magnetic mold resin.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: March 26, 2019
    Assignee: TDK CORPORATION
    Inventor: Kenichi Kawabata
  • Patent number: 10174180
    Abstract: Present application discloses a thermoplastic composition comprising a) 42.5 wt. % to 94 wt. % of thermoplastic matrix resin; b) 1 wt. % to 7.5 wt. % of a laser direct structuring additive; and c) 5 wt. % to 50 wt. % fibrous reinforcement agent; wherein the wt. % is relative to the total weight of the composition; wherein the laser direct structuring additive is represented by formula ZnxNi(1-x)Fe2O4, wherein the x is higher than 0.60 and lower than 0.85; wherein the composition is capable of being plated after being activated using a laser.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: January 8, 2019
    Assignee: DSM IP ASSET B.V.
    Inventors: Ren Bao, Robert Hendrik Catharina Janssen
  • Patent number: 10157855
    Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: December 18, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Chien-Yeh Liu, Sung-Mao Li, Jaw-Ming Ding
  • Patent number: 10154175
    Abstract: The present technology relates to a circuit board, an imaging device, and an electronic apparatus capable of suppressing the generation of a noise in a conductor loop according to a magnetic field on the periphery of a side end portion of a conductor group. A circuit board of the present technology includes: a conductor group, in which a conductor through which a current flows in a first direction and a conductor through which a current flows in a second direction are aligned in a third direction. A conductor of at least one end portion of the conductor group in the third direction suppresses an induced electromotive force generated in the conductor loop in accordance with a magnetic field generated on the periphery of the conductor group in the third direction. The present technology can be, for example, applied to an imaging device and an electronic apparatus.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: December 11, 2018
    Assignee: Sony Corporation
    Inventors: Takashi Miyamoto, Yoshiyuki Akiyama
  • Patent number: 10109596
    Abstract: A method of manufacturing a semiconductor device includes: providing, on a substrate, a first magnetic substrate including a base, a first side wall portion and a second side wall portion at opposed ends of the base, the sidewall portions extending from the base, providing a semiconductor chip over the base at a location between the first side wall portion and the second side wall portion, providing a plate-like magnetic substrate having a second surface, the second surface provided with a resin thereon, and positioning the plate-like magnetic substrate having a second surface with the resin thereon such that the second surface faces the base of the first magnetic substrate. Then the plate like magnetic substrate is moved in the direction of the first magnetic substrate to contact the second surface of the plate like magnetic substrate with the first side wall portion and the second side wall portion.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: October 23, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Satoru Takaku
  • Patent number: 10080317
    Abstract: An electronic device can include a circuit board, an electronic component mounted on the circuit board, a conductive contact disposed (e.g., deposited) on the circuit board, and a shielding polymer layer deposited over the electronic component. The shielding polymer layer includes a network of conductive pathways formed from sintered particles. The network of conductive pathways is electrically coupled to the conductive contact, which can be configured for connection to a power source ground. As such, the network of conductive pathways enables electromagnetic shielding of the electronic component.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: September 18, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Brian J. Toleno, Igor Markovsky
  • Patent number: 10062477
    Abstract: An electromagnetic-wave-absorbing filter comprising an electromagnetic-wave-absorbing layer, an insulating layer, and an electromagnetic-wave-shielding layer in this order from inside; the electromagnetic-wave-absorbing layer being constituted by a laminate of at least two electromagnetic-wave-absorbing films; each electromagnetic-wave-absorbing film comprising a plastic film and a thin metal film formed on a surface of the plastic film, the thin metal film being provided with large numbers of linear scratches in plural directions; the acute crossing angle ?s of linear scratches in each electromagnetic-wave-absorbing film being 30-90°; the linear scratches in two electromagnetic-wave-absorbing films being crossing; two electromagnetic-wave-absorbing films having different lengths; and a ratio of the length L2 of a shorter electromagnetic-wave-absorbing film to the length L1 of a longer electromagnetic-wave-absorbing film being 30-70%.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: August 28, 2018
    Inventors: Seiji Kagawa, Atsuko Kagawa
  • Patent number: 10028420
    Abstract: A sheet for shielding against electromagnetic waves includes a first magnetic material having a plurality of through holes formed in a thickness direction, and a second magnetic material filling the plurality of through holes and blocking a frequency band different from that of electromagnetic waves blocked by the first magnetic material.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: July 17, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jung Young Cho, Doo Ho Park, Sung Nam Cho, Jung Wook Seo, Jong Ho Chung, Seung Hee Oh
  • Patent number: 9974215
    Abstract: Provided is an electronic component package for electromagnetic interference shielding. The electronic component package for electromagnetic interference shielding according to an embodiment of the present invention comprises a substrate where electronic components are mounted, a molding member formed on the substrate and the electronic components, a magnetic layer formed on the molding member, and a conductive layer formed on the magnetic layer. Electromagnetic waves generated from the electronic components embeded in the molding member are absorbed in the magnetic layer to thus prevent or reduce harmful influence on other electronic components mounted in adjacent places. In addition, harmful electromagnetic waves generated from the outside may be shielded due to the conductive layer formed on the magnetic layer, thereby protecting electronic components embeded in the molding member from being influenced by the electromagnetic waves.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: May 15, 2018
    Assignee: NTRIUM INC.
    Inventors: Se Young Jeong, Ki Su Joo, Ju Young Lee, Jeong Woo Hwang, Jin Ho Yoon
  • Patent number: 9955614
    Abstract: A sheet for shielding against electromagnetic waves and a wireless power charging device are provided. The sheet for shielding against electromagnetic waves includes a plurality of magnetic layers and an adhesive layer interposed between the plurality of magnetic layers and forming chemical bonds with an adjacent magnetic layer.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: April 24, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Doo Ho Park, Jung Young Cho, Jong Ho Chung, Sung Yeol Park, Sung Nam Cho, Seung Min Lee, Seung Hee Oh
  • Patent number: 9930816
    Abstract: A modular electromagnetically shielded enclosure is provided. The enclosure includes connective frame elements that make up a support frame assembly. Conductive fabric panels are fastened to the connective frame elements to form walls and ceiling. A modular electromagnetically shielded floor assembly is made up of floor panels with rabbet edges that form channels for the placement of electromagnetic shielding gaskets and floor panel connectors. The conductive fabric panels that make up the walls of the enclosure are fastened to the modular electromagnetically shielded floor assembly to form a faraday cage environment that can be readily assembled to create a large or very large shielded enclosure and that can be reconfigured with continued radiofrequency shielding effectiveness.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: March 27, 2018
    Assignee: Select Fabricators, Inc.
    Inventors: Gary William Winch, Brian Donald Smith
  • Patent number: 9913412
    Abstract: A portable electronic device packaged into a System-in-Package assembly is disclosed. The portable electronic device can include a substrate and a plurality of components mounted on the substrate and included in one or more subsystems. Interference between subsystems or from external sources can be reduced or eliminated by disposing an insulating layer over the components, forming narrow trenches between subsystems, and conformally coating the insulating layer and trenches with a metal shielding layer. In some examples, trenches between subsystems can be formed using a laser source. In some examples, trenches between subsystems can have angled walls. In some examples, the metal shielding layer can be formed using at least one of electroplating, electroless plating, chemical vapor deposition, and physical vapor deposition.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: March 6, 2018
    Assignee: Apple Inc.
    Inventors: Yanfeng Chen, Shankar S. Pennathur
  • Patent number: 9907179
    Abstract: Disclosed herein is an electronic circuit package includes: a substrate having a power supply pattern; an electronic component mounted on a surface of the substrate; a magnetic mold resin formed of a composite magnetic material including a thermosetting resin material and a magnetic filler, the magnetic mold resin covering the surface of the substrate so as to embed therein the electronic component; and a metal film connected to the power supply pattern and covering at least a top surface of the magnetic mold resin. A volume resistance value of the magnetic mold resin is equal to or larger than 1010?, and a resistance value at an interface between the top surface of the magnetic mold resin and the metal film is equal to or larger than 106?.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: February 27, 2018
    Assignee: TDK CORPORATION
    Inventor: Kenichi Kawabata
  • Patent number: 9899335
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: February 20, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Patent number: 9871005
    Abstract: A semiconductor device package includes a carrier, an electronic component disposed over a top surface of the carrier, and a package body disposed over the top surface of the carrier and covering the electronic component. The semiconductor device package further includes a shield layer, which in turn includes a first electrically conductive layer, a first magnetically permeable layer, and a second electrically conductive layer, where the first magnetically permeable layer is interposed between and directly contacts the first electrically conductive layer and the second electrically conductive layer.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: January 16, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo Hsien Liao, Cheng-Nan Lin
  • Patent number: 9865518
    Abstract: The present invention provides an electromagnetic wave shielding support base-attached encapsulant for collectively encapsulating a semiconductor device mounting surface of a substrate having semiconductor devices mounted thereon or a semiconductor device forming surface of a wafer having semiconductor devices formed thereon, the support base-attached encapsulant including a support base having an electromagnetic wave shielding property of 20 dB or more within a range of 100 MHz to 1,000 MHz, and an encapsulant composed of a thermosetting resin layer laminated on the support base.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: January 9, 2018
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hideki Akiba, Tomoaki Nakamura, Toshio Shiobara, Shinsuke Yamaguchi
  • Patent number: 9824979
    Abstract: An electronic package includes a substrate having opposing first and second surfaces. Conductive areas are on a first surface of the substrate and include at least one edge conductive area. A plurality of conductive bumps are on the second surface of the substrate and coupled to respective ones of the conductive areas. An integrated circuit (IC) is carried by the substrate. Bond wires are coupled between the IC and respective ones of the conductive areas. An encapsulating material is over the IC and adjacent portions of the substrate. A conductive layer is on the encapsulating material, and at least one conductive body is coupled between the at least one edge conductive area and the conductive layer.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: November 21, 2017
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Godfrey Dimayuga, Frederick Arellano, Michael Tabiera
  • Patent number: 9820373
    Abstract: A compact portable electronic device packaged into a System-in-Package assembly and thermal solutions for the device is disclosed. The compact portable electronic device can be assembled into a single package to reduce size and enhance form factor. Several tens or hundreds of components including multiple dies, passive components, mechanical or optical components can be packaged into a single system on a printed circuit board. One or more of the components can dissipate a lot of power resulting in the generation of excess heat. To remove the excess heat, the device can include one or more thermal solutions such as internal thermal plugs, heat spreaders, internal embedded heat sinks, and/or external heat sinks. In some examples, the thermal solutions can dissipate heat via conduction to the bottom of the substrate or via convection to the top of the system or a combination of both.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: November 14, 2017
    Assignee: Apple Inc.
    Inventors: Shankar S. Pennathur, Carlos A. S. Ribas, Deniz Teoman, Michael Eng
  • Patent number: 9812774
    Abstract: Provided are a composite sheet for shielding a magnetic field and an electromagnetic wave, and an antenna module using the same, which can block influence of a magnetic field on a main body and a battery of a mobile terminal block device, and the like, and simultaneously shield an electromagnetic wave, by significantly reducing a loss due to an eddy current by flaking an amorphous ribbon sheet. The composite sheet includes: a magnetic sheet; and a conductor sheet stacked on the magnetic sheet for shielding an electromagnetic wave and radiating heat. The magnetic sheet includes: an amorphous ribbon sheet which is thermally treated, flaked, and then separated into a plurality of fine pieces; a protective film bonded to one side surface of the amorphous ribbon sheet; and an adhesive tape bonded to the other side surface of the amorphous ribbon sheet.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: November 7, 2017
    Assignee: AMOSENSE CO., LTD.
    Inventors: Kil Jae Jang, Dong Hoon Lee, Ki Chul Kim
  • Patent number: 9807866
    Abstract: An electronic package having a substrate that includes signal traces and ground traces; an electronic component mounted on an upper surface of the substrate such that the electronic component is electrically connected to the signal traces and the ground traces in the substrate; an insulating layer covering the electronic component and the upper surface of the substrate; and an electromagnetic interference shielding mold covering the insulation layer such that the electromagnetic interference shielding mold is electrically connected to the ground traces in the substrate. In some forms of the electronic package, the electromagnetic interference shielding mold is electrically connected to the ground traces through openings in the insulation layer.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 31, 2017
    Assignee: Intel Corporation
    Inventors: Zhichao Zhang, Adel Elsherbini, Robert L. Sankman, Kemal Aygun
  • Patent number: 9774087
    Abstract: An electronic device may have a housing, electrical components, and other electronic device structures. A display may be mounted in the housing. The display may have a transparent display cover layer and a display layer such as an organic light-emitting diode display layer that is mounted to the underside of the transparent display cover layer. A flexible printed circuit with metal traces may be mounted under the organic light-emitting diode display layer. The metal traces may form coils for a near-field communications inductive loop antenna. A magnetic shielding layer may be interposed between the housing and the flexible printed circuit. The magnetic shielding layer may include a polymer magnetic shielding layer having magnetic material particles embedded in a polymer matrix. The magnetic shielding layer may also have a polymer-binder-free magnetic shielding layer.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: September 26, 2017
    Assignee: Apple Inc.
    Inventors: Alvin T. Chang, Anna-Katrina Shedletsky, Peter Kardassakis, Katherine E. Tong
  • Patent number: 9583446
    Abstract: A semiconductor device has a first semiconductor die with a shielding layer formed over its back surface. The first semiconductor die is mounted to a carrier. A first insulating layer is formed over the shielding layer. A second semiconductor die is mounted over the first semiconductor die separated by the shielding layer and first insulating layer. A second insulating layer is deposited over the first and second semiconductor die. A first interconnect structure is formed over the second semiconductor die and second insulating layer. A second interconnect structure is formed over the first semiconductor die and second insulating layer. The shielding layer is electrically connected to a low-impedance ground point through a bond wire, RDL, or TSV. The second semiconductor die may also have a shielding layer formed on its back surface. The semiconductor die are bonded through the metal-to-metal shielding layers.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: February 28, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Reza A. Pagaila, Byung Tai Do, Nathapong Suthiwongsunthorn
  • Patent number: 9543258
    Abstract: A semiconductor device includes a multi-layer substrate. A ground shield is disposed between layers of the substrate and electrically connected to a ground point. A plurality of semiconductor die is mounted to the substrate over the ground shield. The ground shield extends beyond a footprint of the plurality of semiconductor die. An encapsulant is formed over the plurality of semiconductor die and substrate. Dicing channels are formed in the encapsulant, between the plurality of semiconductor die, and over the ground shield. A plurality of metal-filled holes is formed along the dicing channels, and extends into the substrate and through the ground shield. A top shield is formed over the plurality of semiconductor die and electrically and mechanically connects to the ground shield through the metal-filled holes. The top and ground shields are configured to block electromagnetic interference generated with respect to an integrated passive device disposed in the semiconductor die.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: January 10, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: OhHan Kim, SunMi Kim, KyungHoon Lee
  • Patent number: 9508656
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: November 29, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Patent number: 9445783
    Abstract: An ultrasound diagnostic adapter used when diagnosing a subject using an ultrasound probe that transmits and receives ultrasound waves, the ultrasound diagnostic adapter includes: a pad which has (i) a main surface that is a surface on a side where the ultrasound probe is disposed, and (ii) a back surface that is a surface which is opposite to the main surface and is on a side where the subject is disposed; and a first reflective member which is disposed inside the pad and made from a material having a different acoustic impedance than a material included in the pad, wherein the first reflective member is disposed such that at least one of (i) a distance between the first reflective member and the main surface and (ii) a width of the first reflective member viewed from the side of the main surface varies depending on a position in the main surface.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: September 20, 2016
    Assignee: KONICA MINOLTA, INC.
    Inventors: Kazuya Takagi, Satoshi Kondo
  • Patent number: 9362235
    Abstract: A semiconductor package includes a substrate in which a plurality of wires are formed; at least one semiconductor chip electrically connected to portions of the plurality of wires; and a shielding can mounted on the substrate, surrounding the at least one semiconductor chip, electrically connected to at least one wire of the plurality of wires and including a soft magnetic material. The semiconductor package can prevent or substantially reduce electromagnetic interference (EMI).
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: June 7, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-hoon Kim, Hee-Seok Lee, Jin-ha Jeong
  • Patent number: 9269673
    Abstract: A semiconductor device package includes a substrate, at least one component, a package body, a first conductive layer, a first shielding layer, a second shielding layer and a second conductive layer. The component is disposed on a first surface of the substrate. The package body is disposed on the first surface of the substrate and covers the component. The first conductive layer covers the package body and at least a portion of the substrate. The first shielding layer covers the first conductive layer and has a first thickness and includes a high conductivity material. The second shielding layer covers the first shielding layer and has a second thickness and includes a high permeability material. A ratio of the first thickness to the second thickness being in a range of 0.2 to 3. The second conductive layer covers the second shielding layer.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: February 23, 2016
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo-Hsien Liao, Cheng-Nan Lin
  • Patent number: 9237879
    Abstract: A method of manufacturing an ultrasound transducer for an ultrasound imaging device including a plurality of transducer elements arranged in a two dimensional array on a single carrier of semi-conductor material including the step of providing a buffer layer between the carrier and a layer including piezo electrical material, the buffer layer having a thickness arranged for dicing each of the plurality of transducer elements on the carrier.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: January 19, 2016
    Assignee: OLDELFT B.V.
    Inventors: Christian Prins, Jacob Alexander Ponte, Zili Yu
  • Patent number: 9192044
    Abstract: First and second signal wiring patterns are formed in a first conductor layer. A first electrode pad electrically connected to the first signal wiring pattern through a first via and a second electrode pad electrically connected to the second signal wiring pattern through a second via are formed in a second conductor layer as a surface layer. A third conductor layer is disposed between the first conductor layer and the second conductor layer with an insulator interposed between those conductor layers. A first pad electrically connected to the first via is formed in the third conductor layer. The first pad includes an opposed portion which overlaps the second electrode pad as viewed in a direction perpendicular to the surface of a printed board and which is opposed to the second electrode pad through intermediation of the insulator. This enables reduction of crosstalk noise caused between the signal wirings.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: November 17, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiji Hayashi, Takuya Kondo, Shoji Matsumoto
  • Patent number: 9184140
    Abstract: Semiconductor packages are provided. In some embodiments, the semiconductor package includes a substrate, a first ground line including a first internal ground line disposed along edges of the substrate and a plurality of first extended ground lines between the first internal ground line and sidewalls of the substrate, a chip on the substrate, a molding member disposed on the substrate to cover the chip, and an electromagnetic interference (EMI) shielding layer covering the molding member, the EMI shielding layer extending along the sidewalls of the substrate and contacting the end portions of the plurality of first extended ground lines. The plurality of first extended ground lines include end portions that are exposed at the sidewalls of the substrate.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: November 10, 2015
    Assignee: SK HYNIX INC.
    Inventors: Hyung Ju Choi, Jong Hyun Kim
  • Patent number: 9035199
    Abstract: A receptacle assembly includes a hollow conductive cage with a front end and an opening to an interior portion of the cage. The opening is configured to receive a module assembly therein. The cage has a bottom with a bottom opening communicating with the interior portion, and the bottom is configured to be joined to a circuit board. A layered EMI shield member is provided between the bottom of the cage and the circuit board and the shield member extends completely around the bottom opening of the cage. The EMI shield member is formed as a flexible, low-cost assembly that utilizes a pair or insulative layers that flank a conductive layer.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: May 19, 2015
    Assignee: Molex Incorporated
    Inventors: Kenneth F. Janota, Eran J. Jones, Marlon C. Daniels, Michael Alan Johnston
  • Patent number: 8987611
    Abstract: A shielding article includes a polymeric conductive layer and a protective layer disposed adjacent the polymeric conductive layer. The polymeric conductive layer provides electromagnetic shielding characteristics so as to prevent receipt of data from a radio frequency information component by an external device when the component is located between the external device on one side and the polymeric conductive and protective layers on the other side. The shielding article may be shaped to substantially surround the radio frequency information component.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 24, 2015
    Assignee: 3M Innovative Properties Company
    Inventors: Jeffrey A. Lim, Sywong Ngin, Robert L. Lambert, Jr.