Nonelectrolytic Coating By Plating From Bath Containing Metal Ions And Reducing Agent (e.g., Electroless Plating, Etc.) Patents (Class 205/187)
-
Publication number: 20090242411Abstract: A process for producing a polyimide-metal laminated body includes forming a metal conductive layer on a polyimide film having a ceramic-modified or pseudoceramic-modified surface with a wet plating process which includes forming at least a ground treatment layer by electroless plating, conducting electroless metal plating and conducting electrolytic copper plating.Type: ApplicationFiled: May 14, 2009Publication date: October 1, 2009Applicant: Ube Industries, Ltd,Inventors: Tadahiro Yokozawa, Hiroaki Yamaguchi, Keita Banba, Masao Okubo, Sumiko Okubo
-
Publication number: 20090133745Abstract: The invention relates to a photovoltaic cell comprising a photovoltaically active semiconductor material, wherein the photovoltaically active semiconductor material is a p- or n-doped semiconductor material comprising a binary compound of the formula (I) or a ternary compound of the formula (II): ZnTe??(I) Zn1-xMnxTe??(II) where x is from 0.01 to 0.99, and a particular proportion of tellurium ions in the photovoltaically active semiconductor material has been replaced by halogen ions and nitrogen ions and the halogen ions are selected from the group consisting of fluoride, chloride and bromide and mixtures thereof.Type: ApplicationFiled: October 26, 2005Publication date: May 28, 2009Applicant: BASF AktiengesellschaftInventor: Hans-Josef Sterzel
-
Publication number: 20080308425Abstract: A method is provided for manufacturing a magnetic steel component. An electroless nickel plating is formed on a substrate that includes magnetic steel. A thermal cycle is thereafter performed at a temperature that is sufficiently high to sinter the electroless nickel plating and thereby form a densified plating on the substrate. According to one embodiment, the thermal cycle includes a solid state diffusion sintering process wherein the substrate and the densified plating are heated to a temperature of at least about 1300° F. (about 704° C.) but.below the melting temperature of the electroless nickel plating. According to another embodiment, the thermal cycle includes a transient liquid phase sintering process wherein the substrate and the densified plating are heated at least to the melting temperature of the electroless plating.Type: ApplicationFiled: June 12, 2007Publication date: December 18, 2008Applicant: HONEYWELL INTERNATIONAL, INC.Inventors: Don L. Mittendorf, Amer Aizaz
-
Patent number: 7449100Abstract: An object of the present invention is to provide a method for forming a uniform and dense electroplating film with high adhesion strength on the surface of an article, yet irrespective of the surface material and the surface properties of the article. A means for a solution of the problem comprises: forming on the surface of the article, a resin coating made of a resin containing dispersed therein a powder of a first metal; then forming a second-metal substituted plating film on the surface of the resin coating by immersing the resin-coated article in a solution containing ions of a second metal having an ionization potential nobler than that of the first metal; and further forming an electroplating film of a third metal on the surface of the metal-substituted plating film.Type: GrantFiled: October 25, 2002Date of Patent: November 11, 2008Assignee: Hitachi Metals, Ltd.Inventors: Kohshi Yoshimura, Fumiaki Kikui
-
Patent number: 7405157Abstract: Methods are provided for electrochemically depositing copper on a work piece. One method includes the step of depositing overlying the work piece a barrier layer having a surface and subjecting the barrier layer surface to a surface treatment adapted to facilitate deposition of copper on the barrier layer. Copper then is electrochemically deposited overlying the barrier layer.Type: GrantFiled: March 2, 2005Date of Patent: July 29, 2008Assignee: Novellus Systems, Inc.Inventors: Jon Reid, Seyang Park
-
Patent number: 7384532Abstract: A process that can be uniformly employed for electroplating a wide variety of different non-conductive substrates, including those that are non-platable or difficult-to-plate using conventional electroless and electrolytic plating techniques involves application of a platable coating composition to the substrate prior to plating. The platable coating composition is cured to render the substrate more receptive to conventional plating techniques. In one embodiment, the process utilizes an epoxy resin system that upon being cured is receptive to electroless plating and electrolytic plating techniques that are the same or similar to those conventionally employed for electroplating ABS and/or PC/ABS substrates.Type: GrantFiled: November 16, 2004Date of Patent: June 10, 2008Assignee: Lacks Enterprises, Inc.Inventors: Dennis R. Parsons, II, Ling Hao, Daniel W. Irvine
-
Patent number: 7297451Abstract: A novel black matrix, a method for preparing the same, and a flat display device and an electromagnetic interference filter to which the black matrix is applied. The black matrix is prepared by exposing a photoactive compound to form a latent pattern of nuclei for crystal growth and treating the latent pattern of nuclei for crystal growth with a metal salt solution to give a metal particle-deposited pattern; forming an electroless Ni-plated layer on the metal particle-deposited pattern; and forming an electroless Cu-plated layer on the electroless Ni-plated layer. Exhibiting improved black tone, which is achieved only by a selective multilayer plating process, without using expensive vacuum sputtering apparatus or a photolithographic process, the black matrix can be applied to various flat display devices. In addition, due to improved electric conductivity, the black matrix can be used in an electromagnetic interference filter, without employing an additional front surface blackening process.Type: GrantFiled: July 21, 2005Date of Patent: November 20, 2007Assignee: Samsung Corning Co., Ltd.Inventors: Ho Chul Lee, Euk Che Hwang, Jin Young Kim, Chang Ho Noh, Ki Yong Song, Sung Hen Cho
-
Patent number: 7255782Abstract: A process of providing a pattern of a metal on a non-conductive substrate to create loop antennae for wireless articles and for creating circuitry for smart cards, such as phone cards is provided. The method comprises the steps of catalyzing the non-conductive substrate by applying a catalytic ink, reducing a source of catalytic metal ions in the catalytic ink to its associated metal, depositing electroless metal on the pattern of catalytic ink on the surface of the substrate; and plating electrolytic metal on the electroless metal layer to produce the desired pattern of metal on the non-conductive substrate. The catalytic ink typically comprises one or more solvents, a source of catalytic metal ions, a crosslinking agent, one or more copolymers, a polyurethane polymer, and, optionally, one or more fillers.Type: GrantFiled: April 30, 2004Date of Patent: August 14, 2007Inventor: Kenneth Crouse
-
Patent number: 7255980Abstract: A black matrix, a method for preparing the black matrix, a flat panel display and an electromagnetic interference filter using the black matrix. The black matrix may comprise a substrate, a titanium oxide layer, a Ni plating layer, and a Ni/Pd alloy layer. The method may comprise the steps of forming a titanium oxide layer, forming a metal particle-deposited pattern on the titanium oxide layer, forming a Ni electroless plating layer on the metal particle-deposited pattern, and forming a Ni/Pd alloy layer on the Ni electroless plating layer. Since the black matrix may have a high blackening density via simple selective multilayer plating without using a high-price vacuum sputtering apparatus and undergoing photolithography, unlike conventional chromium-based black matrices, it may be employed in various flat panel displays. In addition, since the black matrix may exhibit superior electrical conductivity, it may be used in electromagnetic interference filters without additional front-surface blackening.Type: GrantFiled: November 10, 2005Date of Patent: August 14, 2007Assignee: Samsung Corning Co., Ltd.Inventors: Euk Che Hwang, Chang Ho Noh, Jin Young Kim, Ki Yong Song, Sung Hen Cho
-
Patent number: 7175920Abstract: The present invention is to provide an ultra-thin copper foil with a carrier which comprises a release layer, a diffusion preventive layer and a copper electroplating layer laminated in this order, or a diffusion preventive layer, a release layer and a copper electroplating layer laminated in this order on the surface of a carrier foil, wherein a surface of the copper electroplating layer is roughened; a copper-clad laminated board comprising the ultra-thin copper foil with a carrier being laminated on a resin substrate; a printed wiring board comprising the copper-clad laminated board on the ultra-thin copper foil of which is formed a wiring pattern; and a multi-layered printed wiring board which comprising a plural number of the above printed wiring board being laminated.Type: GrantFiled: July 13, 2005Date of Patent: February 13, 2007Assignee: Circuit Foil Japan Co., Ltd.Inventors: Akitoshi Suzuki, Shin Fukuda, Kazuhiro Hoshino, Tadao Nakaoka
-
Patent number: 7063779Abstract: The optical fiber manufacturing method according to the present invention is characterized by having the steps of forming, on the peripheral surface of a bare fiber having been exposed by removing a resin cover and on which a metallic coating has not been provided, a subbing layer consisting of an electroless Ni plating layer and an electrolytic Au plating layer; subjecting the bare fiber on which the subbing layer has been formed, to end face treatment by means of an optical-fiber cleaver to expose an end face portion of the bare fiber; and subjecting the bare fiber on which the end face treatment has been carried out, to electrolytic plating to form a metallic coating as a surface layer, consisting of an electrolytic Ni plating layer and an electrolytic Au plating layer.Type: GrantFiled: December 15, 2003Date of Patent: June 20, 2006Assignee: Sumitomo Metal Mining Co. Ltd.Inventor: Yoichi Onosato
-
Patent number: 6951604Abstract: A flexible printed board production method which ensures higher adhesion of copper, excellent workability, easier continuous production and lower costs. The flexible printed board production method comprises the steps of: treating a surface of a polyimide resin film with plasma or short wavelength ultraviolet radiation; activating the treated surface with the use of an alkali metal hydroxide; electrolessly plating the surface of the polyimide resin film with nickel; and electroplating the electrolessly plated surface of the polyimide resin film with copper, whereby a copper layer is formed on the surface of the polyimide resin film.Type: GrantFiled: August 12, 2003Date of Patent: October 4, 2005Assignees: Tokai Rubber Industries, Ltd., Okuno Chemical Industries Co., Ltd.Inventors: Naoki Katayama, Yasuhiro Hayashi, Joonhaneng Kang
-
Patent number: 6946065Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.Type: GrantFiled: November 16, 2000Date of Patent: September 20, 2005Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Vijay Bhaskaran, Evan E. Patton, Robert L. Jackson, Jonathan Reid
-
Patent number: 6875519Abstract: A two-layer copper polyimide substrate includes a modified layer on the surface of a polyimide film having a thickness of not more than 200 ?, and preferably not less than 50 ?, as evaluated by a method by dyeing a section thereof with a silver nitrate aqueous solution and observing it by a transmission electron microscope (TEM). A metal seed layer is formed on the polyimide film surface, followed by forming a copper layer thereon by copper electroplating or copper electroless plating or a combination of the both, providing a two-layer copper polyimide substrate in which any of an initial adhesion, a heat resistant adhesion after standing in air at 150° C. for 168 hours, and a PCT adhesion after PCT test at 121° C. and at a humidity of 95% under 2 atmospheres for 100 hours are 400 N/m or more.Type: GrantFiled: May 22, 2003Date of Patent: April 5, 2005Assignee: Sumitomo Metal Mining Co., Ltd.Inventors: Noriyuki Saeki, Takefumi Sakou, Hiroto Watanabe, Yoshiro Ishii
-
Patent number: 6827834Abstract: The invention consists of a method for producing an adherent copper coating on a zinc or zinc alloy article without the use of cyanide as a component of the process. The zinc or zinc alloy article is first immersed in an aqueous nickel pyrophosphate solution and is then electroplated with a copper pyrophosphate solution. The method produces an adherent copper coating on the zinc or zinc alloy, which can be deformed without any loss of the copper coating.Type: GrantFiled: March 12, 2002Date of Patent: December 7, 2004Inventors: Ronald Stewart, Carl Steinecker
-
Publication number: 20040238371Abstract: A new coating method for light metal alloys in which an electrophoretic lacquering and a galvanic coating are combined. Thus, corrosion resistant surfaces having very good optical properties can be achieved, wherein an advantageous flexibility in view of material selection and layer thickness is preserved.Type: ApplicationFiled: April 9, 2004Publication date: December 2, 2004Inventor: Wolf-Dieter Franz
-
Patent number: 6824666Abstract: An apparatus and a method of depositing a catalytic layer comprising at least one metal selected from the group consisting of noble metals, semi-noble metals, alloys thereof, and combinations thereof in sub-micron features formed on a substrate. Examples of noble metals include palladium and platinum. Examples of semi-noble metals include cobalt, nickel, and tungsten. The catalytic layer may be deposited by electroless deposition, electroplating, or chemical vapor deposition. In one embodiment, the catalytic layer may be deposited in the feature to act as a barrier layer to a subsequently deposited conductive material. In another embodiment, the catalytic layer may be deposited over a barrier layer. In yet another embodiment, the catalytic layer may be deposited over a seed layer deposited over the barrier layer to act as a “patch” of any discontinuities in the seed layer. Once the catalytic layer has been deposited, a conductive material, such as copper, may be deposited over the catalytic layer.Type: GrantFiled: January 28, 2002Date of Patent: November 30, 2004Assignee: Applied Materials, Inc.Inventors: Srinivas Gandikota, Chris R. McGuirk, Deenesh Padhi, Muhammad Atif Malik, Sivakami Ramanathan, Girish A. Dixit, Robin Cheung
-
Patent number: 6821324Abstract: Materials and methods are described for electroless deposition of cobalt phosphorus and cobalt tungsten phosphorus, employing tungsten trioxide or tungsten phosphoric acid as a source of tungsten. Electolessly deposited metals produced are substantially devoid of alkali metal ions and alkaline earth metal ions. The deposits are typically oxygen-free thin films having a low sheet resistivity of less than 50 &mgr;&OHgr;.cm. The films may be used as capping layers or barriers for the prevention of interlayer metallic drift, diffusion and migration in semiconductor, ULSI, VLSI, electroplating industries and products.Type: GrantFiled: June 19, 2002Date of Patent: November 23, 2004Assignee: Ramot At Tel-Aviv University Ltd.Inventors: Yosi Shacham-Diamand, Yelena Sverdlov
-
Patent number: 6805915Abstract: An electroless copper plating solution using glyoxylic acid as a reducing agent, which is small in the reacting quantity of Cannizzaro reaction, does not largely cause precipitation of the salt accumulated in the electroless copper plating solution by the plating reaction and Cannizzaro reaction, and can be used stably over a long period of time. The electroless copper plating solution comprises copper ion, a complexing agent for copper ion, a reducing agent for copper ion and a pH adjusting agent, wherein the reducing agent for copper ion is glyoxylic acid or a salt thereof, the pH adjusting agent is potassium hydroxide and the electroless copper plating solution contains at least one member selected from metasilicic acid, metasilicic acid salt, germanium dioxide, germanic acid salt, phosphoric acid, phosphoric acid salt, vanadic acid, vanadic acid salt, stannic acid and stannic acid salt in an amount of 0.0001 mol/L or more.Type: GrantFiled: February 19, 2002Date of Patent: October 19, 2004Assignee: Hitachi, Ltd.Inventors: Takeyuki Itabashi, Hiroshi Kanemoto, Haruo Akahoshi, Eiji Takai, Naoki Nishimura, Tadashi Iida, Yoshinori Ueda
-
Patent number: 6793796Abstract: Electroplating methods using an electroplating bath containing metal ions and a suppressor additive, an accelerator additive, and a leveler additive, together with controlling the current density applied to a substrate, avoid defects in plated films on substrates having features with a range of aspect ratios, while providing good filling and thickness distribution. The methods include, in succession, applying DC cathodic current densities optimized to form a conformal thin film on a seed layer, to provide bottom-up filling, preferentially on features having the largest aspect ratios, and to provide conformal plating of all features and adjacent field regions. Including a leveling agent in the electroplating bath produces films with better quality after subsequent processing.Type: GrantFiled: February 28, 2001Date of Patent: September 21, 2004Assignee: Novellus Systems, Inc.Inventors: Jonathan D. Reid, David Smith, Steven T. Mayer, Jon Henri, Sesha Varadarajan
-
Publication number: 20040118690Abstract: A method of forming a metal film of copper on the surface of a resin substrate by successively effecting the conditioning treatment, Pd activation treatment, electroless copper plating treatment and electrolytic copper plating treatment. In the conditioning treatment, a conditioning treatment solution is interposed in the form of a thin layer between the surface and a cover glass plate, and the surface is irradiated with ultraviolet light from the upper side of the cover glass plate. Irradiation with ultraviolet light in the presence of the treatment solution causes the molecules in the surface of the resin to chemically react with the component of the treatment solution, whereby the surface of the resin is more activated to improve the adhesion with copper that is deposited on the surface of the resin.Type: ApplicationFiled: December 11, 2003Publication date: June 24, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Masaaki Yoshitani
-
Patent number: 6740222Abstract: The present invention provides a method of plating an electrical contact on an integrated circuit (IC) substrate manufactured from a rigid double-sided or multi-layered printed wiring board core with dielectric layers on both sides of the core. The method may include forming electrically connected plating layers on first and second opposing sides of a substrate and electroplating a contact layer over each of the plating layers using the plating layers. The method further includes removing a portion of the plating layers from the first and second opposing sides while leaving the plating layers under the contact layer.Type: GrantFiled: June 7, 2001Date of Patent: May 25, 2004Assignee: Agere Systems Inc.Inventor: Charles Cohn
-
Patent number: 6740425Abstract: A method for forming copper-resin composite materials is disclosed. This method affixes a palladium or palladium-tin catalyst onto resin substrate, and then subjects the catalyst-containing resin to an electroless copper plating bath without performing a catalyst acceleration treatment step.Type: GrantFiled: August 21, 2002Date of Patent: May 25, 2004Assignee: Shipley Company, L.L.C.Inventors: Masaru Seita, Hideki Tsuchida, Masaaki Imanari, Yoshihiro Sugita
-
Publication number: 20040094424Abstract: A method for applying a metal coating to graphite structural members, in which a galvanic metal layer is deposited after said graphite structural members have been anodically etched in an alkaline etchant. The metal coating can serve as a basis for solder connections and can be employed for creating electrical contacts or for mechanically fixing the graphite structural member or it can fulfil other demands on the surface (e.g. abrasion resistance).Type: ApplicationFiled: November 13, 2003Publication date: May 20, 2004Applicant: Franz Oberflachentechnik GmbH & Co KGInventor: Wolf-Dieter Franz
-
Patent number: 6709803Abstract: After forming first catalyst cores on the surfaces of adhesive layers of an insulating substrate, a plating resist is patterned. The insulating substrate is treated with an aqueous solution containing an anionic surfactant. Then, the insulating substrate is soaked successively in a palladium—tin mixed colloid catalyst solution and an accelerator solution, whereby second catalyst cores are formed on the surface of the adhesive layer not covered with the plating resist. Thereafter, conductive circuits are formed by electroless copper plating. Due to the anionic surfactant, adsorption of the palladium—tin mixed colloid catalyst to the plating resist is suppressed, and the first catalyst cores promote the formation of second catalyst cores. By setting the concentration of the first catalyst cores to 4×10−8 atomic mol/cm2 or less, a fine conductive circuit with a line width/line space of 50 &mgr;m or less having a high electrical insulating property between circuit lines can be formed.Type: GrantFiled: February 20, 2002Date of Patent: March 23, 2004Assignee: NEC Toppan Circuit Solutions, Inc.Inventor: Sinichi Hotta
-
Publication number: 20040040856Abstract: The method for making plastic packages of the present invention includes: forming an electroless Cu plating film on a resin substrate after removing a Cu foil; disposing a first plating resist pattern thereupon, passing electricity through the electroless Cu plating film, and disposing an electrolytic Cu plating film where the pattern is absent; disposing a second plating resist pattern to form a circuit pattern, and disposing a Ni and Au plating film; removing the plating resist pattern and etching away the Ni and Au plating film and the electroless Cu plating film not covered by the electrolytic Cu plating film; and disposing a solder resist film with openings to expose an external terminal connection pad and a semiconductor element connection pad. This method provides superior bonding properties with a solder resist, reduces undercutting during etching, allows use of high-density circuits, provides high reliability, and improves yield.Type: ApplicationFiled: April 23, 2003Publication date: March 4, 2004Applicant: Sumitomo Metal Electronics Devices Inc.Inventor: Akihiro Hamano
-
Patent number: 6689268Abstract: A composite material includes a structural carrier layer and a relatively thin metal foil layer separated by a release layer. The release layer, that may be an admixture of a metal such as nickel or chromium and a non-metal such as chromium oxide, nickel oxide, chromium phosphate or nickel phosphate, provides a peel strength for the metal foil layer from the carrier strip that is typically on the order of 0.1 pound per inch to 2 pounds per inch. This provides sufficient adhesion to prevent premature separation of the metal foil layer from the carrier layer, but easy removal of the carrier layer when desired. Typically, the metal foil layer is subsequently bonded to a dielectric and the carrier layer then removed. The metal foil layer is then imaged into circuit features in the manufacture of printed circuit boards and flexible circuits.Type: GrantFiled: April 26, 2001Date of Patent: February 10, 2004Assignee: Olin CorporationInventors: Szuchain Chen, Julius Fister, Andrew Vacco, Nina Yukov, A. James Brock
-
Publication number: 20040020778Abstract: As the recording density of magnetic disk drives approaches 100 Gbits/in2, write track lengths of about 0.10 microns will be required. This cannot be accomplished using conventional photolithography. The present invention solves this problem by first forming on the bottom pole of the write head a cavity in a layer of photoresist, using conventional means. A seed layer of non-magnetic material is electrolessly laid down, following which a second layer of photoresist is deposited and patterned to form a second cavity that symmetrically surrounds the first one, thereby forming a mold around it. Ferromagnetic metal is then electro-deposited in this mold to form the top magnetic pole. Following the removal of all photoresist and a brief selective etch of the bottom pole, an extremely narrow write head is obtained.Type: ApplicationFiled: August 2, 2002Publication date: February 5, 2004Applicant: Headway Technologies, Inc.Inventors: Charles C. Lin, Kochan Ju, Jeiwei Chang
-
Patent number: 6673227Abstract: The parts are produced by two-component injection molding. Those regions that are to be metallized consist of a first plastic and those regions that are not to be metallized consist of a second plastic. After the entire surface of the parts has been seeded, the seeding is selectively removed with the aid of a solvent in the regions which are not to be metallized. The first plastic is insoluble and the second plastic soluble in the solvent. The selective metallization then takes place by electroless metal deposition and, if appropriate, electrodeposition of metal.Type: GrantFiled: April 16, 2001Date of Patent: January 6, 2004Assignee: Siemens Production & Logistics Systems AGInventor: Luc Boone
-
Patent number: 6632342Abstract: In a method of fabricating an array of microstructures, a substrate with an electrically-conductive portion is provided, an insulating mask layer is formed on the electrically-conductive portion of the substrate, a plurality of openings are formed in the insulating mask layer to expose the electrically-conductive portion, and a first plated or electrodeposited layer is deposited in the openings and on the insulating mask layer by electroplating or electrodeposition. A second plated layer is further formed on the first plated or electrodeposited layer and on the electrically-conductive portion by electroless plating to reduce a size distribution of microstructures over the array.Type: GrantFiled: March 24, 2000Date of Patent: October 14, 2003Assignee: Canon Kabushiki KaishaInventors: Takayuki Teshima, Takayuki Yagi, Yasuhiro Shimada, Takashi Ushijima
-
Patent number: 6627118Abstract: A crystalline Ni alloy particle for an anisotropic conductive film comprising Ni and a metalloid element such as P, B, etc. and having a structure in which a Ni intermetallic compound phase is precipitated can be produced by preparing substantially amorphous Ni alloy particle by an electroless reduction method, and heat-treating the substantially amorphous Ni alloy particle. The Ni alloy particle is preferably heat-treated after disintegration, and preferably coated with Au.Type: GrantFiled: April 23, 2001Date of Patent: September 30, 2003Assignee: Hitachi Metals, Ltd.Inventors: Kagehiro Kageyama, Koji Sato
-
Patent number: 6569491Abstract: A dielectric coating for a circuit board which is adherent to electroless copper. The coating is an epoxy dielectric including an amount of a solubilized nitrile-free butadiene or isoprene agent for promoting adhesion of an electroless copper coating. A method for producing a circuit board is also disclosed.Type: GrantFiled: August 9, 2000Date of Patent: May 27, 2003Assignee: Enthone Inc.Inventor: Constantine I. Courduvelis
-
Patent number: 6562715Abstract: A barrier layer structure and a method of forming the structure. The barrier layer structure comprises a bilayer, with a first layer formed by chemical vapor deposition and a second layer formed by physical vapor deposition. The first barrier layer comprises a metal or a metal nitride and the second barrier layer comprises a metal or a metal nitride. The barrier bilayer is applicable to copper metallization.Type: GrantFiled: August 9, 2000Date of Patent: May 13, 2003Assignee: Applied Materials, Inc.Inventors: Ling Chen, Christophe Marcadal
-
Patent number: 6533915Abstract: The invention provides a surface-treated copper foil for producing printed wiring boards whose surface has,,been subjected to nodular treatment and anti-corrosion treatment, wherein the anti-corrosion treatment includes forming a-zinc-copper-tin ternary alloy anti-corrosive plating layer on a surface of the copper foil; forming an electrolytic chromate layer on the anti-corrosive plating layer; forming a silane-coupling-agent-adsorbed layer on the electrolytic chromate layer; and drying the copper foil for 2-6 seconds such that the copper foil reaches 105° C.-200° C.Type: GrantFiled: January 26, 2001Date of Patent: March 18, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Masakazu Mitsuhashi, Takashi Kataoka, Naotomi Takahashi
-
Patent number: 6475644Abstract: Radioactive coating solutions and sol-gels, and corresponding methods for making a substrate radioactive by the application of the radioactive coating solutions and sol-gels thereto. The radioactive coating solution comprises at least one carrier metal and a radioisotope, which may be soluble or insoluble, and may further comprise a reducing agent. The radioactive sol-gel comprises at least one metal alkoxide and a radioisotope, which may be soluble or insoluble. Methods of making a substrate radioactive by coating with radioactive coating solutions or sol-gels are also disclosed, including electrodeposition, electroless deposition, spin coating and dip coating. In a particular embodiment, the radioactive coating formed by the method is a composite coating. Radioactive substrates are also disclosed, comprising a substrate and one or more radioactive coatings, which coatings may be the same or different.Type: GrantFiled: August 31, 1999Date of Patent: November 5, 2002Assignee: Radiovascular Systems, L.L.C.Inventors: Janet M. Hampikian, Neal A. Scott
-
Patent number: 6468672Abstract: A process for forming a decorative chromium plating on a plastic substrate includes depositing an electrically conductive coating on the plastic substrate, electrodepositing on the electrically conductive coating a high leveling semi-bright nickel electroplate layer, electrodepositing on the high leveling semi-bright nickel electroplate layer a bright nickel electroplate layer, and electrodepositing over the bright nickel electroplate layer a chromium electroplate layer. An advantage of the process is that a lustrous decorative chromium plating having good corrosion resistance and thermal cycling characteristics is obtained without a copper sublayer, and while using relatively thin nickel sublayers.Type: GrantFiled: June 29, 2000Date of Patent: October 22, 2002Assignee: Lacks Enterprises, Inc.Inventors: Lawrence P. Donovan, III, Roger J. Timmer
-
Patent number: 6395164Abstract: An electroless touch-up process for repairing copper metallization deposited in dual damascene structures with high aspect ratios. An initial copper strike layer is produced by directional deposition techniques such that discontinuous sidewall coverage occurs. An evolutionary electroless touch-up process then proceeds to conformally grow the copper layer on all surfaces. The result of the evolutionary process is to produce a continuous copper strike layer that can be used with conventional electroplating techniques.Type: GrantFiled: October 7, 1999Date of Patent: May 28, 2002Assignee: International Business Machines CorporationInventors: Panayotis Andricacos, James E. Fluegel, John G. Gaudiello, Ronald D. Goldblatt, Sandra G. Malhotra, Milan Paunovic
-
Publication number: 20020060160Abstract: A method and structure for producing bumps on an IC package substrate. The method first deposits a medium layer on a protective layer of the IC package substrate, which has good adherence ability to both the copper layer and the protective layer. Then, a CVD process is applied to deposit a copper layer on the medium layer to form the metal layer. A dry film is thereafter formed on the metal layer and several contact widows are opened therein. A metal pad and a bump are electroplated in the contact windows. Then remove the dry film, the bumps are protruded out of the substrate with a predetermined height to be solder bumps with an IC chip. By said method, an IC chip no longer needs to form bumps thereon anymore and to save cost and reduce pitch between bumps down to 150 &mgr;m. And package size is scaled for smaller IC chips and for smaller component dimension.Type: ApplicationFiled: February 28, 2001Publication date: May 23, 2002Inventor: Chu-Chin Hu
-
Patent number: 6391181Abstract: An article includes a colored electroplated metallic coating comprising both nickel and zinc, on an underplate of copper, brass, bright nickel or matt nickel, supported on a metallic or plastic substrate, various colors in the electroplated coating being exemplified. The electrolyte contains Ni2+, Zn2+, (NH4)+ and thiocyanate ions in specified concentrations, but no oxidative ion, color variation of the coating being achieved exclusively by variation of current density, time of the electroplating step and current quantity, provided that the current density at the cathode underplate is within the range of 0.01 to 0.5 A/dm2.Type: GrantFiled: August 31, 1999Date of Patent: May 21, 2002Assignee: Nickel Rainbow LimitedInventors: Larisa Gorodetski, Leonid Levinson
-
Patent number: 6387305Abstract: A method for producing a multiplicity of miniature cavities extending from a mold surface for molding a plastic product having features integrally molded with and extending from a product base, and a mold so produced. The mold cavities are formed by depositing multiple layers of plating material on a workpiece in a predetermined pattern selected to produce a desired mold cavity shape. The mold may be in the form of a roll or belt for continuous processing, or in any form for discrete injection molding. The invention is particularly applicable to the production of touch fastener products, such as those with arrays of miniature hooks.Type: GrantFiled: September 27, 2000Date of Patent: May 14, 2002Assignee: Velcro Industries B.V.Inventors: Stephen C. Jens, Andrew C. Harvey, Gilbert G. Fryklund, James W. Babineau
-
Publication number: 20020050459Abstract: An electronic device manufacturing method comprises forming an insulating film above a substrate, forming a to-be-filled region which includes at least one of an interconnection groove and a hole in the insulating film, forming a first conductive film containing a catalyst metal which accelerates electroless plating, so as to line an internal surface of the to-be-filled region, forming a second conductive film on the first conductive film by the electroless plating, so as to line the internal surface of the to-be-filled region via the first conductive film, and forming a third conductive film on the second conductive film by electroplating, so as to fill the to-be-filled region via the first conductive film and the second conductive film.Type: ApplicationFiled: November 1, 2001Publication date: May 2, 2002Applicant: Kabushiki Kaisha ToshibaInventors: Tetsuo Matsuda, Hiroshi Toyoda, Hisashi Kaneko
-
Patent number: 6370768Abstract: A circuit board is provided, wherein electroless plating to fill via-holes can be controlled uniformly with desirable reproducibility, and via-hole portions can be identified from the surface of the substrate after forming a second conductor thereon. The specific circuit board is obtained by applying a potential higher then the potential of the electroless plating to the conductor on the surface when filling the via-holes by electroless plating. In the circuit board, via-hole portions can be identified optically, because the via-hole portion differs from the second conductor in surface condition, such as when a dent is formed.Type: GrantFiled: July 16, 1998Date of Patent: April 16, 2002Assignee: Hitachi, Ltd.Inventor: Takeyuki Itabashi
-
Patent number: 6365030Abstract: A method of manufacturing R—Fe—B bonded magnets, capable of forming various corrosion resisting films on a R—Fe—B bonded magnet uniformly with a very high bonded strength so as to attain such a very high corrosion resistance thereof that prevents the bonded magnet from being rusted even in a long-period high-temperature high-humidity test; comprising barrel-polishing a porous R—Fe—B bonded magnet by a dry method using as media an abrasive stone formed by sintering inorganic powder of Al2O3, SiC, ZrO and MgO, or a mixture of an abrasive for metal balls and vegetable media, such as vegetable skin chips, sawdust, rind of a fruit and a core of corn, or a mixture of vegetable media the surfaces of which are modified by the above-mentioned abrasive and the above-mentioned inorganic pulverized bodies, so as to enable a surface of the magnet to be smoothed and sealed.Type: GrantFiled: May 10, 2000Date of Patent: April 2, 2002Assignee: Sumitomo Special Metals Co., Ltd.Inventors: Kohshi Yoshimura, Fumiaki Kikui, Takeshi Nishiuchi
-
Publication number: 20020036143Abstract: A method of electroless plating for processing a plating surface to form a barrier layer being capable of uniformly forming a barrier layer and reducing the consumption of a processing solution, comprising a step of feeding a processing solution used in at least one of the pre-processing steps of the electroless plating and the electroless plating step to the plating surface for puddling treatment, or, using a processing solution at least containing, with respect to one mole of a first metallic material supplying a main ingredient of the barrier layer, three or more moles of a completing agent and three or more moles of reducing agent and having a pH value adjusted to 9 or more and stored in an atmosphere of an inert gas or ammonia gas, and a corresponding electroless plating apparatus.Type: ApplicationFiled: April 9, 2001Publication date: March 28, 2002Inventors: Yuji Segawa, Akira Yoshio, Masatoshi Suzuki, Katsumi Watanabe, Shuzo Sato
-
Publication number: 20020023845Abstract: This invention relates to polyolefin alloys that are receptive to metal plating. These compositions also have enhanced properties and are easily processed into articles by various molding methods. The blends of the invention preferably include polyolefin homopolymers or copolymers, acrylonitrile-butadiene-styrene polymers, and a blend of at least one styrene monoolefin copolymer and at least one styrene diolefin copolymer. These blends have excellent platability and superior physical properties including enhanced rigidity, toughness, and dimensional stability.Type: ApplicationFiled: September 18, 2001Publication date: February 28, 2002Inventors: Ruidong Ding, Satchit Srinivasan, Scott Matteucci
-
Publication number: 20020008034Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent confirm copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: ApplicationFiled: December 7, 2000Publication date: January 24, 2002Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
-
Publication number: 20020004145Abstract: The invention relates to use of capture compounds such as a crown ether to facilitate selected compositions and processes employed in manufacture of electronic packaging devices such as printed circuit boards, semiconductor integrated circuit systems, multichip modules, lead frames and other interconnection devices, flat panel display substrates, and the like.Type: ApplicationFiled: May 8, 2001Publication date: January 10, 2002Applicant: Shipley Company, L.L.C.Inventors: Steven M. Florio, Gary S. Calabrese, Jeffrey Doubrava
-
Patent number: 6336962Abstract: The present invention describes a method of producing gold coating on a workpiece having a palladium surface, having the steps of: a) making an aqueous solution containing at least one compound selected from the group of compounds containing gold(I) and gold(III) ions and additionally at least one organic compound selected from the group consisting of formic acid, aromatic carboxylic acids having the chemical formula: where R1, . . . , R4=H, alkyl, alkenyl, alkynyl, OH, and the salts, esters or amides of these compounds; b) adjusting the pH of the solution to 1 to 6 using pH adjusting agents; and c) bringing the workpiece into contact with the solution such that gold coating is plated onto the palladium surface.Type: GrantFiled: July 7, 2000Date of Patent: January 8, 2002Assignee: Atotech Deutschland GmbHInventors: Petra Backus, Hartmut Mahlkow, Christian Wunderlich
-
Publication number: 20020000371Abstract: A substrate processing apparatus fills a metal such as copper or the like in fine interconnection patterns or trenches defined in a semiconductor substrate. The substrate processing apparatus has a loading/unloading unit for placing a substrate cassette to load and unload a substrate, a substrate treating unit for treating a substrate, and a transfer robot for transferring a substrate between the loading/unloading unit and the substrate treating unit. The loading/unloading unit, the substrate treating unit, and the transfer robot are installed in a single facility. The loading/unloading unit has a rotary table which is horizontally rotatable for positioning the substrate cassette in a position to detect the substrate cassette placed in the loading/unloading unit and to remove the substrate from the substrate cassette with the transfer robot.Type: ApplicationFiled: May 25, 2001Publication date: January 3, 2002Inventors: Koji Mishima, Junji Kunisawa, Natsuki Makino, Norio Kimura, Hiroaki Inoue, Kenji Nakamura, Moriji Matsumoto, Takahiro Nanjo, Mitsuko Odagaki
-
Publication number: 20010052467Abstract: The present invention relates to a method and apparatus of fabricating electromagnetic coil vanes. The method involves photolithographically exposing high resolution, dense wire patterns in a flash coat of copper, on both sides of a ceramic vane substrate. The substrate can be pre-drilled with a through hole to connect the two copper coil patterns. Additional copper is then deposited on both high resolution patterns and in the through hole by plating until the desired thickness is obtained. A firing operation is then performed that eutectically bonds the copper to the ceramic.Type: ApplicationFiled: December 23, 1999Publication date: December 20, 2001Inventor: DAVID J. PINCKNEY