Adhesive Or Autogenous Bonding Of Two Or More Self-sustaining Preforms Wherein At Least Two Of The Preforms Are Not Intended To Be Removed (e.g., Prefabricated Base, Etc.) Patents (Class 216/33)
  • Patent number: 6110393
    Abstract: A class of epoxy bond and stop etch (EBASE) microelectronic fabrication techniques is disclosed. The essence of such techniques is to grow circuit components on top of a stop etch layer grown on a first substrate. The first substrate and a host substrate are then bonded together so that the circuit components are attached to the host substrate by the bonding agent. The first substrate is then removed, e.g., by a chemical or physical etching process to which the stop etch layer is resistant. EBASE fabrication methods allow access to regions of a device structure which are usually blocked by the presence of a substrate, and are of particular utility in the fabrication of ultrafast electronic and optoelectronic devices and circuits.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: August 29, 2000
    Assignee: Sandia Corporation
    Inventors: Jerry A. Simmons, Mark V. Weckwerth, Wes E. Baca
  • Patent number: 6106736
    Abstract: A method of processing an assembly to prepare the assembly for etch patterning, the assembly including a row or bar mounted on a substrate, the row or bar bordered by a recess, the method including placing the assembly within a frame; applying a contiguous adhesive film across said assembly and said frame; depositing a fluid in said frame, said fluid forming in said recess; and removing said contiguous adhesive film.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: August 22, 2000
    Assignee: International Business Machines Corporation
    Inventors: Dien LeVan, Robert Dennis Miller, Adel Issa Nazzal, Andrew Chiuyan Ting
  • Patent number: 6103135
    Abstract: A method of forming a multi-layer laminate from a plurality of individual laminates comprised of copper clad on a polyimide.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: August 15, 2000
    Assignee: GA-TEK Inc.
    Inventors: Mark Kusner, Michael A. Centanni, Joseph A. Potkonicky, Jr.
  • Patent number: 6071426
    Abstract: Micromachining of bulk silicon utilizing the parallel etching characteristics of bulk silicon and integrating the parallel etch planes of silicon with silicon wafer bonding and impurity doping, enables the fabrication of on-chip optics with in situ aligned etched grooves for optical fibers, micro-lenses, photodiodes, and laser diodes. Other optical components that can be microfabricated and integrated include semi-transparent beam splitters, micro-optical scanners, pinholes, optical gratings, micro-optical filters, etc. Micromachining of bulk silicon utilizing the parallel etching characteristics thereof can be utilized to develop miniaturization of bio-instrumentation such as wavelength monitoring by fluorescence spectrometers, and other miniaturized optical systems such as Fabry-Perot interferometry for filtering of wavelengths, tunable cavity lasers, micro-holography modules, and wavelength splitters for optical communication systems.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: June 6, 2000
    Assignee: The Regents of the University of California
    Inventors: Abraham P. Lee, Michael D. Pocha, Charles F. McConaghy, Robert J. Deri
  • Patent number: 6045711
    Abstract: A vacuum seal suitable for use with field emission arrays is described. This seal has high reliability because the expansion coefficients of the metal and the glass are closely matched. Materials traditionally used for cathode and gate lines continue to be employed. To achieve this, a gap is introduced into each conductive line near the edges of the display. This gap is bridged by a material having an expansion coefficient that more closely matches that of the glass used for the seal and is the only material that contacts the seal. The bridge may be in the form of a deposited layer or it may be a discrete wire. A description of how the structure is manufactured is also provided.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: April 4, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Chun Wang, Chun-hui Tsai, Chih-Hao Tien
  • Patent number: 6042736
    Abstract: The present invention provides a method for preparing samples for microscopic examination that requires a glass slide to be laminated to a sample substrate by an adhesive layer for polishing in a sample polishing process. A cavity can be first formed in the surface of the substrate by a focused ion beam technique to reveal a characteristic feature which needs to be examined. A wax-based material is then used to fill the cavity and to protect the characteristic feature before an adhesive layer is applied on top of the substrate for bonding a glass slide to the substrate. After the sample is sectioned in the polishing process to reveal a new cross-section that contains the characteristic feature, the protective coating of the wax-based material can be removed by a suitable solvent such that the characteristic feature is ready for microscopic examination. A suitable wax-based material can be a wax that is similar to a candle wax which can be easily removed by acetone.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: March 28, 2000
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Lee Chung
  • Patent number: 6036872
    Abstract: A method for fabricating a wafer-pair having at least one recess in one wafer and the recess formed into a chamber with the attaching of the other wafer which has a port plugged with a deposited layer on its external surface. The deposition of the layer may be performed in a very low pressure environment, thus assuring the same kind of environment in the sealed chamber. The chamber may enclose at least one device such as a thermoelectric sensor, bolometer, emitter or other kind of device. The wafer-pair typically will have numerous chambers, with devices, respectively, and may be divided into a multiplicity of chips.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: March 14, 2000
    Assignee: Honeywell Inc.
    Inventors: R. Andrew Wood, Jeffrey A. Ridley, Robert E. Higashi
  • Patent number: 6033581
    Abstract: A process for producing an ink jet recording head comprising a silicon substrate having an ink discharge pressure generating element for discharging ink, a discharge opening from which an ink is discharged, provided above the silicon substrate, an ink flow path communicating with the discharge opening, an ink feed opening through which the ink is fed to the ink flow path, and a support for supporting the silicon substrate, and being able to discharge a plurality of different inks, the process comprises the steps of subjecting the silicon substrate to anisotropic etching to form the ink feed opening for each ink and to simultaneously form a groove around the ink feed opening of the silicon substrate, and bonding the silicon substrate to the support in such a state that a protrusion provided on the support at its part corresponding to the groove of the silicon substrate is fitted to the groove.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: March 7, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junichi Kobayashi
  • Patent number: 5989444
    Abstract: Fluid bearings, vacuum chucks and methods for producing these devices. One example of a method for forming a fluid bearing includes forming a plate having a face surface and a bonding surface, coupling a first side of a body to the bonding surface, placing the face surface of the plate against a predetermined surface, and generating a pressure difference to conform the face surface to the predetermined surface. One example of a fluid bearing of the invention includes a plate support and a flexible bearing plate having a bonding surface which is attached to the plate support with an adhesive which is flexible before hardening. The flexible bearing plate conforms to a predetermined surface during a portion of the time that the adhesive hardens. Examples of vacuum chucks, and methods for forming vacuum chucks, and other aspects of the invention are described.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: November 23, 1999
    Inventor: Marek Zywno
  • Patent number: 5985161
    Abstract: A method of forming a conductive network, having relatively flexible electrical conductor areas integral with relatively rigid electrically conductor areas including (a) providing a relatively rigid laminate having a dielectric lamina supporting, at least in part, a first electrically conductive lamina which is in electrically conductive intimate contact with a second electrically conductive lamina by way of an electrically conductive barrier layer, the first and second conductive laminae being of a material etchable by an etchant which is not an etchant for the barrier layer; (b) selectively etching desired portions of the aid second electrically conductive lamina to the barrier layer in at least the relatively flexible areas using the etchant; and (c) selectively etching desired exposed metallic portions of the laminate down to the dielectric lamina to form the conductive network using an etchant, the etchant chosen to etch both the conductive lamina and the barrier layer.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: November 16, 1999
    Assignee: Advanced Circuit Technology, Inc.
    Inventor: Davis W. Murphy
  • Patent number: 5972231
    Abstract: A method and apparatus for coupling high speed data components using imbedded PCB AC coupling capacitors is disclosed. The capacitor comprises a first and a second conductive plate of polygonal shape coupled to surrounding circuitry at the polygonal vertices of the polygonal plates. This configuration results in improved capacitor performance, particularly with respect to capacitive impedance and reflected waves for high bandwidth signals at the frequency ranges of interest.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: October 26, 1999
    Assignee: NCR Corporation
    Inventor: Joseph T. DiBene, II
  • Patent number: 5958694
    Abstract: The present invention is generally directed to microfluidic systems and methods of using such systems in the determination of the nucleotide sequence of target nucleic acid sequences (referred to herein as the "target"). In particular, the present invention provides methods and systems for determining the relative positions within a target nucleic acid sequence that are occupied by a given nucleotide, e.g., A, T, G or C, by separating mixtures of nested sets of fragments of the target nucleic acid, which sets each include fragments that terminate in a different given nucleotide.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: September 28, 1999
    Assignee: Caliper Technologies Corp.
    Inventor: Theo T. Nikiforov
  • Patent number: 5955818
    Abstract: Machine structures each comprising a stack of a plurality of micromachine layers laminated together are presented, along with fabrication methods therefore. Each machine structure includes a movable member(s) defined from microstructure of at least one layer of the plurality of micromachine layers comprising the stack. During fabrication, the micromachine layers are separately formed using VLSI techniques and then subsequently laminated together in a selected arrangement in the stack to define the machine structure.
    Type: Grant
    Filed: November 4, 1997
    Date of Patent: September 21, 1999
    Assignee: International Business Machines Corporation
    Inventors: Claude Louis Bertin, John Edward Cronin
  • Patent number: 5935452
    Abstract: A resin composition comprising (a) an epoxy resin having a number average molecular weight of 1200 or less, (b) a carboxylic acid-containing acrylic or acrylonitrile-butadiene rubber, (c) a curing agent for the epoxy resin, and (d) a curing accelerator is easily chemically etched and suitable as an insulating adhesive for producing multilayer printed circuit boards.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: August 10, 1999
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Teiichi Inada, Yoshiyuki Tsuru, Shin Takanezawa
  • Patent number: 5932113
    Abstract: A method for preparing the air bearing surface of a slider for etch patterning including the steps of applying a first thin film to a carrier, applying a second thin film to the carrier, the first thin film and the second thin film separated by a recess, each of the first and second thin films having respective first and second air bearing surfaces, applying an adhesive film over the first and second thin films, depositing a fluid in the recess, the fluid held in the recess by the adhesive film, curing the fluid, and removing the adhesive film. The method of the invention may also include coating the first and second air bearing surfaces with an etch mask, developing the etch mask, and patterning the first and second air bearing surfaces.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: August 3, 1999
    Assignee: International Business Machines Corporation
    Inventors: Bulent Nihat Kurdi, Dennis R. McKean, Eric Keith Wong
  • Patent number: 5922215
    Abstract: A method for making anode foil plates for use with layered electrolytic capacitors and capacitors made with such plates. A high purity aluminum foil is provided for generation of anode foil plates. Sheets of the foil are highly etched to provide a very high surface area. Following the etch process, the foil is partially cut or punched into plates from the etched sheets in the general shape of the finished capacitor housing with a portion remaining connected to the supporting foil. The supporting foil with the partially punched-out etched plates are subjected to a forming process by applying a voltage to the plates in the presence of an electrolyte to provide formed anode foil plates with edges which do not have to be reformed during capacitor aging and which do not have any particulates at cut edges. The formed anode plates are layered with cathode plates and separators in a capacitor housing with an electrolyte to provide a finished capacitor.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: July 13, 1999
    Assignee: Pacesetter, Inc.
    Inventors: Benjamin D. Pless, William H. Elias, Sam Parler, J. Scott McCall
  • Patent number: 5900692
    Abstract: An indirect cathode sleeve and manufacturing method thereof capable of substantially reducing electric power consumption of a heater disposed inside the cathode sleeve and simultaneously reducing a picture-producing time by oxidizing an inside surface of the cathode sleeve and reducing an outside surface thereof. The cathode sleeve includes a heater disposed inside the cathode sleeve; a base metal formed at the top of the cathode sleeve; an electron-emitting material layer formed at the outside surface of the base metal; and an indirect cathode sleeve including a black inside surface and a white outside surface.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: May 4, 1999
    Assignee: Goldstar Co., Ltd.
    Inventors: Gil Young Jung, Kyeong Sang Lee, Gong Seok Park, Byeong Doo Ko, Hun Gun Park
  • Patent number: 5900160
    Abstract: Improved methods of forming a patterned self-assembled monolayer on a surface and derivative articles are provided. According to one method, an elastomeric stamp is deformed during and/or prior to using the stamp to print a self-assembled molecular monolayer on a surface. According to another method, during monolayer printing the surface is contacted with a liquid that is immiscible with the molecular monolayer-forming species to effect controlled reactive spreading of the monolayer on the surface. Methods of printing self-assembled molecular monolayers on nonplanar surfaces and derivative articles are provided, as are methods of etching surfaces patterned with self-assembled monolayers, including methods of etching silicon. Optical elements including flexible diffraction gratings, mirrors, and lenses are provided, as are methods for forming optical devices and other articles using lithographic molding.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: May 4, 1999
    Assignee: President and fellows of Harvard College
    Inventors: George M. Whitesides, Younan Xia, James L. Wilbur, Rebecca J. Jackman, Enoch Kim, Mara G. Prentiss, Milan Mrksich, Amit Kumar, Christopher B. Gorman, Hans Biebuyck, Karl K. Berggren
  • Patent number: 5897338
    Abstract: Method for encapsulating an integrated semi-conductor circuit (die) comprising the following steps:a) mounting the semi-conductor circuit onto the surface of a so-called lead frame,b) attaching connecting wires between the contact surfaces of the semi-conductor circuit and selected parts of the lead frame (bonding operation),c) by means of a mould producing a plastic housing which at least encapsulates the semi-conductor circuit, the supporting surface, the bonding wires and part of the lead frame,d) the mould comprises an inwards extending section of which the end surface in the closed situation of the mould extends parallel to the free upper side of the integrated semi-conductor circuit at short distance thereof, ande) before closing the mould a layer of heat resistant deformable material in the form of a ring or a continuous layer is brought in between the upper side of the integrated semi-conductor circuit and said end surface of the inwards extending part, which layer not or hardly adheres to the plastic
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: April 27, 1999
    Assignee: European Semiconductor Assembly (Eurasem) B.V.
    Inventor: Peter Jacobus Kaldenberg
  • Patent number: 5885471
    Abstract: The present invention relates to accelerometer assemblies for implantable medical devices such as pacemakers, IPGs, PCDs, defibrillators, ICDs and the like. The accelerometer assembly of the present invention comprises a beam that deflects in response to being subjected to an externally provided force. Deflection of the beam generates a voltage in a piezoelectric material disposed in the assembly. At least one stop is provided to limit the vertical range of motion through which the beam may deflect to prevent failure, fracturing or breakage of the beam resulting from excessive deflection of the beam that might otherwise occur were the stop not present.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: March 23, 1999
    Assignee: Medtronic, Inc.
    Inventors: David A. Ruben, Mark E. Henschel, Larry R. Larson, Roy Inman, Louis A. Molinari, Joan A. O'Gara, Ronald F. Messer
  • Patent number: 5885469
    Abstract: An apparatus for retaining a workpiece and a method of fabricating same. The apparatus contains an electrostatic chuck having a workpiece support surface. The workpiece support surface has protruded regions and non-protruded regions, where a total surface area of the protruded regions is less than a total surface area of the non-protruded regions. The apparatus contains a pedestal having a surface that supports a flex circuit. The topography of the chuck is formed by either machining the surface of the pedestal prior to adhering and conforming the flex circuit to the surface or sculpting the surface of an electrode within the flex circuit.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: March 23, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Arnold Kholodenko, Alexander Veytser
  • Patent number: 5885470
    Abstract: Microfluidic devices are provided for the performance of chemical and biochemical analyses, syntheses and detection. The devices of the invention combine precise fluidic control systems with microfabricated polymeric substrates to provide accurate, low cost miniaturized analytical devices that have broad applications in the fields of chemistry, biochemistry, biotechnology, molecular biology and numerous other fields.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: March 23, 1999
    Assignee: Caliper Technologies Corporation
    Inventors: John Wallace Parce, Michael R. Knapp, Calvin Y. H. Chow, Luc Bousse
  • Patent number: 5883009
    Abstract: The chemoresistive gas sensor comprises a heating element integrated in a dedicated SOI substrate having an air gap in the intermediate oxide layer between two wafers of monocrystalline silicon. A sensitive element of tin oxide is formed over the heating element and separated from it by a dielectric insulating and protective layer. A trench formed at the end of the fabrication of the device, extends from the surface of the wafer in which the heating element is integrated, up to the air gap to mechanically separate and insulate the sensitive element from the rest of the chip, thereby improving the mechanical characteristics sensitivity and response of the sensor.
    Type: Grant
    Filed: July 30, 1997
    Date of Patent: March 16, 1999
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Flavio Villa, Paolo Ferrari, Benedetto Vigna
  • Patent number: 5871657
    Abstract: An improved process is provided for aligning and bonding channel and heater substrates together to form a thermal ink jet printhead. A thick film polyimide layer is formed over the heater substrate and is patterned to provide a plurality of tacking pits. The channel substrate has alignment holes formed in peripheral edge areas. A UV curable adhesive is deposited into the alignment hole and UV irradiated to produce a cured tacking column in the underlying pits formed in the thick film layer. Due to the sloping walls of the etched alignment recess, some portion of the adhesive is not fully cured and, during a subsequent curing process, tends to initiate a capillary flow along the interface between channel substrate and the thin film layer. This flow, in prior art designs, sometimes proceeds to the point where the adhesive is squeezed out onto electrode connections formed on an adjacent heater substrate.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: February 16, 1999
    Assignee: Xerox Corporation
    Inventor: Richard D. Nelson
  • Patent number: 5863445
    Abstract: The present invention in one embodiment provides a metal detector comprising a coil, a circuit board on which the coil is etched, a digital signal processor, and a warning circuit, and battery power source. When a sufficient amount of metal is near the coil, the digital signal processor activates a device or devices in the warning circuit. In another embodiment the circuit board on which the coil is placed is used in conjunction with a one piece molded housing. In another embodiment the present invention, provides a metal detector comprising an elongated coil etched onto an elongated circuit board. At least one active device, which is part of detection circuitry is also preferably placed on the elongated circuit board. The detection circuitry in one embodiment, includes circuitry which together with the elongated coil forms an oscillator circuit. The elongated covering case in one embodiment is molded substantially seamlessly by blowmold, extrusion, or injection mold.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: January 26, 1999
    Assignee: Control Screening L.L.C.
    Inventors: Karl E. Geisel, Andrew Biscamp, Brad Conway
  • Patent number: 5863446
    Abstract: A method for determining a fiducial misregistration of conductive layers of a laminated substrate by providing a plurality of alternatingly disposed dielectric layers and conductive layers. A predetermined area of resistive material is formed as part of at least one conductive layer. Each predetermined area of resistive material is formed at a same corresponding location in each respective conductive layer, and each predetermined area of resistive material has a first end and a second end. A through-via is formed and connected to each predetermined area of resistive material between the first and second ends of each respective predetermined area. A total resistance is determined between the first end and the second end of each predetermined area of resistive material. A first fractional resistance is determined between the first end of each predetermined area of resistive material and the through-via.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: January 26, 1999
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: David A. Hanson
  • Patent number: 5840201
    Abstract: Photoetchable glass is used to form spacer elements for large area field emission displays. Frit dots are placed onto a substrate. A sheet of photo etchable glass is exposed to UV light using a mask such that the UV light exposes the etchable areas and does not expose the areas which will form the spacers. The etchable glass is then heat treated to crystallize the UV exposed areas and to tailor the coefficient of thermal expansion. Next the glass is adhered to the frit coated substrate and the UV exposed areas etched away leaving spacers adhered to frit dots.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: November 24, 1998
    Assignee: Micron Display Technology, Inc.
    Inventor: Jason B. Elledge
  • Patent number: 5820771
    Abstract: An ink-jet printhead fabrication technique enables capillary channels for liquid ink to be formed with square or rectangular cross-sections. A sacrificial layer is placed over the main surface of a silicon chip, the sacrificial layer being patterned in the form of the void formed by the desired ink channels. A permanent layer, comprising a polybenzoxazole, is applied over the sacrificial layer. After polishing the two layers to form a uniform surface, the sacrificial layer is removed.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: October 13, 1998
    Assignee: Xerox Corporation
    Inventors: Cathie J. Burke, Mildred Calistri-Yeh
  • Patent number: 5820770
    Abstract: A method for pattern-etching thick alumina layers in the manufacture of thin film heads (TFH) by using compatible metallic mask layers and a wet chemical etchant. The deep alumina etching facilitates a studless TFH device where the coil and bonding pads are deposited and patterned simultaneously, and vias are later etched through the alumina overcoat layer to expose the bonding pads. The method also enables the etching of scribe-line grooves of street and alleys across the wafer for sawing and machining of sliders. These grooves eliminate most alumina chipping due to stress and damage introduced by the sawing and machining operations. Similarly, pattern-etching of the alumina undercoat facilitates the formation of precise craters for recessed structures. These can improve planarity and alleviate problems related to adverse topography and elevated features of TFH devices.
    Type: Grant
    Filed: July 13, 1995
    Date of Patent: October 13, 1998
    Assignee: Seagate Technology, Inc.
    Inventors: Uri Cohen, Gene Patrick Bonnie
  • Patent number: 5814235
    Abstract: Air cross grids, for absorbing scattered secondary radiation and improving X-ray imaging in general radiography and in mammography, are provided with a large plurality of open air passages extending through each grid panel. These passages are defined by two large pluralities of substantially parallel partition walls, respectively extending transverse to each other. Each grid panel is made by laminating a plurality of thin metal foil sheets photo-etched to create through openings defined by partition segments. The etched sheets are aligned and bonded to form the laminated grid panel, which is moved edgewise during the X-ray exposure to pass primary radiation through the air passages while absorbing scattered secondary radiation arriving along slanted paths.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: September 29, 1998
    Assignee: Thermo Trex Corporation
    Inventors: Anthony J. Pellegrino, Daniel N. Lyke, David P. Lieb, Joseph A. Buturlia, Michael P. Appleby
  • Patent number: 5804086
    Abstract: This process for producing a structure incorporating a substrate (2), a thin surface film (16) made from a non-conducting material joined to one face (1) of the substrate (2), said substrate (2) having cavities (10) flush with said face (1), comprises the following successive stages:etching cavities (10) in one face (1) of a substrate, the cavities having in the plane of the substrate face at least one dimension which is a function of the thickness of the surface film, in order to correctly secure the latter,joining a non-conducting material wafer (12) to the face (1) of the substrate (2),thinning the wafer (12) to obtain the thin surface film.
    Type: Grant
    Filed: August 1, 1996
    Date of Patent: September 8, 1998
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Michel Bruel
  • Patent number: 5800722
    Abstract: A multilayer printed wiring board wherein an inner-layer copper circuit is provided on one or both of the surfaces of an inner-layer substrate, and subsequent copper circuit is cumulatively provided through an insulating layer on the outside of the inner-layer copper circuit, characterized in that the inner-layer copper circuit has a cuprous oxide film formed on the surface thereof the insulating layer which remarkably facilitate the interlayer adhesion between the inner-layer copper circuit. This multilayer printed wiring board has high interlayer adhesiveness and moistureproofness without causing any haloing phenomena when soaked with an acidic solution.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: September 1, 1998
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Hiroaki Tsuyoshi, Tetsuro Sato
  • Patent number: 5798050
    Abstract: A process for fabrication of an electrically conductive adhesive film having a pattern of microscopic elongate metal particles which extend from one surface to the other to provide an interconnection between confronting conductive metal pads abutting the surface. The particles have sharp ends to penetrate the oxide coating on the conductive metal pads of an electronic module when force is applied to press the module against the film.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: August 25, 1998
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Jaynal A. Molla
  • Patent number: 5755978
    Abstract: Accelerometer and method in which parts such as the seismic mass and force sensors are all fabricated of a single material such as crystalline quartz and bonded together in a manner which reduces the possibility of creep between them. Damping plates and squeeze film gas damping dampen movement of the seismic mass, and the parts are oriented in a predetermined manner relative to the crystallographic axes of the wafers from which they are fabricated to control the character of breakaway tabs which hold the parts to the wafers during fabrication.
    Type: Grant
    Filed: December 5, 1996
    Date of Patent: May 26, 1998
    Assignee: BEI-Systron Donner
    Inventors: G. Richard Newell, Kenneth S. Lewallen, Scott D. Orlosky, Bert D. Egley
  • Patent number: 5753132
    Abstract: A process for fabricating an electrostatic chuck (20) comprising the steps of (c) forming a base (80) having an upper surface with cooling grooves (85) therein, the grooves sized and distributed for holding a coolant therein for cooling the base; and (d) pressure conforming an electrical insulator layer (45) to the grooves on the base by the steps of (i) placing the base into a pressure forming apparatus (25) and applying an electrical insulator layer over the grooves in the base; and (ii) applying a sufficiently high pressure onto the insulator layer to pressure conform the insulator layer to the grooves to form a substantially continuous layer of electrical insulator conformal to the grooves on the base.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: May 19, 1998
    Assignee: Applied Materials, Inc.
    Inventors: Shamouil Shamouilian, Sasson Somekh, Hyman J. Levinstein, Manoocher Birang, Semyon Sherstinsky, John F. Cameron
  • Patent number: 5738799
    Abstract: An ink-jet printhead fabrication technique enables capillary channels for liquid ink to be formed with square or rectangular cross-sections. A sacrificial layer is placed over the main surface of a silicon chip, the sacrificial layer being patterned in the form of the void formed by the desired ink channels. A permanent layer, comprising permanent material, is applied over the sacrificial layer, and, after polishing the two layers to form a uniform surface, the sacrificial layer is removed. Preferred materials for the sacrificial layer include polyimide while preferred materials for the permanent layer include polyarylene ether, although a variety of material combinations are possible.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: April 14, 1998
    Assignee: Xerox Corporation
    Inventors: William G. Hawkins, Cathie J. Burke, Mildred Calistri-Yeh, Diane Atkinson
  • Patent number: 5736061
    Abstract: A semiconductor sensor mount is formed as follows: through holes are formed that penetrate a glass plate; and then the glass plate having the through holes is dipped into hydrofluoric acid etchant to smooth the inner peripheral surfaces of the respective through holes. By etching the inner peripheral surfaces of the respective through holes after the through hole formation, minute roughness and cracks formed on the inner peripheral surfaces are removed, and thereby the areas for adsorbing gas are substantially reduced. That is, vacuums within the through holes can be maintained at a high degree during the anodic bonding, whereby undesirable electric discharge phenomena are prevented even if a relatively high voltage is applied during the anodic bonding. Accordingly, the yield of products can be improved while improving productivity.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: April 7, 1998
    Assignees: Nippondenso Co. Ltd., Iwaki Glass Co., Ltd.
    Inventors: Tsuyoshi Fukada, Yasutoshi Suzuki, Koushu Satoh, Hiroaki Kawashima
  • Patent number: 5733467
    Abstract: A conductive paste compound for via hole filling includes a conductive filler at 80 to 92 weight percent with an average particle size of from 0.5 to 20 .mu.m and specific surface of from 0.1 to 1.5 m.sup.2 / g, a liquid epoxy resin at 4.5 to 20 weight percent containing 2 or more epoxy groups with room temperature viscosity of 15 Pa.sec or less, and a hardener at 0.5 to 5 weight percent, wherein the viscosity is 2,000 Pa.sec or less and the volatile amount is 2.0 weight percent or less. A filling paste and a printed circuit board with use thereof are provided which can conduct an inner-via-hole connection between electrode layers without using a through-hole plating technique. The conductive paste comprises a metallic particle such as copper, an epoxy resin, a hardener, and if necessary, a dispersant. The paste having low viscosity and low volatility under high shear is used to fill holes disposed in a laminated substrate.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: March 31, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouji Kawakita, Seiichi Nakatani, Tatsuo Ogawa, Masatoshi Suehiro, Kouichi Iwaisako, Hideo Akiyama
  • Patent number: 5730889
    Abstract: A method of fabricating an ink jet recording head includes forming a photosensitive resin layer on a substrate having formed thereon an energy generation device for generating energy for ejecting recording droplets; pattern-wise exposing the photosensitive resin layer to an active radiation to a portion of the photosensitive resin layer where formation of a pattern of an ink fluid path is desired; laminating a top plate on the photosensitive resin layer; and eluting the pattern exposed portion of the photosensitive resin layer to form a pattern of an ink fluid path.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: March 24, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masashi Miyagawa, Norio Ohkuma, Genji Inada
  • Patent number: 5723053
    Abstract: An ink jet printer head includes a spacer including pressure generating chambers continuous to nozzle openings, ink supply paths, and reservoirs, a cover member for covering the pressure generating chambers in a sealing fashion, and pressure generating means for generating pressure in the pressure generating chambers in accordance with print data. In processing a silicon single-crystal substrate vertically oriented in (110) by anisotropic etching process, one of the walls of a path hole for forming a pressure generating chamber is aligned with one of the walls of a path hole for forming a reservoir. Walls defining the path hole for forming a pressure generating chamber, which are located in the vicinity of a nozzle opening, are connected to each other at an obtuse angle. As a result, the ink supply path serving as a narrow path for ink flow and the pressure generating chamber are formed as smooth flow paths.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: March 3, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Kaoru Momose, Takahiro Katakura, Kazumi Kamoi, Kazunaga Suzuki, Takahiro Naka, Kazuhiko Miura, Tatsuo Furuta, Shinri Sakai
  • Patent number: 5716533
    Abstract: A method of fabricating ink jet printheads from channel plates with a low stress integral ink inlet filters and heater plates. The channel plates are obtained from p-type (100) silicon wafers, one surface of which has a lightly doped n-type patterned layer in the form of a screen. In the preferred embodiment, a first etch resistant material is deposited on both surfaces of the wafer and patterned on the surface of wafer opposite the one containing the n-type layer. The patterned first etch resistant material provides a first etch mask with channel and reservoir vias. A second etch resistant material is deposited over the first etch resistant material and patterned on the same wafer surface as the first etch resistant material in order to provide a second etch mask having reservoir vias smaller than the reservoir vias in the first etch mask, but aligned therewithin.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: February 10, 1998
    Assignee: Xerox Corporation
    Inventors: James F. O'Neill, Eric Peeters
  • Patent number: 5714078
    Abstract: An edge-shooter ink-jet print head has a row of nozzles extending in the z-direction on the edge of a head module. The print head includes members into which chambers are formed which, in turn, are equipped with devices for ejecting ink from each chamber to respectively assigned ink nozzles. The ink jets are expelled in the x-direction. The print head comprises a plurality of plates stacked in the y-direction. The ink paths are of equal length at least within each module. In a prefered embodiment, the row of nozzles is formed in an additional part which is also a chamber carrying part. After the production of various module plates by parallel processing of a glass plate, including the formation of cavities of a defined depth by etching and fine grinding, the parts are separated and then joined to form a module. Conductor tracks and PZT elements are provided. The modules can be interconnected with an adhesive layer as part of an assembly process.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: February 3, 1998
    Assignee: Francotyp Postalia GmbH
    Inventor: Wolfgang Thiel
  • Patent number: 5705018
    Abstract: A micromachined pump including a channel formed in a semiconductor substrate by conventional processes such as chemical etching. A number of insulating barriers are established in the substrate parallel to one another and transverse to the channel. The barriers separate a series of electrically conductive strips. An overlying flexible conductive membrane is applied over the channel and conductive strips with an insulating layer separating the conductive strips from the conductive membrane. Application of a sequential voltage to the series of strips pulls the membrane into the channel portion of each successive strip to achieve a pumping action. A particularly desirable arrangement employs a micromachined push-pull dual channel cavity employing two substrates with a single membrane sandwiched between them.
    Type: Grant
    Filed: December 13, 1995
    Date of Patent: January 6, 1998
    Inventor: Frank T. Hartley
  • Patent number: 5705079
    Abstract: Photoetchable glass is used to form spacer elements for large area field emission displays. Frit dots are placed onto a substrate. A sheet of photo etchable glass is exposed to UV light using a mask such that the UV light exposes the etchable areas and does not expose the areas which will form the spacers. The etchable glass is then heat treated to crystallize the UV exposed areas and to tailor the coefficient of thermal expansion. Next the glass is adhered to the frit coated substrate and the UV exposed areas etched away leaving spacers adhered to frit dots.
    Type: Grant
    Filed: January 19, 1996
    Date of Patent: January 6, 1998
    Assignee: Micron Display Technology, Inc.
    Inventor: Jason B. Elledge
  • Patent number: 5702584
    Abstract: A polymer substrate is plated with a metal, using metallic filler particles in the polymer as anchorage points for a layer of metal formed by an electroless plating operation. The polymer has a filler that includes non-metallic filler particles and metallic filler particles; the non-metallic filler particles contiguous to the polymer surface can be etched away, so as to expose metallic filler particles proximate to the etched surfaces. The exposed metallic filler particles serve as anchorage points for the electroless plate layer.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: December 30, 1997
    Assignee: Ford Motor Company
    Inventors: Lakhi N. Goenka, Michael G. Todd, Andrew Z. Glovatsky
  • Patent number: 5702619
    Abstract: A method of fabricating a high pressure piezoresistive pressure transducer having a substantially linear pressure versus stress output over its full range of operation. The method involves bonding a carrier wafer having a dielectric isolating layer on one surface and a supporting member on the opposite surface, to a pattern wafer containing at least two single crystalline longitudinal piezoresistive sensing elements of a second conductivity. Both the pattern wafer and sections of the carrier wafer are etched leaving the piezoresistive sensing elements bonded directly to the dielectric isolating layer, and a diaphragm member having a deflecting portion and a non-deflecting portion. The diaphragm member is constructed to have an aspect ratio which is of the order of magnitude of one.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: December 30, 1997
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Anthony D. Kurtz, Andrew V. Bemis, Timothy A. Nunn, Alexander A. Ned
  • Patent number: 5700382
    Abstract: A method for fabricating a silicon semiconductor substrate having an optical fiber coupled to an integrated waveguide by anisotropically etching a V-shaped groove aligned with the integrated waveguide into the substrate. The integrated waveguide is provided with a freely accessible end surface situated opposite the end of the V-shaped groove. The freely accessible end surface is formed by first producing a recess in the silicon semiconductor substrate. The recess is made by anisotropically etching a piece of the substrate from the surface opposite the surface bearing said V-shaped groove. The piece is bared down to a region surrounding said integrated waveguide but the piece remains connected to the waveguide by a V-shaped notch. Then pressure is exerted on the piece, causing it to break off at the V-shaped notch, thus forming the freely accessible end surface of the waveguide as a fracture surface. An optical fiber is inserted into the V-shaped groove and extended up to the freely accessible end surface.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: December 23, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventor: Armin Splett
  • Patent number: 5693237
    Abstract: The invention pertains to a process for producing integrated active-matrix liquid crystal displays with a checkered silicon die subdivided into picture elements. Each picture element consists of a light-controlling element and an integrated, driving electronic switching element (20) which drives the translucent electrode (16) of the picture element. The array of picture elements is covered with glass layers (6, 12) with polarizing and analyzing layers on their outer faces. The invention in characterized in that the switching elements are integrated into a transparent silicon layer in which optic windows for the lighting-controlling elements are integrated. This is done by etching out a cavity in the rear side of the silicon die in the region of the liquid crystal display, leaving a thin layer of silicon or no silicon at all in the region of the optic window. On the thicker frame (10) of the silicon die there is a drive circuit.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: December 2, 1997
    Assignee: Daimler-Benz Aktiengesellschaft
    Inventor: Alexander Bodensohn
  • Patent number: 5690839
    Abstract: A method for forming an array of thin film actuated mirrors for use in an optical projection system comprises the steps of: (a) providing a base; (b) depositing a separation layer on top of the base; (c) forming a first an electrodisplacive, a second, an elastic and a sacrificial layers successively on top of the separation layer; (d) forming an array of M.times.N supporting members, each thereof having a conduit; (e) patterning to form an array of multilayered actuated mirror structures; (f) attaching an active matrix included therein an array of transistors to the array of multilayered actuated mirror structures; (g) separating the base to form said array of thin film actuated mirrors. In the inventive method, the heat treatment of the electrodisplacive layer is carried out prior to the attaching of the active matrix, thereby preventing the transistors from being degraded by the heat.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: November 25, 1997
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Yong-Ki Min
  • Patent number: 5688408
    Abstract: A process for forming a multilayer printed wiring board comprising integrally laminating a plurality of insulating circuit boards having circuits formed on insulating substrates and interlaminar insulating layers sandwiched between adjacent insulating circuit boards, and forming via holes for making electrical connection between two or more layers of circuits. Where the difference between the glass transition point of an interlaminar insulating layer and that of the adjoining insulating substrate is not greater than 60.degree. C., proof against exfoliation due to heat history of the board and high reliability of insulation and through-hole connection is achieved. The interlaminar insulating layers desirably are B-staged and have a B-stage resin flow of less than 1%.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: November 18, 1997
    Assignee: Hitachi Chemical Company Ltd.
    Inventors: Yoshiyuki Tsuru, Shigeharu Arike, Takashi Sugiyama, Shinjirou Miyashita, Takayuki Suzuki