Abstract: A substrate processing method includes a preprocessing forming step of forming a preprocessing film on a surface of a substrate having the surface on which a first region and a second region in which different substances are exposed are present, a preprocessing film separating step of separating the preprocessing film from the surface of the substrate with a stripping liquid, a processing film forming step of forming a processing film on the surface of the substrate after the preprocessing film separating step, and a processing film separating step of separating the processing film from the surface of the substrate with the stripping liquid.

Abstract: Systems and methods for additively manufacturing or repairing a component from a base material. The system may include an inoculation source to direct inoculation materials and a laser metal deposition (LMD) system to direct laser energy during laser processing of additive materials deposited in a melt pool on the base material. The LMD system includes a laser energy source configured to direct laser energy towards the base material and inoculation materials to form the melt pool thereon and to process the deposited additive materials and inoculation materials to form layers on the base material upon solidification.

Abstract: A recessed portion in a semiconductor substrate and a method of forming the same are provided. The method comprises: forming a mask on the semiconductor substrate; forming a protection layer on a top surface of the mask and on at least one sidewall of the mask, and on at least one surface of the semiconductor substrate exposed by the mask; performing a first etching process to remove the protection layer on the top surface of the mask and on a bottom surface of the semiconductor substrate exposed by the mask; and performing a second etching process to remove the remaining protection layer and to etch the semiconductor substrate to form the recessed portion. In this way, a recessed portion with relatively smooth and vertical sidewalls can be realized.

Abstract: An element substrate used in a liquid discharge head that discharges liquid to a recording material includes a substrate, an energy generating element that generates energy used to discharge the liquid, circuit wiring that has an electrode portion for external electrical connection and that drives the energy generating element, and that is implemented on the substrate, a first protective film layer that has an opening portion for exposing the electrode portion and that covers the circuit wiring, an electroplating ground layer formed on the electrode portion, and an electroplated bump layer made of a metal material formed on the electroplating ground layer. A bent portion is formed in the first protective film layer by the first protective film layer covering a protruding portion that the circuit wiring has. A second protective film layer is formed on the first protective film layer and covers the bent portion.

Abstract: Methods for evaluating synergy of modification and removal operations for a wide variety of materials to determine process conditions for self-limiting etching by atomic layer etching are provided herein. Methods include determining the surface binding energy of the material, selecting a modification gas for the material where process conditions for modifying a surface of the material generate energy less than the modification energy and greater than the desorption energy, selecting a removal gas where process conditions for removing the modified surface generate energy greater than the desorption energy to remove the modified surface but less than the surface binding energy of the material to prevent sputtering, and calculating synergy to maximize the process window for atomic layer etching.

Abstract: A substrate is provided with a patterned layer, for example, a photo resist layer, which may exhibit line roughness. In one exemplary embodiment, the patterned layer may be an extreme ultraviolet (EUV) photo resist layer. In one method, selective deposition of additional material is provided on the EUV photo resist layer after patterning to provide improved roughness and lithographic structure height to allow for more process margin when transferring the pattern to a layer underlying the photo resist. The additional material is deposited selectively thicker in areas above the photo resist than in areas where the photo resist is not present, such as exposed areas between the photo resist pattern. Pattern transfer to a layer underlying the photo resist may then occur (for example via an etch) while the patterned photo resist and additional material above the photo resist may collectively operate as an etch mask.

Abstract: There is provided a technique that includes forming a film on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a precursor gas to the substrate in a process container of a substrate processing apparatus via a first pipe made of metal; (b) supplying an oxygen-containing gas to the substrate in the process container via a second pipe made of metal, wherein a fluorine-containing layer is continuously formed on an inner surface of the second pipe; and (c) supplying a nitrogen-and-hydrogen-containing gas to the substrate in the process container via the second pipe.

Abstract: Apparatus, systems, and methods for conducting a silicon containing material removal process on a workpiece are provided. In one example implementation, the method can include generating species from a process gas in a first chamber using an inductive coupling element. The method can include introducing a fluorine containing gas with the species to create a mixture. The mixture can include exposing a silicon structure of the workpiece to the mixture to remove at least a portion of the silicon structure.

Abstract: A technique improves pattern features formed by etching and the uniformity of the features across the surface of a substrate. An etching method includes steps a), b), c), d), and e). Step a) includes placing, on a support, a substrate including a target film. Step b) includes partially etching the target film and forming a recess. Step c) includes setting the temperature of the support at a first temperature, and forming, on a sidewall of the recess, a first film having a first film thickness distribution. Step d) includes partially further etching the target film having the first film formed on the target film. Step e) includes setting the temperature of the support at a second temperature different from the first temperature, and forming, on the sidewall of the recess, a second film having a second film thickness distribution different from the first film thickness distribution.

Abstract: A plasma processing apparatus according to the present invention includes a processing chamber, a first radio frequency power source, and a second radio frequency power source. The first radio frequency power source supplies radio frequency power to generate the plasma. The second radio frequency power source applies a first radio frequency voltage to a sample stage. The plasma processing apparatus further includes a third radio frequency power source and a controller. The third radio frequency power source applies, to the sample stage, a second radio frequency voltage having a frequency which is N times a frequency of the first radio frequency voltage in a case where N is a natural number of 2 or more. The controller controls a phase difference such that the phase difference between a phase of the first radio frequency voltage and a phase of the second radio frequency voltage reaches a predetermined value.

Abstract: The present application discloses a method for preparing a TEM sample, including the following steps: step 1: providing a thin-film pre-sample with undesirable voids; step 2: performing a first cutting with a first FIB to form the TEM sample located in the target region of the thin-film pre-sample. The first thickness is reached after the first cutting. The voids are exposed from the front surface or the back surface of the TEM sample after the first cutting; step 3: depositing a first material layer by an ALD process to fill the voids in the TEM sample; step 4: performing the second cutting with a second FIB to form the target thickness of the TEM sample in the target region of the thin-film pre-sample. The present application can reduce or eliminate ion beam cutting marks related to the voids in the thin-film pre-sample.

Abstract: Disclosed is an array substrate. The array substrate includes a display area and a terminal area defined at an edge of the display area; a plurality of thin film transistors are arranged in the display area, and a plurality of driving terminals are arranged at intervals in the terminal area; the driving terminals are electrically connected to the thin film transistors; an insulated film is arranged above an interval area of the driving terminals, to shield the interval area.

Abstract: A plasma processing method executed by a plasma processing apparatus includes steps of an opening formation, a first film formation, a second film formation, and an etching. In the opening formation, the plasma processing apparatus performs etching on a substrate including a base layer and a first layer formed on the base layer so as to form an opening in the first layer. When determined that the opening satisfies a predetermined condition, in the first film formation, the plasma processing apparatus forms an inhibitor on a bottom surface of the opening so as to form a first film to which a predetermined gas species is not adsorbed. After the formation of the first film, the plasma processing apparatus forms a second film on the side wall of the opening in the second film formation. The plasma processing apparatus also performs etching in the opening in the etching.

Abstract: A plasma processing method includes providing a first source power (SP) pulse to an SP coupling element for a first SP pulse duration to generate plasma in a processing chamber, providing a high frequency bias power (HBP) pulse to a substrate holder disposed in the processing chamber for a HBP pulse duration overlapping the first SP pulse duration, and providing a first low frequency bias power (LBP) pulse to the substrate holder for a first LBP pulse duration not overlapping the first SP pulse duration. The HBP pulse includes an HBP pulse frequency that is greater than 800 kHz. The first LBP pulse includes an LBP pulse frequency that is less than about 800 kHz.

Abstract: A substrate treatment apparatus for applying a coating solution to a front surface of a substrate and developing an exposed coating film on the front surface of the substrate, includes a film forming unit configured to form a friction reducing film on a rear surface of the substrate before exposure processing, the friction reducing film reducing friction between the rear surface of the substrate and a holding surface for holding the rear surface of the substrate in the exposure processing.

Abstract: A method of fabricating a semiconductor device includes forming a structure including multiple nanowires vertically stacked above a substrate; depositing a dielectric material layer wrapping around the nanowires; performing a treatment process to a surface portion of the dielectric material layer; selectively etching the surface portion of the dielectric material layer; repeating the steps of performing the treatment process and selectively etching until the nanowires are partially exposed; and forming a gate structure engaging the nanowires.

Abstract: A method of forming a nanopore that includes forming a pore geometry hard mask on a semiconductor substrate; and oxidizing the semiconductor substrate to form an oxide layer on exposed surfaces of the semiconductor substrate. An apex portion of the oxide layer extends beneath an edge of the pore geometry hard mask. The pore geometry hard mask is removed, and the semiconductor substrate is etched with an etch that is selective to the oxide layer to provide the nanopore. The opening of the nanopore has a diameter defined by the apex portion of the oxide layer.

Abstract: A method of depositing a material on one of two, but not both, sidewalls of a raised structure formed on a substrate includes tilting a normal of the substrate away from a source of the deposition material or tilting the source of the deposition material away from the normal of the substrate. The method may be implemented by a plasma-enhanced chemical vapor deposition (PECVD) technique.

Abstract: A process flow for shrinking a critical dimension (CD) in photoresist features and reducing CD non-uniformity across a wafer is disclosed. A photoresist pattern is treated with halogen plasma to form a passivation layer with thickness (t1) on feature sidewalls, and thickness (t2) on the photoresist top surface where t2>t1. Thereafter, an etch based on O2, or O2 with a fluorocarbon or halogen removes the passivation layer and shrinks the CD. The passivation layer slows the etch such that photoresist thickness is maintained while CD shrinks to a greater extent for features having a width (d1) than on features having width (d2) where d1>d2. Accordingly, CD non-uniformity is reduced from 2.3% to 1% when d2 is 70 nm and is shrunk to 44 nm after the aforementioned etch. After a second etch through a MTJ stack to form MTJ cells, CD non-uniformity is maintained at 1%.

Abstract: A method includes forming hard mask patterns by depositing a support mask layer, a polycrystalline silicon layer, and a hard mask layer on a substrate and etching the hard mask layer, forming pre-polycrystalline silicon patterns by etching the polycrystalline silicon layer using the hard mask patterns as an etch mask, oxidizing side surfaces of the pre-polycrystalline silicon patterns to form polycrystalline silicon patterns and a silicon oxide layer, forming spacer patterns covering sides of the silicon oxide layer, forming a sacrificial layer on a top surface of the support mask layer to cover the silicon oxide layer and the spacer patterns, etching the sacrificial layer and the silicon oxide layer, forming support mask patterns by etching the support mask layer using the polycrystalline silicon patterns and the spacer patterns as an etch mask, and forming activation pins by etching the substrate using the support mask patterns as an etch mask.

Abstract: In a plasma etching method, a deposit containing an element forming an upper electrode is deposited on a metal-containing mask having a predetermined pattern while sputtering the upper electrode by a plasma of a first processing gas. Then, an etching target film is etched by a plasma of a second processing gas while using the metal-containing mask on which the deposit is deposited as a mask.

Abstract: Provided is a method for forming an epitaxial layer at a low temperature. The method for forming the epitaxial layer includes transferring a substrate into an epitaxial chamber and performing an epitaxial process on the substrate to form an epitaxial layer on the substrate. The epitaxial process includes heating the substrate at a temperature of about 700° C. or less and injecting a silicon gas into the epitaxial chamber in a state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a first epitaxial layer, stopping the injection of the silicon gas and injecting a purge gas into the epitaxial chamber to perform first purge inside the epitaxial chamber, heating the substrate at a temperature of about 700° C.

Abstract: There is disclosed a method for cleaning a component of a plasma processing apparatus which is disposed in an inner space defined by a processing chamber of the plasma processing apparatus. The cleaning method comprises: forming a film on the surface of the component, wherein a compound forming the film is generated by polymerization of a first compound contained in a first gas and a second compound contained in a second gas, the first compound being isocyanate and the second compound being amine or a compound having a hydroxyl group; transferring the component from the processing chamber to a heating chamber after substrate treatment is performed in the inner space; and heating the component so that depolymerization of the compound forming the film occurs.

Abstract: A method includes performing an atomic layer deposition (ALD) process to deposit a dielectric material over a substrate, curing the deposited dielectric material using an ultra violet (UV) light, and annealing the deposited dielectric material after the curing.

Abstract: Processing methods may be performed to remove unwanted materials from a substrate, such as an oxide footing. The methods may include forming an inert plasma within a processing region of a processing chamber. Effluents of the inert plasma may be utilized to modify a surface of an exposed material on a semiconductor substrate within the processing region of the semiconductor chamber. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified surface of the exposed material from the semiconductor substrate.

Abstract: The present invention relates to a method for selectively etching a silicon oxide film in a semiconductor manufacturing process and comprises: a step of introducing a substrate having a silicon nitride film and a silicon oxide film to a substrate support part inside a reactor; a step of heating the substrate introduced into the reactor, so as to maintain a first temperature; a first step of supplying halogen gas and basic gas to the inside of the reactor, while the first temperature is maintained, so as to be reacted with the silicon oxide film formed on the substrate, thereby forming a reaction product on the substrate; a second step of heating the substrate, having the reaction product, up to a second temperature so as to remove the reaction product; a third step of cooling the temperature of the substrate down to the first temperature; and a step of repetitively performing the first step to the third step a preset number of times.

Abstract: Exemplary etching methods may include flowing a fluorine-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a hydrogen-containing precursor into the substrate processing region. The methods may include contacting a substrate housed in the substrate processing region with the fluorine-containing precursor and the hydrogen-containing precursor. The substrate may include a trench or recessed feature, and a spacer may be formed along a sidewall of the trench or feature. The spacer may include a plurality of layers including a first layer of a carbon-containing or nitrogen-containing material, a second layer of an oxygen-containing material, and a third layer of a carbon-containing or nitrogen-containing material. The second layer of the spacer may be disposed between the first layer and third layer of the spacer. The methods may also include removing the oxygen-containing material.

Abstract: Methods for evaluating synergy of modification and removal operations for a wide variety of materials to determine process conditions for self-limiting etching by atomic layer etching are provided herein. Methods include determining the surface binding energy of the material, selecting a modification gas for the material where process conditions for modifying a surface of the material generate energy less than the modification energy and greater than the desorption energy, selecting a removal gas where process conditions for removing the modified surface generate energy greater than the desorption energy to remove the modified surface but less than the surface binding energy of the material to prevent sputtering, and calculating synergy to maximize the process window for atomic layer etching.

Abstract: Yield of products of increased purity from a fluidized bed reactor where silicon is produced or consumed is enhanced by purging with inert gas, purging with hydrogen gas, and purging with a chlorosilane-containing gas. The purging with hydrogen is conducted at an elevated temperature.

Abstract: The present disclosure provides semiconductor devices with asymmetric source/drain structures. In one example, a semiconductor device includes a first group of source/drain structures on a first group of fin structures on a substrate, a second group of source/drain structures on a second group of fin structures on the substrate, and a first gate structure and a second gate structure over the first and the second group of fin structures, respectively, the first and second groups of source/drain structures being proximate the first and second gate structures, respectively, wherein the first group of source/drain structures on the first group of fin structures has a first source/drain structure having a first vertical height different from a second vertical height of a second source/drain structure of the second group of source/drain structures on the second group of fin structures.

Abstract: A method for automatically performing power matching using a mechanical RF match during substrate processing is provided. The method includes providing a plurality of parameters for the substrate processing wherein the plurality of parameters including at least a predefined number of learning cycles. The method also includes setting the mechanical RF match to operate in a mechanical tuning mode. The method further includes providing a first set of instructions to the substrate processing to ignore a predefined number of cycles of Rapid Alternating Process RAP steps. The method yet also includes operating the mechanical RF match in the mechanical tuning mode for the predefined number of learning cycles. The method yet further includes determining a set of optimal capacitor values. The method moreover includes providing a second set of instructions to a power generator to operate in a frequency tuning mode.

Abstract: In a method of an embodiment, radicals, which are generated from a processing gas, is adsorbed to a layer to be etched without applying a high-frequency bias to a lower electrode, in an adsorption step. In the subsequent etching step, ions, which are generated from the processing gas, are drawn into the layer to be etched by applying a high-frequency bias to the lower electrode. The adsorption step and the etching step are alternately repeated. In the adsorption step, a density of radicals is 200 or greater times a density of ions. In the etching step, RF energy having a power density of 0.07 W/cm2 or less is supplied to the lower electrode or a high-frequency bias having a power density of 0.14 W/cm2 or less is supplied to the lower electrode for a period of 0.5 seconds or less.

Abstract: Method and system for enhanced charged particle beam processes for carbon removal. With the method and system for enhancing carbon removal, associated method and system for decreasing levels of carbon impurity in depositions, also using a precursor gas in charged particle beam processes (and particularly focused ion beam methodologies), are provided. In a preferred embodiment, the precursor gas comprises methyl nitroacetate. In alternative embodiments, the precursor gas is methyl acetate, ethyl acetate, ethyl nitroacetate, propyl acetate, propyl nitroacetate, nitro ethyl acetate, methyl methoxyacetate, or methoxy acetylchloride.

Abstract: First, an ion beam is applied to a workpiece to form a tapered hole the side wall of which is inclined. Next, the application of the ion beam is stopped, and then a material gas is introduced from the gas source to the upper surface of the workpiece from an oblique direction to cause gas molecules to be adsorbed to the upper surface of the workpiece and to the upper portion of the side wall of the hole. Next, introduction of the material gas is stopped, and then the ion beam is applied again to the region of the workpiece where the hole is formed. As a result, at the upper portion of the side wall of the hole, film formation occurs using the gas molecules as the material adsorbed to the side wall of the hole, and, at the bottom portion of the hole, etching of the workpiece occurs.

Abstract: A fluidized bed reactor includes a gas distributor, a tapered section above the gas distributor, and an expanded head above the tapered section. The gas distributor defines a plurality of inlets surrounding a product withdrawal tube, which extends away from the fluidized bed reactor. The fluidized bed reactor is useful in a process for fluidizing relatively large particles, such as Geldart Group B particles and/or Geldart Group D particles, where said particles are in a bubbling fluidized bed residing, in whole or in part, in the tapered section. The fluidized bed reactor and process may be used for manufacturing polycrystalline silicon.

Abstract: In a method, an aluminum body is chemically treated with at least one of an alkaline solution and an acid solution. Anode-oxidization is performed on the chemically treated aluminum body to form an aluminum oxide layer. The aluminum oxide layer is treated with hot water at a temperature more than 75° C. or steam. The aluminum oxide layer after being treated with hot water or steam includes plural columnar grains, and an average width of the columnar grains is in a range from 10 nm to 100 nm.

Abstract: The invention relates to the use of thionyl chloride and related materials for dry etching of internal surfaces of metalorganic vapor phase epitaxy (MOVPE) reactors to remove deposits. The method is also useful for the dry etching of process substrates within such reactors for cleaning and processing of those substrates. The invention may be particularly adaptable to chemical vapor deposition reactors used in the manufacture of high brightness LED's based on III-V semiconductors such as GaN and related materials. Features of the process include thermal, UV, and plasma activated dry cleaning, and the use of etchant gases such as COCl2, COBr2, COl2, SOl2, SOCl2, SOBr2, SO2Cl2, SO2Br2, NOCI, NOBr, NOl, S2Cl2, S2Br2, SCI2, SBr2, SOClBr, SOClF and SOFBr, either formed from neat materials or combinations of constituent gases such as CO, SO, SO2 or NO with halogens, to achieve the desired effect.

Abstract: The invention concerns a method of forming a graphene layer involving: heating a support layer in a reaction chamber; and forming the graphene layer on a surface of the support layer by: a) during a first time period, introducing into the reaction chamber an organic compound gas to cause a formation of carbon atoms on the surface; b) during a second time period after the first time period, reducing a rate of introduction of the organic compound gas into the reaction chamber and introducing into the reaction chamber a further gas, wherein the further gas is a carbon etching gas; and repeating a) and b) one or more times.

Abstract: Methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate are provided. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective film on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective film may be deposited under different conditions (e.g., pressure, duration of reactant delivery, duration of plasma exposure, RF power, and/or RF duty cycle, etc.) in different deposition operations. Such conditions may affect the degree of conformality at which the protective film forms. In various embodiments, one or more protective films may be sub-conformal. In these or other embodiments, one or more other protective films may be conformal.

Abstract: Embodiments of the present technology may include a method of etching. The method may include flowing a gas through a plasma to form plasma effluents. The method may also include reacting plasma effluents with a first layer defining a first feature. The first feature may include a first sidewall, a second sidewall, and a bottom. The first sidewall, the second sidewall, and the bottom may include the first layer. The first layer may be characterized by a first thickness on the sidewall. The method may further include forming a second layer from the reaction of the plasma effluents with the first layer. The first layer may be replaced by the second layer. The second layer may be characterized by a second thickness. The second thickness may be greater than or equal to the first thickness. The method may also include removing the second layer to expose a third layer.

Abstract: A substrate processing method of the present disclosure includes forming a film on a workpiece using a processing gas in a processing chamber with a setting temperature profile including increase or decrease of a temperature; and etching the film. An etching rate of the film in the etching depends on a film formation temperature in the forming. The setting temperature profile is determined based on a first temperature dependence of the etching rate in the etching on the film formation temperature, and a second temperature dependence of a film formation amount in the forming on the film formation temperature.

Abstract: Provided herein are methods of atomic layer etching (ALE) of metals including tungsten (W) and cobalt (Co). The methods disclosed herein provide precise etch control down to the atomic level, with etching a low as 1 ? to 10 ? per cycle in some embodiments. In some embodiments, directional control is provided without damage to the surface of interest. The methods may include cycles of a modification operation to form a reactive layer, followed by a removal operation to etch only this modified layer. The modification is performed without spontaneously etching the surface of the metal.

Abstract: A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon dioxide of a substantially void-free character and substantially uniform density throughout its bulk mass. A method of manufacturing a semiconductor product also is described, involving use of specific silicon precursor compositions for forming substantially void-free and substantially uniform density silicon dioxide material in the trench. The precursor fill composition may include silicon and germanium, to produce a microelectronic device structure including a GeO2/SiO2 trench fill material. A suppressor component may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material.

Abstract: A substrate processing method includes an etching step of mounting a substrate on a surface of a rotatory table arranged in a vacuum chamber and supplying an etching gas into the vacuum chamber while rotating the rotary table to etch a film formed on a surface of the substrate. The etching step includes supplying the etching gas to the surface of the rotary table and supplying a purge gas from a plurality of purge gas supply units that are provided near a region where the etching gas is supplied, and controlling an etching amount of etching the film by independently varying a flow rate of the purge gas that is supplied from each of the plurality of purge gas supply units.

Abstract: Implantable compositions providing release of bioactive agents according to a predetermined release profile and methods for their use. Such compositions include at least one ceramic substrate; a bioactive substance loaded on a surface of the ceramic substrate forming a loaded surface zone operable to release said bioactive substance according to a release profile under physiological conditions; and a biodegradable polymer having an in vivo degradation period, forming a continuous or discontinuous coating on an area of the ceramic substrate.

Abstract: The present disclosure generally relates to methods of removing oxides and oxide-containing layers from the surfaces of substrates. In one aspect, a method of processing a substrate comprises positioning a substrate in a process chamber, the substrate having an oxide layer thereon; introducing one or more process gases to an interior of the process chamber; ionizing the one or more process gases; exposing the oxide layer to the one or more ionized process gases, wherein the process chamber is maintained at a pressure less than about 50 mTorr during the exposing, and the substrate is maintained at a temperature within a range of about zero degrees Celsius to about 30 degrees Celsius during the exposing; and removing the oxide layer from the surface of the substrate.

Abstract: A method and apparatus for material deposition onto a sample to form a protective layer composed of at least two materials that have been formulated and arranged according to the material properties of the sample.

Abstract: Semiconductor systems and methods may include methods of performing selective etches that include modifying a material on a semiconductor substrate. The substrate may have at least two exposed materials on a surface of the semiconductor substrate. The methods may include forming a low-power plasma within a processing chamber housing the semiconductor substrate. The low-power plasma may be a radio-frequency (“RF”) plasma, which may be at least partially formed by an RF bias power operating between about 10 W and about 100 W in embodiments. The RF bias power may also be pulsed at a frequency below about 5,000 Hz. The methods may also include etching one of the at least two exposed materials on the surface of the semiconductor substrate at a higher etch rate than a second of the at least two exposed materials on the surface of the semiconductor substrate.

Abstract: A method for reducing sidewall roughness in an etch layer below a first mask with sidewall roughness in a processing chamber is provided. Sidewalls of the first mask are smoothed, comprising, flowing a processing gas into the processing chamber and forming the processing gas into an in situ plasma in the processing chamber with sufficient energy to sputter and smooth sidewall roughness of the first patterned mask. The etch layer is etched through the first patterned mask.

Abstract: A method for etching a tungsten containing layer in an etch chamber is provided. A substrate is placed with a tungsten containing layer in the etch chamber. A plurality of cycles is provided. Each cycle comprises a passivation phase for forming a passivation layer on sidewalls and bottoms of features in the tungsten containing layer. Additionally, each cycle comprises an etch phase for etching features in the tungsten containing layer.