Forming Groove Or Hole In A Substrate Which Is Subsequently Filled Or Coated Patents (Class 216/39)
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Publication number: 20110062622Abstract: An extrusion head is disposed over a substrate, and material is extruded through an oblique (e.g., semi-circular or tapered) outlet orifice of the extrusion head to form an associated extruded structure having an equilibrium shape that resists settling after being deposited on the substrate. The extrusion head includes fluidic channels having a flat surface formed by a flat first (e.g., metal) sheet, and an oblique (e.g., substantially semi-cylindrical) surface formed by elongated oblique trenches that are etched or otherwise formed in a second sheet. The fluidic channel communicates with the outlet orifice, which has a flat edge formed by the first sheet, and an oblique edge formed by an end of the oblique trench. The material is extruded through the outlet orifice such that its flat lower surface contacts the substrate, and its oblique upper surface faces away from the substrate. Two materials are co-extruded to form high aspect-ratio gridlines.Type: ApplicationFiled: November 22, 2010Publication date: March 17, 2011Applicant: Palo Alto Research Center IncorporatedInventors: David K. Fork, Thomas S. Zimmermann
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Patent number: 7875195Abstract: The presently disclosed invention provides for the fabrication of porous anodic alumina (PAA) films on a wide variety of substrates. The substrate comprises a wafer layer and may further include an adhesion layer deposited on the wafer layer. An anodic alumina template is formed on the substrate. When a rigid substrate such as Si is used, the resulting anodic alumina film is more tractable, easily grown on extensive areas in a uniform manner, and manipulated without danger of cracking. The substrate can be manipulated to obtain free-standing alumina templates of high optical quality and substantially flat surfaces. PAA films can also be grown this way on patterned and non-planar surfaces. Furthermore, under certain conditions, the resulting PAA is missing the barrier layer (partially or completely) and the bottom of the pores can be readily accessed electrically.Type: GrantFiled: August 1, 2007Date of Patent: January 25, 2011Assignee: Massachusetts Institute of TechnologyInventors: Oded Rabin, Paul R. Herz, Mildred S. Dresselhaus, Akintunde I. Akinwande, Yu-Ming Lin
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Patent number: 7871737Abstract: A metal composite for fuel cells according to the present invention, which includes: a core of a metal; cladded layers of a corrosion resistant metal covering both surfaces of the core; and a through-hole formed through the core and cladded layers. The through-hole has, on a hole wall of the core region of the through-hole, a concave portion which is recessed relative to hole walls of the cladded layer regions of the through-hole.Type: GrantFiled: September 18, 2008Date of Patent: January 18, 2011Assignee: Hitachi Cable, Ltd.Inventors: Mineo Washima, Takaaki Sasaoka, Masahiro Seido, Kazuhiko Nakagawa
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Patent number: 7867402Abstract: A method realizes a multispacer structure including an array of spacers having same height. The method includes realizing, on a substrate, a sacrificial layer of a first material; b) realizing, on the sacrificial layer, a sequence of mask spacers obtained by SnPT, which are alternately obtained in at least two different materials; c) chemically etching one of the two different materials with selective removal of the mask spacers of this etched material and partial exposure of the sacrificial layer; d) chemically and/or anisotropically etching the first material with selective removal of the exposed portions of the sacrificial layer; e) chemically etching the other one of the two different materials with selective removal of the mask spacers of this etched material and obtainment of the multispacer structure.Type: GrantFiled: October 5, 2006Date of Patent: January 11, 2011Assignee: STMicroelectronics S.r.l.Inventors: Danilo Mascolo, Gianfranco Cerofolini
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Patent number: 7862733Abstract: The present invention provides a probe manufacturing method in which, after a metal material for a probe is deposited on a base table, the probe can be detached from the base table relatively easily. A sacrificial layer is formed on a base table. The sacrificial layer is partially removed so as to form a recess in the sacrificial layer. A mask that exposes an area formed in a desired probe flat surface shape containing the recess is formed on the sacrificial layer. A probe material exhibiting different etching resistance characteristics from those of the sacrificial layer is deposited in the area exposed from the mask. By the deposition of the material, a coupling portion corresponding to the recess and a probe that is integral with the coupling portion are formed. After the mask is removed, the sacrificial layer is removed with use of etchant. Thereafter, the probe held on the base table at the coupling portion is detached from the base table together with the coupling portion.Type: GrantFiled: December 19, 2007Date of Patent: January 4, 2011Assignee: Kabushiki Kaisha Nihon MicronicsInventors: Takayuki Hayashizaki, Hideki Hirakawa, Akira Soma, Kazuhito Hamada
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Publication number: 20100330343Abstract: A method for making key panel comprises the following steps: providing a transparent or translucent substrate; forming a plurality of grooves in a surface of the substrate; filling the grooves with ink; and forming a translucent metallic coating on the surface of the substrate and covering the ink. A key panel made by the above mentioned method is also described there.Type: ApplicationFiled: February 1, 2010Publication date: December 30, 2010Applicants: SHENZHEN FUTAIHONG PRECISION INDUSTRY CO., LTD., FIH (HONG KONG) LIMITEDInventors: HONG-BO LI, YAN-MIN WANG, GANG HUANG
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Patent number: 7841068Abstract: A method of fabricating a single-pole perpendicular magnetic recording head to contain a bevel angle promotion layer that facilitates the fabrication of the bevel angle in a trapezoidal main pole. The bevel angle promotion layer is made of a non-magnetic material that is softer than the material (e.g., Al2O3) that normally underlies the main pole. In one embodiment, the bevel angle promotion layer is formed between an end of the yoke and the air bearing surface (ABS), with the top surface of the bevel angle promotion layer being substantially coplanar with the top surface of the yoke. In other embodiment the bevel angle promotion layer is integrated with a leading edge taper material, which is formed of a magnetic material, to broaden the magnetic flux path between the yoke and the main pole.Type: GrantFiled: July 2, 2007Date of Patent: November 30, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Tsung Yuan Chen, Yimin Hsu, Yinshi Liu
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Publication number: 20100294654Abstract: The present invention relates to a micro metal mold for manufacturing micro metal sheet products provided with a fine or micro opening(s) or an aperture(s) together with or independently of a groove(s) and/or a protrusion(s), a method for making the mold by the electroforming or electroplating method, a method for making the mold and micro metal sheet products manufactured by using the micro metal mold. According to the invention, it is possible to manufacture micro metal sheet products, provided with fine and precise dimensions of an opening(s) as well as a groove(s) and/or a protrusion(s), under a mass production.Type: ApplicationFiled: August 24, 2007Publication date: November 25, 2010Inventors: Tae Heum Park, Chang Hee Han
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Publication number: 20100288727Abstract: A substrate for biochips is manufactured so that the substrate has a substrate surface having a reaction region capable of reacting with biological substances and a non-reaction region not reacting with the biological substances, sunken bottomed wells formed in the substrate surface, and a layer of a material capable of reacting with the biological substances having a surface exposed only at the bottoms of the bottomed wells, the exposed surface forming the reaction region.Type: ApplicationFiled: July 28, 2010Publication date: November 18, 2010Applicant: YAMATAKE CORPORATIONInventors: Yasuhiro GOSHOO, Takaaki KUROIWA, Naohiro ISHIKAWA, Daisuke OBARA, Shinsuke YAMASAKI, Françoise VINET
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Publication number: 20100285288Abstract: A bonding method for hetero-materials includes the steps of: a) preparing a ceramic substrate having opposite first and second surfaces; b) micro-structurizing the substrate to form a plurality of micro-structures and a plurality of indentations on the first surface of the substrate; c) preparing a mold including a first mold part having a mold cavity, and a second mold part; d) disposing the substrate in the mold cavity; e) closing the first mold part so that a molding space is defined between the second mold part and the first surface of the substrate; and f) insert-molding a polymeric material in the molding space so as to form a polymeric layer bonding to the first surface of the substrate by filling the polymeric material into the indentations. A composite shell body including a ceramic substrate and a polymeric layer is also disclosed.Type: ApplicationFiled: May 7, 2010Publication date: November 11, 2010Applicant: TAIWAN GREEN POINT ENTERPRISES CO., LTD.Inventors: Shih-Chieh Chen, Yung-Chih Chen, Chun-Hsien Lee, Tsung-Kuei Wei, Tsung-Che Lee, Chia-Liang Hung
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Patent number: 7828952Abstract: Multi-layer structures are electrochemically fabricated by depositing a first material, selectively etching the first material (e.g. via a mask), depositing a second material to fill in the voids created by the etching, and then planarizing the depositions so as to bound the layer being created and thereafter adding additional layers to previously formed layers. The first and second depositions may be of the blanket or selective type. The repetition of the formation process for forming successive layers may be repeated with or without variations (e.g. variations in: patterns; numbers or existence of or parameters associated with depositions, etchings, and or planarization operations; the order of operations, or the materials deposited). Other embodiments form multi-layer structures using operations that interlace material deposited in association with some layers with material deposited in association with other layers.Type: GrantFiled: October 6, 2006Date of Patent: November 9, 2010Assignee: Microfabrica Inc.Inventor: Dennis R. Smalley
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Patent number: 7807063Abstract: A solid polymer electrolyte composite membrane and method of manufacturing the same. According to one embodiment, the composite membrane comprises a rigid, non-electrically-conducting support, the support preferably being a sheet of polyimide having a thickness of about 7.5 to 15 microns. The support has a plurality of cylindrical pores extending perpendicularly between opposing top and bottom surfaces of the support. The pores, which preferably have a diameter of about 0.1 to 5 microns, are made by plasma etching and preferably are arranged in a defined pattern, for example, with fewer pores located in areas of high membrane stress and more pores located in areas of low membrane stress. The pores are filled with a first solid polymer electrolyte, such as a perfluorosulfonic acid (PFSA) polymer. A second solid polymer electrolyte, which may be the same as or different than the first solid polymer electrolyte, may be deposited over the top and/or bottom of the first solid polymer electrolyte.Type: GrantFiled: October 21, 2004Date of Patent: October 5, 2010Assignee: Giner Electrochemical Systems, LLCInventors: Han Liu, Anthony B. LaConti
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Patent number: 7805827Abstract: In one embodiment of the present invention, a method of producing a magnetic head slider comprises the steps of forming, on the air bearing surface of the slider, an air bearing surface overcoat, removing the surface region from a hard amorphous carbon film by the irradiation with an ion beam which is tilted with respect to a normal to the air bearing surface, and forming a rail in the air bearing surface on which the air bearing surface overcoat has been formed. A high density and covering performance are obtained when the angle of irradiating the ion beam is not smaller than about 60 degrees from a normal to the air bearing surface of the magnetic head slider and when the acceleration voltage for the ion beam is not higher than about 300 V in the step of removing part of the air bearing surface overcoat.Type: GrantFiled: July 12, 2006Date of Patent: October 5, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Nobuto Yasui, Hiroshi Inaba, Shinji Sasaki, Kazuhito Miyata
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Patent number: 7790045Abstract: The present invention relates to the self-assembly of a spherical-morphology block copolymer into V-shaped grooves of a substrate. Although spherical morphology block copolymers typically form a body-centered cubic system (bcc) sphere array in bulk, the V-shaped grooves promote the formation of a face-centered cubic system (fcc) sphere array that is well ordered. In one embodiment, the (111) planes of the fcc sphere array are parallel to the angled side walls of the V-shaped groove. The (100) plane of the fcc sphere array is parallel to the top surface of the substrate, and may show a square symmetry among adjacent spheres. This square symmetry is unlike the hexagonal symmetry seen in monolayers of spherical domains and is a useful geometry for lithography applications, especially those used in semiconductor applications.Type: GrantFiled: September 13, 2007Date of Patent: September 7, 2010Assignee: Massachusetts Institute of TechnologyInventors: Peng-Wei Chuang, Caroline A. Ross
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Patent number: 7767099Abstract: The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.Type: GrantFiled: January 26, 2007Date of Patent: August 3, 2010Assignee: International Business Machines CorporaitonInventors: Wai-Kin Li, Haining S. Yang
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Publication number: 20100173141Abstract: A method of making an article that exhibits a metallic appearance includes treating a surface of a non-metallic substrate, e.g. a glass sheet to have a textured surface, and applying an overlay, e.g. a coating over the pattern. The percent of visible light transmittance, and percent visible light reflectance, of the substrate and the overlay is selected such that the pattern is visible when the article is viewed through one of the surfaces of the substrate or overlay. Also provided is a heatable coating having a low emissivity that can be used as the overlay.Type: ApplicationFiled: March 18, 2010Publication date: July 8, 2010Applicant: PPG INDUSTRIES OHIO, INC.Inventors: Paul A. Medwick, James P. Thiel, Gary J. Marietti
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Patent number: 7743487Abstract: A perpendicular write head includes a beveled main pole having corners defining a track width and having a planarized surface and encapsulated on either side thereof and below by an alumina layer, the alumina layer having a polished surface and extending above the main pole on either side thereof as steps.Type: GrantFiled: June 14, 2006Date of Patent: June 29, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Amanda Baer, Hamid Balamane, Michael Feldbaum, Ming Jiang, Aron Pentek, Neil Leslie Robertson, Sue Siyang Zhang
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Patent number: 7728485Abstract: A BAW device includes a semiconductor substrate with a surface region, an insulating layer formed on the surface region and a piezoelectric layer sandwiched by a first and second electrode, wherein the second electrode is formed on the insulating layer. The surface region is performed such that a voltage dependence of a capacitance between the substrate and the second electrode is substantially suppressed.Type: GrantFiled: May 30, 2008Date of Patent: June 1, 2010Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.Inventors: Martin Handtmann, Martin Franosch
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Patent number: 7712198Abstract: A microneedle array device and its fabrication method are provided. The microneedle array device comprises a supporting pad and a plurality of microneedles. Each microneedle has a top portion with a via thereon, thereby the microfluid may flow in or out. The intersection between the top portion and the inner tube of a microneedle forms a convex needle structure, and is almost perpendicular to the upper surface. For each microneedle, a hollow closed tube is formed between the top portion and the supporting pad. The fabrication method uses substrates with high transmittance and a plurality of convex area thereon as upper and lower caps, and applies a photolithography process to fabricate a microneedle array mold. It then sputters or electroplates metal material on the mold. The microneedle array is formed after having taken off the mold.Type: GrantFiled: May 29, 2007Date of Patent: May 11, 2010Assignee: Industrial Technology Research InstituteInventors: Shih-Chi Kuo, Yu-Kon Chou
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Publication number: 20100089868Abstract: A method for producing a micromechanical component is proposed, a trench structure being substantially completely filled up by a first filler layer, and a first mask layer being applied on the first filler layer, on which in turn a second filler layer and a second mask layer are applied. A micromechanical component is also proposed, the first filler layer filling up the trench structure of the micromechanical component and at the same time forming a movable sensor structure.Type: ApplicationFiled: April 8, 2008Publication date: April 15, 2010Inventors: Roland Scheuerer, Heribert Weber, Eckhard Graf
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Patent number: 7695784Abstract: Methods and systems are described for making posts and kerfs in an interdigital bonded composite. The desired alignment criteria for a plurality of posts and kerfs in a pair of slabs are determined, as well as the desired widths W of the posts and the desired widths K of the kerfs. The posts in the first slab are configured to be received into corresponding kerfs in the second slab, and vice versa, so that the pair of slabs can be interdigitated to generate a composite. At least one of an alignment post and an alignment kerf are created, in at least one of the slabs. The alignment posts and the alignment kerf are configured to allow the plurality of posts and kerfs to be correctly positioned and aligned, in accordance with the desired alignment criteria.Type: GrantFiled: July 23, 2007Date of Patent: April 13, 2010Assignee: University of Southern CaliforniaInventors: Jay A. Williams, Jonathan M. Cannata, Ruibin Liu, K. Kirk Shung
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Publication number: 20100084376Abstract: Porous nano-imprint lithography templates may include pores, channels, or porous layers arranged to allow evacuation of gas trapped between a nano-imprint lithography template and substrate. The pores or channels may be formed by etch or other processes. Gaskets may be formed on an nano-imprint lithography template to restrict flow of polymerizable material during nano-imprint lithography processes.Type: ApplicationFiled: October 2, 2009Publication date: April 8, 2010Applicant: MOLECULAR IMPRINTS, INC.Inventors: Niyaz Khusnatdinov, Weijun Liu, Frank Y. Xu, Fen Wan, Edward Brian Fletcher, Marlon Menezes
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Publication number: 20100084333Abstract: The present invention discloses a method for manufacturing ultra-thin reinforced membranes from a SOI wafer having a front side and a back side, the front side having an etch stop layer buried under a device layer, provided for by forming reinforcement bars by etching openings in the device layer down to the etch stop layer, filling the openings at least partially by deposition of a first filler, and then polishing the top surface to the silicon surface before depositing a membrane material.Type: ApplicationFiled: March 7, 2008Publication date: April 8, 2010Applicant: LIFECARE ASInventors: Arnold Hoogerwerf, Thomas Overstolz
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Patent number: 7687407Abstract: The present invention provides an interconnect structure, a method of manufacture therefore, and a method for manufacturing an integrated circuit including the same. The method for forming the interconnect structure, among other steps, includes subjecting a first portion (510) of a substrate (220) to a first etch process, the first etch process designed to etch at a first entry angle (?1), and subjecting a second portion (610) of the substrate (220) to a second different etch process, the second different etch process designed to etch at a second lesser entry angle (?2).Type: GrantFiled: March 2, 2005Date of Patent: March 30, 2010Assignee: Texas Instruments IncorporatedInventors: David G. Farber, Brian E. Goodllin, Robert Kraft
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Patent number: 7682517Abstract: A method of processing a substrate that enables the amount removed of a surface damaged layer to be controlled easily, and enable a decrease in wiring reliability to be prevented. A surface damaged layer having a reduced carbon concentration of a carbon-containing low dielectric constant insulating film on a substrate is exposed to an atmosphere of a mixed gas containing ammonia and hydrogen fluoride under a predetermined pressure. The surface damaged layer that has been exposed to the atmosphere of the mixed gas is heated to a predetermined temperature.Type: GrantFiled: February 14, 2006Date of Patent: March 23, 2010Assignee: Tokyo Electron LimitedInventors: Eiichi Nishimura, Kenya Iwasaki
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Publication number: 20100055388Abstract: A device is provided that includes a structure having a sidewall surface, a layer of material provided on the sidewall surface, and a device structure provided in contact with the layer of material. Fabrication techniques includes a process that includes forming a structure having a sidewall surface, forming a layer of material on the sidewall surface, and forming a device structure in contact with the layer of material, where the device structure and the layer of material are components of a device.Type: ApplicationFiled: August 29, 2008Publication date: March 4, 2010Applicant: Advanced Micro Devices, Inc.Inventors: An Chen, Zoran Krivokapic
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Publication number: 20100055419Abstract: A housing with a three dimensional pattern coating includes a substrate, a powder coated layer formed on the substrate, the powder coated layer having plural grooves therein; and a pattern coating formed in the grooves. A method for making the housing comprises: providing a substrate; painting a powder coated layer onto the substrate; etching the powder coated layer to form plural grooves; filling the grooves with a colloidal solution.Type: ApplicationFiled: June 17, 2009Publication date: March 4, 2010Applicants: SHENZHEN FUTAIHONG PRECISION INDUSTRY CO., LTD., FIH (HONG KONG) LIMITEDInventors: FEI WU, XIAN-LIANG LIU, HONG-BING ZHANG, CHAO-HSUN LIN, JEN-LUNG HUANG
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Publication number: 20100038341Abstract: A method of forming a metal line of an inductor used in a Radio Frequency (RF) device, effectively removes polymer generated during an etching process to form trenches. The method removes the polymer using a radical having a high reactivity with the polymer. The method includes carrying out first main etching to form the trenches, carrying out ashing to remove polymer generated in the first main etching, and carrying out second main etching to form vias on the bottoms of the trenches.Type: ApplicationFiled: August 5, 2009Publication date: February 18, 2010Inventor: Ki-Jun Yun
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Publication number: 20100021714Abstract: The present invention provides a high capacity hydrogen storage material in which a plural mesopore channels and fractal networks of nanopore channels communicating therewith and connecting to the micropores are formed in a microporous material, wherein a plural metal particles are formed on the surface of the mesopore and nanopore channels and of the micropores. In another embodiment, the present invention also provides a method for making the hydrogen storage material through oxidizing the microporous material so as to form a plural mesopore channels and fractal networks of nanopore channels, both of which are connected to the micropores to form a base for the deposition of metal particles capable of decomposing hydrogen molecules into hydrogen atoms. The high capacity hydrogen storage material is capable of increasing the capacity of hydrogen storage, and besides, the oxidizing process for making the hydrogen storage material is simple and has merits of saving cost.Type: ApplicationFiled: October 29, 2008Publication date: January 28, 2010Applicant: Institute of Nuclear Energy Research Atomic Energy Council, Executive YuanInventors: CHENG-SI TSAO, MING-SHENG YU, YI-REN TZENG, CHENG-YU WANG, HSIU-CHU WU, TSUI-YUN CHUNG, CHUN-CHING CHIEN, LI-FU LIN
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Patent number: 7649173Abstract: A method for preparing TEM sample, comprising the following steps: providing a sample with two pits and a failure region between the two pits, the failure region comprising a semiconductor device; milling the first surface of the failure region, till the cross section of the semiconductor device is exposed; etching the first surface of the failure region; cleaning the sample; milling the second surface of the failure region, till the failure region can be passed by electron beam. A sample can be prepared for a high resolution TEM through above steps. When the sample is observed, it is easy to distinguish the lightly doped drain, source/drain regions from the silicon substrate and observe the pattern and defects in the lightly doped drain, source/drain regions clearly; in addition, it is easy to distinguish the BPSG from the non-doped silicon dioxide in the failure region.Type: GrantFiled: December 29, 2006Date of Patent: January 19, 2010Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianqiang Hu, Zhixian Rui, Yanli Zhao, Yanjun Wang, Ming Li, Min Pan
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Patent number: 7638263Abstract: An overlay accuracy measurement vernier and a method of forming the same. According to one embodiment, the method of forming the overlay accuracy measurement vernier includes the steps of forming a first vernier pattern in a predetermined region on a semiconductor substrate; etching the semiconductor substrate using the first vernier pattern as a mask, forming a trench of a first depth; forming a second vernier pattern having a width wider than that of the first vernier pattern, the second vernier pattern including the first vernier pattern; performing an etch process using the second vernier pattern as a mask, thus forming a trench of a second depth, which has a step of a predetermined width; stripping the first and second vernier patterns and then forming an insulating film to bury the trench; and, etching the insulating film so that the semiconductor substrate of the vernier region is exposed.Type: GrantFiled: June 30, 2006Date of Patent: December 29, 2009Assignee: Hynix Semiconductor Inc.Inventor: Guee Hwang Sim
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Publication number: 20090311483Abstract: Articles having a first substance, naturally having a first crystalline structure, confined between surfaces of a second substance having a second crystalline structure, whereby the first substance has a third (unusual) crystalline structure different from said first crystalline structure and methods of making same. Substances having unusual crystalline structures and methods of making same.Type: ApplicationFiled: April 10, 2007Publication date: December 17, 2009Applicant: Technion Research & Development Foundation Ltd.Inventors: Wayne D. Kaplan, Yaron Kauffmann
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Publication number: 20090301893Abstract: Numerous electrochemical fabrication methods and apparatus are provided for producing multi-layer structures (e.g. having meso-scale or micro-scale features) from a plurality of layers of deposited materials using adhered masks (e.g. formed from liquid photoresist or dry film), where two or more materials may be provided per layer where at least one of the materials is a structural material and one or more of any other materials may be a sacrificial material which will be removed after formation of the structure. Materials may comprise conductive materials that are electrodeposited or deposited in an electroless manner. In some embodiments special care is undertaken to ensure alignment between patterns formed on successive layers.Type: ApplicationFiled: June 5, 2009Publication date: December 10, 2009Inventors: Adam L. Cohen, Jill R. Thomassian, Michael S. Lockard, Marvin M. Kilgo, III, Uri Frodis, Dennis R. Smalley
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Patent number: 7625493Abstract: In order to achieve low cost of manufacture of a display device by reducing the use of primary material used in a manufacturing process of a display device and saving labor taken for a vacuum process, according to the invention, liquid droplets containing conductive particles are ejected on a film being processed by using a first liquid droplet ejecting apparatus having a liquid droplet ejecting head provided with a plurality of liquid droplet ejecting orifices, thereby a conductive film is formed. After that, a resist pattern is locally formed on the conductive film by using a second liquid droplet ejecting apparatus having a liquid droplet ejecting head provided with a plurality of liquid droplet ejecting orifices. The conductive film is etched with the resist pattern as a mask to form a wiring.Type: GrantFiled: February 6, 2004Date of Patent: December 1, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 7618548Abstract: We have developed an uncomplicated method of plasma etching deeply recessed features such as deep trenches, of at least 5 ?m in depth, in a silicon-containing substrate, in a manner which generates smooth sidewalls, having a roughness of less than about 1 ?m, typically less than about 500 nm, and even more typically between about 100 nm and 20 nm. Features having a sidewall taper angle, relative to an underlying substrate, typically ranges from about 85° to about 92° and exhibiting the smooth sidewalls are produced by the method. In one embodiment, a stabilizing etchant species is used constantly during the plasma etch process, while at least one other etchant species and at least one polymer depositing species are applied intermittently, typically periodically, relative to each other. In another embodiment, the stabilizing etchant species is used constantly and a mixture of the other etchant species and polymer depositing species is used intermittently.Type: GrantFiled: August 29, 2005Date of Patent: November 17, 2009Assignee: Applied Materials, Inc.Inventors: Jeffrey D. Chinn, Michael Rattner, Nicholas Pornsin-Sirirak, Yanping Li
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Publication number: 20090264316Abstract: UV/ozone treatment can be used to alter the hydrophobicity of organosilane coated surfaces. Methods are contemplated for producing micropatterned surfaces by coating a surface with an organosilane to produce an organosilane surface; and exposing the organosilane surface to ultraviolet light in the presence of oxygen, wherein the micropatterned organosilane surface is produced without the use of photoresist. Methods for producing substrate-micropatterned surfaces further are also contemplated. Suitable substrates include nucleotides, proteins, carbohydrates, and cells. The organosilane coated devices of the present invention may be used in, for example, arrays.Type: ApplicationFiled: April 17, 2009Publication date: October 22, 2009Applicant: Marshall University Research CorporationInventors: Eric R. BLOUGH, Hideyo TAKATSUKI, Kevin Matthew RICE, Brian Scott DAY
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Publication number: 20090250379Abstract: For manufacturing micro-structured reactors with passageways loaded with catalyst using the pre-coat method, a method is provided which comprises the following method steps: a) producing reactor layers having bonding areas as well as passageway areas in which the passageways are formed, b) applying at least one bonding layer onto the reactor layers in the bonding areas, c) loading the reactor layers in the passageway areas with the catalyst and d) bonding the reactor layers, the bonding layer being applied and masked before the reactor layers are loaded with the catalyst. As a result, it is ensured that the efficiency of the catalyst will not be affected during manufacturing. The reactor may be used as a methane and methanol reformer in particular.Type: ApplicationFiled: February 22, 2007Publication date: October 8, 2009Applicant: ATOTECH DEUTSCHLAND GMBHInventors: Olaf Kurtz, Ralph Herber, Christian Madry, Gerd Schäfer
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Patent number: 7597814Abstract: A structure is provided that is formed with a template defining a pattern having nanoscale features. The template may be positioned on a substrate and include a resist layer having openings formed therein, where the template is configured to accommodate the controlled assembly of nanoscale objects.Type: GrantFiled: March 23, 2004Date of Patent: October 6, 2009Assignee: Hewlett Packard Development Company, L.P.Inventors: James W. Stasiak, Kevin Francis Peters, Pavel Kornilovich
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Publication number: 20090236309Abstract: Methods for fabricating sublithographic, nanoscale microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.Type: ApplicationFiled: March 21, 2008Publication date: September 24, 2009Inventors: Dan B. Millward, Timothy Quick
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Publication number: 20090232334Abstract: A cost-effective technology for implementing a micromechanical component is provided, whose layer construction includes at least one diaphragm on the upper side and at least one counter-element, a hollow space being formed between the diaphragm and the counter-element, and the counter-element having at least one through hole to a back volume. This back volume is formed by a sealed additional hollow space underneath the counter-element and is connected to the upper-side of the layer construction by at least one pressure equalization opening. This component structure permits the integration of the micromechanical sensor functions and evaluation electronics on one chip and is additionally suitable for mass production.Type: ApplicationFiled: April 2, 2007Publication date: September 17, 2009Applicant: ROBERT BOSCH GMBHInventors: Ando Feyh, Marco Lammer
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Publication number: 20090206433Abstract: An image sensor and a method for manufacturing the same that includes a dielectric layer having a trench formed therein, a first micro-lens having a first structure formed in the trench, and a second micro-lens having a second structure formed over and contacting the first micro-lens such that the second structure is different than the first structure.Type: ApplicationFiled: December 26, 2008Publication date: August 20, 2009Inventor: Sung-Hyun Kang
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Publication number: 20090200265Abstract: The present invention discloses a lead frame fabrication method, wherein a metallic plate is locally fabricated in double sides to form accurately aligned and closely spaced circuits; the metallic plate is also locally fabricated in single side to form patterned trenches; a filling material is filled into the trenches to provide extra mechanical support and separate the metallic plate into a plurality of conductive regions or regions with special electric properties. The present invention can overcome the conventional problems in lead frame fabrication and has the advantages of a superior heat-dissipating ability, multi-leads and diversified applications.Type: ApplicationFiled: December 17, 2007Publication date: August 13, 2009Inventor: Yi-Ling Chang
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Patent number: 7571533Abstract: A method of manufacturing a micro flux gate sensor and a micro flux gate sensor manufactured according to the method are provided. The method includes operations of forming a lower coil portion of an excitation coil and a magnetic field detecting coil on a wafer, forming connection portions with a certain height at predetermined positions of the lower coil portion, forming a first insulation layer to cover the lower coil portion and the connection portions, forming a magnetic core on the first insulation layer, forming a second insulation layer to cover the magnetic core and forming an upper coil portion electrically connected to the connection portions to form the excitation coil and the magnetic field detecting coil, and forming a third insulation layer to cover the upper coil portion.Type: GrantFiled: April 21, 2006Date of Patent: August 11, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoung-won Na, Jingli Yuan
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Patent number: 7549211Abstract: A method for de-tabbing a dielectric tab extending between and bonded to first and second stainless steel portions of a disk drive head suspension component. Exemplary first and second stainless steel portions are a flexure base region and a flexure tongue. The method includes applying laser energy to the dielectric tab. The laser energy is characterized by one or more parameters, e.g., a pulse width and/or an energy density, causing de-bonding of the dielectric tab from the first and second stainless steel portions.Type: GrantFiled: June 30, 2006Date of Patent: June 23, 2009Assignee: Hutchinson Technology IncorporatedInventors: Lucas P. Keranen, Hryhory T. Koba, Raymond A. Loehlein, Patrick E. Madsen, Arun S. Kumar
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Patent number: 7540968Abstract: A micro movable device includes a base substrate, a fixed portion bonded to the base substrate, a movable portion having a fixed end connected to the fixed portion and extending along the base substrate, and a piezoelectric drive provided on the movable portion and the fixed portion on a side opposite to the base substrate. The piezoelectric drive has a laminate structure provided by a first electrode film contacting the movable portion and the fixed portion, a second electrode film and a piezoelectric film between the first and the second electrode films. At least one of the movable portion and the fixed portion is provided with a groove extending along the piezoelectric drive.Type: GrantFiled: March 16, 2006Date of Patent: June 2, 2009Assignee: Fujitsu LimitedInventors: Anh Tuan Nguyen, Tadashi Nakatani, Takeaki Shimanouchi, Masahiko Imai, Satoshi Ueda
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Patent number: 7527741Abstract: Means for enabling plating on sites of complex configuration, etching for fine complex pattern, etc. through reduction of the viscosity resistance brought about by walls of fine liquid channel of microreactor. In particular, a microreactor comprising a liquid inlet, a fine liquid channel and a liquid discharge zone characterized in that the liquid channel is formed of a magnetic barrier of band ferromagnet so that a magnetic liquid introduced through the inlet undergoes at least one operation of chemical reaction, mixing, extraction and absorption in the liquid channel. Further, there is provided means for plating or etching performed by causing a plating solution or an etching solution to flow through the liquid channel.Type: GrantFiled: November 4, 2003Date of Patent: May 5, 2009Inventors: Ryoichi Aogaki, Eiko Ito, Mikio Ogata
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Patent number: 7524427Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations.Type: GrantFiled: January 3, 2005Date of Patent: April 28, 2009Assignee: Microfabrica Inc.Inventors: Adam L. Cohen, Michael S. Lockard, Kieun Kim, Qui T. Le, Gang Zhang, Uri Frodis, Dale S. McPherson, Dennis R. Smalley
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Publication number: 20090098030Abstract: The invention relates to a microreactor having a substrate (10, 20, 80) with at least one catalytically active material arranged in and/or on a cavity structure (14, 24, 84). The substrate (10, 20, 80) has a first layer (11, 21, 80) and optionally at least one additional layer (12, 22) of a ceramic material, with the first layer (11, 21, 80) being formed from a first component of a crystalline ceramic material and/or a glass material as the matrix and a second component of an additional crystalline ceramic material. The surface areas of the crystals and/or crystal agglomerates of the second component in the first layer (11, 21, 80) are etched out in at least some areas to form the cavity structure (14, 24, 84).Type: ApplicationFiled: September 15, 2008Publication date: April 16, 2009Inventors: Dieter Schwanke, Mirco Harnack, Achim Bittner, Ulrich Schmid
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Patent number: 7517462Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations.Type: GrantFiled: January 3, 2005Date of Patent: April 14, 2009Assignee: Microfabrica Inc.Inventors: Adam L. Cohen, Michael S. Lockard, Kieun Kim, Qui T. Le, Gang Zhang, Uri Frodis, Dale S. McPherson, Dennis R. Smalley
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Publication number: 20090084756Abstract: An electrochemical fabrication process produces three-dimensional structures (e.g. components or devices) from a plurality of layers of deposited materials wherein the formation of at least some portions of some layers are produced by operations that remove material or condition selected surfaces of a deposited material. In some embodiments, removal or conditioning operations are varied between layers or between different portions of a layer such that different surface qualities are obtained. In other embodiments varying surface quality may be obtained without varying removal or conditioning operations but instead by relying on differential interaction between removal or conditioning operations and different materials encountered by these operations.Type: ApplicationFiled: September 30, 2008Publication date: April 2, 2009Inventors: Adam L. Cohen, Dennis R. Smalley