Mask Resist Contains Organic Compound Patents (Class 216/49)
  • Patent number: 10720336
    Abstract: A mask structure and a method for manufacturing a mask structure for a lithography process is provided. The method includes providing a substrate covered with an absorber layer on a side thereof; providing a patterned layer over the absorber layer, the patterned layer comprising at least one opening; and forming at least one assist mask feature in the at least one opening, wherein the at least one assist mask feature is formed by performing a directed self-assembly (DSA) patterning process comprising providing a BCP material in the at least one opening and inducing phase separation of a BCP material into a first component and a second component, the first component being the at least one assist mask feature and being periodically distributed with respect to the second component.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: July 21, 2020
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Emily Gallagher, Roel Gronheid, Jan Doise, Iacopo Mochi
  • Patent number: 10692943
    Abstract: A touch organic light-emitting display device includes: a substrate including: a display area, and a non-display area, a lower base crossing the display area and the non-display area, an upper base opposite the lower base, the upper base crossing the display area and the non-display area, an adhesive layer between the lower base and the upper base, and a pad portion in the non-display area, wherein the upper base includes a plurality of concave patterns and at least one upper dam at a position corresponding to a region between the pad portion and the display area.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: June 23, 2020
    Assignee: LG Display Co., Ltd.
    Inventor: Sin-Chul Kang
  • Patent number: 10681813
    Abstract: Method for manufacturing an electronic component is provided. The method includes manufacturing elements that are produced by an additive manufacturing process. Moreover, the elements are produced in the same plane or out of plain with one or more foil substrates. The elements may be various structures, including, for example, connectors, electrical components (e.g., a resistor, a capacitor, a switch, and/or the like), and/or any other suitable electrical elements and/or structures.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: June 9, 2020
    Assignee: RAYTHEON TECHNOLOGIES CORPORATION
    Inventors: Wayde R. Schmidt, Sameh Dardona, Slade R. Culp, Marcin Piech
  • Patent number: 10366888
    Abstract: A pattern forming method includes forming a first organic film by coating an etching target film with a composition including a polymer including a cross-linkable component, infiltrating an inorganic substance into the first organic film, cross-linking the polymer, forming a second organic film on the first organic film, forming a second organic film pattern by patterning the second organic film, forming a first organic film pattern having a pitch reduced to one-half of a pitch of the second organic film pattern by patterning the first organic film by a self-aligned patterning method that uses the second organic film pattern as a core pattern, forming an etching target film pattern having a pitch reduced to one-half of a pitch of the first organic film pattern by patterning the etching target film by a self-aligned patterning method that uses the first organic film pattern as a core pattern.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: July 30, 2019
    Assignees: Tokyo Electron Limited, TOKYO OHKA KOGYO CO., LTD.
    Inventors: Kazuki Yamada, Masatoshi Yamato, Hidetami Yaegashi, Yoshitaka Komuro, Takehiro Seshimo, Katsumi Ohmori
  • Patent number: 10276372
    Abstract: A method includes patterning a resist layer formed over a substrate, resulting in a resist pattern; and transferring the resist pattern to an anti-reflection coating (ARC) layer formed under the resist layer and over the substrate, resulting in a patterned ARC layer. The method further includes treating the patterned ARC layer with an ion beam, resulting in a treated patterned ARC layer, wherein the ion beam is generated with a first gas and is directed towards the patterned ARC layer at a tilt angle at least 10 degrees. The method further includes etching the substrate with the treated patterned ARC layer as an etch mask.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 10239279
    Abstract: A function transfer product (14) is provided with a carrier (10) having a concavo-convex structure (11) of nanostructure, and a functional layer (12) provided on the concavo-convex structure (11). The functional layer (12) is beforehand provided on the surface of the concavo-convex structure (11), and is directly brought into contact with one main surface of a target object (20), and then the carrier (10) is removed from the functional layer (12) to transfer the functional layer (12) to the target object (20). An average pitch of the concavo-convex structure (11) ranges from 1 nm to 1500 nm, the functional layer (12) contains a resin, and a ratio (Ra/lor) between surface roughness (Ra) on the exposed surface side of the functional layer (12) and a distance between a top position of a convex-portion of the concavo-convex structure (11) and the exposed surface of the functional layer (12) is 1.2 or less.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: March 26, 2019
    Assignee: ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Jun Koike, Fujito Yamaguchi
  • Patent number: 10195891
    Abstract: A composite security device is provided that is made up of a first polymer film that constitutes or embodies a security feature in the form of at least one high value material, and a second polymer film that constitutes, embodies, or is coated with one or more additional security features. The first polymer film is positioned on and adhered to a surface of the second polymer film, which has a width or diameter greater than the width or diameter of the first polymer film By way of the present invention, the high value material is applied to only a part of the security device, leaving remaining parts of the device available for one or more additional materials that do not impact upon the effect of the high value material.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: February 5, 2019
    Assignee: Crane Security Technologies, Inc.
    Inventor: Paul F. Cote
  • Patent number: 10192804
    Abstract: A device comprises a first package component, and a first metal trace and a second metal trace on a top surface of the first package component. The device further includes a dielectric mask layer covering the top surface of the first package component, the first metal trace and the second metal trace, wherein the dielectric mask layer has an opening therein exposing the first metal trace. The device also includes a second package component and an interconnect formed on the second package component, the interconnect having a metal bump and a solder bump formed on the metal bump, wherein the solder bump contacts the first metal trace in the opening of the dielectric mask layer.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: January 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Chih-Wei Lin, Kuei-Wei Huang, Hui-Min Huang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 10096475
    Abstract: A method for depositing a hardmask layer on a substrate includes nitridating a first layer of the substrate. The first layer is selected from a group consisting of silicon dioxide and silicon nitride. An amorphous carbon layer is deposited on the nitridated first layer via plasma-enhanced chemical vapor deposition (PECVD). A monolayer is deposited on the amorphous carbon layer using gas mixture including a metal precursor gas with a reducing agent and without plasma. A bulk metal-doped carbon hardmask layer is deposited on the monolayer.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: October 9, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventor: Fayaz Shaikh
  • Patent number: 9893256
    Abstract: A metal coating method includes forming a metal layer on a substrate including a first member and a second member, the second member having a lower thermal conductivity than a thermal conductivity of the first member, and irradiating the metal layer formed on the first member and the second member with a laser beam such that, after irradiation, the metal layer formed on the first member remains, and the metal layer formed on the second member is removed.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 13, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Yoshikazu Matsuda, Ryo Suzuki
  • Patent number: 9841674
    Abstract: A patterning method according to one embodiment includes forming a ground layer on a processing target layer. The ground layer has higher affinity for one of a first segment and a second segment contained in a self-assembly material than for the other segment. The neutral layer is patterned on the ground layer. The neutral layer is neutral to the first segment and the second segment. Exposing surfaces of the ground layer and the neutral layer is irradiated with an energy ray. The self-assembly material is applied onto the ground layer and the neutral layer. The self-assembly material is phase-separated into a first domain including the first segment and a second domain including the second segment. One of the first domain and the second domain is selectively removed.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: December 12, 2017
    Assignee: Toshiba Memory Corporation
    Inventors: Hideaki Sakurai, Machiko Suenaga, Takeharu Motokawa, Masatoshi Terayama
  • Patent number: 9837407
    Abstract: A semiconductor device includes a semiconductor fin arranged on a substrate, a gate stack arranged over a channel region of the fin, and a spacer arranged adjacent to the gate stack. A source/drain region is arranged in the fin the source/drain region having a cavity that exposes a portion of the semiconductor fin. An insulator layer is arranged over a portion of the fin, and a conductive contact material is arranged in the cavity and over portions of the source/drain region.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: December 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kangguo Cheng, Chi-chun Liu, Peng Xu, Jie Yang
  • Patent number: 9754823
    Abstract: A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: September 5, 2017
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SÜSS MICROTEC PHOTONIC SYSTEMS INC.
    Inventors: Yuri M. Brovman, Brian M. Erwin, Nicholas A. Polomoff, Jennifer D. Schuler, Matthew E. Souter, Christopher L. Tessler
  • Patent number: 9748135
    Abstract: A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: August 29, 2017
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SUSS MICROTEC PHOTONIC SYSTEMS INC.
    Inventors: Yuri M. Brovman, Brian M. Erwin, Nicholas A. Polomoff, Jennifer D. Schuler, Matthew E. Souter, Christopher L. Tessler
  • Patent number: 9695506
    Abstract: The disclosure relates to a method of making a microstructure on a substrate. A carbon nanotube structure is provided, wherein the carbon nanotube structure includes a number of carbon nanotubes arranged orderly and defines a number of first openings. A carbon nanotube composite is formed by applying a protective layer on the carbon nanotube structure, wherein the carbon nanotube composite structure defines a number of second openings. The carbon nanotube composite structure is placed on a surface of the substrate, wherein parts of the surface are exposed from the number of second openings. The surface of the substrate is dry etched by using the carbon nanotube composite structure as a mask.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: July 4, 2017
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 9588422
    Abstract: A method of forming an imprint template using a substrate having an inorganic release layer and a layer of imprintable medium is disclosed. The method includes using a master imprint template to imprint a pattern into the imprintable medium, causing the imprintable medium to solidify, and etching the imprintable medium and the inorganic release layer to form a pattern in the inorganic release layer.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: March 7, 2017
    Assignee: ASML NETHERLANDS B.V.
    Inventor: Sander Frederik Wuister
  • Patent number: 9520295
    Abstract: Systems and methods for depositing a metal-doped amorphous carbon hardmask film or a metal-doped amorphous silicon hardmask film includes arranging a substrate in a processing chamber; supplying a carrier gas to the processing chamber; supplying a hydrocarbon precursor gas or a silicon precursor gas to the processing chamber, respectively; supplying a metal-based precursor gas to the processing chamber; one of creating or supplying plasma in the processing chamber; and depositing a metal-doped amorphous carbon hardmask film or a metal-doped amorphous silicon hardmask film on the substrate, respectively.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: December 13, 2016
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Fayaz Shaikh, Sirish Reddy, Alice Hollister
  • Patent number: 9520270
    Abstract: Techniques herein include methods for curing a layer of material (such as a resist) on a substrate to enable relatively greater heat reflow resistance. Increasing reflow resistance enables successful directed self-assembly of block copolymers. Techniques include receiving a substrate having a patterned photoresist layer and positioning this substrate in a processing chamber of a capacitively coupled plasma system. The patterned photoresist layer is treated with a flux of electrons by coupling negative polarity direct current power to a top electrode of the plasma processing system during plasma processing. The flux of electrons is accelerated from the top electrode with sufficient energy to pass through a plasma and its sheath, and strike the substrate such that the patterned photoresist layer changes in physical properties, which can include an increased glass-liquid transition temperature.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: December 13, 2016
    Assignee: Tokyo Eelctron Limited
    Inventors: Nihar Mohanty, Akiteru Ko, Chi-Chun Liu
  • Patent number: 9263337
    Abstract: A system and method for etching a substrate is provided. An embodiment comprises utilizing an inert carrier gas in order to introduce a liquid etchant to a substrate. The inert carrier gas may prevent undesirable chemical reactions from taking place during the etching process, thereby helping to reduce the number of defects that occur to the substrate and other structures during the etching process.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Li Chou, Shao-Yen Ku, Chi-Yun Tseng, Yu-Yen Hsu, Tsai-Pao Su, Hobin Chen, Sheng-Chi Shih
  • Patent number: 9257281
    Abstract: A method of fabricating a pattern comprising sequentially forming a pattern formation layer and a neutral layer on over a substrate having in a first regions and a second regions, forming guide patterns on first portions of over the neutral layer in the second regions, forming a first block copolymer layers on over second portions of the neutral layer in the first regions, phase-separating the tint block copolymer layers such that each of the first block copolymer layers includes to form first polymer blocks having a first phase and first polymer blocks having a second phase, removing the guide patterns to form openings that expose the first portions of the neutral layer in the second region, forming a second block copolymer layer on over the phase-separated first block copolymer layers and in the openings, phase-separating the second block copolymer layer into to form second polymer blocks having the first phase and second polymer blocks having the second phase removing the second polymer blocks having the s
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: February 9, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Cheol Kyu Bok, Myoung Soo Kim
  • Patent number: 9153456
    Abstract: According to one embodiment, first, on a process object, a hydrophilic guide pattern including a first hole forming pattern having a first hole diameter and a second hole forming pattern having a second hole diameter is formed. Then, above the guide pattern, a frame pattern having a first opening region in a forming region of a plurality of the first hole forming patterns and a second opening region in a forming region of a plurality of the second hole forming patterns is formed. Then, a first solution including a first block copolymer having a hydrophilic polymer chain and a hydrophobic polymer chain is supplied to the first opening region to condense the first block copolymer. The hydrophilic polymer chain is then removed to reduce the diameter of the first hole forming pattern to a third hole diameter that is smaller than the first hole diameter.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: October 6, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yumi Nakajima, Kentaro Matsunaga
  • Publication number: 20150140289
    Abstract: A method of patterning a bioresorbable material includes providing a fluoropolymer layer in a first pattern over a layer of bioresorbable material. A patterned bioresorbable material is formed by selectively removing the bioresorbable material in areas not covered by the first pattern of fluoropolymer. The fluoropolymer layer may optionally be provided using a photosensitive fluoropolymer along with fluorinated solvents for coating and developing images. The disclosed methods may provide patterned bioresorbable materials having simple or complex shapes, coarse or fine features. In some embodiments, high volume manufacturing methods such as photolithography may be used. Flexible bioelectronic devices may be provided with patterned bioresorbable materials to aid in application into biological targets, but which later bioresorb thereby imparting higher flexibility to the bioelectronic device.
    Type: Application
    Filed: November 19, 2014
    Publication date: May 21, 2015
    Inventors: Marc FERRO, George MALLIARAS
  • Patent number: 9034197
    Abstract: The disclosure relates generally to a method for fabricating a patterned medium. The method includes providing a substrate with an exterior layer under a lithographically patterned surface layer, the lithographically patterned surface layer comprising a first pattern in a first region and a second pattern in a second region, applying a first masking material over the first region, transferring the second pattern into the exterior layer in the second region, forming self-assembled block copolymer structures over the lithographically patterned surface layer, the self-assembled block copolymer structures aligning with the first pattern in the first region, applying a second masking material over the second region, transferring the polymer block pattern into the exterior layer in the first region, and etching the substrate according to the second pattern transferred to the exterior layer in the second region and the polymer block pattern transferred to the exterior layer in the first region.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: May 19, 2015
    Assignee: HGST NETHERLANDS B.V.
    Inventors: Jeffrey S. Lille, Kurt A. Rubin, Ricardo Ruiz, Lei Wan
  • Publication number: 20150125788
    Abstract: Systems and methods are provided for forming features through photolithography. A polymer layer is formed over a substrate. The polymer layer is patterned to form a first feature and a second feature, the first feature and the second feature being separated at a first distance. A rinse material is applied to the polymer layer including the first feature and the second feature. The rinse material is removed from the polymer layer including the first feature and the second feature to cause the first feature and the second feature to come into contact with each other. A third feature is formed based on the first feature and the second feature being in contact with each other.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 7, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: CHUN-LIANG TAI, BI-MING YEN, CHUN-HUNG LEE, DE-FANG CHEN
  • Patent number: 9017566
    Abstract: A glass article including: at least one anti-glare surface having haze, distinctness-of-image, surface roughness, and uniformity properties, as defined herein. A method of making the glass article includes, for example: depositing deformable particles on at least a portion of a glass surface of the article; causing the deposited deformable particles on the surface to deform and adhere to the surface; and contacting the surface having the adhered particles with an etchant to form the anti-glare surface. A display system that incorporates the glass article, as defined herein, is also disclosed.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: April 28, 2015
    Assignee: Corning Incorporated
    Inventors: Charles Warren Lander, Timothy Edward Myers, Kelvin Nguyen, Alan Thomas Stephens, II
  • Publication number: 20150099109
    Abstract: Block copolymers for use in block copolymer lithography, self-assembled films of the block copolymers and methods for polymerizing the block copolymers are provided. The block copolymers are characterized by high Flory-Huggins interaction parameters (?). The block copolymers can be polymerized from protected hydroxystyrene monomers or from tert-butyl styrene and 2-vinylpyridine monomers.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: Padma Gopalan, Daniel Patrick Sweat, Xiang Yu, Myungwoong Kim
  • Publication number: 20150097204
    Abstract: A method of producing the crystalline substrate having a concave-convex structure includes: (A) forming a transfer film by forming a concave-convex film on a support film on the surface having a concave-convex pattern thereon so that thickness of the residual film of the concave-convex film is 0.01 to 1 ?m, the concave-convex pattern of the support film having concave parts with a width of 0.05 to 100 ?m, a depth of 0.05 to 10 ?m, and a ratio of the depth of the concave part to the width of the concave part of up to 1.5, (B) disposing the transfer film on the crystalline substrate, and transferring the concave-convex film onto the crystalline substrate to produce a crystalline substrate having the concave-convex film thereon, (C) etching the crystalline substrate having the concave-convex film thereon to form a concave-convex structure on the surface of a crystalline substrate.
    Type: Application
    Filed: August 9, 2012
    Publication date: April 9, 2015
    Applicant: Toray Industries, Inc.
    Inventors: Susumu Takada, Emi Kuraseko, Motoyuki Suzuki
  • Publication number: 20150090691
    Abstract: Material for forming an underlayer film for lithography, which has a high carbon concentration, a low oxygen concentration, a relatively high heat resistance and also a relatively high solvent solubility, and which can be applied to a wet process is disclosed. Material for forming an underlayer film for lithography contains a compound represented by general formula (1).
    Type: Application
    Filed: August 9, 2012
    Publication date: April 2, 2015
    Applicant: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Masatoshi Echigo, Go Higashihara, Naoya Uchiyama
  • Patent number: 8992787
    Abstract: Anode foils suitable for use in electrolytic capacitors, including those having multiple anode configurations, have improved strength, reduced brittleness, and increased capacitance compared to conventional anode foils for electrolytic capacitors. Exemplary methods of manufacturing an anode foil suitable for use in an electrolytic capacitor include disposing a resist material in a predetermined pattern on an exposed surface of an anode foil substrate such that a first portion of the exposed surface of the anode foil substrate is covered by the resist material, and a second portion of the exposed surface remains uncovered; polymerizing the resist material; exposing at least the second portion of the exposed surface to one or more etchants so as to form a plurality of tunnels; stripping the polymerized resist material; and widening at least a portion of the plurality of tunnels. The resist material may be deposited, for example, by ink-jet printing, stamping or screen printing.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: March 31, 2015
    Assignee: Pacesetter, Inc.
    Inventors: David R. Bowen, Ralph Jason Hemphill, Xiaofei Jiang, Corina Geiculescu, Tearl Stocker
  • Patent number: 8992790
    Abstract: A patterning process which uses self-assembly, including: forming a silicon-containing film by applying a silicon-containing film composition having an organic substituent group substituted with an acid labile group onto a substrate to be processed, forming a photoresist film onto the silicon-containing film, pattern-exposing of the photoresist film, removing the photoresist film, forming a polymer film by applying a self-assembling polymer onto the silicon-containing film, self-assembling the polymer film to form a microdomain structure, forming a pattern of the polymer film having the microdomain formed, transferring the pattern to the silicon-containing film by using the pattern formed on the polymer as a mask, and transferring the pattern to the substrate to be processed by using the pattern transferred to the silicon-containing film as a mask. There can be provided a pattern having a microdomain structure formed by self-assembly with uniformity and regularity.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: March 31, 2015
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Jun Hatakeyama
  • Patent number: 8986554
    Abstract: A method of forming patterns includes forming a photoresist film on a substrate. The photoresist film is exposed with a first dose of light to form a first area and a second area in the photoresist film. A first hole and a second hole are formed by removing the first area and the second area with a first developer. The photoresist film is re-exposed with a second dose of the light to form a third area in the photoresist film between the first hole and the second hole. A third hole is formed between the first hole and the second hole by removing the third area with a second developer.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-sung Kim, Kyoung-seon Kim, Jae-woo Nam, Chul-ho Shin, Shi-young Yi
  • Patent number: 8986561
    Abstract: Disclosed is a substrate processing method of etching a substrate including a target layer, and a mask layer and an intermediate layer that are stacked on the target layer, to form a pattern on the target layer via the intermediate layer and the mask layer. The intermediate layer is etched under a processing pressure of 100 mTorr (1.33×10 Pa) to 150 mTorr (2.0×10 Pa) by using as a processing gas a mixture gas of CF4, CHF3, and C4F8, and the mask layer is etched by using a COS-containing gas as a processing gas.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: March 24, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Sungtae Lee, Masahiro Ogasawara, Masahiro Ito
  • Publication number: 20150076108
    Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer, dispensing a Bulk Co-Polymer (BCP) coating in the trench, wherein the BCP coating comprises a mix of a first material and a second material different from the first material. The method further includes treating the BCP coating with a chemical to form a first plurality of strips of the first material and a second plurality of strips of the second material, with the first plurality of strips and the second plurality of strips allocated in an alternating layout. The second plurality of strips is selectively etched, and the first plurality of strips is left in the trench.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Inventor: Yu-Sheng Chang
  • Patent number: 8980418
    Abstract: A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: March 17, 2015
    Assignee: UChicago Argonne, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Patent number: 8974683
    Abstract: A method of reducing roughness in an opening in a surface of a resist material disposed on a substrate, comprises generating a plasma having a plasma sheath and ions therein. The method also includes modifying a shape of a boundary defined between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the boundary facing the resist material is not parallel to a plane defined by the surface of the substrate. The method also includes providing a first exposure of ions while the substrate is in a first position, the first exposure comprising ions accelerated across the boundary having the modified shape toward the resist material over an angular range with respect to the surface of the substrate.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: March 10, 2015
    Inventors: Ludovic Godet, Patrick M. Martin, Joseph C. Olson, Andrew J. Hornak
  • Patent number: 8974678
    Abstract: Block copolymers can be self-assembled and used in methods as described herein for sub-lithographic patterning, for example. The block copolymers can be diblock copolymers, triblock copolymers, multiblock copolymers, or combinations thereof. Such methods can be useful for making devices that include, for example, sub-lithographic conductive lines.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: March 10, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Dan Millward
  • Publication number: 20150065389
    Abstract: The present invention is drawn to the generation of micropatterns of biomolecules and cells on standard laboratory materials through selective ablation of a physisorbed biomolecule with oxygen plasma. In certain embodiments, oxygen plasma is able to ablate selectively physisorbed layers of biomolecules (e.g., type-I collagen, fibronectin, laminin, and Matrigel) along complex non-linear paths which are difficult or impossible to pattern using alternative methods. In addition, certain embodiments of the present invention relate to the micropatterning of multiple cell types on curved surfaces, multiwell plates, and flat bottom flasks. The invention also features kits for use with the subject methods.
    Type: Application
    Filed: March 26, 2014
    Publication date: March 5, 2015
    Applicant: Massachusetts Institute of Technology
    Inventors: David T. Eddington, Sangeeta N. BHATIA
  • Patent number: 8961802
    Abstract: A method of forming a fine pattern, including: a phase separation step in which a layer containing a block copolymer having a plurality of blocks bonded is formed on a substrate, and then the layer is heated for phase separation of the layer; a decomposition step in which at least a portion of a phase of at least one block of the plurality of blocks constituting the block copolymer is decomposed; a selective removal step in which the layer is immersed in a developing solution to selectively remove a phase containing decomposed blocks to form a nano structure; and an etching step in which the substrate is subjected to etching by using the nano structure as a mask; and a main component of the developing solution is an organic solvent having an SP value of 7.5 to 11.5 (cal/cm3)1/2, and having vapor pressure of less than 2.1 kPa at 25° C., or is benzene that may be substituted by an alkyl group, an alkoxy group, or a halogen atom, and the developing solution further contains metal alkoxide.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: February 24, 2015
    Assignees: Tokyo Ohka Kogyo Co., Ltd., Riken
    Inventors: Shigenori Fujikawa, Harumi Hayakawa, Takahiro Senzaki, Ken Miyagi
  • Publication number: 20150050599
    Abstract: A method is disclosed to form a patterned epitaxy template, on a substrate, to direct self-assembly of block copolymer for device lithography. A resist layer on a substrate is selectively exposed with actinic (e.g. UV or DUV) radiation by photolithography to provide exposed portions in a regular lattice pattern of touching or overlapping shapes arranged to leave unexposed resist portions between the shapes. Exposed or unexposed resist is removed with remaining resist portions providing the basis for a patterned epitaxy template for the orientation of the self-assemblable block copolymer as a hexagonal or square array. The method allows for simple, direct UV lithography to form patterned epitaxy templates with sub-resolution features.
    Type: Application
    Filed: March 19, 2013
    Publication date: February 19, 2015
    Applicant: ASML Netherlands B.V.
    Inventors: Sander Frederik Wuister, Vadim Yevgenyevich Banine, Jozef Maria Finders, Roelof Koole, Emiel Peeters, Harmeet Singh
  • Patent number: 8951427
    Abstract: A method for manufacturing electrical and/or optical components, wherein a hot melt composition including an alkane based wax and an amorphous material as a masking material is used. The hot melt composition has a melting point of between 40° C. and 85° C. and a viscosity of between 5 and 20 mPa·s at not less than one temperature within the range of between 50° C. and 140° C. A hot melt composition includes between 40 weight % and 89.9 weight % of an alkane based wax; between 10 weight % and 50 weight % of an amorphous material; and between 0.1 weight % and 10 weight % of a phosphonium based ionic liquid. A system and a method for manufacturing electronic and/or optical components is provided, wherein after the etch processes and/or plating processes, the hot melt composition is removed from the substrate with the aid of hot water.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: February 10, 2015
    Assignee: Oce Technologies B.V.
    Inventors: Björn H. A. J. M. Ketelaars, Hylke Veenstra
  • Patent number: 8951425
    Abstract: A method of forming at least one curved plate having first and second layers, the first layer being formed of a first material and the second layer being formed of a second material, the method including forming one or more blocks of a fusible material on a surface of a substrate; baking the one or more blocks to deform their shape; and depositing the first and second materials over the one or more deformed blocks to form the first and second layers.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: February 10, 2015
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Stéphane Monfray, Thomas Skotnicki, Onoriu Puscasu, Christophe Maitre
  • Publication number: 20150034594
    Abstract: A method is disclosed to form a patterned template on a substrate, to direct orientation of a self-assemblable block copolymer. The method involves providing a resist layer of a positive tone resist on the substrate and overexposing the resist with actinic (e.g. UV) radiation by photolithography to expose a continuous region of the resist layer with a sub-resolution unexposed resist portion at the interface between the resist and the substrate. The resist portion remaining at the interface, after removal of the exposed region, provides a basis for a chemical epitaxy template. The method may allow for simple, direct photolithography to form a patterned chemical epitaxy template and optionally include an accurately co-aligned graphoepitaxy feature and/or a substrate alignment feature.
    Type: Application
    Filed: March 6, 2013
    Publication date: February 5, 2015
    Applicant: ASML Netherlands B.V.
    Inventors: Harmeet Singh, Vadim Yevgenyevich Banine, Jozef Maria Finders, Sander Frederik Wuister, Roelof Koole, Emiel Peeters
  • Publication number: 20150034595
    Abstract: A method of forming a structure containing a phase-separated structure, the method including: a step of forming a layer containing a block copolymer having a plurality of blocks bonded and a purity of 98% or more, and a step of phase-separating the layer containing the block copolymer.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 5, 2015
    Inventors: Takehiro Seshimo, Takahiro Dazai, Takaya Maehashi, Ken Miyagi, Yoshiyuki Utsumi
  • Patent number: 8945408
    Abstract: Provided is a method for preparing a patterned directed self-assembly layer, comprising: providing a substrate having a block copolymer layer comprising a first phase-separated polymer defining a first pattern in the block copolymer layer and a second phase-separated polymer defining a second pattern in the block copolymer layer; and performing an etching process to selectively remove the second phase-separated polymer while leaving behind the first pattern of the first phase-separated polymer on the surface of the substrate, the etching process being performed at a substrate temperature less than or equal to about 20 degrees C. The method further comprises providing a substrate holder for supporting the substrate, the substrate holder having a first temperature control element for controlling a first temperature at a central region and second temperature control element at an edge region of the substrate and setting a target value for the first and the second temperature.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: February 3, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Vidhya Chakrapani, Akiteru Ko, Kaushik Kumar
  • Patent number: 8945406
    Abstract: A method for manufacturing a symbol on an exterior of an electronic device is provided. The method includes preparing a support layer, preparing a nanograting layer on the support layer, the nanograting layer including a first nanograting area corresponding to a preset symbol and a second nanograting area corresponding to an area other than the preset symbol, wherein each of the first nanograting area and the second nanograting area includes three-dimensional (3D) nanostructures and a pitch between the 3D nanostructures arranged in the first nanograting area is different from a pitch between the 3D nanostructures arranged in the second nanograting area.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: February 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-eun Chung, Il-yong Jung
  • Publication number: 20150027980
    Abstract: The invention relates to a method for manufacturing an apparatus for the processing of single molecules. According to this method, a self-assembling resist (155) is deposited on a processing layer (110, PL) and allowed to self-assemble into a pattern of two phases (155a, 155b). One of these phases (155a) is then selectively removed, and at least one aperture is generated in the processing layer (110, PL) through the mask of the remaining resist (155b). Thus apertures of small size can readily be produced that allow for the processing of single molecules (M), for example in DNA sequencing.
    Type: Application
    Filed: March 14, 2013
    Publication date: January 29, 2015
    Applicant: KONINKLIJKE PHILIPS N.V.
    Inventors: Pieter Jan Van Der Zaag, Emiel Peeters, Roelof Koole, Falco Cornelius Marinus Jacobus Maria Van Delft
  • Patent number: 8920664
    Abstract: According to one embodiment, a pattern forming method includes forming a physical guide that includes a first predetermined pattern in a first region on a lower layer film, and includes a second predetermined pattern and a dummy pattern in a second region on the lower layer film, forming a block polymer inside the physical guide, making the block polymer microphase-separated to form a pattern having a first polymer section and a second polymer section, removing the second polymer section to form a hole pattern, and processing the lower layer film after removal of the second polymer section, with the physical guide and the first polymer section used as a mask. Shapes of the hole patterns in the first and the second predetermined patterns are transferred to the lower layer film. A shape of the hole pattern in the dummy pattern is not transferred to the lower layer film.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: December 30, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuriko Seino, Hirokazu Kato, Hiroki Yonemitsu
  • Patent number: 8916052
    Abstract: The present disclosure provides various methods for removing a resist layer from a wafer. An exemplary method includes performing an etching process to remove a resist layer from a wafer. During the etching process, a first heating process is performed to effect a first graded thermal profile in the resist layer, the first graded thermal profile having a temperature that increases along a direction perpendicular to the wafer. Further during the etching process, and after performing the first heating process, a second heating process is performed to effect a second graded thermal profile in the resist layer, the second graded thermal profile having a temperature that decreases along the direction perpendicular to the wafer. In an example, the method further includes, before performing the etching process, performing an ion implantation process to the wafer using the resist layer as a mask.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: December 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Jui Li, Buh-Kuan Fang
  • Publication number: 20140360975
    Abstract: Disclosed herein is a block copolymer comprising a first block derived from a cyclo-alkyl vinyl monomer, a hydrogenated vinyl aromatic polymer or a hydrogenated vinyl pyridine polymers; and a second block derived from an acrylate monomer. Disclosed herein too is a method comprising reacting a first block derived from a cyclo-alkyl vinyl monomer, a hydrogenated vinyl aromatic polymer or a hydrogenated vinyl pyridine polymers with an initiator to form a macroinitiator; and polymerizing a second block onto the first block to form a block copolymer; where the second block is derived by polymerizing an acrylate monomer; and where the block copolymer has a chi parameter of greater than or equal to about 0.05, when measured at a temperature of 200° C. to 210° C.; where the chi parameter is a measure of interactions between the first block and the second block of the copolymer.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 11, 2014
    Applicants: Regents of the University of Minnesota, Dow Global Technologies LLC
    Inventors: Phillip Dene Hustad, Frank Steven Bates, Marc Andrew Hillmyer, Justin Glenn Kennemur
  • Patent number: 8900467
    Abstract: A method for making a chemical contrast pattern uses directed self-assembly of block copolymers (BCPs) and sequential infiltration synthesis (SIS) of an inorganic material. For an example with poly(styrene-block-methyl methacrylate) (PS-b-PMMA) as the BCP and alumina as the inorganic material, the PS and PMMA self-assemble on a suitable substrate. The PMMA is removed and the PS is oxidized. A surface modification polymer (SMP) is deposited on the oxidized PS and the exposed substrate and the SMP not bound to the substrate is removed. The structure is placed in an atomic layer deposition chamber. Alumina precursors reactive with the oxidized PS are introduced and infuse by SIS into the oxidized PS, thereby forming on the substrate a chemical contrast pattern of SMP and alumina. The resulting chemical contrast pattern can be used for lithographic masks, for example to etch the underlying substrate to make an imprint template.
    Type: Grant
    Filed: May 25, 2013
    Date of Patent: December 2, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Yves-Andre Chapuis, Ricardo Ruiz, Lei Wan